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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2017 MediaTek, Inc.
4 *
5 * Author: Chen Zhong <chen.zhong@mediatek.com>
6 */
7
8#include <linux/input.h>
9#include <linux/interrupt.h>
10#include <linux/kernel.h>
11#include <linux/mfd/mt6323/registers.h>
12#include <linux/mfd/mt6397/core.h>
13#include <linux/mfd/mt6397/registers.h>
14#include <linux/module.h>
15#include <linux/of_device.h>
16#include <linux/of.h>
17#include <linux/platform_device.h>
18#include <linux/regmap.h>
19
20#define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1
21#define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6
22#define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1
23#define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5
24#define MTK_PMIC_RST_DU_MASK 0x3
25#define MTK_PMIC_RST_DU_SHIFT 8
26
27#define MTK_PMIC_PWRKEY_RST \
28 (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT)
29#define MTK_PMIC_HOMEKEY_RST \
30 (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT)
31
32#define MTK_PMIC_PWRKEY_INDEX 0
33#define MTK_PMIC_HOMEKEY_INDEX 1
34#define MTK_PMIC_MAX_KEY_COUNT 2
35
36struct mtk_pmic_keys_regs {
37 u32 deb_reg;
38 u32 deb_mask;
39 u32 intsel_reg;
40 u32 intsel_mask;
41};
42
43#define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
44 _intsel_reg, _intsel_mask) \
45{ \
46 .deb_reg = _deb_reg, \
47 .deb_mask = _deb_mask, \
48 .intsel_reg = _intsel_reg, \
49 .intsel_mask = _intsel_mask, \
50}
51
52struct mtk_pmic_regs {
53 const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
54 u32 pmic_rst_reg;
55};
56
57static const struct mtk_pmic_regs mt6397_regs = {
58 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
59 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
60 0x8, MT6397_INT_RSV, 0x10),
61 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
62 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
63 0x10, MT6397_INT_RSV, 0x8),
64 .pmic_rst_reg = MT6397_TOP_RST_MISC,
65};
66
67static const struct mtk_pmic_regs mt6323_regs = {
68 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
69 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
70 0x2, MT6323_INT_MISC_CON, 0x10),
71 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
72 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
73 0x4, MT6323_INT_MISC_CON, 0x8),
74 .pmic_rst_reg = MT6323_TOP_RST_MISC,
75};
76
77struct mtk_pmic_keys_info {
78 struct mtk_pmic_keys *keys;
79 const struct mtk_pmic_keys_regs *regs;
80 unsigned int keycode;
81 int irq;
82 bool wakeup:1;
83};
84
85struct mtk_pmic_keys {
86 struct input_dev *input_dev;
87 struct device *dev;
88 struct regmap *regmap;
89 struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
90};
91
92enum mtk_pmic_keys_lp_mode {
93 LP_DISABLE,
94 LP_ONEKEY,
95 LP_TWOKEY,
96};
97
98static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
99 u32 pmic_rst_reg)
100{
101 int ret;
102 u32 long_press_mode, long_press_debounce;
103
104 ret = of_property_read_u32(keys->dev->of_node,
105 "power-off-time-sec", &long_press_debounce);
106 if (ret)
107 long_press_debounce = 0;
108
109 regmap_update_bits(keys->regmap, pmic_rst_reg,
110 MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT,
111 long_press_debounce << MTK_PMIC_RST_DU_SHIFT);
112
113 ret = of_property_read_u32(keys->dev->of_node,
114 "mediatek,long-press-mode", &long_press_mode);
115 if (ret)
116 long_press_mode = LP_DISABLE;
117
118 switch (long_press_mode) {
119 case LP_ONEKEY:
120 regmap_update_bits(keys->regmap, pmic_rst_reg,
121 MTK_PMIC_PWRKEY_RST,
122 MTK_PMIC_PWRKEY_RST);
123 regmap_update_bits(keys->regmap, pmic_rst_reg,
124 MTK_PMIC_HOMEKEY_RST,
125 0);
126 break;
127 case LP_TWOKEY:
128 regmap_update_bits(keys->regmap, pmic_rst_reg,
129 MTK_PMIC_PWRKEY_RST,
130 MTK_PMIC_PWRKEY_RST);
131 regmap_update_bits(keys->regmap, pmic_rst_reg,
132 MTK_PMIC_HOMEKEY_RST,
133 MTK_PMIC_HOMEKEY_RST);
134 break;
135 case LP_DISABLE:
136 regmap_update_bits(keys->regmap, pmic_rst_reg,
137 MTK_PMIC_PWRKEY_RST,
138 0);
139 regmap_update_bits(keys->regmap, pmic_rst_reg,
140 MTK_PMIC_HOMEKEY_RST,
141 0);
142 break;
143 default:
144 break;
145 }
146}
147
148static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
149{
150 struct mtk_pmic_keys_info *info = data;
151 u32 key_deb, pressed;
152
153 regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
154
155 key_deb &= info->regs->deb_mask;
156
157 pressed = !key_deb;
158
159 input_report_key(info->keys->input_dev, info->keycode, pressed);
160 input_sync(info->keys->input_dev);
161
162 dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
163 pressed ? "pressed" : "released", info->keycode);
164
165 return IRQ_HANDLED;
166}
167
168static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
169 struct mtk_pmic_keys_info *info)
170{
171 int ret;
172
173 info->keys = keys;
174
175 ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
176 info->regs->intsel_mask,
177 info->regs->intsel_mask);
178 if (ret < 0)
179 return ret;
180
181 ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
182 mtk_pmic_keys_irq_handler_thread,
183 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
184 "mtk-pmic-keys", info);
185 if (ret) {
186 dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
187 info->irq, ret);
188 return ret;
189 }
190
191 input_set_capability(keys->input_dev, EV_KEY, info->keycode);
192
193 return 0;
194}
195
196static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev)
197{
198 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
199 int index;
200
201 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
202 if (keys->keys[index].wakeup)
203 enable_irq_wake(keys->keys[index].irq);
204 }
205
206 return 0;
207}
208
209static int __maybe_unused mtk_pmic_keys_resume(struct device *dev)
210{
211 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
212 int index;
213
214 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
215 if (keys->keys[index].wakeup)
216 disable_irq_wake(keys->keys[index].irq);
217 }
218
219 return 0;
220}
221
222static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
223 mtk_pmic_keys_resume);
224
225static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
226 {
227 .compatible = "mediatek,mt6397-keys",
228 .data = &mt6397_regs,
229 }, {
230 .compatible = "mediatek,mt6323-keys",
231 .data = &mt6323_regs,
232 }, {
233 /* sentinel */
234 }
235};
236MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
237
238static int mtk_pmic_keys_probe(struct platform_device *pdev)
239{
240 int error, index = 0;
241 unsigned int keycount;
242 struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
243 struct device_node *node = pdev->dev.of_node, *child;
244 struct mtk_pmic_keys *keys;
245 const struct mtk_pmic_regs *mtk_pmic_regs;
246 struct input_dev *input_dev;
247 const struct of_device_id *of_id =
248 of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
249
250 keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
251 if (!keys)
252 return -ENOMEM;
253
254 keys->dev = &pdev->dev;
255 keys->regmap = pmic_chip->regmap;
256 mtk_pmic_regs = of_id->data;
257
258 keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
259 if (!input_dev) {
260 dev_err(keys->dev, "input allocate device fail.\n");
261 return -ENOMEM;
262 }
263
264 input_dev->name = "mtk-pmic-keys";
265 input_dev->id.bustype = BUS_HOST;
266 input_dev->id.vendor = 0x0001;
267 input_dev->id.product = 0x0001;
268 input_dev->id.version = 0x0001;
269
270 keycount = of_get_available_child_count(node);
271 if (keycount > MTK_PMIC_MAX_KEY_COUNT) {
272 dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
273 return -EINVAL;
274 }
275
276 for_each_child_of_node(node, child) {
277 keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
278
279 keys->keys[index].irq = platform_get_irq(pdev, index);
280 if (keys->keys[index].irq < 0) {
281 of_node_put(child);
282 return keys->keys[index].irq;
283 }
284
285 error = of_property_read_u32(child,
286 "linux,keycodes", &keys->keys[index].keycode);
287 if (error) {
288 dev_err(keys->dev,
289 "failed to read key:%d linux,keycode property: %d\n",
290 index, error);
291 of_node_put(child);
292 return error;
293 }
294
295 if (of_property_read_bool(child, "wakeup-source"))
296 keys->keys[index].wakeup = true;
297
298 error = mtk_pmic_key_setup(keys, &keys->keys[index]);
299 if (error) {
300 of_node_put(child);
301 return error;
302 }
303
304 index++;
305 }
306
307 error = input_register_device(input_dev);
308 if (error) {
309 dev_err(&pdev->dev,
310 "register input device failed (%d)\n", error);
311 return error;
312 }
313
314 mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg);
315
316 platform_set_drvdata(pdev, keys);
317
318 return 0;
319}
320
321static struct platform_driver pmic_keys_pdrv = {
322 .probe = mtk_pmic_keys_probe,
323 .driver = {
324 .name = "mtk-pmic-keys",
325 .of_match_table = of_mtk_pmic_keys_match_tbl,
326 .pm = &mtk_pmic_keys_pm_ops,
327 },
328};
329
330module_platform_driver(pmic_keys_pdrv);
331
332MODULE_LICENSE("GPL v2");
333MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
334MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2017 MediaTek, Inc.
4 *
5 * Author: Chen Zhong <chen.zhong@mediatek.com>
6 */
7
8#include <linux/input.h>
9#include <linux/interrupt.h>
10#include <linux/kernel.h>
11#include <linux/mfd/mt6323/registers.h>
12#include <linux/mfd/mt6331/registers.h>
13#include <linux/mfd/mt6357/registers.h>
14#include <linux/mfd/mt6358/registers.h>
15#include <linux/mfd/mt6397/core.h>
16#include <linux/mfd/mt6397/registers.h>
17#include <linux/module.h>
18#include <linux/of_device.h>
19#include <linux/of.h>
20#include <linux/platform_device.h>
21#include <linux/regmap.h>
22
23#define MTK_PMIC_RST_DU_MASK GENMASK(9, 8)
24#define MTK_PMIC_PWRKEY_RST BIT(6)
25#define MTK_PMIC_HOMEKEY_RST BIT(5)
26
27#define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12)
28#define MTK_PMIC_MT6331_PWRKEY_RST BIT(9)
29#define MTK_PMIC_MT6331_HOMEKEY_RST BIT(8)
30
31#define MTK_PMIC_PWRKEY_INDEX 0
32#define MTK_PMIC_HOMEKEY_INDEX 1
33#define MTK_PMIC_MAX_KEY_COUNT 2
34
35struct mtk_pmic_keys_regs {
36 u32 deb_reg;
37 u32 deb_mask;
38 u32 intsel_reg;
39 u32 intsel_mask;
40 u32 rst_en_mask;
41};
42
43#define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
44 _intsel_reg, _intsel_mask, _rst_mask) \
45{ \
46 .deb_reg = _deb_reg, \
47 .deb_mask = _deb_mask, \
48 .intsel_reg = _intsel_reg, \
49 .intsel_mask = _intsel_mask, \
50 .rst_en_mask = _rst_mask, \
51}
52
53struct mtk_pmic_regs {
54 const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
55 u32 pmic_rst_reg;
56 u32 rst_lprst_mask; /* Long-press reset timeout bitmask */
57};
58
59static const struct mtk_pmic_regs mt6397_regs = {
60 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
61 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
62 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_PWRKEY_RST),
63 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
64 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
65 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST),
66 .pmic_rst_reg = MT6397_TOP_RST_MISC,
67 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
68};
69
70static const struct mtk_pmic_regs mt6323_regs = {
71 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
72 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
73 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST),
74 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
75 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
76 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST),
77 .pmic_rst_reg = MT6323_TOP_RST_MISC,
78 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
79};
80
81static const struct mtk_pmic_regs mt6331_regs = {
82 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
83 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2,
84 MT6331_INT_MISC_CON, 0x4,
85 MTK_PMIC_MT6331_PWRKEY_RST),
86 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
87 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4,
88 MT6331_INT_MISC_CON, 0x2,
89 MTK_PMIC_MT6331_HOMEKEY_RST),
90 .pmic_rst_reg = MT6331_TOP_RST_MISC,
91 .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK,
92};
93
94static const struct mtk_pmic_regs mt6357_regs = {
95 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
96 MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS,
97 0x2, MT6357_PSC_TOP_INT_CON0, 0x5,
98 MTK_PMIC_PWRKEY_RST),
99 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
100 MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS,
101 0x8, MT6357_PSC_TOP_INT_CON0, 0xa,
102 MTK_PMIC_HOMEKEY_INDEX),
103 .pmic_rst_reg = MT6357_TOP_RST_MISC,
104 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
105};
106
107static const struct mtk_pmic_regs mt6358_regs = {
108 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
109 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
110 0x2, MT6358_PSC_TOP_INT_CON0, 0x5,
111 MTK_PMIC_PWRKEY_RST),
112 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
113 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
114 0x8, MT6358_PSC_TOP_INT_CON0, 0xa,
115 MTK_PMIC_HOMEKEY_RST),
116 .pmic_rst_reg = MT6358_TOP_RST_MISC,
117 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
118};
119
120struct mtk_pmic_keys_info {
121 struct mtk_pmic_keys *keys;
122 const struct mtk_pmic_keys_regs *regs;
123 unsigned int keycode;
124 int irq;
125 int irq_r; /* optional: release irq if different */
126 bool wakeup:1;
127};
128
129struct mtk_pmic_keys {
130 struct input_dev *input_dev;
131 struct device *dev;
132 struct regmap *regmap;
133 struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
134};
135
136enum mtk_pmic_keys_lp_mode {
137 LP_DISABLE,
138 LP_ONEKEY,
139 LP_TWOKEY,
140};
141
142static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
143 const struct mtk_pmic_regs *regs)
144{
145 const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr;
146 u32 long_press_mode, long_press_debounce;
147 u32 value, mask;
148 int error;
149
150 kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs;
151 kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs;
152
153 error = of_property_read_u32(keys->dev->of_node, "power-off-time-sec",
154 &long_press_debounce);
155 if (error)
156 long_press_debounce = 0;
157
158 mask = regs->rst_lprst_mask;
159 value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1);
160
161 error = of_property_read_u32(keys->dev->of_node,
162 "mediatek,long-press-mode",
163 &long_press_mode);
164 if (error)
165 long_press_mode = LP_DISABLE;
166
167 switch (long_press_mode) {
168 case LP_TWOKEY:
169 value |= kregs_home->rst_en_mask;
170 fallthrough;
171
172 case LP_ONEKEY:
173 value |= kregs_pwr->rst_en_mask;
174 fallthrough;
175
176 case LP_DISABLE:
177 mask |= kregs_home->rst_en_mask;
178 mask |= kregs_pwr->rst_en_mask;
179 break;
180
181 default:
182 break;
183 }
184
185 regmap_update_bits(keys->regmap, regs->pmic_rst_reg, mask, value);
186}
187
188static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
189{
190 struct mtk_pmic_keys_info *info = data;
191 u32 key_deb, pressed;
192
193 regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
194
195 key_deb &= info->regs->deb_mask;
196
197 pressed = !key_deb;
198
199 input_report_key(info->keys->input_dev, info->keycode, pressed);
200 input_sync(info->keys->input_dev);
201
202 dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
203 pressed ? "pressed" : "released", info->keycode);
204
205 return IRQ_HANDLED;
206}
207
208static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
209 struct mtk_pmic_keys_info *info)
210{
211 int ret;
212
213 info->keys = keys;
214
215 ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
216 info->regs->intsel_mask,
217 info->regs->intsel_mask);
218 if (ret < 0)
219 return ret;
220
221 ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
222 mtk_pmic_keys_irq_handler_thread,
223 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
224 "mtk-pmic-keys", info);
225 if (ret) {
226 dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
227 info->irq, ret);
228 return ret;
229 }
230
231 if (info->irq_r > 0) {
232 ret = devm_request_threaded_irq(keys->dev, info->irq_r, NULL,
233 mtk_pmic_keys_irq_handler_thread,
234 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
235 "mtk-pmic-keys", info);
236 if (ret) {
237 dev_err(keys->dev, "Failed to request IRQ_r: %d: %d\n",
238 info->irq, ret);
239 return ret;
240 }
241 }
242
243 input_set_capability(keys->input_dev, EV_KEY, info->keycode);
244
245 return 0;
246}
247
248static int mtk_pmic_keys_suspend(struct device *dev)
249{
250 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
251 int index;
252
253 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
254 if (keys->keys[index].wakeup) {
255 enable_irq_wake(keys->keys[index].irq);
256 if (keys->keys[index].irq_r > 0)
257 enable_irq_wake(keys->keys[index].irq_r);
258 }
259 }
260
261 return 0;
262}
263
264static int mtk_pmic_keys_resume(struct device *dev)
265{
266 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
267 int index;
268
269 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
270 if (keys->keys[index].wakeup) {
271 disable_irq_wake(keys->keys[index].irq);
272 if (keys->keys[index].irq_r > 0)
273 disable_irq_wake(keys->keys[index].irq_r);
274 }
275 }
276
277 return 0;
278}
279
280static DEFINE_SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
281 mtk_pmic_keys_resume);
282
283static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
284 {
285 .compatible = "mediatek,mt6397-keys",
286 .data = &mt6397_regs,
287 }, {
288 .compatible = "mediatek,mt6323-keys",
289 .data = &mt6323_regs,
290 }, {
291 .compatible = "mediatek,mt6331-keys",
292 .data = &mt6331_regs,
293 }, {
294 .compatible = "mediatek,mt6357-keys",
295 .data = &mt6357_regs,
296 }, {
297 .compatible = "mediatek,mt6358-keys",
298 .data = &mt6358_regs,
299 }, {
300 /* sentinel */
301 }
302};
303MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
304
305static int mtk_pmic_keys_probe(struct platform_device *pdev)
306{
307 int error, index = 0;
308 unsigned int keycount;
309 struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
310 struct device_node *node = pdev->dev.of_node, *child;
311 static const char *const irqnames[] = { "powerkey", "homekey" };
312 static const char *const irqnames_r[] = { "powerkey_r", "homekey_r" };
313 struct mtk_pmic_keys *keys;
314 const struct mtk_pmic_regs *mtk_pmic_regs;
315 struct input_dev *input_dev;
316 const struct of_device_id *of_id =
317 of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
318
319 keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
320 if (!keys)
321 return -ENOMEM;
322
323 keys->dev = &pdev->dev;
324 keys->regmap = pmic_chip->regmap;
325 mtk_pmic_regs = of_id->data;
326
327 keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
328 if (!input_dev) {
329 dev_err(keys->dev, "input allocate device fail.\n");
330 return -ENOMEM;
331 }
332
333 input_dev->name = "mtk-pmic-keys";
334 input_dev->id.bustype = BUS_HOST;
335 input_dev->id.vendor = 0x0001;
336 input_dev->id.product = 0x0001;
337 input_dev->id.version = 0x0001;
338
339 keycount = of_get_available_child_count(node);
340 if (keycount > MTK_PMIC_MAX_KEY_COUNT ||
341 keycount > ARRAY_SIZE(irqnames)) {
342 dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
343 return -EINVAL;
344 }
345
346 for_each_child_of_node(node, child) {
347 keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
348
349 keys->keys[index].irq =
350 platform_get_irq_byname(pdev, irqnames[index]);
351 if (keys->keys[index].irq < 0) {
352 of_node_put(child);
353 return keys->keys[index].irq;
354 }
355
356 if (of_device_is_compatible(node, "mediatek,mt6358-keys")) {
357 keys->keys[index].irq_r = platform_get_irq_byname(pdev,
358 irqnames_r[index]);
359
360 if (keys->keys[index].irq_r < 0) {
361 of_node_put(child);
362 return keys->keys[index].irq_r;
363 }
364 }
365
366 error = of_property_read_u32(child,
367 "linux,keycodes", &keys->keys[index].keycode);
368 if (error) {
369 dev_err(keys->dev,
370 "failed to read key:%d linux,keycode property: %d\n",
371 index, error);
372 of_node_put(child);
373 return error;
374 }
375
376 if (of_property_read_bool(child, "wakeup-source"))
377 keys->keys[index].wakeup = true;
378
379 error = mtk_pmic_key_setup(keys, &keys->keys[index]);
380 if (error) {
381 of_node_put(child);
382 return error;
383 }
384
385 index++;
386 }
387
388 error = input_register_device(input_dev);
389 if (error) {
390 dev_err(&pdev->dev,
391 "register input device failed (%d)\n", error);
392 return error;
393 }
394
395 mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs);
396
397 platform_set_drvdata(pdev, keys);
398
399 return 0;
400}
401
402static struct platform_driver pmic_keys_pdrv = {
403 .probe = mtk_pmic_keys_probe,
404 .driver = {
405 .name = "mtk-pmic-keys",
406 .of_match_table = of_mtk_pmic_keys_match_tbl,
407 .pm = pm_sleep_ptr(&mtk_pmic_keys_pm_ops),
408 },
409};
410
411module_platform_driver(pmic_keys_pdrv);
412
413MODULE_LICENSE("GPL v2");
414MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
415MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");