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1# SPDX-License-Identifier: GPL-2.0
2comment "Processor Type"
3
4choice
5 prompt "CPU family support"
6 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU
8 help
9 The Freescale (was Motorola) M68K family of processors implements
10 the full 68000 processor instruction set.
11 The Freescale ColdFire family of processors is a modern derivative
12 of the 68000 processor family. They are mainly targeted at embedded
13 applications, and are all System-On-Chip (SOC) devices, as opposed
14 to stand alone CPUs. They implement a subset of the original 68000
15 processor instruction set.
16 If you anticipate running this kernel on a computer with a classic
17 MC68xxx processor, select M68KCLASSIC.
18 If you anticipate running this kernel on a computer with a ColdFire
19 processor, select COLDFIRE.
20
21config M68KCLASSIC
22 bool "Classic M68K CPU family support"
23
24config COLDFIRE
25 bool "Coldfire CPU family support"
26 select ARCH_HAVE_CUSTOM_GPIO_H
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_MULDIV64
29 select GENERIC_CSUM
30 select GPIOLIB
31 select HAVE_LEGACY_CLK
32
33endchoice
34
35if M68KCLASSIC
36
37config M68000
38 bool "MC68000"
39 depends on !MMU
40 select CPU_HAS_NO_BITFIELDS
41 select CPU_HAS_NO_MULDIV64
42 select CPU_HAS_NO_UNALIGNED
43 select GENERIC_CSUM
44 select CPU_NO_EFFICIENT_FFS
45 select HAVE_ARCH_HASH
46 help
47 The Freescale (was Motorola) 68000 CPU is the first generation of
48 the well known M68K family of processors. The CPU core as well as
49 being available as a stand alone CPU was also used in many
50 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
51 a paging MMU.
52
53config MCPU32
54 bool
55 select CPU_HAS_NO_BITFIELDS
56 select CPU_HAS_NO_UNALIGNED
57 select CPU_NO_EFFICIENT_FFS
58 help
59 The Freescale (was then Motorola) CPU32 is a CPU core that is
60 based on the 68020 processor. For the most part it is used in
61 System-On-Chip parts, and does not contain a paging MMU.
62
63config M68020
64 bool "68020 support"
65 depends on MMU
66 select FPU
67 select CPU_HAS_ADDRESS_SPACES
68 help
69 If you anticipate running this kernel on a computer with a MC68020
70 processor, say Y. Otherwise, say N. Note that the 68020 requires a
71 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
72 Sun 3, which provides its own version.
73
74config M68030
75 bool "68030 support"
76 depends on MMU && !MMU_SUN3
77 select FPU
78 select CPU_HAS_ADDRESS_SPACES
79 help
80 If you anticipate running this kernel on a computer with a MC68030
81 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
82 work, as it does not include an MMU (Memory Management Unit).
83
84config M68040
85 bool "68040 support"
86 depends on MMU && !MMU_SUN3
87 select FPU
88 select CPU_HAS_ADDRESS_SPACES
89 help
90 If you anticipate running this kernel on a computer with a MC68LC040
91 or MC68040 processor, say Y. Otherwise, say N. Note that an
92 MC68EC040 will not work, as it does not include an MMU (Memory
93 Management Unit).
94
95config M68060
96 bool "68060 support"
97 depends on MMU && !MMU_SUN3
98 select FPU
99 select CPU_HAS_ADDRESS_SPACES
100 help
101 If you anticipate running this kernel on a computer with a MC68060
102 processor, say Y. Otherwise, say N.
103
104config M68328
105 bool "MC68328"
106 depends on !MMU
107 select M68000
108 help
109 Motorola 68328 processor support.
110
111config M68EZ328
112 bool "MC68EZ328"
113 depends on !MMU
114 select M68000
115 help
116 Motorola 68EX328 processor support.
117
118config M68VZ328
119 bool "MC68VZ328"
120 depends on !MMU
121 select M68000
122 help
123 Motorola 68VZ328 processor support.
124
125endif # M68KCLASSIC
126
127if COLDFIRE
128
129choice
130 prompt "ColdFire SoC type"
131 default M520x
132 help
133 Select the type of ColdFire System-on-Chip (SoC) that you want
134 to build for.
135
136config M5206
137 bool "MCF5206"
138 depends on !MMU
139 select COLDFIRE_SW_A7
140 select HAVE_MBAR
141 select CPU_NO_EFFICIENT_FFS
142 help
143 Motorola ColdFire 5206 processor support.
144
145config M5206e
146 bool "MCF5206e"
147 depends on !MMU
148 select COLDFIRE_SW_A7
149 select HAVE_MBAR
150 select CPU_NO_EFFICIENT_FFS
151 help
152 Motorola ColdFire 5206e processor support.
153
154config M520x
155 bool "MCF520x"
156 depends on !MMU
157 select GENERIC_CLOCKEVENTS
158 select HAVE_CACHE_SPLIT
159 help
160 Freescale Coldfire 5207/5208 processor support.
161
162config M523x
163 bool "MCF523x"
164 depends on !MMU
165 select GENERIC_CLOCKEVENTS
166 select HAVE_CACHE_SPLIT
167 select HAVE_IPSBAR
168 help
169 Freescale Coldfire 5230/1/2/4/5 processor support
170
171config M5249
172 bool "MCF5249"
173 depends on !MMU
174 select COLDFIRE_SW_A7
175 select HAVE_MBAR
176 select CPU_NO_EFFICIENT_FFS
177 help
178 Motorola ColdFire 5249 processor support.
179
180config M525x
181 bool "MCF525x"
182 depends on !MMU
183 select COLDFIRE_SW_A7
184 select HAVE_MBAR
185 select CPU_NO_EFFICIENT_FFS
186 help
187 Freescale (Motorola) Coldfire 5251/5253 processor support.
188
189config M5271
190 bool "MCF5271"
191 depends on !MMU
192 select M527x
193 select HAVE_CACHE_SPLIT
194 select HAVE_IPSBAR
195 select GENERIC_CLOCKEVENTS
196 help
197 Freescale (Motorola) ColdFire 5270/5271 processor support.
198
199config M5272
200 bool "MCF5272"
201 depends on !MMU
202 select COLDFIRE_SW_A7
203 select HAVE_MBAR
204 select CPU_NO_EFFICIENT_FFS
205 help
206 Motorola ColdFire 5272 processor support.
207
208config M5275
209 bool "MCF5275"
210 depends on !MMU
211 select M527x
212 select HAVE_CACHE_SPLIT
213 select HAVE_IPSBAR
214 select GENERIC_CLOCKEVENTS
215 help
216 Freescale (Motorola) ColdFire 5274/5275 processor support.
217
218config M528x
219 bool "MCF528x"
220 depends on !MMU
221 select GENERIC_CLOCKEVENTS
222 select HAVE_CACHE_SPLIT
223 select HAVE_IPSBAR
224 help
225 Motorola ColdFire 5280/5282 processor support.
226
227config M5307
228 bool "MCF5307"
229 depends on !MMU
230 select COLDFIRE_SW_A7
231 select HAVE_CACHE_CB
232 select HAVE_MBAR
233 select CPU_NO_EFFICIENT_FFS
234 help
235 Motorola ColdFire 5307 processor support.
236
237config M532x
238 bool "MCF532x"
239 depends on !MMU
240 select M53xx
241 select HAVE_CACHE_CB
242 help
243 Freescale (Motorola) ColdFire 532x processor support.
244
245config M537x
246 bool "MCF537x"
247 depends on !MMU
248 select M53xx
249 select HAVE_CACHE_CB
250 help
251 Freescale ColdFire 537x processor support.
252
253config M5407
254 bool "MCF5407"
255 depends on !MMU
256 select COLDFIRE_SW_A7
257 select HAVE_CACHE_CB
258 select HAVE_MBAR
259 select CPU_NO_EFFICIENT_FFS
260 help
261 Motorola ColdFire 5407 processor support.
262
263config M547x
264 bool "MCF547x"
265 select M54xx
266 select MMU_COLDFIRE if MMU
267 select FPU if MMU
268 select HAVE_CACHE_CB
269 select HAVE_MBAR
270 select CPU_NO_EFFICIENT_FFS
271 help
272 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
273
274config M548x
275 bool "MCF548x"
276 select MMU_COLDFIRE if MMU
277 select FPU if MMU
278 select M54xx
279 select HAVE_CACHE_CB
280 select HAVE_MBAR
281 select CPU_NO_EFFICIENT_FFS
282 help
283 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
284
285config M5441x
286 bool "MCF5441x"
287 select MMU_COLDFIRE if MMU
288 select GENERIC_CLOCKEVENTS
289 select HAVE_CACHE_CB
290 help
291 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
292
293endchoice
294
295config M527x
296 bool
297
298config M53xx
299 bool
300
301config M54xx
302 select HAVE_PCI
303 bool
304
305endif # COLDFIRE
306
307
308comment "Processor Specific Options"
309
310config M68KFPU_EMU
311 bool "Math emulation support"
312 depends on MMU
313 help
314 At some point in the future, this will cause floating-point math
315 instructions to be emulated by the kernel on machines that lack a
316 floating-point math coprocessor. Thrill-seekers and chronically
317 sleep-deprived psychotic hacker types can say Y now, everyone else
318 should probably wait a while.
319
320config M68KFPU_EMU_EXTRAPREC
321 bool "Math emulation extra precision"
322 depends on M68KFPU_EMU
323 help
324 The fpu uses normally a few bit more during calculations for
325 correct rounding, the emulator can (often) do the same but this
326 extra calculation can cost quite some time, so you can disable
327 it here. The emulator will then "only" calculate with a 64 bit
328 mantissa and round slightly incorrect, what is more than enough
329 for normal usage.
330
331config M68KFPU_EMU_ONLY
332 bool "Math emulation only kernel"
333 depends on M68KFPU_EMU
334 help
335 This option prevents any floating-point instructions from being
336 compiled into the kernel, thereby the kernel doesn't save any
337 floating point context anymore during task switches, so this
338 kernel will only be usable on machines without a floating-point
339 math coprocessor. This makes the kernel a bit faster as no tests
340 needs to be executed whether a floating-point instruction in the
341 kernel should be executed or not.
342
343config ADVANCED
344 bool "Advanced configuration options"
345 depends on MMU
346 help
347 This gives you access to some advanced options for the CPU. The
348 defaults should be fine for most users, but these options may make
349 it possible for you to improve performance somewhat if you know what
350 you are doing.
351
352 Note that the answer to this question won't directly affect the
353 kernel: saying N will just cause the configurator to skip all
354 the questions about these options.
355
356 Most users should say N to this question.
357
358config RMW_INSNS
359 bool "Use read-modify-write instructions"
360 depends on ADVANCED
361 help
362 This allows to use certain instructions that work with indivisible
363 read-modify-write bus cycles. While this is faster than the
364 workaround of disabling interrupts, it can conflict with DMA
365 ( = direct memory access) on many Amiga systems, and it is also said
366 to destabilize other machines. It is very likely that this will
367 cause serious problems on any Amiga or Atari Medusa if set. The only
368 configuration where it should work are 68030-based Ataris, where it
369 apparently improves performance. But you've been warned! Unless you
370 really know what you are doing, say N. Try Y only if you're quite
371 adventurous.
372
373config SINGLE_MEMORY_CHUNK
374 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
375 depends on MMU
376 default y if SUN3
377 select NEED_MULTIPLE_NODES
378 help
379 Ignore all but the first contiguous chunk of physical memory for VM
380 purposes. This will save a few bytes kernel size and may speed up
381 some operations. Say N if not sure.
382
383config ARCH_DISCONTIGMEM_ENABLE
384 def_bool MMU && !SINGLE_MEMORY_CHUNK
385
386config 060_WRITETHROUGH
387 bool "Use write-through caching for 68060 supervisor accesses"
388 depends on ADVANCED && M68060
389 help
390 The 68060 generally uses copyback caching of recently accessed data.
391 Copyback caching means that memory writes will be held in an on-chip
392 cache and only written back to memory some time later. Saying Y
393 here will force supervisor (kernel) accesses to use writethrough
394 caching. Writethrough caching means that data is written to memory
395 straight away, so that cache and memory data always agree.
396 Writethrough caching is less efficient, but is needed for some
397 drivers on 68060 based systems where the 68060 bus snooping signal
398 is hardwired on. The 53c710 SCSI driver is known to suffer from
399 this problem.
400
401config M68K_L2_CACHE
402 bool
403 depends on MAC
404 default y
405
406config NODES_SHIFT
407 int
408 default "3"
409 depends on !SINGLE_MEMORY_CHUNK
410
411config CPU_HAS_NO_BITFIELDS
412 bool
413
414config CPU_HAS_NO_MULDIV64
415 bool
416
417config CPU_HAS_NO_UNALIGNED
418 bool
419
420config CPU_HAS_ADDRESS_SPACES
421 bool
422
423config FPU
424 bool
425
426config COLDFIRE_SW_A7
427 bool
428
429config HAVE_CACHE_SPLIT
430 bool
431
432config HAVE_CACHE_CB
433 bool
434
435config HAVE_MBAR
436 bool
437
438config HAVE_IPSBAR
439 bool
440
441config CLOCK_FREQ
442 int "Set the core clock frequency"
443 default "25000000" if M5206
444 default "54000000" if M5206e
445 default "166666666" if M520x
446 default "140000000" if M5249
447 default "150000000" if M527x || M523x
448 default "90000000" if M5307
449 default "50000000" if M5407
450 default "266000000" if M54xx
451 default "66666666"
452 depends on COLDFIRE
453 help
454 Define the CPU clock frequency in use. This is the core clock
455 frequency, it may or may not be the same as the external clock
456 crystal fitted to your board. Some processors have an internal
457 PLL and can have their frequency programmed at run time, others
458 use internal dividers. In general the kernel won't setup a PLL
459 if it is fitted (there are some exceptions). This value will be
460 specific to the exact CPU that you are using.
461
462config OLDMASK
463 bool "Old mask 5307 (1H55J) silicon"
464 depends on M5307
465 help
466 Build support for the older revision ColdFire 5307 silicon.
467 Specifically this is the 1H55J mask revision.
468
469if HAVE_CACHE_SPLIT
470choice
471 prompt "Split Cache Configuration"
472 default CACHE_I
473
474config CACHE_I
475 bool "Instruction"
476 help
477 Use all of the ColdFire CPU cache memory as an instruction cache.
478
479config CACHE_D
480 bool "Data"
481 help
482 Use all of the ColdFire CPU cache memory as a data cache.
483
484config CACHE_BOTH
485 bool "Both"
486 help
487 Split the ColdFire CPU cache, and use half as an instruction cache
488 and half as a data cache.
489endchoice
490endif
491
492if HAVE_CACHE_CB
493choice
494 prompt "Data cache mode"
495 default CACHE_WRITETHRU
496
497config CACHE_WRITETHRU
498 bool "Write-through"
499 help
500 The ColdFire CPU cache is set into Write-through mode.
501
502config CACHE_COPYBACK
503 bool "Copy-back"
504 help
505 The ColdFire CPU cache is set into Copy-back mode.
506endchoice
507endif
508
1# SPDX-License-Identifier: GPL-2.0
2comment "Processor Type"
3
4choice
5 prompt "CPU family support"
6 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU
8 help
9 The Freescale (was Motorola) M68K family of processors implements
10 the full 68000 processor instruction set.
11 The Freescale ColdFire family of processors is a modern derivative
12 of the 68000 processor family. They are mainly targeted at embedded
13 applications, and are all System-On-Chip (SOC) devices, as opposed
14 to stand alone CPUs. They implement a subset of the original 68000
15 processor instruction set.
16 If you anticipate running this kernel on a computer with a classic
17 MC68xxx processor, select M68KCLASSIC.
18 If you anticipate running this kernel on a computer with a ColdFire
19 processor, select COLDFIRE.
20
21config M68KCLASSIC
22 bool "Classic M68K CPU family support"
23 select HAVE_ARCH_PFN_VALID
24
25config COLDFIRE
26 bool "Coldfire CPU family support"
27 select CPU_HAS_NO_BITFIELDS
28 select CPU_HAS_NO_CAS
29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM
31 select GPIOLIB
32 select HAVE_LEGACY_CLK
33
34endchoice
35
36if M68KCLASSIC
37
38config M68000
39 def_bool y
40 depends on !MMU
41 select CPU_HAS_NO_BITFIELDS
42 select CPU_HAS_NO_CAS
43 select CPU_HAS_NO_MULDIV64
44 select CPU_HAS_NO_UNALIGNED
45 select GENERIC_CSUM
46 select CPU_NO_EFFICIENT_FFS
47 select HAVE_ARCH_HASH
48 select LEGACY_TIMER_TICK
49 help
50 The Freescale (was Motorola) 68000 CPU is the first generation of
51 the well known M68K family of processors. The CPU core as well as
52 being available as a stand alone CPU was also used in many
53 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
54 a paging MMU.
55
56config M68020
57 bool "68020 support"
58 depends on MMU
59 select FPU
60 select CPU_HAS_ADDRESS_SPACES
61 help
62 If you anticipate running this kernel on a computer with a MC68020
63 processor, say Y. Otherwise, say N. Note that the 68020 requires a
64 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
65 Sun 3, which provides its own version.
66
67config M68030
68 bool "68030 support"
69 depends on MMU && !MMU_SUN3
70 select FPU
71 select CPU_HAS_ADDRESS_SPACES
72 help
73 If you anticipate running this kernel on a computer with a MC68030
74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
75 work, as it does not include an MMU (Memory Management Unit).
76
77config M68040
78 bool "68040 support"
79 depends on MMU && !MMU_SUN3
80 select FPU
81 select CPU_HAS_ADDRESS_SPACES
82 help
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
86 Management Unit).
87
88config M68060
89 bool "68060 support"
90 depends on MMU && !MMU_SUN3
91 select FPU
92 select CPU_HAS_ADDRESS_SPACES
93 help
94 If you anticipate running this kernel on a computer with a MC68060
95 processor, say Y. Otherwise, say N.
96
97config M68328
98 bool
99 depends on !MMU
100 select M68000
101 help
102 Motorola 68328 processor support.
103
104config M68EZ328
105 bool
106 depends on !MMU
107 select M68000
108 help
109 Motorola 68EX328 processor support.
110
111config M68VZ328
112 bool
113 depends on !MMU
114 select M68000
115 help
116 Motorola 68VZ328 processor support.
117
118endif # M68KCLASSIC
119
120if COLDFIRE
121
122choice
123 prompt "ColdFire SoC type"
124 default M520x
125 help
126 Select the type of ColdFire System-on-Chip (SoC) that you want
127 to build for.
128
129config M5206
130 bool "MCF5206"
131 depends on !MMU
132 select COLDFIRE_SW_A7
133 select COLDFIRE_TIMERS
134 select HAVE_MBAR
135 select CPU_NO_EFFICIENT_FFS
136 help
137 Motorola ColdFire 5206 processor support.
138
139config M5206e
140 bool "MCF5206e"
141 depends on !MMU
142 select COLDFIRE_SW_A7
143 select COLDFIRE_TIMERS
144 select HAVE_MBAR
145 select CPU_NO_EFFICIENT_FFS
146 help
147 Motorola ColdFire 5206e processor support.
148
149config M520x
150 bool "MCF520x"
151 depends on !MMU
152 select COLDFIRE_PIT_TIMER
153 select HAVE_CACHE_SPLIT
154 help
155 Freescale Coldfire 5207/5208 processor support.
156
157config M523x
158 bool "MCF523x"
159 depends on !MMU
160 select COLDFIRE_PIT_TIMER
161 select HAVE_CACHE_SPLIT
162 select HAVE_IPSBAR
163 help
164 Freescale Coldfire 5230/1/2/4/5 processor support
165
166config M5249
167 bool "MCF5249"
168 depends on !MMU
169 select COLDFIRE_SW_A7
170 select COLDFIRE_TIMERS
171 select HAVE_MBAR
172 select CPU_NO_EFFICIENT_FFS
173 help
174 Motorola ColdFire 5249 processor support.
175
176config M525x
177 bool "MCF525x"
178 depends on !MMU
179 select COLDFIRE_SW_A7
180 select COLDFIRE_TIMERS
181 select HAVE_MBAR
182 select CPU_NO_EFFICIENT_FFS
183 help
184 Freescale (Motorola) Coldfire 5251/5253 processor support.
185
186config M5271
187 bool "MCF5271"
188 depends on !MMU
189 select COLDFIRE_PIT_TIMER
190 select M527x
191 select HAVE_CACHE_SPLIT
192 select HAVE_IPSBAR
193 help
194 Freescale (Motorola) ColdFire 5270/5271 processor support.
195
196config M5272
197 bool "MCF5272"
198 depends on !MMU
199 select COLDFIRE_SW_A7
200 select COLDFIRE_TIMERS
201 select HAVE_MBAR
202 select CPU_NO_EFFICIENT_FFS
203 help
204 Motorola ColdFire 5272 processor support.
205
206config M5275
207 bool "MCF5275"
208 depends on !MMU
209 select COLDFIRE_PIT_TIMER
210 select M527x
211 select HAVE_CACHE_SPLIT
212 select HAVE_IPSBAR
213 help
214 Freescale (Motorola) ColdFire 5274/5275 processor support.
215
216config M528x
217 bool "MCF528x"
218 depends on !MMU
219 select COLDFIRE_PIT_TIMER
220 select HAVE_CACHE_SPLIT
221 select HAVE_IPSBAR
222 help
223 Motorola ColdFire 5280/5282 processor support.
224
225config M5307
226 bool "MCF5307"
227 depends on !MMU
228 select COLDFIRE_TIMERS
229 select COLDFIRE_SW_A7
230 select HAVE_CACHE_CB
231 select HAVE_MBAR
232 select CPU_NO_EFFICIENT_FFS
233 help
234 Motorola ColdFire 5307 processor support.
235
236config M532x
237 bool "MCF532x"
238 depends on !MMU
239 select COLDFIRE_TIMERS
240 select M53xx
241 select HAVE_CACHE_CB
242 help
243 Freescale (Motorola) ColdFire 532x processor support.
244
245config M537x
246 bool "MCF537x"
247 depends on !MMU
248 select COLDFIRE_TIMERS
249 select M53xx
250 select HAVE_CACHE_CB
251 help
252 Freescale ColdFire 537x processor support.
253
254config M5407
255 bool "MCF5407"
256 depends on !MMU
257 select COLDFIRE_SW_A7
258 select COLDFIRE_TIMERS
259 select HAVE_CACHE_CB
260 select HAVE_MBAR
261 select CPU_NO_EFFICIENT_FFS
262 help
263 Motorola ColdFire 5407 processor support.
264
265config M547x
266 bool "MCF547x"
267 select M54xx
268 select COLDFIRE_SLTIMERS
269 select MMU_COLDFIRE if MMU
270 select FPU if MMU
271 select HAVE_CACHE_CB
272 select HAVE_MBAR
273 select CPU_NO_EFFICIENT_FFS
274 help
275 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
276
277config M548x
278 bool "MCF548x"
279 select COLDFIRE_SLTIMERS
280 select MMU_COLDFIRE if MMU
281 select FPU if MMU
282 select M54xx
283 select HAVE_CACHE_CB
284 select HAVE_MBAR
285 select CPU_NO_EFFICIENT_FFS
286 help
287 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
288
289config M5441x
290 bool "MCF5441x"
291 select COLDFIRE_PIT_TIMER
292 select MMU_COLDFIRE if MMU
293 select HAVE_CACHE_CB
294 help
295 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
296
297endchoice
298
299config M527x
300 bool
301
302config M53xx
303 bool
304
305config M54xx
306 select HAVE_PCI
307 bool
308
309config COLDFIRE_PIT_TIMER
310 bool
311
312config COLDFIRE_TIMERS
313 bool
314 select LEGACY_TIMER_TICK
315
316config COLDFIRE_SLTIMERS
317 bool
318 select LEGACY_TIMER_TICK
319
320endif # COLDFIRE
321
322comment "Processor Specific Options"
323
324config M68KFPU_EMU
325 bool "Math emulation support"
326 depends on M68KCLASSIC && FPU
327 help
328 At some point in the future, this will cause floating-point math
329 instructions to be emulated by the kernel on machines that lack a
330 floating-point math coprocessor. Thrill-seekers and chronically
331 sleep-deprived psychotic hacker types can say Y now, everyone else
332 should probably wait a while.
333
334config M68KFPU_EMU_EXTRAPREC
335 bool "Math emulation extra precision"
336 depends on M68KFPU_EMU
337 help
338 The fpu uses normally a few bit more during calculations for
339 correct rounding, the emulator can (often) do the same but this
340 extra calculation can cost quite some time, so you can disable
341 it here. The emulator will then "only" calculate with a 64 bit
342 mantissa and round slightly incorrect, what is more than enough
343 for normal usage.
344
345config M68KFPU_EMU_ONLY
346 bool "Math emulation only kernel"
347 depends on M68KFPU_EMU
348 help
349 This option prevents any floating-point instructions from being
350 compiled into the kernel, thereby the kernel doesn't save any
351 floating point context anymore during task switches, so this
352 kernel will only be usable on machines without a floating-point
353 math coprocessor. This makes the kernel a bit faster as no tests
354 needs to be executed whether a floating-point instruction in the
355 kernel should be executed or not.
356
357config ADVANCED
358 bool "Advanced configuration options"
359 depends on MMU
360 help
361 This gives you access to some advanced options for the CPU. The
362 defaults should be fine for most users, but these options may make
363 it possible for you to improve performance somewhat if you know what
364 you are doing.
365
366 Note that the answer to this question won't directly affect the
367 kernel: saying N will just cause the configurator to skip all
368 the questions about these options.
369
370 Most users should say N to this question.
371
372config RMW_INSNS
373 bool "Use read-modify-write instructions"
374 depends on ADVANCED && !CPU_HAS_NO_CAS
375 help
376 This allows to use certain instructions that work with indivisible
377 read-modify-write bus cycles. While this is faster than the
378 workaround of disabling interrupts, it can conflict with DMA
379 ( = direct memory access) on many Amiga systems, and it is also said
380 to destabilize other machines. It is very likely that this will
381 cause serious problems on any Amiga or Atari Medusa if set. The only
382 configuration where it should work are 68030-based Ataris, where it
383 apparently improves performance. But you've been warned! Unless you
384 really know what you are doing, say N. Try Y only if you're quite
385 adventurous.
386
387config SINGLE_MEMORY_CHUNK
388 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
389 depends on MMU
390 default y if SUN3 || MMU_COLDFIRE
391 help
392 Ignore all but the first contiguous chunk of physical memory for VM
393 purposes. This will save a few bytes kernel size and may speed up
394 some operations.
395 When this option os set to N, you may want to lower "Maximum zone
396 order" to save memory that could be wasted for unused memory map.
397 Say N if not sure.
398
399config ARCH_FORCE_MAX_ORDER
400 int "Order of maximal physically contiguous allocations" if ADVANCED
401 depends on !SINGLE_MEMORY_CHUNK
402 default "10"
403 help
404 The kernel page allocator limits the size of maximal physically
405 contiguous allocations. The limit is called MAX_PAGE_ORDER and it
406 defines the maximal power of two of number of pages that can be
407 allocated as a single contiguous block. This option allows
408 overriding the default setting when ability to allocate very
409 large blocks of physically contiguous memory is required.
410
411 For systems that have holes in their physical address space this
412 value also defines the minimal size of the hole that allows
413 freeing unused memory map.
414
415 Don't change if unsure.
416
417config 060_WRITETHROUGH
418 bool "Use write-through caching for 68060 supervisor accesses"
419 depends on ADVANCED && M68060
420 help
421 The 68060 generally uses copyback caching of recently accessed data.
422 Copyback caching means that memory writes will be held in an on-chip
423 cache and only written back to memory some time later. Saying Y
424 here will force supervisor (kernel) accesses to use writethrough
425 caching. Writethrough caching means that data is written to memory
426 straight away, so that cache and memory data always agree.
427 Writethrough caching is less efficient, but is needed for some
428 drivers on 68060 based systems where the 68060 bus snooping signal
429 is hardwired on. The 53c710 SCSI driver is known to suffer from
430 this problem.
431
432config M68K_L2_CACHE
433 bool
434 depends on MAC
435 default y
436
437config CPU_HAS_NO_BITFIELDS
438 bool
439
440config CPU_HAS_NO_CAS
441 bool
442
443config CPU_HAS_NO_MULDIV64
444 bool
445
446config CPU_HAS_NO_UNALIGNED
447 bool
448
449config CPU_HAS_ADDRESS_SPACES
450 bool
451 select ALTERNATE_USER_ADDRESS_SPACE
452
453config FPU
454 bool
455
456config COLDFIRE_SW_A7
457 bool
458
459config HAVE_CACHE_SPLIT
460 bool
461
462config HAVE_CACHE_CB
463 bool
464
465config HAVE_MBAR
466 bool
467
468config HAVE_IPSBAR
469 bool
470
471config CLOCK_FREQ
472 int "Set the core clock frequency"
473 default "25000000" if M5206
474 default "54000000" if M5206e
475 default "166666666" if M520x
476 default "140000000" if M5249
477 default "150000000" if M527x || M523x
478 default "90000000" if M5307
479 default "50000000" if M5407
480 default "266000000" if M54xx
481 default "66666666"
482 depends on COLDFIRE
483 help
484 Define the CPU clock frequency in use. This is the core clock
485 frequency, it may or may not be the same as the external clock
486 crystal fitted to your board. Some processors have an internal
487 PLL and can have their frequency programmed at run time, others
488 use internal dividers. In general the kernel won't setup a PLL
489 if it is fitted (there are some exceptions). This value will be
490 specific to the exact CPU that you are using.
491
492config OLDMASK
493 bool "Old mask 5307 (1H55J) silicon"
494 depends on M5307
495 help
496 Build support for the older revision ColdFire 5307 silicon.
497 Specifically this is the 1H55J mask revision.
498
499if HAVE_CACHE_SPLIT
500choice
501 prompt "Split Cache Configuration"
502 default CACHE_I
503
504config CACHE_I
505 bool "Instruction"
506 help
507 Use all of the ColdFire CPU cache memory as an instruction cache.
508
509config CACHE_D
510 bool "Data"
511 help
512 Use all of the ColdFire CPU cache memory as a data cache.
513
514config CACHE_BOTH
515 bool "Both"
516 help
517 Split the ColdFire CPU cache, and use half as an instruction cache
518 and half as a data cache.
519endchoice
520endif # HAVE_CACHE_SPLIT
521
522if HAVE_CACHE_CB
523choice
524 prompt "Data cache mode"
525 default CACHE_WRITETHRU
526
527config CACHE_WRITETHRU
528 bool "Write-through"
529 help
530 The ColdFire CPU cache is set into Write-through mode.
531
532config CACHE_COPYBACK
533 bool "Copy-back"
534 help
535 The ColdFire CPU cache is set into Copy-back mode.
536endchoice
537endif # HAVE_CACHE_CB
538
539# Coldfire cores that do not have a data cache configured can do coherent DMA.
540config COLDFIRE_COHERENT_DMA
541 bool
542 default y
543 depends on COLDFIRE
544 depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH
545
546config M68K_NONCOHERENT_DMA
547 bool
548 default y
549 depends on HAS_DMA && !COLDFIRE_COHERENT_DMA