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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/ia64/kernel/time.c
4 *
5 * Copyright (C) 1998-2003 Hewlett-Packard Co
6 * Stephane Eranian <eranian@hpl.hp.com>
7 * David Mosberger <davidm@hpl.hp.com>
8 * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
9 * Copyright (C) 1999-2000 VA Linux Systems
10 * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
11 */
12
13#include <linux/cpu.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/profile.h>
18#include <linux/sched.h>
19#include <linux/time.h>
20#include <linux/nmi.h>
21#include <linux/interrupt.h>
22#include <linux/efi.h>
23#include <linux/timex.h>
24#include <linux/timekeeper_internal.h>
25#include <linux/platform_device.h>
26#include <linux/sched/cputime.h>
27
28#include <asm/delay.h>
29#include <asm/hw_irq.h>
30#include <asm/ptrace.h>
31#include <asm/sal.h>
32#include <asm/sections.h>
33
34#include "fsyscall_gtod_data.h"
35#include "irq.h"
36
37static u64 itc_get_cycles(struct clocksource *cs);
38
39struct fsyscall_gtod_data_t fsyscall_gtod_data;
40
41struct itc_jitter_data_t itc_jitter_data;
42
43volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
44
45#ifdef CONFIG_IA64_DEBUG_IRQ
46
47unsigned long last_cli_ip;
48EXPORT_SYMBOL(last_cli_ip);
49
50#endif
51
52static struct clocksource clocksource_itc = {
53 .name = "itc",
54 .rating = 350,
55 .read = itc_get_cycles,
56 .mask = CLOCKSOURCE_MASK(64),
57 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
58};
59static struct clocksource *itc_clocksource;
60
61#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
62
63#include <linux/kernel_stat.h>
64
65extern u64 cycle_to_nsec(u64 cyc);
66
67void vtime_flush(struct task_struct *tsk)
68{
69 struct thread_info *ti = task_thread_info(tsk);
70 u64 delta;
71
72 if (ti->utime)
73 account_user_time(tsk, cycle_to_nsec(ti->utime));
74
75 if (ti->gtime)
76 account_guest_time(tsk, cycle_to_nsec(ti->gtime));
77
78 if (ti->idle_time)
79 account_idle_time(cycle_to_nsec(ti->idle_time));
80
81 if (ti->stime) {
82 delta = cycle_to_nsec(ti->stime);
83 account_system_index_time(tsk, delta, CPUTIME_SYSTEM);
84 }
85
86 if (ti->hardirq_time) {
87 delta = cycle_to_nsec(ti->hardirq_time);
88 account_system_index_time(tsk, delta, CPUTIME_IRQ);
89 }
90
91 if (ti->softirq_time) {
92 delta = cycle_to_nsec(ti->softirq_time);
93 account_system_index_time(tsk, delta, CPUTIME_SOFTIRQ);
94 }
95
96 ti->utime = 0;
97 ti->gtime = 0;
98 ti->idle_time = 0;
99 ti->stime = 0;
100 ti->hardirq_time = 0;
101 ti->softirq_time = 0;
102}
103
104/*
105 * Called from the context switch with interrupts disabled, to charge all
106 * accumulated times to the current process, and to prepare accounting on
107 * the next process.
108 */
109void arch_vtime_task_switch(struct task_struct *prev)
110{
111 struct thread_info *pi = task_thread_info(prev);
112 struct thread_info *ni = task_thread_info(current);
113
114 ni->ac_stamp = pi->ac_stamp;
115 ni->ac_stime = ni->ac_utime = 0;
116}
117
118/*
119 * Account time for a transition between system, hard irq or soft irq state.
120 * Note that this function is called with interrupts enabled.
121 */
122static __u64 vtime_delta(struct task_struct *tsk)
123{
124 struct thread_info *ti = task_thread_info(tsk);
125 __u64 now, delta_stime;
126
127 WARN_ON_ONCE(!irqs_disabled());
128
129 now = ia64_get_itc();
130 delta_stime = now - ti->ac_stamp;
131 ti->ac_stamp = now;
132
133 return delta_stime;
134}
135
136void vtime_account_kernel(struct task_struct *tsk)
137{
138 struct thread_info *ti = task_thread_info(tsk);
139 __u64 stime = vtime_delta(tsk);
140
141 if ((tsk->flags & PF_VCPU) && !irq_count())
142 ti->gtime += stime;
143 else if (hardirq_count())
144 ti->hardirq_time += stime;
145 else if (in_serving_softirq())
146 ti->softirq_time += stime;
147 else
148 ti->stime += stime;
149}
150EXPORT_SYMBOL_GPL(vtime_account_kernel);
151
152void vtime_account_idle(struct task_struct *tsk)
153{
154 struct thread_info *ti = task_thread_info(tsk);
155
156 ti->idle_time += vtime_delta(tsk);
157}
158
159#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
160
161static irqreturn_t
162timer_interrupt (int irq, void *dev_id)
163{
164 unsigned long new_itm;
165
166 if (cpu_is_offline(smp_processor_id())) {
167 return IRQ_HANDLED;
168 }
169
170 new_itm = local_cpu_data->itm_next;
171
172 if (!time_after(ia64_get_itc(), new_itm))
173 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
174 ia64_get_itc(), new_itm);
175
176 profile_tick(CPU_PROFILING);
177
178 while (1) {
179 update_process_times(user_mode(get_irq_regs()));
180
181 new_itm += local_cpu_data->itm_delta;
182
183 if (smp_processor_id() == time_keeper_id)
184 xtime_update(1);
185
186 local_cpu_data->itm_next = new_itm;
187
188 if (time_after(new_itm, ia64_get_itc()))
189 break;
190
191 /*
192 * Allow IPIs to interrupt the timer loop.
193 */
194 local_irq_enable();
195 local_irq_disable();
196 }
197
198 do {
199 /*
200 * If we're too close to the next clock tick for
201 * comfort, we increase the safety margin by
202 * intentionally dropping the next tick(s). We do NOT
203 * update itm.next because that would force us to call
204 * xtime_update() which in turn would let our clock run
205 * too fast (with the potentially devastating effect
206 * of losing monotony of time).
207 */
208 while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
209 new_itm += local_cpu_data->itm_delta;
210 ia64_set_itm(new_itm);
211 /* double check, in case we got hit by a (slow) PMI: */
212 } while (time_after_eq(ia64_get_itc(), new_itm));
213 return IRQ_HANDLED;
214}
215
216/*
217 * Encapsulate access to the itm structure for SMP.
218 */
219void
220ia64_cpu_local_tick (void)
221{
222 int cpu = smp_processor_id();
223 unsigned long shift = 0, delta;
224
225 /* arrange for the cycle counter to generate a timer interrupt: */
226 ia64_set_itv(IA64_TIMER_VECTOR);
227
228 delta = local_cpu_data->itm_delta;
229 /*
230 * Stagger the timer tick for each CPU so they don't occur all at (almost) the
231 * same time:
232 */
233 if (cpu) {
234 unsigned long hi = 1UL << ia64_fls(cpu);
235 shift = (2*(cpu - hi) + 1) * delta/hi/2;
236 }
237 local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
238 ia64_set_itm(local_cpu_data->itm_next);
239}
240
241static int nojitter;
242
243static int __init nojitter_setup(char *str)
244{
245 nojitter = 1;
246 printk("Jitter checking for ITC timers disabled\n");
247 return 1;
248}
249
250__setup("nojitter", nojitter_setup);
251
252
253void ia64_init_itm(void)
254{
255 unsigned long platform_base_freq, itc_freq;
256 struct pal_freq_ratio itc_ratio, proc_ratio;
257 long status, platform_base_drift, itc_drift;
258
259 /*
260 * According to SAL v2.6, we need to use a SAL call to determine the platform base
261 * frequency and then a PAL call to determine the frequency ratio between the ITC
262 * and the base frequency.
263 */
264 status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
265 &platform_base_freq, &platform_base_drift);
266 if (status != 0) {
267 printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
268 } else {
269 status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
270 if (status != 0)
271 printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
272 }
273 if (status != 0) {
274 /* invent "random" values */
275 printk(KERN_ERR
276 "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
277 platform_base_freq = 100000000;
278 platform_base_drift = -1; /* no drift info */
279 itc_ratio.num = 3;
280 itc_ratio.den = 1;
281 }
282 if (platform_base_freq < 40000000) {
283 printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
284 platform_base_freq);
285 platform_base_freq = 75000000;
286 platform_base_drift = -1;
287 }
288 if (!proc_ratio.den)
289 proc_ratio.den = 1; /* avoid division by zero */
290 if (!itc_ratio.den)
291 itc_ratio.den = 1; /* avoid division by zero */
292
293 itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
294
295 local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
296 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
297 "ITC freq=%lu.%03luMHz", smp_processor_id(),
298 platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
299 itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
300
301 if (platform_base_drift != -1) {
302 itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
303 printk("+/-%ldppm\n", itc_drift);
304 } else {
305 itc_drift = -1;
306 printk("\n");
307 }
308
309 local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
310 local_cpu_data->itc_freq = itc_freq;
311 local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
312 local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
313 + itc_freq/2)/itc_freq;
314
315 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
316#ifdef CONFIG_SMP
317 /* On IA64 in an SMP configuration ITCs are never accurately synchronized.
318 * Jitter compensation requires a cmpxchg which may limit
319 * the scalability of the syscalls for retrieving time.
320 * The ITC synchronization is usually successful to within a few
321 * ITC ticks but this is not a sure thing. If you need to improve
322 * timer performance in SMP situations then boot the kernel with the
323 * "nojitter" option. However, doing so may result in time fluctuating (maybe
324 * even going backward) if the ITC offsets between the individual CPUs
325 * are too large.
326 */
327 if (!nojitter)
328 itc_jitter_data.itc_jitter = 1;
329#endif
330 } else
331 /*
332 * ITC is drifty and we have not synchronized the ITCs in smpboot.c.
333 * ITC values may fluctuate significantly between processors.
334 * Clock should not be used for hrtimers. Mark itc as only
335 * useful for boot and testing.
336 *
337 * Note that jitter compensation is off! There is no point of
338 * synchronizing ITCs since they may be large differentials
339 * that change over time.
340 *
341 * The only way to fix this would be to repeatedly sync the
342 * ITCs. Until that time we have to avoid ITC.
343 */
344 clocksource_itc.rating = 50;
345
346 /* avoid softlock up message when cpu is unplug and plugged again. */
347 touch_softlockup_watchdog();
348
349 /* Setup the CPU local timer tick */
350 ia64_cpu_local_tick();
351
352 if (!itc_clocksource) {
353 clocksource_register_hz(&clocksource_itc,
354 local_cpu_data->itc_freq);
355 itc_clocksource = &clocksource_itc;
356 }
357}
358
359static u64 itc_get_cycles(struct clocksource *cs)
360{
361 unsigned long lcycle, now, ret;
362
363 if (!itc_jitter_data.itc_jitter)
364 return get_cycles();
365
366 lcycle = itc_jitter_data.itc_lastcycle;
367 now = get_cycles();
368 if (lcycle && time_after(lcycle, now))
369 return lcycle;
370
371 /*
372 * Keep track of the last timer value returned.
373 * In an SMP environment, you could lose out in contention of
374 * cmpxchg. If so, your cmpxchg returns new value which the
375 * winner of contention updated to. Use the new value instead.
376 */
377 ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
378 if (unlikely(ret != lcycle))
379 return ret;
380
381 return now;
382}
383
384void read_persistent_clock64(struct timespec64 *ts)
385{
386 efi_gettimeofday(ts);
387}
388
389void __init
390time_init (void)
391{
392 register_percpu_irq(IA64_TIMER_VECTOR, timer_interrupt, IRQF_IRQPOLL,
393 "timer");
394 ia64_init_itm();
395}
396
397/*
398 * Generic udelay assumes that if preemption is allowed and the thread
399 * migrates to another CPU, that the ITC values are synchronized across
400 * all CPUs.
401 */
402static void
403ia64_itc_udelay (unsigned long usecs)
404{
405 unsigned long start = ia64_get_itc();
406 unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
407
408 while (time_before(ia64_get_itc(), end))
409 cpu_relax();
410}
411
412void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
413
414void
415udelay (unsigned long usecs)
416{
417 (*ia64_udelay)(usecs);
418}
419EXPORT_SYMBOL(udelay);
420
421/* IA64 doesn't cache the timezone */
422void update_vsyscall_tz(void)
423{
424}
425
426void update_vsyscall(struct timekeeper *tk)
427{
428 write_seqcount_begin(&fsyscall_gtod_data.seq);
429
430 /* copy vsyscall data */
431 fsyscall_gtod_data.clk_mask = tk->tkr_mono.mask;
432 fsyscall_gtod_data.clk_mult = tk->tkr_mono.mult;
433 fsyscall_gtod_data.clk_shift = tk->tkr_mono.shift;
434 fsyscall_gtod_data.clk_fsys_mmio = tk->tkr_mono.clock->archdata.fsys_mmio;
435 fsyscall_gtod_data.clk_cycle_last = tk->tkr_mono.cycle_last;
436
437 fsyscall_gtod_data.wall_time.sec = tk->xtime_sec;
438 fsyscall_gtod_data.wall_time.snsec = tk->tkr_mono.xtime_nsec;
439
440 fsyscall_gtod_data.monotonic_time.sec = tk->xtime_sec
441 + tk->wall_to_monotonic.tv_sec;
442 fsyscall_gtod_data.monotonic_time.snsec = tk->tkr_mono.xtime_nsec
443 + ((u64)tk->wall_to_monotonic.tv_nsec
444 << tk->tkr_mono.shift);
445
446 /* normalize */
447 while (fsyscall_gtod_data.monotonic_time.snsec >=
448 (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
449 fsyscall_gtod_data.monotonic_time.snsec -=
450 ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
451 fsyscall_gtod_data.monotonic_time.sec++;
452 }
453
454 write_seqcount_end(&fsyscall_gtod_data.seq);
455}
456