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v5.9
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Regulator driver for National Semiconductors LP3972 PMIC chip
  4 *
  5 * Based on lp3971.c
  6 */
  7
  8#include <linux/bug.h>
  9#include <linux/err.h>
 10#include <linux/i2c.h>
 11#include <linux/module.h>
 12#include <linux/kernel.h>
 13#include <linux/regulator/driver.h>
 14#include <linux/regulator/lp3972.h>
 15#include <linux/slab.h>
 16
 17struct lp3972 {
 18	struct device *dev;
 19	struct mutex io_lock;
 20	struct i2c_client *i2c;
 21};
 22
 23/* LP3972 Control Registers */
 24#define LP3972_SCR_REG		0x07
 25#define LP3972_OVER1_REG	0x10
 26#define LP3972_OVSR1_REG	0x11
 27#define LP3972_OVER2_REG	0x12
 28#define LP3972_OVSR2_REG	0x13
 29#define LP3972_VCC1_REG		0x20
 30#define LP3972_ADTV1_REG	0x23
 31#define LP3972_ADTV2_REG	0x24
 32#define LP3972_AVRC_REG		0x25
 33#define LP3972_CDTC1_REG	0x26
 34#define LP3972_CDTC2_REG	0x27
 35#define LP3972_SDTV1_REG	0x29
 36#define LP3972_SDTV2_REG	0x2A
 37#define LP3972_MDTV1_REG	0x32
 38#define LP3972_MDTV2_REG	0x33
 39#define LP3972_L2VCR_REG	0x39
 40#define LP3972_L34VCR_REG	0x3A
 41#define LP3972_SCR1_REG		0x80
 42#define LP3972_SCR2_REG		0x81
 43#define LP3972_OEN3_REG		0x82
 44#define LP3972_OSR3_REG		0x83
 45#define LP3972_LOER4_REG	0x84
 46#define LP3972_B2TV_REG		0x85
 47#define LP3972_B3TV_REG		0x86
 48#define LP3972_B32RC_REG	0x87
 49#define LP3972_ISRA_REG		0x88
 50#define LP3972_BCCR_REG		0x89
 51#define LP3972_II1RR_REG	0x8E
 52#define LP3972_II2RR_REG	0x8F
 53
 54#define LP3972_SYS_CONTROL1_REG		LP3972_SCR1_REG
 55/* System control register 1 initial value,
 56 * bits 5, 6 and 7 are EPROM programmable */
 57#define SYS_CONTROL1_INIT_VAL		0x02
 58#define SYS_CONTROL1_INIT_MASK		0x1F
 59
 60#define LP3972_VOL_CHANGE_REG		LP3972_VCC1_REG
 61#define LP3972_VOL_CHANGE_FLAG_GO	0x01
 62#define LP3972_VOL_CHANGE_FLAG_MASK	0x03
 63
 64/* LDO output enable mask */
 65#define LP3972_OEN3_L1EN	BIT(0)
 66#define LP3972_OVER2_LDO2_EN	BIT(2)
 67#define LP3972_OVER2_LDO3_EN	BIT(3)
 68#define LP3972_OVER2_LDO4_EN	BIT(4)
 69#define LP3972_OVER1_S_EN	BIT(2)
 70
 71static const unsigned int ldo1_voltage_map[] = {
 72	1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
 73	1900000, 1925000, 1950000, 1975000, 2000000,
 74};
 75
 76static const unsigned int ldo23_voltage_map[] = {
 77	1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
 78	2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
 79};
 80
 81static const unsigned int ldo4_voltage_map[] = {
 82	1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
 83	1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
 84};
 85
 86static const unsigned int ldo5_voltage_map[] = {
 87	      0,       0,       0,       0,       0,  850000,  875000,  900000,
 88	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
 89	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
 90	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
 91};
 92
 93static const unsigned int buck1_voltage_map[] = {
 94	 725000,  750000,  775000,  800000,  825000,  850000,  875000,  900000,
 95	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
 96	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
 97	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
 98};
 99
100static const unsigned int buck23_voltage_map[] = {
101	      0,  800000,  850000,  900000,  950000, 1000000, 1050000, 1100000,
102	1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
103	1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
104	3000000, 3300000,
105};
106
107static const int ldo_output_enable_mask[] = {
108	LP3972_OEN3_L1EN,
109	LP3972_OVER2_LDO2_EN,
110	LP3972_OVER2_LDO3_EN,
111	LP3972_OVER2_LDO4_EN,
112	LP3972_OVER1_S_EN,
113};
114
115static const int ldo_output_enable_addr[] = {
116	LP3972_OEN3_REG,
117	LP3972_OVER2_REG,
118	LP3972_OVER2_REG,
119	LP3972_OVER2_REG,
120	LP3972_OVER1_REG,
121};
122
123static const int ldo_vol_ctl_addr[] = {
124	LP3972_MDTV1_REG,
125	LP3972_L2VCR_REG,
126	LP3972_L34VCR_REG,
127	LP3972_L34VCR_REG,
128	LP3972_SDTV1_REG,
129};
130
131static const int buck_vol_enable_addr[] = {
132	LP3972_OVER1_REG,
133	LP3972_OEN3_REG,
134	LP3972_OEN3_REG,
135};
136
137static const int buck_base_addr[] = {
138	LP3972_ADTV1_REG,
139	LP3972_B2TV_REG,
140	LP3972_B3TV_REG,
141};
142
143#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
144#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
145
146/*	LDO voltage control registers shift:
147	LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
148	LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
149	LP3972_LDO5 -> 0
150*/
151#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
152#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
153#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
154
155#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
156#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
157#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
158
159#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
160#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
161#define LP3972_BUCK_VOL_MASK 0x1f
162
163static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
164	u16 *dest)
165{
166	int ret;
167
168	if (count != 1)
169		return -EIO;
170	ret = i2c_smbus_read_byte_data(i2c, reg);
171	if (ret < 0)
172		return ret;
173
174	*dest = ret;
175	return 0;
176}
177
178static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
179	const u16 *src)
180{
181	if (count != 1)
182		return -EIO;
183	return i2c_smbus_write_byte_data(i2c, reg, *src);
184}
185
186static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
187{
188	u16 val = 0;
189
190	mutex_lock(&lp3972->io_lock);
191
192	lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
193
194	dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
195		(unsigned)val & 0xff);
196
197	mutex_unlock(&lp3972->io_lock);
198
199	return val & 0xff;
200}
201
202static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
203{
204	u16 tmp;
205	int ret;
206
207	mutex_lock(&lp3972->io_lock);
208
209	ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
210	if (ret == 0) {
211		tmp = (tmp & ~mask) | val;
212		ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
213		dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
214			(unsigned)val & 0xff);
215	}
216	mutex_unlock(&lp3972->io_lock);
217
218	return ret;
219}
220
221static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
222{
223	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
224	int ldo = rdev_get_id(dev) - LP3972_LDO1;
225	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
226	u16 val;
227
228	val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
229	return !!(val & mask);
230}
231
232static int lp3972_ldo_enable(struct regulator_dev *dev)
233{
234	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
235	int ldo = rdev_get_id(dev) - LP3972_LDO1;
236	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
237
238	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
239				mask, mask);
240}
241
242static int lp3972_ldo_disable(struct regulator_dev *dev)
243{
244	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
245	int ldo = rdev_get_id(dev) - LP3972_LDO1;
246	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
247
248	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
249				mask, 0);
250}
251
252static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
253{
254	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
255	int ldo = rdev_get_id(dev) - LP3972_LDO1;
256	u16 mask = LP3972_LDO_VOL_MASK(ldo);
257	u16 val, reg;
258
259	reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
260	val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
261
262	return val;
263}
264
265static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
266				      unsigned int selector)
267{
268	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
269	int ldo = rdev_get_id(dev) - LP3972_LDO1;
270	int shift, ret;
271
272	shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
273	ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
274		LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
275
276	if (ret)
277		return ret;
278
279	/*
280	 * LDO1 and LDO5 support voltage control by either target voltage1
281	 * or target voltage2 register.
282	 * We use target voltage1 register for LDO1 and LDO5 in this driver.
283	 * We need to update voltage change control register(0x20) to enable
284	 * LDO1 and LDO5 to change to their programmed target values.
285	 */
286	switch (ldo) {
287	case LP3972_LDO1:
288	case LP3972_LDO5:
289		shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
290		ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
291			LP3972_VOL_CHANGE_FLAG_MASK << shift,
292			LP3972_VOL_CHANGE_FLAG_GO << shift);
293		if (ret)
294			return ret;
295
296		ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
297			LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
298		break;
299	}
300
301	return ret;
302}
303
304static const struct regulator_ops lp3972_ldo_ops = {
305	.list_voltage = regulator_list_voltage_table,
306	.map_voltage = regulator_map_voltage_ascend,
307	.is_enabled = lp3972_ldo_is_enabled,
308	.enable = lp3972_ldo_enable,
309	.disable = lp3972_ldo_disable,
310	.get_voltage_sel = lp3972_ldo_get_voltage_sel,
311	.set_voltage_sel = lp3972_ldo_set_voltage_sel,
312};
313
314static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
315{
316	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
317	int buck = rdev_get_id(dev) - LP3972_DCDC1;
318	u16 mask = 1 << (buck * 2);
319	u16 val;
320
321	val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
322	return !!(val & mask);
323}
324
325static int lp3972_dcdc_enable(struct regulator_dev *dev)
326{
327	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
328	int buck = rdev_get_id(dev) - LP3972_DCDC1;
329	u16 mask = 1 << (buck * 2);
330	u16 val;
331
332	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
333				mask, mask);
334	return val;
335}
336
337static int lp3972_dcdc_disable(struct regulator_dev *dev)
338{
339	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
340	int buck = rdev_get_id(dev) - LP3972_DCDC1;
341	u16 mask = 1 << (buck * 2);
342	u16 val;
343
344	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
345				mask, 0);
346	return val;
347}
348
349static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
350{
351	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
352	int buck = rdev_get_id(dev) - LP3972_DCDC1;
353	u16 reg;
354
355	reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
356	reg &= LP3972_BUCK_VOL_MASK;
357
358	return reg;
359}
360
361static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
362				       unsigned int selector)
363{
364	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
365	int buck = rdev_get_id(dev) - LP3972_DCDC1;
366	int ret;
367
368	ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
369				LP3972_BUCK_VOL_MASK, selector);
370	if (ret)
371		return ret;
372
373	if (buck != 0)
374		return ret;
375
376	ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
377		LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
378	if (ret)
379		return ret;
380
381	return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
382				LP3972_VOL_CHANGE_FLAG_MASK, 0);
383}
384
385static const struct regulator_ops lp3972_dcdc_ops = {
386	.list_voltage = regulator_list_voltage_table,
387	.map_voltage = regulator_map_voltage_ascend,
388	.is_enabled = lp3972_dcdc_is_enabled,
389	.enable = lp3972_dcdc_enable,
390	.disable = lp3972_dcdc_disable,
391	.get_voltage_sel = lp3972_dcdc_get_voltage_sel,
392	.set_voltage_sel = lp3972_dcdc_set_voltage_sel,
393};
394
395static const struct regulator_desc regulators[] = {
396	{
397		.name = "LDO1",
398		.id = LP3972_LDO1,
399		.ops = &lp3972_ldo_ops,
400		.n_voltages = ARRAY_SIZE(ldo1_voltage_map),
401		.volt_table = ldo1_voltage_map,
402		.type = REGULATOR_VOLTAGE,
403		.owner = THIS_MODULE,
404	},
405	{
406		.name = "LDO2",
407		.id = LP3972_LDO2,
408		.ops = &lp3972_ldo_ops,
409		.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
410		.volt_table = ldo23_voltage_map,
411		.type = REGULATOR_VOLTAGE,
412		.owner = THIS_MODULE,
413	},
414	{
415		.name = "LDO3",
416		.id = LP3972_LDO3,
417		.ops = &lp3972_ldo_ops,
418		.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
419		.volt_table = ldo23_voltage_map,
420		.type = REGULATOR_VOLTAGE,
421		.owner = THIS_MODULE,
422	},
423	{
424		.name = "LDO4",
425		.id = LP3972_LDO4,
426		.ops = &lp3972_ldo_ops,
427		.n_voltages = ARRAY_SIZE(ldo4_voltage_map),
428		.volt_table = ldo4_voltage_map,
429		.type = REGULATOR_VOLTAGE,
430		.owner = THIS_MODULE,
431	},
432	{
433		.name = "LDO5",
434		.id = LP3972_LDO5,
435		.ops = &lp3972_ldo_ops,
436		.n_voltages = ARRAY_SIZE(ldo5_voltage_map),
437		.volt_table = ldo5_voltage_map,
438		.type = REGULATOR_VOLTAGE,
439		.owner = THIS_MODULE,
440	},
441	{
442		.name = "DCDC1",
443		.id = LP3972_DCDC1,
444		.ops = &lp3972_dcdc_ops,
445		.n_voltages = ARRAY_SIZE(buck1_voltage_map),
446		.volt_table = buck1_voltage_map,
447		.type = REGULATOR_VOLTAGE,
448		.owner = THIS_MODULE,
449	},
450	{
451		.name = "DCDC2",
452		.id = LP3972_DCDC2,
453		.ops = &lp3972_dcdc_ops,
454		.n_voltages = ARRAY_SIZE(buck23_voltage_map),
455		.volt_table = buck23_voltage_map,
456		.type = REGULATOR_VOLTAGE,
457		.owner = THIS_MODULE,
458	},
459	{
460		.name = "DCDC3",
461		.id = LP3972_DCDC3,
462		.ops = &lp3972_dcdc_ops,
463		.n_voltages = ARRAY_SIZE(buck23_voltage_map),
464		.volt_table = buck23_voltage_map,
465		.type = REGULATOR_VOLTAGE,
466		.owner = THIS_MODULE,
467	},
468};
469
470static int setup_regulators(struct lp3972 *lp3972,
471	struct lp3972_platform_data *pdata)
472{
473	int i, err;
474
475	/* Instantiate the regulators */
476	for (i = 0; i < pdata->num_regulators; i++) {
477		struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
478		struct regulator_config config = { };
479		struct regulator_dev *rdev;
480
481		config.dev = lp3972->dev;
482		config.init_data = reg->initdata;
483		config.driver_data = lp3972;
484
485		rdev = devm_regulator_register(lp3972->dev,
486					       &regulators[reg->id], &config);
487		if (IS_ERR(rdev)) {
488			err = PTR_ERR(rdev);
489			dev_err(lp3972->dev, "regulator init failed: %d\n",
490				err);
491			return err;
492		}
493	}
494
495	return 0;
496}
497
498static int lp3972_i2c_probe(struct i2c_client *i2c,
499			    const struct i2c_device_id *id)
500{
501	struct lp3972 *lp3972;
502	struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev);
503	int ret;
504	u16 val;
505
506	if (!pdata) {
507		dev_dbg(&i2c->dev, "No platform init data supplied\n");
508		return -ENODEV;
509	}
510
511	lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL);
512	if (!lp3972)
513		return -ENOMEM;
514
515	lp3972->i2c = i2c;
516	lp3972->dev = &i2c->dev;
517
518	mutex_init(&lp3972->io_lock);
519
520	/* Detect LP3972 */
521	ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
522	if (ret == 0 &&
523		(val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
524		ret = -ENODEV;
525		dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
526	}
527	if (ret < 0) {
528		dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
529		return ret;
530	}
531
532	ret = setup_regulators(lp3972, pdata);
533	if (ret < 0)
534		return ret;
535
536	i2c_set_clientdata(i2c, lp3972);
537	return 0;
538}
539
540static const struct i2c_device_id lp3972_i2c_id[] = {
541	{ "lp3972", 0 },
542	{ }
543};
544MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
545
546static struct i2c_driver lp3972_i2c_driver = {
547	.driver = {
548		.name = "lp3972",
 
549	},
550	.probe    = lp3972_i2c_probe,
551	.id_table = lp3972_i2c_id,
552};
553
554static int __init lp3972_module_init(void)
555{
556	return i2c_add_driver(&lp3972_i2c_driver);
557}
558subsys_initcall(lp3972_module_init);
559
560static void __exit lp3972_module_exit(void)
561{
562	i2c_del_driver(&lp3972_i2c_driver);
563}
564module_exit(lp3972_module_exit);
565
566MODULE_LICENSE("GPL");
567MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
568MODULE_DESCRIPTION("LP3972 PMIC driver");
v6.8
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Regulator driver for National Semiconductors LP3972 PMIC chip
  4 *
  5 * Based on lp3971.c
  6 */
  7
  8#include <linux/bug.h>
  9#include <linux/err.h>
 10#include <linux/i2c.h>
 11#include <linux/module.h>
 12#include <linux/kernel.h>
 13#include <linux/regulator/driver.h>
 14#include <linux/regulator/lp3972.h>
 15#include <linux/slab.h>
 16
 17struct lp3972 {
 18	struct device *dev;
 19	struct mutex io_lock;
 20	struct i2c_client *i2c;
 21};
 22
 23/* LP3972 Control Registers */
 24#define LP3972_SCR_REG		0x07
 25#define LP3972_OVER1_REG	0x10
 26#define LP3972_OVSR1_REG	0x11
 27#define LP3972_OVER2_REG	0x12
 28#define LP3972_OVSR2_REG	0x13
 29#define LP3972_VCC1_REG		0x20
 30#define LP3972_ADTV1_REG	0x23
 31#define LP3972_ADTV2_REG	0x24
 32#define LP3972_AVRC_REG		0x25
 33#define LP3972_CDTC1_REG	0x26
 34#define LP3972_CDTC2_REG	0x27
 35#define LP3972_SDTV1_REG	0x29
 36#define LP3972_SDTV2_REG	0x2A
 37#define LP3972_MDTV1_REG	0x32
 38#define LP3972_MDTV2_REG	0x33
 39#define LP3972_L2VCR_REG	0x39
 40#define LP3972_L34VCR_REG	0x3A
 41#define LP3972_SCR1_REG		0x80
 42#define LP3972_SCR2_REG		0x81
 43#define LP3972_OEN3_REG		0x82
 44#define LP3972_OSR3_REG		0x83
 45#define LP3972_LOER4_REG	0x84
 46#define LP3972_B2TV_REG		0x85
 47#define LP3972_B3TV_REG		0x86
 48#define LP3972_B32RC_REG	0x87
 49#define LP3972_ISRA_REG		0x88
 50#define LP3972_BCCR_REG		0x89
 51#define LP3972_II1RR_REG	0x8E
 52#define LP3972_II2RR_REG	0x8F
 53
 54#define LP3972_SYS_CONTROL1_REG		LP3972_SCR1_REG
 55/* System control register 1 initial value,
 56 * bits 5, 6 and 7 are EPROM programmable */
 57#define SYS_CONTROL1_INIT_VAL		0x02
 58#define SYS_CONTROL1_INIT_MASK		0x1F
 59
 60#define LP3972_VOL_CHANGE_REG		LP3972_VCC1_REG
 61#define LP3972_VOL_CHANGE_FLAG_GO	0x01
 62#define LP3972_VOL_CHANGE_FLAG_MASK	0x03
 63
 64/* LDO output enable mask */
 65#define LP3972_OEN3_L1EN	BIT(0)
 66#define LP3972_OVER2_LDO2_EN	BIT(2)
 67#define LP3972_OVER2_LDO3_EN	BIT(3)
 68#define LP3972_OVER2_LDO4_EN	BIT(4)
 69#define LP3972_OVER1_S_EN	BIT(2)
 70
 71static const unsigned int ldo1_voltage_map[] = {
 72	1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
 73	1900000, 1925000, 1950000, 1975000, 2000000,
 74};
 75
 76static const unsigned int ldo23_voltage_map[] = {
 77	1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
 78	2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
 79};
 80
 81static const unsigned int ldo4_voltage_map[] = {
 82	1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
 83	1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
 84};
 85
 86static const unsigned int ldo5_voltage_map[] = {
 87	      0,       0,       0,       0,       0,  850000,  875000,  900000,
 88	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
 89	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
 90	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
 91};
 92
 93static const unsigned int buck1_voltage_map[] = {
 94	 725000,  750000,  775000,  800000,  825000,  850000,  875000,  900000,
 95	 925000,  950000,  975000, 1000000, 1025000, 1050000, 1075000, 1100000,
 96	1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
 97	1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
 98};
 99
100static const unsigned int buck23_voltage_map[] = {
101	      0,  800000,  850000,  900000,  950000, 1000000, 1050000, 1100000,
102	1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
103	1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
104	3000000, 3300000,
105};
106
107static const int ldo_output_enable_mask[] = {
108	LP3972_OEN3_L1EN,
109	LP3972_OVER2_LDO2_EN,
110	LP3972_OVER2_LDO3_EN,
111	LP3972_OVER2_LDO4_EN,
112	LP3972_OVER1_S_EN,
113};
114
115static const int ldo_output_enable_addr[] = {
116	LP3972_OEN3_REG,
117	LP3972_OVER2_REG,
118	LP3972_OVER2_REG,
119	LP3972_OVER2_REG,
120	LP3972_OVER1_REG,
121};
122
123static const int ldo_vol_ctl_addr[] = {
124	LP3972_MDTV1_REG,
125	LP3972_L2VCR_REG,
126	LP3972_L34VCR_REG,
127	LP3972_L34VCR_REG,
128	LP3972_SDTV1_REG,
129};
130
131static const int buck_vol_enable_addr[] = {
132	LP3972_OVER1_REG,
133	LP3972_OEN3_REG,
134	LP3972_OEN3_REG,
135};
136
137static const int buck_base_addr[] = {
138	LP3972_ADTV1_REG,
139	LP3972_B2TV_REG,
140	LP3972_B3TV_REG,
141};
142
143#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
144#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
145
146/*	LDO voltage control registers shift:
147	LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
148	LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
149	LP3972_LDO5 -> 0
150*/
151#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
152#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
153#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
154
155#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
156#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
157#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
158
159#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
160#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
161#define LP3972_BUCK_VOL_MASK 0x1f
162
163static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
164	u16 *dest)
165{
166	int ret;
167
168	if (count != 1)
169		return -EIO;
170	ret = i2c_smbus_read_byte_data(i2c, reg);
171	if (ret < 0)
172		return ret;
173
174	*dest = ret;
175	return 0;
176}
177
178static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
179	const u16 *src)
180{
181	if (count != 1)
182		return -EIO;
183	return i2c_smbus_write_byte_data(i2c, reg, *src);
184}
185
186static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
187{
188	u16 val = 0;
189
190	mutex_lock(&lp3972->io_lock);
191
192	lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
193
194	dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
195		(unsigned)val & 0xff);
196
197	mutex_unlock(&lp3972->io_lock);
198
199	return val & 0xff;
200}
201
202static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
203{
204	u16 tmp;
205	int ret;
206
207	mutex_lock(&lp3972->io_lock);
208
209	ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
210	if (ret == 0) {
211		tmp = (tmp & ~mask) | val;
212		ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
213		dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
214			(unsigned)val & 0xff);
215	}
216	mutex_unlock(&lp3972->io_lock);
217
218	return ret;
219}
220
221static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
222{
223	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
224	int ldo = rdev_get_id(dev) - LP3972_LDO1;
225	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
226	u16 val;
227
228	val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
229	return !!(val & mask);
230}
231
232static int lp3972_ldo_enable(struct regulator_dev *dev)
233{
234	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
235	int ldo = rdev_get_id(dev) - LP3972_LDO1;
236	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
237
238	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
239				mask, mask);
240}
241
242static int lp3972_ldo_disable(struct regulator_dev *dev)
243{
244	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
245	int ldo = rdev_get_id(dev) - LP3972_LDO1;
246	u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
247
248	return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
249				mask, 0);
250}
251
252static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
253{
254	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
255	int ldo = rdev_get_id(dev) - LP3972_LDO1;
256	u16 mask = LP3972_LDO_VOL_MASK(ldo);
257	u16 val, reg;
258
259	reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
260	val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
261
262	return val;
263}
264
265static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
266				      unsigned int selector)
267{
268	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
269	int ldo = rdev_get_id(dev) - LP3972_LDO1;
270	int shift, ret;
271
272	shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
273	ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
274		LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
275
276	if (ret)
277		return ret;
278
279	/*
280	 * LDO1 and LDO5 support voltage control by either target voltage1
281	 * or target voltage2 register.
282	 * We use target voltage1 register for LDO1 and LDO5 in this driver.
283	 * We need to update voltage change control register(0x20) to enable
284	 * LDO1 and LDO5 to change to their programmed target values.
285	 */
286	switch (ldo) {
287	case LP3972_LDO1:
288	case LP3972_LDO5:
289		shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
290		ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
291			LP3972_VOL_CHANGE_FLAG_MASK << shift,
292			LP3972_VOL_CHANGE_FLAG_GO << shift);
293		if (ret)
294			return ret;
295
296		ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
297			LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
298		break;
299	}
300
301	return ret;
302}
303
304static const struct regulator_ops lp3972_ldo_ops = {
305	.list_voltage = regulator_list_voltage_table,
306	.map_voltage = regulator_map_voltage_ascend,
307	.is_enabled = lp3972_ldo_is_enabled,
308	.enable = lp3972_ldo_enable,
309	.disable = lp3972_ldo_disable,
310	.get_voltage_sel = lp3972_ldo_get_voltage_sel,
311	.set_voltage_sel = lp3972_ldo_set_voltage_sel,
312};
313
314static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
315{
316	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
317	int buck = rdev_get_id(dev) - LP3972_DCDC1;
318	u16 mask = 1 << (buck * 2);
319	u16 val;
320
321	val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
322	return !!(val & mask);
323}
324
325static int lp3972_dcdc_enable(struct regulator_dev *dev)
326{
327	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
328	int buck = rdev_get_id(dev) - LP3972_DCDC1;
329	u16 mask = 1 << (buck * 2);
330	u16 val;
331
332	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
333				mask, mask);
334	return val;
335}
336
337static int lp3972_dcdc_disable(struct regulator_dev *dev)
338{
339	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
340	int buck = rdev_get_id(dev) - LP3972_DCDC1;
341	u16 mask = 1 << (buck * 2);
342	u16 val;
343
344	val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
345				mask, 0);
346	return val;
347}
348
349static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
350{
351	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
352	int buck = rdev_get_id(dev) - LP3972_DCDC1;
353	u16 reg;
354
355	reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
356	reg &= LP3972_BUCK_VOL_MASK;
357
358	return reg;
359}
360
361static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
362				       unsigned int selector)
363{
364	struct lp3972 *lp3972 = rdev_get_drvdata(dev);
365	int buck = rdev_get_id(dev) - LP3972_DCDC1;
366	int ret;
367
368	ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
369				LP3972_BUCK_VOL_MASK, selector);
370	if (ret)
371		return ret;
372
373	if (buck != 0)
374		return ret;
375
376	ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
377		LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
378	if (ret)
379		return ret;
380
381	return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
382				LP3972_VOL_CHANGE_FLAG_MASK, 0);
383}
384
385static const struct regulator_ops lp3972_dcdc_ops = {
386	.list_voltage = regulator_list_voltage_table,
387	.map_voltage = regulator_map_voltage_ascend,
388	.is_enabled = lp3972_dcdc_is_enabled,
389	.enable = lp3972_dcdc_enable,
390	.disable = lp3972_dcdc_disable,
391	.get_voltage_sel = lp3972_dcdc_get_voltage_sel,
392	.set_voltage_sel = lp3972_dcdc_set_voltage_sel,
393};
394
395static const struct regulator_desc regulators[] = {
396	{
397		.name = "LDO1",
398		.id = LP3972_LDO1,
399		.ops = &lp3972_ldo_ops,
400		.n_voltages = ARRAY_SIZE(ldo1_voltage_map),
401		.volt_table = ldo1_voltage_map,
402		.type = REGULATOR_VOLTAGE,
403		.owner = THIS_MODULE,
404	},
405	{
406		.name = "LDO2",
407		.id = LP3972_LDO2,
408		.ops = &lp3972_ldo_ops,
409		.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
410		.volt_table = ldo23_voltage_map,
411		.type = REGULATOR_VOLTAGE,
412		.owner = THIS_MODULE,
413	},
414	{
415		.name = "LDO3",
416		.id = LP3972_LDO3,
417		.ops = &lp3972_ldo_ops,
418		.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
419		.volt_table = ldo23_voltage_map,
420		.type = REGULATOR_VOLTAGE,
421		.owner = THIS_MODULE,
422	},
423	{
424		.name = "LDO4",
425		.id = LP3972_LDO4,
426		.ops = &lp3972_ldo_ops,
427		.n_voltages = ARRAY_SIZE(ldo4_voltage_map),
428		.volt_table = ldo4_voltage_map,
429		.type = REGULATOR_VOLTAGE,
430		.owner = THIS_MODULE,
431	},
432	{
433		.name = "LDO5",
434		.id = LP3972_LDO5,
435		.ops = &lp3972_ldo_ops,
436		.n_voltages = ARRAY_SIZE(ldo5_voltage_map),
437		.volt_table = ldo5_voltage_map,
438		.type = REGULATOR_VOLTAGE,
439		.owner = THIS_MODULE,
440	},
441	{
442		.name = "DCDC1",
443		.id = LP3972_DCDC1,
444		.ops = &lp3972_dcdc_ops,
445		.n_voltages = ARRAY_SIZE(buck1_voltage_map),
446		.volt_table = buck1_voltage_map,
447		.type = REGULATOR_VOLTAGE,
448		.owner = THIS_MODULE,
449	},
450	{
451		.name = "DCDC2",
452		.id = LP3972_DCDC2,
453		.ops = &lp3972_dcdc_ops,
454		.n_voltages = ARRAY_SIZE(buck23_voltage_map),
455		.volt_table = buck23_voltage_map,
456		.type = REGULATOR_VOLTAGE,
457		.owner = THIS_MODULE,
458	},
459	{
460		.name = "DCDC3",
461		.id = LP3972_DCDC3,
462		.ops = &lp3972_dcdc_ops,
463		.n_voltages = ARRAY_SIZE(buck23_voltage_map),
464		.volt_table = buck23_voltage_map,
465		.type = REGULATOR_VOLTAGE,
466		.owner = THIS_MODULE,
467	},
468};
469
470static int setup_regulators(struct lp3972 *lp3972,
471	struct lp3972_platform_data *pdata)
472{
473	int i, err;
474
475	/* Instantiate the regulators */
476	for (i = 0; i < pdata->num_regulators; i++) {
477		struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
478		struct regulator_config config = { };
479		struct regulator_dev *rdev;
480
481		config.dev = lp3972->dev;
482		config.init_data = reg->initdata;
483		config.driver_data = lp3972;
484
485		rdev = devm_regulator_register(lp3972->dev,
486					       &regulators[reg->id], &config);
487		if (IS_ERR(rdev)) {
488			err = PTR_ERR(rdev);
489			dev_err(lp3972->dev, "regulator init failed: %d\n",
490				err);
491			return err;
492		}
493	}
494
495	return 0;
496}
497
498static int lp3972_i2c_probe(struct i2c_client *i2c)
 
499{
500	struct lp3972 *lp3972;
501	struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev);
502	int ret;
503	u16 val;
504
505	if (!pdata) {
506		dev_dbg(&i2c->dev, "No platform init data supplied\n");
507		return -ENODEV;
508	}
509
510	lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL);
511	if (!lp3972)
512		return -ENOMEM;
513
514	lp3972->i2c = i2c;
515	lp3972->dev = &i2c->dev;
516
517	mutex_init(&lp3972->io_lock);
518
519	/* Detect LP3972 */
520	ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
521	if (ret == 0 &&
522		(val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
523		ret = -ENODEV;
524		dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
525	}
526	if (ret < 0) {
527		dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
528		return ret;
529	}
530
531	ret = setup_regulators(lp3972, pdata);
532	if (ret < 0)
533		return ret;
534
535	i2c_set_clientdata(i2c, lp3972);
536	return 0;
537}
538
539static const struct i2c_device_id lp3972_i2c_id[] = {
540	{ "lp3972", 0 },
541	{ }
542};
543MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
544
545static struct i2c_driver lp3972_i2c_driver = {
546	.driver = {
547		.name = "lp3972",
548		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
549	},
550	.probe = lp3972_i2c_probe,
551	.id_table = lp3972_i2c_id,
552};
553
554static int __init lp3972_module_init(void)
555{
556	return i2c_add_driver(&lp3972_i2c_driver);
557}
558subsys_initcall(lp3972_module_init);
559
560static void __exit lp3972_module_exit(void)
561{
562	i2c_del_driver(&lp3972_i2c_driver);
563}
564module_exit(lp3972_module_exit);
565
566MODULE_LICENSE("GPL");
567MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
568MODULE_DESCRIPTION("LP3972 PMIC driver");