Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Arizona core driver
4 *
5 * Copyright 2012 Wolfson Microelectronics plc
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 */
9
10#include <linux/clk.h>
11#include <linux/delay.h>
12#include <linux/err.h>
13#include <linux/gpio/consumer.h>
14#include <linux/interrupt.h>
15#include <linux/mfd/core.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/pm_runtime.h>
20#include <linux/regmap.h>
21#include <linux/regulator/consumer.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/ktime.h>
25#include <linux/platform_device.h>
26
27#include <linux/mfd/arizona/core.h>
28#include <linux/mfd/arizona/registers.h>
29
30#include "arizona.h"
31
32static const char * const wm5102_core_supplies[] = {
33 "AVDD",
34 "DBVDD1",
35};
36
37int arizona_clk32k_enable(struct arizona *arizona)
38{
39 int ret = 0;
40
41 mutex_lock(&arizona->clk_lock);
42
43 arizona->clk32k_ref++;
44
45 if (arizona->clk32k_ref == 1) {
46 switch (arizona->pdata.clk32k_src) {
47 case ARIZONA_32KZ_MCLK1:
48 ret = pm_runtime_get_sync(arizona->dev);
49 if (ret != 0)
50 goto err_ref;
51 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]);
52 if (ret != 0) {
53 pm_runtime_put_sync(arizona->dev);
54 goto err_ref;
55 }
56 break;
57 case ARIZONA_32KZ_MCLK2:
58 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]);
59 if (ret != 0)
60 goto err_ref;
61 break;
62 }
63
64 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
65 ARIZONA_CLK_32K_ENA,
66 ARIZONA_CLK_32K_ENA);
67 }
68
69err_ref:
70 if (ret != 0)
71 arizona->clk32k_ref--;
72
73 mutex_unlock(&arizona->clk_lock);
74
75 return ret;
76}
77EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
78
79int arizona_clk32k_disable(struct arizona *arizona)
80{
81 mutex_lock(&arizona->clk_lock);
82
83 WARN_ON(arizona->clk32k_ref <= 0);
84
85 arizona->clk32k_ref--;
86
87 if (arizona->clk32k_ref == 0) {
88 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
89 ARIZONA_CLK_32K_ENA, 0);
90
91 switch (arizona->pdata.clk32k_src) {
92 case ARIZONA_32KZ_MCLK1:
93 pm_runtime_put_sync(arizona->dev);
94 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]);
95 break;
96 case ARIZONA_32KZ_MCLK2:
97 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]);
98 break;
99 }
100 }
101
102 mutex_unlock(&arizona->clk_lock);
103
104 return 0;
105}
106EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
107
108static irqreturn_t arizona_clkgen_err(int irq, void *data)
109{
110 struct arizona *arizona = data;
111
112 dev_err(arizona->dev, "CLKGEN error\n");
113
114 return IRQ_HANDLED;
115}
116
117static irqreturn_t arizona_underclocked(int irq, void *data)
118{
119 struct arizona *arizona = data;
120 unsigned int val;
121 int ret;
122
123 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
124 &val);
125 if (ret != 0) {
126 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
127 ret);
128 return IRQ_NONE;
129 }
130
131 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
132 dev_err(arizona->dev, "AIF3 underclocked\n");
133 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
134 dev_err(arizona->dev, "AIF2 underclocked\n");
135 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
136 dev_err(arizona->dev, "AIF1 underclocked\n");
137 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
138 dev_err(arizona->dev, "ISRC3 underclocked\n");
139 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
140 dev_err(arizona->dev, "ISRC2 underclocked\n");
141 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
142 dev_err(arizona->dev, "ISRC1 underclocked\n");
143 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
144 dev_err(arizona->dev, "FX underclocked\n");
145 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
146 dev_err(arizona->dev, "ASRC underclocked\n");
147 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
148 dev_err(arizona->dev, "DAC underclocked\n");
149 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
150 dev_err(arizona->dev, "ADC underclocked\n");
151 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
152 dev_err(arizona->dev, "Mixer dropped sample\n");
153
154 return IRQ_HANDLED;
155}
156
157static irqreturn_t arizona_overclocked(int irq, void *data)
158{
159 struct arizona *arizona = data;
160 unsigned int val[3];
161 int ret;
162
163 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
164 &val[0], 3);
165 if (ret != 0) {
166 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
167 ret);
168 return IRQ_NONE;
169 }
170
171 switch (arizona->type) {
172 case WM8998:
173 case WM1814:
174 /* Some bits are shifted on WM8998,
175 * rearrange to match the standard bit layout
176 */
177 val[0] = ((val[0] & 0x60e0) >> 1) |
178 ((val[0] & 0x1e00) >> 2) |
179 (val[0] & 0x000f);
180 break;
181 default:
182 break;
183 }
184
185 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "PWM overclocked\n");
187 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "FX core overclocked\n");
189 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "DAC SYS overclocked\n");
191 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "DAC WARP overclocked\n");
193 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "ADC overclocked\n");
195 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "Mixer overclocked\n");
197 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "AIF3 overclocked\n");
199 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "AIF2 overclocked\n");
201 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "AIF1 overclocked\n");
203 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
204 dev_err(arizona->dev, "Pad control overclocked\n");
205
206 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
207 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
208 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
209 dev_err(arizona->dev, "Slimbus async overclocked\n");
210 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
211 dev_err(arizona->dev, "Slimbus sync overclocked\n");
212 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
213 dev_err(arizona->dev, "ASRC async system overclocked\n");
214 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
215 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
216 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
217 dev_err(arizona->dev, "ASRC sync system overclocked\n");
218 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
219 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
220 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
221 dev_err(arizona->dev, "DSP1 overclocked\n");
222 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
223 dev_err(arizona->dev, "ISRC3 overclocked\n");
224 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
225 dev_err(arizona->dev, "ISRC2 overclocked\n");
226 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
227 dev_err(arizona->dev, "ISRC1 overclocked\n");
228
229 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
230 dev_err(arizona->dev, "SPDIF overclocked\n");
231
232 return IRQ_HANDLED;
233}
234
235#define ARIZONA_REG_POLL_DELAY_US 7500
236
237static inline bool arizona_poll_reg_delay(ktime_t timeout)
238{
239 if (ktime_compare(ktime_get(), timeout) > 0)
240 return false;
241
242 usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US);
243
244 return true;
245}
246
247static int arizona_poll_reg(struct arizona *arizona,
248 int timeout_ms, unsigned int reg,
249 unsigned int mask, unsigned int target)
250{
251 ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC);
252 unsigned int val = 0;
253 int ret;
254
255 do {
256 ret = regmap_read(arizona->regmap, reg, &val);
257
258 if ((val & mask) == target)
259 return 0;
260 } while (arizona_poll_reg_delay(timeout));
261
262 if (ret) {
263 dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n",
264 reg, ret);
265 return ret;
266 }
267
268 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val);
269 return -ETIMEDOUT;
270}
271
272static int arizona_wait_for_boot(struct arizona *arizona)
273{
274 int ret;
275
276 /*
277 * We can't use an interrupt as we need to runtime resume to do so,
278 * we won't race with the interrupt handler as it'll be blocked on
279 * runtime resume.
280 */
281 ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5,
282 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
283
284 if (!ret)
285 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
286 ARIZONA_BOOT_DONE_STS);
287
288 pm_runtime_mark_last_busy(arizona->dev);
289
290 return ret;
291}
292
293static inline void arizona_enable_reset(struct arizona *arizona)
294{
295 if (arizona->pdata.reset)
296 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0);
297}
298
299static void arizona_disable_reset(struct arizona *arizona)
300{
301 if (arizona->pdata.reset) {
302 switch (arizona->type) {
303 case WM5110:
304 case WM8280:
305 /* Meet requirements for minimum reset duration */
306 usleep_range(5000, 10000);
307 break;
308 default:
309 break;
310 }
311
312 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1);
313 usleep_range(1000, 5000);
314 }
315}
316
317struct arizona_sysclk_state {
318 unsigned int fll;
319 unsigned int sysclk;
320};
321
322static int arizona_enable_freerun_sysclk(struct arizona *arizona,
323 struct arizona_sysclk_state *state)
324{
325 int ret, err;
326
327 /* Cache existing FLL and SYSCLK settings */
328 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
329 if (ret) {
330 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
331 ret);
332 return ret;
333 }
334 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
335 &state->sysclk);
336 if (ret) {
337 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
338 ret);
339 return ret;
340 }
341
342 /* Start up SYSCLK using the FLL in free running mode */
343 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
344 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
345 if (ret) {
346 dev_err(arizona->dev,
347 "Failed to start FLL in freerunning mode: %d\n",
348 ret);
349 return ret;
350 }
351 ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5,
352 ARIZONA_FLL1_CLOCK_OK_STS,
353 ARIZONA_FLL1_CLOCK_OK_STS);
354 if (ret)
355 goto err_fll;
356
357 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
358 if (ret) {
359 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
360 goto err_fll;
361 }
362
363 return 0;
364
365err_fll:
366 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
367 if (err)
368 dev_err(arizona->dev,
369 "Failed to re-apply old FLL settings: %d\n", err);
370
371 return ret;
372}
373
374static int arizona_disable_freerun_sysclk(struct arizona *arizona,
375 struct arizona_sysclk_state *state)
376{
377 int ret;
378
379 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
380 state->sysclk);
381 if (ret) {
382 dev_err(arizona->dev,
383 "Failed to re-apply old SYSCLK settings: %d\n", ret);
384 return ret;
385 }
386
387 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
388 if (ret) {
389 dev_err(arizona->dev,
390 "Failed to re-apply old FLL settings: %d\n", ret);
391 return ret;
392 }
393
394 return 0;
395}
396
397static int wm5102_apply_hardware_patch(struct arizona *arizona)
398{
399 struct arizona_sysclk_state state;
400 int err, ret;
401
402 ret = arizona_enable_freerun_sysclk(arizona, &state);
403 if (ret)
404 return ret;
405
406 /* Start the write sequencer and wait for it to finish */
407 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
408 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
409 if (ret) {
410 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
411 ret);
412 goto err;
413 }
414
415 ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1,
416 ARIZONA_WSEQ_BUSY, 0);
417 if (ret)
418 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
419 ARIZONA_WSEQ_ABORT);
420
421err:
422 err = arizona_disable_freerun_sysclk(arizona, &state);
423
424 return ret ?: err;
425}
426
427/*
428 * Register patch to some of the CODECs internal write sequences
429 * to ensure a clean exit from the low power sleep state.
430 */
431static const struct reg_sequence wm5110_sleep_patch[] = {
432 { 0x337A, 0xC100 },
433 { 0x337B, 0x0041 },
434 { 0x3300, 0xA210 },
435 { 0x3301, 0x050C },
436};
437
438static int wm5110_apply_sleep_patch(struct arizona *arizona)
439{
440 struct arizona_sysclk_state state;
441 int err, ret;
442
443 ret = arizona_enable_freerun_sysclk(arizona, &state);
444 if (ret)
445 return ret;
446
447 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
448 wm5110_sleep_patch,
449 ARRAY_SIZE(wm5110_sleep_patch));
450
451 err = arizona_disable_freerun_sysclk(arizona, &state);
452
453 return ret ?: err;
454}
455
456static int wm5102_clear_write_sequencer(struct arizona *arizona)
457{
458 int ret;
459
460 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
461 0x0);
462 if (ret) {
463 dev_err(arizona->dev,
464 "Failed to clear write sequencer state: %d\n", ret);
465 return ret;
466 }
467
468 arizona_enable_reset(arizona);
469 regulator_disable(arizona->dcvdd);
470
471 msleep(20);
472
473 ret = regulator_enable(arizona->dcvdd);
474 if (ret) {
475 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
476 return ret;
477 }
478 arizona_disable_reset(arizona);
479
480 return 0;
481}
482
483#ifdef CONFIG_PM
484static int arizona_isolate_dcvdd(struct arizona *arizona)
485{
486 int ret;
487
488 ret = regmap_update_bits(arizona->regmap,
489 ARIZONA_ISOLATION_CONTROL,
490 ARIZONA_ISOLATE_DCVDD1,
491 ARIZONA_ISOLATE_DCVDD1);
492 if (ret != 0)
493 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
494
495 return ret;
496}
497
498static int arizona_connect_dcvdd(struct arizona *arizona)
499{
500 int ret;
501
502 ret = regmap_update_bits(arizona->regmap,
503 ARIZONA_ISOLATION_CONTROL,
504 ARIZONA_ISOLATE_DCVDD1, 0);
505 if (ret != 0)
506 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
507
508 return ret;
509}
510
511static int arizona_is_jack_det_active(struct arizona *arizona)
512{
513 unsigned int val;
514 int ret;
515
516 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
517 if (ret) {
518 dev_err(arizona->dev,
519 "Failed to check jack det status: %d\n", ret);
520 return ret;
521 } else if (val & ARIZONA_JD1_ENA) {
522 return 1;
523 } else {
524 return 0;
525 }
526}
527
528static int arizona_runtime_resume(struct device *dev)
529{
530 struct arizona *arizona = dev_get_drvdata(dev);
531 int ret;
532
533 dev_dbg(arizona->dev, "Leaving AoD mode\n");
534
535 if (arizona->has_fully_powered_off) {
536 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
537
538 ret = regulator_bulk_enable(arizona->num_core_supplies,
539 arizona->core_supplies);
540 if (ret) {
541 dev_err(dev, "Failed to enable core supplies: %d\n",
542 ret);
543 return ret;
544 }
545 }
546
547 ret = regulator_enable(arizona->dcvdd);
548 if (ret != 0) {
549 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
550 if (arizona->has_fully_powered_off)
551 regulator_bulk_disable(arizona->num_core_supplies,
552 arizona->core_supplies);
553 return ret;
554 }
555
556 if (arizona->has_fully_powered_off) {
557 arizona_disable_reset(arizona);
558 enable_irq(arizona->irq);
559 arizona->has_fully_powered_off = false;
560 }
561
562 regcache_cache_only(arizona->regmap, false);
563
564 switch (arizona->type) {
565 case WM5102:
566 if (arizona->external_dcvdd) {
567 ret = arizona_connect_dcvdd(arizona);
568 if (ret != 0)
569 goto err;
570 }
571
572 ret = wm5102_patch(arizona);
573 if (ret != 0) {
574 dev_err(arizona->dev, "Failed to apply patch: %d\n",
575 ret);
576 goto err;
577 }
578
579 ret = wm5102_apply_hardware_patch(arizona);
580 if (ret) {
581 dev_err(arizona->dev,
582 "Failed to apply hardware patch: %d\n",
583 ret);
584 goto err;
585 }
586 break;
587 case WM5110:
588 case WM8280:
589 ret = arizona_wait_for_boot(arizona);
590 if (ret)
591 goto err;
592
593 if (arizona->external_dcvdd) {
594 ret = arizona_connect_dcvdd(arizona);
595 if (ret != 0)
596 goto err;
597 } else {
598 /*
599 * As this is only called for the internal regulator
600 * (where we know voltage ranges available) it is ok
601 * to request an exact range.
602 */
603 ret = regulator_set_voltage(arizona->dcvdd,
604 1200000, 1200000);
605 if (ret < 0) {
606 dev_err(arizona->dev,
607 "Failed to set resume voltage: %d\n",
608 ret);
609 goto err;
610 }
611 }
612
613 ret = wm5110_apply_sleep_patch(arizona);
614 if (ret) {
615 dev_err(arizona->dev,
616 "Failed to re-apply sleep patch: %d\n",
617 ret);
618 goto err;
619 }
620 break;
621 case WM1831:
622 case CS47L24:
623 ret = arizona_wait_for_boot(arizona);
624 if (ret != 0)
625 goto err;
626 break;
627 default:
628 ret = arizona_wait_for_boot(arizona);
629 if (ret != 0)
630 goto err;
631
632 if (arizona->external_dcvdd) {
633 ret = arizona_connect_dcvdd(arizona);
634 if (ret != 0)
635 goto err;
636 }
637 break;
638 }
639
640 ret = regcache_sync(arizona->regmap);
641 if (ret != 0) {
642 dev_err(arizona->dev, "Failed to restore register cache\n");
643 goto err;
644 }
645
646 return 0;
647
648err:
649 regcache_cache_only(arizona->regmap, true);
650 regulator_disable(arizona->dcvdd);
651 return ret;
652}
653
654static int arizona_runtime_suspend(struct device *dev)
655{
656 struct arizona *arizona = dev_get_drvdata(dev);
657 int jd_active = 0;
658 int ret;
659
660 dev_dbg(arizona->dev, "Entering AoD mode\n");
661
662 switch (arizona->type) {
663 case WM5110:
664 case WM8280:
665 jd_active = arizona_is_jack_det_active(arizona);
666 if (jd_active < 0)
667 return jd_active;
668
669 if (arizona->external_dcvdd) {
670 ret = arizona_isolate_dcvdd(arizona);
671 if (ret != 0)
672 return ret;
673 } else {
674 /*
675 * As this is only called for the internal regulator
676 * (where we know voltage ranges available) it is ok
677 * to request an exact range.
678 */
679 ret = regulator_set_voltage(arizona->dcvdd,
680 1175000, 1175000);
681 if (ret < 0) {
682 dev_err(arizona->dev,
683 "Failed to set suspend voltage: %d\n",
684 ret);
685 return ret;
686 }
687 }
688 break;
689 case WM5102:
690 jd_active = arizona_is_jack_det_active(arizona);
691 if (jd_active < 0)
692 return jd_active;
693
694 if (arizona->external_dcvdd) {
695 ret = arizona_isolate_dcvdd(arizona);
696 if (ret != 0)
697 return ret;
698 }
699
700 if (!jd_active) {
701 ret = regmap_write(arizona->regmap,
702 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
703 if (ret) {
704 dev_err(arizona->dev,
705 "Failed to clear write sequencer: %d\n",
706 ret);
707 return ret;
708 }
709 }
710 break;
711 case WM1831:
712 case CS47L24:
713 break;
714 default:
715 jd_active = arizona_is_jack_det_active(arizona);
716 if (jd_active < 0)
717 return jd_active;
718
719 if (arizona->external_dcvdd) {
720 ret = arizona_isolate_dcvdd(arizona);
721 if (ret != 0)
722 return ret;
723 }
724 break;
725 }
726
727 regcache_cache_only(arizona->regmap, true);
728 regcache_mark_dirty(arizona->regmap);
729 regulator_disable(arizona->dcvdd);
730
731 /* Allow us to completely power down if no jack detection */
732 if (!jd_active) {
733 dev_dbg(arizona->dev, "Fully powering off\n");
734
735 arizona->has_fully_powered_off = true;
736
737 disable_irq_nosync(arizona->irq);
738 arizona_enable_reset(arizona);
739 regulator_bulk_disable(arizona->num_core_supplies,
740 arizona->core_supplies);
741 }
742
743 return 0;
744}
745#endif
746
747#ifdef CONFIG_PM_SLEEP
748static int arizona_suspend(struct device *dev)
749{
750 struct arizona *arizona = dev_get_drvdata(dev);
751
752 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
753 disable_irq(arizona->irq);
754
755 return 0;
756}
757
758static int arizona_suspend_noirq(struct device *dev)
759{
760 struct arizona *arizona = dev_get_drvdata(dev);
761
762 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
763 enable_irq(arizona->irq);
764
765 return 0;
766}
767
768static int arizona_resume_noirq(struct device *dev)
769{
770 struct arizona *arizona = dev_get_drvdata(dev);
771
772 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
773 disable_irq(arizona->irq);
774
775 return 0;
776}
777
778static int arizona_resume(struct device *dev)
779{
780 struct arizona *arizona = dev_get_drvdata(dev);
781
782 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n");
783 enable_irq(arizona->irq);
784
785 return 0;
786}
787#endif
788
789const struct dev_pm_ops arizona_pm_ops = {
790 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
791 arizona_runtime_resume,
792 NULL)
793 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
794 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq,
795 arizona_resume_noirq)
796};
797EXPORT_SYMBOL_GPL(arizona_pm_ops);
798
799#ifdef CONFIG_OF
800unsigned long arizona_of_get_type(struct device *dev)
801{
802 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
803
804 if (id)
805 return (unsigned long)id->data;
806 else
807 return 0;
808}
809EXPORT_SYMBOL_GPL(arizona_of_get_type);
810
811static int arizona_of_get_core_pdata(struct arizona *arizona)
812{
813 struct arizona_pdata *pdata = &arizona->pdata;
814 int ret, i;
815
816 /* Handle old non-standard DT binding */
817 pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW);
818 if (IS_ERR(pdata->reset)) {
819 ret = PTR_ERR(pdata->reset);
820
821 /*
822 * Reset missing will be caught when other binding is read
823 * but all other errors imply this binding is in use but has
824 * encountered a problem so should be handled.
825 */
826 if (ret == -EPROBE_DEFER)
827 return ret;
828 else if (ret != -ENOENT && ret != -ENOSYS)
829 dev_err(arizona->dev, "Reset GPIO malformed: %d\n",
830 ret);
831
832 pdata->reset = NULL;
833 }
834
835 ret = of_property_read_u32_array(arizona->dev->of_node,
836 "wlf,gpio-defaults",
837 pdata->gpio_defaults,
838 ARRAY_SIZE(pdata->gpio_defaults));
839 if (ret >= 0) {
840 /*
841 * All values are literal except out of range values
842 * which are chip default, translate into platform
843 * data which uses 0 as chip default and out of range
844 * as zero.
845 */
846 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
847 if (pdata->gpio_defaults[i] > 0xffff)
848 pdata->gpio_defaults[i] = 0;
849 else if (pdata->gpio_defaults[i] == 0)
850 pdata->gpio_defaults[i] = 0x10000;
851 }
852 } else {
853 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
854 ret);
855 }
856
857 return 0;
858}
859
860const struct of_device_id arizona_of_match[] = {
861 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
862 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
863 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
864 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
865 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
866 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
867 { .compatible = "wlf,wm1831", .data = (void *)WM1831 },
868 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 },
869 {},
870};
871EXPORT_SYMBOL_GPL(arizona_of_match);
872#else
873static inline int arizona_of_get_core_pdata(struct arizona *arizona)
874{
875 return 0;
876}
877#endif
878
879static const struct mfd_cell early_devs[] = {
880 { .name = "arizona-ldo1" },
881};
882
883static const char * const wm5102_supplies[] = {
884 "MICVDD",
885 "DBVDD2",
886 "DBVDD3",
887 "CPVDD",
888 "SPKVDDL",
889 "SPKVDDR",
890};
891
892static const struct mfd_cell wm5102_devs[] = {
893 { .name = "arizona-micsupp" },
894 { .name = "arizona-gpio" },
895 {
896 .name = "arizona-extcon",
897 .parent_supplies = wm5102_supplies,
898 .num_parent_supplies = 1, /* We only need MICVDD */
899 },
900 { .name = "arizona-haptics" },
901 { .name = "arizona-pwm" },
902 {
903 .name = "wm5102-codec",
904 .parent_supplies = wm5102_supplies,
905 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
906 },
907};
908
909static const struct mfd_cell wm5110_devs[] = {
910 { .name = "arizona-micsupp" },
911 { .name = "arizona-gpio" },
912 {
913 .name = "arizona-extcon",
914 .parent_supplies = wm5102_supplies,
915 .num_parent_supplies = 1, /* We only need MICVDD */
916 },
917 { .name = "arizona-haptics" },
918 { .name = "arizona-pwm" },
919 {
920 .name = "wm5110-codec",
921 .parent_supplies = wm5102_supplies,
922 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
923 },
924};
925
926static const char * const cs47l24_supplies[] = {
927 "MICVDD",
928 "CPVDD",
929 "SPKVDD",
930};
931
932static const struct mfd_cell cs47l24_devs[] = {
933 { .name = "arizona-gpio" },
934 { .name = "arizona-haptics" },
935 { .name = "arizona-pwm" },
936 {
937 .name = "cs47l24-codec",
938 .parent_supplies = cs47l24_supplies,
939 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies),
940 },
941};
942
943static const char * const wm8997_supplies[] = {
944 "MICVDD",
945 "DBVDD2",
946 "CPVDD",
947 "SPKVDD",
948};
949
950static const struct mfd_cell wm8997_devs[] = {
951 { .name = "arizona-micsupp" },
952 { .name = "arizona-gpio" },
953 {
954 .name = "arizona-extcon",
955 .parent_supplies = wm8997_supplies,
956 .num_parent_supplies = 1, /* We only need MICVDD */
957 },
958 { .name = "arizona-haptics" },
959 { .name = "arizona-pwm" },
960 {
961 .name = "wm8997-codec",
962 .parent_supplies = wm8997_supplies,
963 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
964 },
965};
966
967static const struct mfd_cell wm8998_devs[] = {
968 { .name = "arizona-micsupp" },
969 { .name = "arizona-gpio" },
970 {
971 .name = "arizona-extcon",
972 .parent_supplies = wm5102_supplies,
973 .num_parent_supplies = 1, /* We only need MICVDD */
974 },
975 { .name = "arizona-haptics" },
976 { .name = "arizona-pwm" },
977 {
978 .name = "wm8998-codec",
979 .parent_supplies = wm5102_supplies,
980 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
981 },
982};
983
984int arizona_dev_init(struct arizona *arizona)
985{
986 static const char * const mclk_name[] = { "mclk1", "mclk2" };
987 struct device *dev = arizona->dev;
988 const char *type_name = NULL;
989 unsigned int reg, val;
990 int (*apply_patch)(struct arizona *) = NULL;
991 const struct mfd_cell *subdevs = NULL;
992 int n_subdevs = 0, ret, i;
993
994 dev_set_drvdata(arizona->dev, arizona);
995 mutex_init(&arizona->clk_lock);
996
997 if (dev_get_platdata(arizona->dev)) {
998 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
999 sizeof(arizona->pdata));
1000 } else {
1001 ret = arizona_of_get_core_pdata(arizona);
1002 if (ret < 0)
1003 return ret;
1004 }
1005
1006 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name));
1007 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
1008 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]);
1009 if (IS_ERR(arizona->mclk[i])) {
1010 dev_info(arizona->dev, "Failed to get %s: %ld\n",
1011 mclk_name[i], PTR_ERR(arizona->mclk[i]));
1012 arizona->mclk[i] = NULL;
1013 }
1014 }
1015
1016 regcache_cache_only(arizona->regmap, true);
1017
1018 switch (arizona->type) {
1019 case WM5102:
1020 case WM5110:
1021 case WM8280:
1022 case WM8997:
1023 case WM8998:
1024 case WM1814:
1025 case WM1831:
1026 case CS47L24:
1027 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
1028 arizona->core_supplies[i].supply
1029 = wm5102_core_supplies[i];
1030 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
1031 break;
1032 default:
1033 dev_err(arizona->dev, "Unknown device type %d\n",
1034 arizona->type);
1035 return -ENODEV;
1036 }
1037
1038 /* Mark DCVDD as external, LDO1 driver will clear if internal */
1039 arizona->external_dcvdd = true;
1040
1041 switch (arizona->type) {
1042 case WM1831:
1043 case CS47L24:
1044 break; /* No LDO1 regulator */
1045 default:
1046 ret = mfd_add_devices(arizona->dev, -1, early_devs,
1047 ARRAY_SIZE(early_devs), NULL, 0, NULL);
1048 if (ret != 0) {
1049 dev_err(dev, "Failed to add early children: %d\n", ret);
1050 return ret;
1051 }
1052 break;
1053 }
1054
1055 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
1056 arizona->core_supplies);
1057 if (ret != 0) {
1058 dev_err(dev, "Failed to request core supplies: %d\n",
1059 ret);
1060 goto err_early;
1061 }
1062
1063 /**
1064 * Don't use devres here because the only device we have to get
1065 * against is the MFD device and DCVDD will likely be supplied by
1066 * one of its children. Meaning that the regulator will be
1067 * destroyed by the time devres calls regulator put.
1068 */
1069 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
1070 if (IS_ERR(arizona->dcvdd)) {
1071 ret = PTR_ERR(arizona->dcvdd);
1072 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1073 goto err_early;
1074 }
1075
1076 if (!arizona->pdata.reset) {
1077 /* Start out with /RESET low to put the chip into reset */
1078 arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset",
1079 GPIOD_OUT_LOW);
1080 if (IS_ERR(arizona->pdata.reset)) {
1081 ret = PTR_ERR(arizona->pdata.reset);
1082 if (ret == -EPROBE_DEFER)
1083 goto err_dcvdd;
1084
1085 dev_err(arizona->dev,
1086 "Reset GPIO missing/malformed: %d\n", ret);
1087
1088 arizona->pdata.reset = NULL;
1089 }
1090 }
1091
1092 ret = regulator_bulk_enable(arizona->num_core_supplies,
1093 arizona->core_supplies);
1094 if (ret != 0) {
1095 dev_err(dev, "Failed to enable core supplies: %d\n",
1096 ret);
1097 goto err_dcvdd;
1098 }
1099
1100 ret = regulator_enable(arizona->dcvdd);
1101 if (ret != 0) {
1102 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1103 goto err_enable;
1104 }
1105
1106 arizona_disable_reset(arizona);
1107
1108 regcache_cache_only(arizona->regmap, false);
1109
1110 /* Verify that this is a chip we know about */
1111 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
1112 if (ret != 0) {
1113 dev_err(dev, "Failed to read ID register: %d\n", ret);
1114 goto err_reset;
1115 }
1116
1117 switch (reg) {
1118 case 0x5102:
1119 case 0x5110:
1120 case 0x6349:
1121 case 0x6363:
1122 case 0x8997:
1123 break;
1124 default:
1125 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1126 ret = -ENODEV;
1127 goto err_reset;
1128 }
1129
1130 /* If we have a /RESET GPIO we'll already be reset */
1131 if (!arizona->pdata.reset) {
1132 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1133 if (ret != 0) {
1134 dev_err(dev, "Failed to reset device: %d\n", ret);
1135 goto err_reset;
1136 }
1137
1138 usleep_range(1000, 5000);
1139 }
1140
1141 /* Ensure device startup is complete */
1142 switch (arizona->type) {
1143 case WM5102:
1144 ret = regmap_read(arizona->regmap,
1145 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1146 if (ret) {
1147 dev_err(dev,
1148 "Failed to check write sequencer state: %d\n",
1149 ret);
1150 } else if (val & 0x01) {
1151 ret = wm5102_clear_write_sequencer(arizona);
1152 if (ret)
1153 return ret;
1154 }
1155 break;
1156 default:
1157 break;
1158 }
1159
1160 ret = arizona_wait_for_boot(arizona);
1161 if (ret) {
1162 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1163 goto err_reset;
1164 }
1165
1166 /* Read the device ID information & do device specific stuff */
1167 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
1168 if (ret != 0) {
1169 dev_err(dev, "Failed to read ID register: %d\n", ret);
1170 goto err_reset;
1171 }
1172
1173 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1174 &arizona->rev);
1175 if (ret != 0) {
1176 dev_err(dev, "Failed to read revision register: %d\n", ret);
1177 goto err_reset;
1178 }
1179 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1180
1181 switch (reg) {
1182 case 0x5102:
1183 if (IS_ENABLED(CONFIG_MFD_WM5102)) {
1184 type_name = "WM5102";
1185 if (arizona->type != WM5102) {
1186 dev_warn(arizona->dev,
1187 "WM5102 registered as %d\n",
1188 arizona->type);
1189 arizona->type = WM5102;
1190 }
1191
1192 apply_patch = wm5102_patch;
1193 arizona->rev &= 0x7;
1194 subdevs = wm5102_devs;
1195 n_subdevs = ARRAY_SIZE(wm5102_devs);
1196 }
1197 break;
1198 case 0x5110:
1199 if (IS_ENABLED(CONFIG_MFD_WM5110)) {
1200 switch (arizona->type) {
1201 case WM5110:
1202 type_name = "WM5110";
1203 break;
1204 case WM8280:
1205 type_name = "WM8280";
1206 break;
1207 default:
1208 type_name = "WM5110";
1209 dev_warn(arizona->dev,
1210 "WM5110 registered as %d\n",
1211 arizona->type);
1212 arizona->type = WM5110;
1213 break;
1214 }
1215
1216 apply_patch = wm5110_patch;
1217 subdevs = wm5110_devs;
1218 n_subdevs = ARRAY_SIZE(wm5110_devs);
1219 }
1220 break;
1221 case 0x6363:
1222 if (IS_ENABLED(CONFIG_MFD_CS47L24)) {
1223 switch (arizona->type) {
1224 case CS47L24:
1225 type_name = "CS47L24";
1226 break;
1227
1228 case WM1831:
1229 type_name = "WM1831";
1230 break;
1231
1232 default:
1233 dev_warn(arizona->dev,
1234 "CS47L24 registered as %d\n",
1235 arizona->type);
1236 arizona->type = CS47L24;
1237 break;
1238 }
1239
1240 apply_patch = cs47l24_patch;
1241 subdevs = cs47l24_devs;
1242 n_subdevs = ARRAY_SIZE(cs47l24_devs);
1243 }
1244 break;
1245 case 0x8997:
1246 if (IS_ENABLED(CONFIG_MFD_WM8997)) {
1247 type_name = "WM8997";
1248 if (arizona->type != WM8997) {
1249 dev_warn(arizona->dev,
1250 "WM8997 registered as %d\n",
1251 arizona->type);
1252 arizona->type = WM8997;
1253 }
1254
1255 apply_patch = wm8997_patch;
1256 subdevs = wm8997_devs;
1257 n_subdevs = ARRAY_SIZE(wm8997_devs);
1258 }
1259 break;
1260 case 0x6349:
1261 if (IS_ENABLED(CONFIG_MFD_WM8998)) {
1262 switch (arizona->type) {
1263 case WM8998:
1264 type_name = "WM8998";
1265 break;
1266
1267 case WM1814:
1268 type_name = "WM1814";
1269 break;
1270
1271 default:
1272 type_name = "WM8998";
1273 dev_warn(arizona->dev,
1274 "WM8998 registered as %d\n",
1275 arizona->type);
1276 arizona->type = WM8998;
1277 }
1278
1279 apply_patch = wm8998_patch;
1280 subdevs = wm8998_devs;
1281 n_subdevs = ARRAY_SIZE(wm8998_devs);
1282 }
1283 break;
1284 default:
1285 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1286 ret = -ENODEV;
1287 goto err_reset;
1288 }
1289
1290 if (!subdevs) {
1291 dev_err(arizona->dev,
1292 "No kernel support for device ID %x\n", reg);
1293 ret = -ENODEV;
1294 goto err_reset;
1295 }
1296
1297 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1298
1299 if (apply_patch) {
1300 ret = apply_patch(arizona);
1301 if (ret != 0) {
1302 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1303 ret);
1304 goto err_reset;
1305 }
1306
1307 switch (arizona->type) {
1308 case WM5102:
1309 ret = wm5102_apply_hardware_patch(arizona);
1310 if (ret) {
1311 dev_err(arizona->dev,
1312 "Failed to apply hardware patch: %d\n",
1313 ret);
1314 goto err_reset;
1315 }
1316 break;
1317 case WM5110:
1318 case WM8280:
1319 ret = wm5110_apply_sleep_patch(arizona);
1320 if (ret) {
1321 dev_err(arizona->dev,
1322 "Failed to apply sleep patch: %d\n",
1323 ret);
1324 goto err_reset;
1325 }
1326 break;
1327 default:
1328 break;
1329 }
1330 }
1331
1332 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1333 if (!arizona->pdata.gpio_defaults[i])
1334 continue;
1335
1336 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1337 arizona->pdata.gpio_defaults[i]);
1338 }
1339
1340 /* Chip default */
1341 if (!arizona->pdata.clk32k_src)
1342 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1343
1344 switch (arizona->pdata.clk32k_src) {
1345 case ARIZONA_32KZ_MCLK1:
1346 case ARIZONA_32KZ_MCLK2:
1347 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1348 ARIZONA_CLK_32K_SRC_MASK,
1349 arizona->pdata.clk32k_src - 1);
1350 arizona_clk32k_enable(arizona);
1351 break;
1352 case ARIZONA_32KZ_NONE:
1353 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1354 ARIZONA_CLK_32K_SRC_MASK, 2);
1355 break;
1356 default:
1357 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1358 arizona->pdata.clk32k_src);
1359 ret = -EINVAL;
1360 goto err_reset;
1361 }
1362
1363 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1364 if (!arizona->pdata.micbias[i].mV &&
1365 !arizona->pdata.micbias[i].bypass)
1366 continue;
1367
1368 /* Apply default for bypass mode */
1369 if (!arizona->pdata.micbias[i].mV)
1370 arizona->pdata.micbias[i].mV = 2800;
1371
1372 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1373
1374 val <<= ARIZONA_MICB1_LVL_SHIFT;
1375
1376 if (arizona->pdata.micbias[i].ext_cap)
1377 val |= ARIZONA_MICB1_EXT_CAP;
1378
1379 if (arizona->pdata.micbias[i].discharge)
1380 val |= ARIZONA_MICB1_DISCH;
1381
1382 if (arizona->pdata.micbias[i].soft_start)
1383 val |= ARIZONA_MICB1_RATE;
1384
1385 if (arizona->pdata.micbias[i].bypass)
1386 val |= ARIZONA_MICB1_BYPASS;
1387
1388 regmap_update_bits(arizona->regmap,
1389 ARIZONA_MIC_BIAS_CTRL_1 + i,
1390 ARIZONA_MICB1_LVL_MASK |
1391 ARIZONA_MICB1_EXT_CAP |
1392 ARIZONA_MICB1_DISCH |
1393 ARIZONA_MICB1_BYPASS |
1394 ARIZONA_MICB1_RATE, val);
1395 }
1396
1397 pm_runtime_set_active(arizona->dev);
1398 pm_runtime_enable(arizona->dev);
1399
1400 /* Set up for interrupts */
1401 ret = arizona_irq_init(arizona);
1402 if (ret != 0)
1403 goto err_pm;
1404
1405 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1406 pm_runtime_use_autosuspend(arizona->dev);
1407
1408 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1409 arizona_clkgen_err, arizona);
1410 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1411 arizona_overclocked, arizona);
1412 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1413 arizona_underclocked, arizona);
1414
1415 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
1416 subdevs, n_subdevs, NULL, 0, NULL);
1417
1418 if (ret) {
1419 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1420 goto err_irq;
1421 }
1422
1423 return 0;
1424
1425err_irq:
1426 arizona_irq_exit(arizona);
1427err_pm:
1428 pm_runtime_disable(arizona->dev);
1429
1430 switch (arizona->pdata.clk32k_src) {
1431 case ARIZONA_32KZ_MCLK1:
1432 case ARIZONA_32KZ_MCLK2:
1433 arizona_clk32k_disable(arizona);
1434 break;
1435 default:
1436 break;
1437 }
1438err_reset:
1439 arizona_enable_reset(arizona);
1440 regulator_disable(arizona->dcvdd);
1441err_enable:
1442 regulator_bulk_disable(arizona->num_core_supplies,
1443 arizona->core_supplies);
1444err_dcvdd:
1445 regulator_put(arizona->dcvdd);
1446err_early:
1447 mfd_remove_devices(dev);
1448 return ret;
1449}
1450EXPORT_SYMBOL_GPL(arizona_dev_init);
1451
1452int arizona_dev_exit(struct arizona *arizona)
1453{
1454 disable_irq(arizona->irq);
1455 pm_runtime_disable(arizona->dev);
1456
1457 regulator_disable(arizona->dcvdd);
1458 regulator_put(arizona->dcvdd);
1459
1460 switch (arizona->pdata.clk32k_src) {
1461 case ARIZONA_32KZ_MCLK1:
1462 case ARIZONA_32KZ_MCLK2:
1463 arizona_clk32k_disable(arizona);
1464 break;
1465 default:
1466 break;
1467 }
1468
1469 mfd_remove_devices(arizona->dev);
1470 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1471 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1472 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1473 arizona_irq_exit(arizona);
1474 arizona_enable_reset(arizona);
1475
1476 regulator_bulk_disable(arizona->num_core_supplies,
1477 arizona->core_supplies);
1478 return 0;
1479}
1480EXPORT_SYMBOL_GPL(arizona_dev_exit);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Arizona core driver
4 *
5 * Copyright 2012 Wolfson Microelectronics plc
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 */
9
10#include <linux/clk.h>
11#include <linux/delay.h>
12#include <linux/err.h>
13#include <linux/gpio/consumer.h>
14#include <linux/interrupt.h>
15#include <linux/mfd/core.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/pm_runtime.h>
19#include <linux/regmap.h>
20#include <linux/regulator/consumer.h>
21#include <linux/regulator/machine.h>
22#include <linux/slab.h>
23#include <linux/ktime.h>
24#include <linux/platform_device.h>
25
26#include <linux/mfd/arizona/core.h>
27#include <linux/mfd/arizona/registers.h>
28
29#include "arizona.h"
30
31static const char * const wm5102_core_supplies[] = {
32 "AVDD",
33 "DBVDD1",
34};
35
36int arizona_clk32k_enable(struct arizona *arizona)
37{
38 int ret = 0;
39
40 mutex_lock(&arizona->clk_lock);
41
42 arizona->clk32k_ref++;
43
44 if (arizona->clk32k_ref == 1) {
45 switch (arizona->pdata.clk32k_src) {
46 case ARIZONA_32KZ_MCLK1:
47 ret = pm_runtime_resume_and_get(arizona->dev);
48 if (ret != 0)
49 goto err_ref;
50 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]);
51 if (ret != 0) {
52 pm_runtime_put_sync(arizona->dev);
53 goto err_ref;
54 }
55 break;
56 case ARIZONA_32KZ_MCLK2:
57 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]);
58 if (ret != 0)
59 goto err_ref;
60 break;
61 }
62
63 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
64 ARIZONA_CLK_32K_ENA,
65 ARIZONA_CLK_32K_ENA);
66 }
67
68err_ref:
69 if (ret != 0)
70 arizona->clk32k_ref--;
71
72 mutex_unlock(&arizona->clk_lock);
73
74 return ret;
75}
76EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
77
78int arizona_clk32k_disable(struct arizona *arizona)
79{
80 mutex_lock(&arizona->clk_lock);
81
82 WARN_ON(arizona->clk32k_ref <= 0);
83
84 arizona->clk32k_ref--;
85
86 if (arizona->clk32k_ref == 0) {
87 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
88 ARIZONA_CLK_32K_ENA, 0);
89
90 switch (arizona->pdata.clk32k_src) {
91 case ARIZONA_32KZ_MCLK1:
92 pm_runtime_put_sync(arizona->dev);
93 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]);
94 break;
95 case ARIZONA_32KZ_MCLK2:
96 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]);
97 break;
98 }
99 }
100
101 mutex_unlock(&arizona->clk_lock);
102
103 return 0;
104}
105EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
106
107static irqreturn_t arizona_clkgen_err(int irq, void *data)
108{
109 struct arizona *arizona = data;
110
111 dev_err(arizona->dev, "CLKGEN error\n");
112
113 return IRQ_HANDLED;
114}
115
116static irqreturn_t arizona_underclocked(int irq, void *data)
117{
118 struct arizona *arizona = data;
119 unsigned int val;
120 int ret;
121
122 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
123 &val);
124 if (ret != 0) {
125 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
126 ret);
127 return IRQ_NONE;
128 }
129
130 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "AIF3 underclocked\n");
132 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "AIF2 underclocked\n");
134 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "AIF1 underclocked\n");
136 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ISRC3 underclocked\n");
138 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "ISRC2 underclocked\n");
140 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
141 dev_err(arizona->dev, "ISRC1 underclocked\n");
142 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
143 dev_err(arizona->dev, "FX underclocked\n");
144 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
145 dev_err(arizona->dev, "ASRC underclocked\n");
146 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
147 dev_err(arizona->dev, "DAC underclocked\n");
148 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
149 dev_err(arizona->dev, "ADC underclocked\n");
150 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
151 dev_err(arizona->dev, "Mixer dropped sample\n");
152
153 return IRQ_HANDLED;
154}
155
156static irqreturn_t arizona_overclocked(int irq, void *data)
157{
158 struct arizona *arizona = data;
159 unsigned int val[3];
160 int ret;
161
162 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
163 &val[0], 3);
164 if (ret != 0) {
165 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
166 ret);
167 return IRQ_NONE;
168 }
169
170 switch (arizona->type) {
171 case WM8998:
172 case WM1814:
173 /* Some bits are shifted on WM8998,
174 * rearrange to match the standard bit layout
175 */
176 val[0] = ((val[0] & 0x60e0) >> 1) |
177 ((val[0] & 0x1e00) >> 2) |
178 (val[0] & 0x000f);
179 break;
180 default:
181 break;
182 }
183
184 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
185 dev_err(arizona->dev, "PWM overclocked\n");
186 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
187 dev_err(arizona->dev, "FX core overclocked\n");
188 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
189 dev_err(arizona->dev, "DAC SYS overclocked\n");
190 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
191 dev_err(arizona->dev, "DAC WARP overclocked\n");
192 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
193 dev_err(arizona->dev, "ADC overclocked\n");
194 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
195 dev_err(arizona->dev, "Mixer overclocked\n");
196 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
197 dev_err(arizona->dev, "AIF3 overclocked\n");
198 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
199 dev_err(arizona->dev, "AIF2 overclocked\n");
200 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
201 dev_err(arizona->dev, "AIF1 overclocked\n");
202 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
203 dev_err(arizona->dev, "Pad control overclocked\n");
204
205 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
206 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
207 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
208 dev_err(arizona->dev, "Slimbus async overclocked\n");
209 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
210 dev_err(arizona->dev, "Slimbus sync overclocked\n");
211 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
212 dev_err(arizona->dev, "ASRC async system overclocked\n");
213 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
214 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
215 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
216 dev_err(arizona->dev, "ASRC sync system overclocked\n");
217 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
218 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
219 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
220 dev_err(arizona->dev, "DSP1 overclocked\n");
221 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
222 dev_err(arizona->dev, "ISRC3 overclocked\n");
223 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
224 dev_err(arizona->dev, "ISRC2 overclocked\n");
225 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
226 dev_err(arizona->dev, "ISRC1 overclocked\n");
227
228 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
229 dev_err(arizona->dev, "SPDIF overclocked\n");
230
231 return IRQ_HANDLED;
232}
233
234#define ARIZONA_REG_POLL_DELAY_US 7500
235
236static inline bool arizona_poll_reg_delay(ktime_t timeout)
237{
238 if (ktime_compare(ktime_get(), timeout) > 0)
239 return false;
240
241 usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US);
242
243 return true;
244}
245
246static int arizona_poll_reg(struct arizona *arizona,
247 int timeout_ms, unsigned int reg,
248 unsigned int mask, unsigned int target)
249{
250 ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC);
251 unsigned int val = 0;
252 int ret;
253
254 do {
255 ret = regmap_read(arizona->regmap, reg, &val);
256
257 if ((val & mask) == target)
258 return 0;
259 } while (arizona_poll_reg_delay(timeout));
260
261 if (ret) {
262 dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n",
263 reg, ret);
264 return ret;
265 }
266
267 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val);
268 return -ETIMEDOUT;
269}
270
271static int arizona_wait_for_boot(struct arizona *arizona)
272{
273 int ret;
274
275 /*
276 * We can't use an interrupt as we need to runtime resume to do so,
277 * we won't race with the interrupt handler as it'll be blocked on
278 * runtime resume.
279 */
280 ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5,
281 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
282
283 if (!ret)
284 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
285 ARIZONA_BOOT_DONE_STS);
286
287 pm_runtime_mark_last_busy(arizona->dev);
288
289 return ret;
290}
291
292static inline void arizona_enable_reset(struct arizona *arizona)
293{
294 if (arizona->pdata.reset)
295 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0);
296}
297
298static void arizona_disable_reset(struct arizona *arizona)
299{
300 if (arizona->pdata.reset) {
301 switch (arizona->type) {
302 case WM5110:
303 case WM8280:
304 /* Meet requirements for minimum reset duration */
305 usleep_range(5000, 10000);
306 break;
307 default:
308 break;
309 }
310
311 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1);
312 usleep_range(1000, 5000);
313 }
314}
315
316struct arizona_sysclk_state {
317 unsigned int fll;
318 unsigned int sysclk;
319};
320
321static int arizona_enable_freerun_sysclk(struct arizona *arizona,
322 struct arizona_sysclk_state *state)
323{
324 int ret, err;
325
326 /* Cache existing FLL and SYSCLK settings */
327 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
328 if (ret) {
329 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
330 ret);
331 return ret;
332 }
333 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
334 &state->sysclk);
335 if (ret) {
336 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
337 ret);
338 return ret;
339 }
340
341 /* Start up SYSCLK using the FLL in free running mode */
342 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
343 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
344 if (ret) {
345 dev_err(arizona->dev,
346 "Failed to start FLL in freerunning mode: %d\n",
347 ret);
348 return ret;
349 }
350 ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5,
351 ARIZONA_FLL1_CLOCK_OK_STS,
352 ARIZONA_FLL1_CLOCK_OK_STS);
353 if (ret)
354 goto err_fll;
355
356 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
357 if (ret) {
358 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
359 goto err_fll;
360 }
361
362 return 0;
363
364err_fll:
365 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
366 if (err)
367 dev_err(arizona->dev,
368 "Failed to re-apply old FLL settings: %d\n", err);
369
370 return ret;
371}
372
373static int arizona_disable_freerun_sysclk(struct arizona *arizona,
374 struct arizona_sysclk_state *state)
375{
376 int ret;
377
378 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
379 state->sysclk);
380 if (ret) {
381 dev_err(arizona->dev,
382 "Failed to re-apply old SYSCLK settings: %d\n", ret);
383 return ret;
384 }
385
386 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
387 if (ret) {
388 dev_err(arizona->dev,
389 "Failed to re-apply old FLL settings: %d\n", ret);
390 return ret;
391 }
392
393 return 0;
394}
395
396static int wm5102_apply_hardware_patch(struct arizona *arizona)
397{
398 struct arizona_sysclk_state state;
399 int err, ret;
400
401 ret = arizona_enable_freerun_sysclk(arizona, &state);
402 if (ret)
403 return ret;
404
405 /* Start the write sequencer and wait for it to finish */
406 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
407 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
408 if (ret) {
409 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
410 ret);
411 goto err;
412 }
413
414 ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1,
415 ARIZONA_WSEQ_BUSY, 0);
416 if (ret)
417 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
418 ARIZONA_WSEQ_ABORT);
419
420err:
421 err = arizona_disable_freerun_sysclk(arizona, &state);
422
423 return ret ?: err;
424}
425
426/*
427 * Register patch to some of the CODECs internal write sequences
428 * to ensure a clean exit from the low power sleep state.
429 */
430static const struct reg_sequence wm5110_sleep_patch[] = {
431 { 0x337A, 0xC100 },
432 { 0x337B, 0x0041 },
433 { 0x3300, 0xA210 },
434 { 0x3301, 0x050C },
435};
436
437static int wm5110_apply_sleep_patch(struct arizona *arizona)
438{
439 struct arizona_sysclk_state state;
440 int err, ret;
441
442 ret = arizona_enable_freerun_sysclk(arizona, &state);
443 if (ret)
444 return ret;
445
446 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
447 wm5110_sleep_patch,
448 ARRAY_SIZE(wm5110_sleep_patch));
449
450 err = arizona_disable_freerun_sysclk(arizona, &state);
451
452 return ret ?: err;
453}
454
455static int wm5102_clear_write_sequencer(struct arizona *arizona)
456{
457 int ret;
458
459 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
460 0x0);
461 if (ret) {
462 dev_err(arizona->dev,
463 "Failed to clear write sequencer state: %d\n", ret);
464 return ret;
465 }
466
467 arizona_enable_reset(arizona);
468 regulator_disable(arizona->dcvdd);
469
470 msleep(20);
471
472 ret = regulator_enable(arizona->dcvdd);
473 if (ret) {
474 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
475 return ret;
476 }
477 arizona_disable_reset(arizona);
478
479 return 0;
480}
481
482static int arizona_isolate_dcvdd(struct arizona *arizona)
483{
484 int ret;
485
486 ret = regmap_update_bits(arizona->regmap,
487 ARIZONA_ISOLATION_CONTROL,
488 ARIZONA_ISOLATE_DCVDD1,
489 ARIZONA_ISOLATE_DCVDD1);
490 if (ret != 0)
491 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
492
493 return ret;
494}
495
496static int arizona_connect_dcvdd(struct arizona *arizona)
497{
498 int ret;
499
500 ret = regmap_update_bits(arizona->regmap,
501 ARIZONA_ISOLATION_CONTROL,
502 ARIZONA_ISOLATE_DCVDD1, 0);
503 if (ret != 0)
504 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
505
506 return ret;
507}
508
509static int arizona_is_jack_det_active(struct arizona *arizona)
510{
511 unsigned int val;
512 int ret;
513
514 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
515 if (ret) {
516 dev_err(arizona->dev,
517 "Failed to check jack det status: %d\n", ret);
518 return ret;
519 } else if (val & ARIZONA_JD1_ENA) {
520 return 1;
521 } else {
522 return 0;
523 }
524}
525
526static int arizona_runtime_resume(struct device *dev)
527{
528 struct arizona *arizona = dev_get_drvdata(dev);
529 int ret;
530
531 dev_dbg(arizona->dev, "Leaving AoD mode\n");
532
533 if (arizona->has_fully_powered_off) {
534 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
535
536 ret = regulator_bulk_enable(arizona->num_core_supplies,
537 arizona->core_supplies);
538 if (ret) {
539 dev_err(dev, "Failed to enable core supplies: %d\n",
540 ret);
541 return ret;
542 }
543 }
544
545 ret = regulator_enable(arizona->dcvdd);
546 if (ret != 0) {
547 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
548 if (arizona->has_fully_powered_off)
549 regulator_bulk_disable(arizona->num_core_supplies,
550 arizona->core_supplies);
551 return ret;
552 }
553
554 if (arizona->has_fully_powered_off) {
555 arizona_disable_reset(arizona);
556 enable_irq(arizona->irq);
557 arizona->has_fully_powered_off = false;
558 }
559
560 regcache_cache_only(arizona->regmap, false);
561
562 switch (arizona->type) {
563 case WM5102:
564 if (arizona->external_dcvdd) {
565 ret = arizona_connect_dcvdd(arizona);
566 if (ret != 0)
567 goto err;
568 }
569
570 ret = wm5102_patch(arizona);
571 if (ret != 0) {
572 dev_err(arizona->dev, "Failed to apply patch: %d\n",
573 ret);
574 goto err;
575 }
576
577 ret = wm5102_apply_hardware_patch(arizona);
578 if (ret) {
579 dev_err(arizona->dev,
580 "Failed to apply hardware patch: %d\n",
581 ret);
582 goto err;
583 }
584 break;
585 case WM5110:
586 case WM8280:
587 ret = arizona_wait_for_boot(arizona);
588 if (ret)
589 goto err;
590
591 if (arizona->external_dcvdd) {
592 ret = arizona_connect_dcvdd(arizona);
593 if (ret != 0)
594 goto err;
595 } else {
596 /*
597 * As this is only called for the internal regulator
598 * (where we know voltage ranges available) it is ok
599 * to request an exact range.
600 */
601 ret = regulator_set_voltage(arizona->dcvdd,
602 1200000, 1200000);
603 if (ret < 0) {
604 dev_err(arizona->dev,
605 "Failed to set resume voltage: %d\n",
606 ret);
607 goto err;
608 }
609 }
610
611 ret = wm5110_apply_sleep_patch(arizona);
612 if (ret) {
613 dev_err(arizona->dev,
614 "Failed to re-apply sleep patch: %d\n",
615 ret);
616 goto err;
617 }
618 break;
619 case WM1831:
620 case CS47L24:
621 ret = arizona_wait_for_boot(arizona);
622 if (ret != 0)
623 goto err;
624 break;
625 default:
626 ret = arizona_wait_for_boot(arizona);
627 if (ret != 0)
628 goto err;
629
630 if (arizona->external_dcvdd) {
631 ret = arizona_connect_dcvdd(arizona);
632 if (ret != 0)
633 goto err;
634 }
635 break;
636 }
637
638 ret = regcache_sync(arizona->regmap);
639 if (ret != 0) {
640 dev_err(arizona->dev, "Failed to restore register cache\n");
641 goto err;
642 }
643
644 return 0;
645
646err:
647 regcache_cache_only(arizona->regmap, true);
648 regulator_disable(arizona->dcvdd);
649 return ret;
650}
651
652static int arizona_runtime_suspend(struct device *dev)
653{
654 struct arizona *arizona = dev_get_drvdata(dev);
655 int jd_active = 0;
656 int ret;
657
658 dev_dbg(arizona->dev, "Entering AoD mode\n");
659
660 switch (arizona->type) {
661 case WM5110:
662 case WM8280:
663 jd_active = arizona_is_jack_det_active(arizona);
664 if (jd_active < 0)
665 return jd_active;
666
667 if (arizona->external_dcvdd) {
668 ret = arizona_isolate_dcvdd(arizona);
669 if (ret != 0)
670 return ret;
671 } else {
672 /*
673 * As this is only called for the internal regulator
674 * (where we know voltage ranges available) it is ok
675 * to request an exact range.
676 */
677 ret = regulator_set_voltage(arizona->dcvdd,
678 1175000, 1175000);
679 if (ret < 0) {
680 dev_err(arizona->dev,
681 "Failed to set suspend voltage: %d\n",
682 ret);
683 return ret;
684 }
685 }
686 break;
687 case WM5102:
688 jd_active = arizona_is_jack_det_active(arizona);
689 if (jd_active < 0)
690 return jd_active;
691
692 if (arizona->external_dcvdd) {
693 ret = arizona_isolate_dcvdd(arizona);
694 if (ret != 0)
695 return ret;
696 }
697
698 if (!jd_active) {
699 ret = regmap_write(arizona->regmap,
700 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
701 if (ret) {
702 dev_err(arizona->dev,
703 "Failed to clear write sequencer: %d\n",
704 ret);
705 return ret;
706 }
707 }
708 break;
709 case WM1831:
710 case CS47L24:
711 break;
712 default:
713 jd_active = arizona_is_jack_det_active(arizona);
714 if (jd_active < 0)
715 return jd_active;
716
717 if (arizona->external_dcvdd) {
718 ret = arizona_isolate_dcvdd(arizona);
719 if (ret != 0)
720 return ret;
721 }
722 break;
723 }
724
725 regcache_cache_only(arizona->regmap, true);
726 regcache_mark_dirty(arizona->regmap);
727 regulator_disable(arizona->dcvdd);
728
729 /* Allow us to completely power down if no jack detection */
730 if (!jd_active) {
731 dev_dbg(arizona->dev, "Fully powering off\n");
732
733 arizona->has_fully_powered_off = true;
734
735 disable_irq_nosync(arizona->irq);
736 arizona_enable_reset(arizona);
737 regulator_bulk_disable(arizona->num_core_supplies,
738 arizona->core_supplies);
739 }
740
741 return 0;
742}
743
744static int arizona_suspend(struct device *dev)
745{
746 struct arizona *arizona = dev_get_drvdata(dev);
747
748 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
749 disable_irq(arizona->irq);
750
751 return 0;
752}
753
754static int arizona_suspend_noirq(struct device *dev)
755{
756 struct arizona *arizona = dev_get_drvdata(dev);
757
758 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
759 enable_irq(arizona->irq);
760
761 return 0;
762}
763
764static int arizona_resume_noirq(struct device *dev)
765{
766 struct arizona *arizona = dev_get_drvdata(dev);
767
768 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
769 disable_irq(arizona->irq);
770
771 return 0;
772}
773
774static int arizona_resume(struct device *dev)
775{
776 struct arizona *arizona = dev_get_drvdata(dev);
777
778 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n");
779 enable_irq(arizona->irq);
780
781 return 0;
782}
783
784EXPORT_GPL_DEV_PM_OPS(arizona_pm_ops) = {
785 RUNTIME_PM_OPS(arizona_runtime_suspend,
786 arizona_runtime_resume,
787 NULL)
788 SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
789 NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq,
790 arizona_resume_noirq)
791};
792
793#ifdef CONFIG_OF
794static int arizona_of_get_core_pdata(struct arizona *arizona)
795{
796 struct arizona_pdata *pdata = &arizona->pdata;
797 int ret, i;
798
799 /* Handle old non-standard DT binding */
800 pdata->reset = devm_gpiod_get(arizona->dev, "wlf,reset", GPIOD_OUT_LOW);
801 if (IS_ERR(pdata->reset)) {
802 ret = PTR_ERR(pdata->reset);
803
804 /*
805 * Reset missing will be caught when other binding is read
806 * but all other errors imply this binding is in use but has
807 * encountered a problem so should be handled.
808 */
809 if (ret == -EPROBE_DEFER)
810 return ret;
811 else if (ret != -ENOENT && ret != -ENOSYS)
812 dev_err(arizona->dev, "Reset GPIO malformed: %d\n",
813 ret);
814
815 pdata->reset = NULL;
816 }
817
818 ret = of_property_read_u32_array(arizona->dev->of_node,
819 "wlf,gpio-defaults",
820 pdata->gpio_defaults,
821 ARRAY_SIZE(pdata->gpio_defaults));
822 if (ret >= 0) {
823 /*
824 * All values are literal except out of range values
825 * which are chip default, translate into platform
826 * data which uses 0 as chip default and out of range
827 * as zero.
828 */
829 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
830 if (pdata->gpio_defaults[i] > 0xffff)
831 pdata->gpio_defaults[i] = 0;
832 else if (pdata->gpio_defaults[i] == 0)
833 pdata->gpio_defaults[i] = 0x10000;
834 }
835 } else {
836 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
837 ret);
838 }
839
840 return 0;
841}
842#else
843static inline int arizona_of_get_core_pdata(struct arizona *arizona)
844{
845 return 0;
846}
847#endif
848
849static const struct mfd_cell early_devs[] = {
850 { .name = "arizona-ldo1" },
851};
852
853static const char * const wm5102_supplies[] = {
854 "MICVDD",
855 "DBVDD2",
856 "DBVDD3",
857 "CPVDD",
858 "SPKVDDL",
859 "SPKVDDR",
860};
861
862static const struct mfd_cell wm5102_devs[] = {
863 { .name = "arizona-micsupp" },
864 { .name = "arizona-gpio" },
865 { .name = "arizona-haptics" },
866 { .name = "arizona-pwm" },
867 {
868 .name = "wm5102-codec",
869 .parent_supplies = wm5102_supplies,
870 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
871 },
872};
873
874static const struct mfd_cell wm5110_devs[] = {
875 { .name = "arizona-micsupp" },
876 { .name = "arizona-gpio" },
877 { .name = "arizona-haptics" },
878 { .name = "arizona-pwm" },
879 {
880 .name = "wm5110-codec",
881 .parent_supplies = wm5102_supplies,
882 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
883 },
884};
885
886static const char * const cs47l24_supplies[] = {
887 "MICVDD",
888 "CPVDD",
889 "SPKVDD",
890};
891
892static const struct mfd_cell cs47l24_devs[] = {
893 { .name = "arizona-gpio" },
894 { .name = "arizona-haptics" },
895 { .name = "arizona-pwm" },
896 {
897 .name = "cs47l24-codec",
898 .parent_supplies = cs47l24_supplies,
899 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies),
900 },
901};
902
903static const char * const wm8997_supplies[] = {
904 "MICVDD",
905 "DBVDD2",
906 "CPVDD",
907 "SPKVDD",
908};
909
910static const struct mfd_cell wm8997_devs[] = {
911 { .name = "arizona-micsupp" },
912 { .name = "arizona-gpio" },
913 { .name = "arizona-haptics" },
914 { .name = "arizona-pwm" },
915 {
916 .name = "wm8997-codec",
917 .parent_supplies = wm8997_supplies,
918 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
919 },
920};
921
922static const struct mfd_cell wm8998_devs[] = {
923 { .name = "arizona-micsupp" },
924 { .name = "arizona-gpio" },
925 { .name = "arizona-haptics" },
926 { .name = "arizona-pwm" },
927 {
928 .name = "wm8998-codec",
929 .parent_supplies = wm5102_supplies,
930 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
931 },
932};
933
934int arizona_dev_init(struct arizona *arizona)
935{
936 static const char * const mclk_name[] = { "mclk1", "mclk2" };
937 struct device *dev = arizona->dev;
938 const char *type_name = NULL;
939 unsigned int reg, val;
940 int (*apply_patch)(struct arizona *) = NULL;
941 const struct mfd_cell *subdevs = NULL;
942 int n_subdevs = 0, ret, i;
943
944 dev_set_drvdata(arizona->dev, arizona);
945 mutex_init(&arizona->clk_lock);
946
947 if (dev_get_platdata(arizona->dev)) {
948 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
949 sizeof(arizona->pdata));
950 } else {
951 ret = arizona_of_get_core_pdata(arizona);
952 if (ret < 0)
953 return ret;
954 }
955
956 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name));
957 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
958 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]);
959 if (IS_ERR(arizona->mclk[i])) {
960 dev_info(arizona->dev, "Failed to get %s: %ld\n",
961 mclk_name[i], PTR_ERR(arizona->mclk[i]));
962 arizona->mclk[i] = NULL;
963 }
964 }
965
966 regcache_cache_only(arizona->regmap, true);
967
968 switch (arizona->type) {
969 case WM5102:
970 case WM5110:
971 case WM8280:
972 case WM8997:
973 case WM8998:
974 case WM1814:
975 case WM1831:
976 case CS47L24:
977 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
978 arizona->core_supplies[i].supply
979 = wm5102_core_supplies[i];
980 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
981 break;
982 default:
983 dev_err(arizona->dev, "Unknown device type %d\n",
984 arizona->type);
985 return -ENODEV;
986 }
987
988 /* Mark DCVDD as external, LDO1 driver will clear if internal */
989 arizona->external_dcvdd = true;
990
991 switch (arizona->type) {
992 case WM1831:
993 case CS47L24:
994 break; /* No LDO1 regulator */
995 default:
996 ret = mfd_add_devices(arizona->dev, -1, early_devs,
997 ARRAY_SIZE(early_devs), NULL, 0, NULL);
998 if (ret != 0) {
999 dev_err(dev, "Failed to add early children: %d\n", ret);
1000 return ret;
1001 }
1002 break;
1003 }
1004
1005 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
1006 arizona->core_supplies);
1007 if (ret != 0) {
1008 dev_err(dev, "Failed to request core supplies: %d\n",
1009 ret);
1010 goto err_early;
1011 }
1012
1013 /**
1014 * Don't use devres here because the only device we have to get
1015 * against is the MFD device and DCVDD will likely be supplied by
1016 * one of its children. Meaning that the regulator will be
1017 * destroyed by the time devres calls regulator put.
1018 */
1019 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
1020 if (IS_ERR(arizona->dcvdd)) {
1021 ret = PTR_ERR(arizona->dcvdd);
1022 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1023 goto err_early;
1024 }
1025
1026 if (!arizona->pdata.reset) {
1027 /* Start out with /RESET low to put the chip into reset */
1028 arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset",
1029 GPIOD_OUT_LOW);
1030 if (IS_ERR(arizona->pdata.reset)) {
1031 ret = PTR_ERR(arizona->pdata.reset);
1032 if (ret == -EPROBE_DEFER)
1033 goto err_dcvdd;
1034
1035 dev_err(arizona->dev,
1036 "Reset GPIO missing/malformed: %d\n", ret);
1037
1038 arizona->pdata.reset = NULL;
1039 }
1040 }
1041
1042 ret = regulator_bulk_enable(arizona->num_core_supplies,
1043 arizona->core_supplies);
1044 if (ret != 0) {
1045 dev_err(dev, "Failed to enable core supplies: %d\n",
1046 ret);
1047 goto err_dcvdd;
1048 }
1049
1050 ret = regulator_enable(arizona->dcvdd);
1051 if (ret != 0) {
1052 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1053 goto err_enable;
1054 }
1055
1056 arizona_disable_reset(arizona);
1057
1058 regcache_cache_only(arizona->regmap, false);
1059
1060 /* Verify that this is a chip we know about */
1061 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
1062 if (ret != 0) {
1063 dev_err(dev, "Failed to read ID register: %d\n", ret);
1064 goto err_reset;
1065 }
1066
1067 switch (reg) {
1068 case 0x5102:
1069 case 0x5110:
1070 case 0x6349:
1071 case 0x6363:
1072 case 0x8997:
1073 break;
1074 default:
1075 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1076 ret = -ENODEV;
1077 goto err_reset;
1078 }
1079
1080 /* If we have a /RESET GPIO we'll already be reset */
1081 if (!arizona->pdata.reset) {
1082 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1083 if (ret != 0) {
1084 dev_err(dev, "Failed to reset device: %d\n", ret);
1085 goto err_reset;
1086 }
1087
1088 usleep_range(1000, 5000);
1089 }
1090
1091 /* Ensure device startup is complete */
1092 switch (arizona->type) {
1093 case WM5102:
1094 ret = regmap_read(arizona->regmap,
1095 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1096 if (ret) {
1097 dev_err(dev,
1098 "Failed to check write sequencer state: %d\n",
1099 ret);
1100 } else if (val & 0x01) {
1101 ret = wm5102_clear_write_sequencer(arizona);
1102 if (ret)
1103 return ret;
1104 }
1105 break;
1106 default:
1107 break;
1108 }
1109
1110 ret = arizona_wait_for_boot(arizona);
1111 if (ret) {
1112 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1113 goto err_reset;
1114 }
1115
1116 /* Read the device ID information & do device specific stuff */
1117 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
1118 if (ret != 0) {
1119 dev_err(dev, "Failed to read ID register: %d\n", ret);
1120 goto err_reset;
1121 }
1122
1123 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1124 &arizona->rev);
1125 if (ret != 0) {
1126 dev_err(dev, "Failed to read revision register: %d\n", ret);
1127 goto err_reset;
1128 }
1129 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1130
1131 switch (reg) {
1132 case 0x5102:
1133 if (IS_ENABLED(CONFIG_MFD_WM5102)) {
1134 type_name = "WM5102";
1135 if (arizona->type != WM5102) {
1136 dev_warn(arizona->dev,
1137 "WM5102 registered as %d\n",
1138 arizona->type);
1139 arizona->type = WM5102;
1140 }
1141
1142 apply_patch = wm5102_patch;
1143 arizona->rev &= 0x7;
1144 subdevs = wm5102_devs;
1145 n_subdevs = ARRAY_SIZE(wm5102_devs);
1146 }
1147 break;
1148 case 0x5110:
1149 if (IS_ENABLED(CONFIG_MFD_WM5110)) {
1150 switch (arizona->type) {
1151 case WM5110:
1152 type_name = "WM5110";
1153 break;
1154 case WM8280:
1155 type_name = "WM8280";
1156 break;
1157 default:
1158 type_name = "WM5110";
1159 dev_warn(arizona->dev,
1160 "WM5110 registered as %d\n",
1161 arizona->type);
1162 arizona->type = WM5110;
1163 break;
1164 }
1165
1166 apply_patch = wm5110_patch;
1167 subdevs = wm5110_devs;
1168 n_subdevs = ARRAY_SIZE(wm5110_devs);
1169 }
1170 break;
1171 case 0x6363:
1172 if (IS_ENABLED(CONFIG_MFD_CS47L24)) {
1173 switch (arizona->type) {
1174 case CS47L24:
1175 type_name = "CS47L24";
1176 break;
1177
1178 case WM1831:
1179 type_name = "WM1831";
1180 break;
1181
1182 default:
1183 dev_warn(arizona->dev,
1184 "CS47L24 registered as %d\n",
1185 arizona->type);
1186 arizona->type = CS47L24;
1187 break;
1188 }
1189
1190 apply_patch = cs47l24_patch;
1191 subdevs = cs47l24_devs;
1192 n_subdevs = ARRAY_SIZE(cs47l24_devs);
1193 }
1194 break;
1195 case 0x8997:
1196 if (IS_ENABLED(CONFIG_MFD_WM8997)) {
1197 type_name = "WM8997";
1198 if (arizona->type != WM8997) {
1199 dev_warn(arizona->dev,
1200 "WM8997 registered as %d\n",
1201 arizona->type);
1202 arizona->type = WM8997;
1203 }
1204
1205 apply_patch = wm8997_patch;
1206 subdevs = wm8997_devs;
1207 n_subdevs = ARRAY_SIZE(wm8997_devs);
1208 }
1209 break;
1210 case 0x6349:
1211 if (IS_ENABLED(CONFIG_MFD_WM8998)) {
1212 switch (arizona->type) {
1213 case WM8998:
1214 type_name = "WM8998";
1215 break;
1216
1217 case WM1814:
1218 type_name = "WM1814";
1219 break;
1220
1221 default:
1222 type_name = "WM8998";
1223 dev_warn(arizona->dev,
1224 "WM8998 registered as %d\n",
1225 arizona->type);
1226 arizona->type = WM8998;
1227 }
1228
1229 apply_patch = wm8998_patch;
1230 subdevs = wm8998_devs;
1231 n_subdevs = ARRAY_SIZE(wm8998_devs);
1232 }
1233 break;
1234 default:
1235 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1236 ret = -ENODEV;
1237 goto err_reset;
1238 }
1239
1240 if (!subdevs) {
1241 dev_err(arizona->dev,
1242 "No kernel support for device ID %x\n", reg);
1243 ret = -ENODEV;
1244 goto err_reset;
1245 }
1246
1247 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1248
1249 if (apply_patch) {
1250 ret = apply_patch(arizona);
1251 if (ret != 0) {
1252 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1253 ret);
1254 goto err_reset;
1255 }
1256
1257 switch (arizona->type) {
1258 case WM5102:
1259 ret = wm5102_apply_hardware_patch(arizona);
1260 if (ret) {
1261 dev_err(arizona->dev,
1262 "Failed to apply hardware patch: %d\n",
1263 ret);
1264 goto err_reset;
1265 }
1266 break;
1267 case WM5110:
1268 case WM8280:
1269 ret = wm5110_apply_sleep_patch(arizona);
1270 if (ret) {
1271 dev_err(arizona->dev,
1272 "Failed to apply sleep patch: %d\n",
1273 ret);
1274 goto err_reset;
1275 }
1276 break;
1277 default:
1278 break;
1279 }
1280 }
1281
1282 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1283 if (!arizona->pdata.gpio_defaults[i])
1284 continue;
1285
1286 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1287 arizona->pdata.gpio_defaults[i]);
1288 }
1289
1290 /* Chip default */
1291 if (!arizona->pdata.clk32k_src)
1292 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1293
1294 switch (arizona->pdata.clk32k_src) {
1295 case ARIZONA_32KZ_MCLK1:
1296 case ARIZONA_32KZ_MCLK2:
1297 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1298 ARIZONA_CLK_32K_SRC_MASK,
1299 arizona->pdata.clk32k_src - 1);
1300 arizona_clk32k_enable(arizona);
1301 break;
1302 case ARIZONA_32KZ_NONE:
1303 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1304 ARIZONA_CLK_32K_SRC_MASK, 2);
1305 break;
1306 default:
1307 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1308 arizona->pdata.clk32k_src);
1309 ret = -EINVAL;
1310 goto err_reset;
1311 }
1312
1313 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1314 if (!arizona->pdata.micbias[i].mV &&
1315 !arizona->pdata.micbias[i].bypass)
1316 continue;
1317
1318 /* Apply default for bypass mode */
1319 if (!arizona->pdata.micbias[i].mV)
1320 arizona->pdata.micbias[i].mV = 2800;
1321
1322 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1323
1324 val <<= ARIZONA_MICB1_LVL_SHIFT;
1325
1326 if (arizona->pdata.micbias[i].ext_cap)
1327 val |= ARIZONA_MICB1_EXT_CAP;
1328
1329 if (arizona->pdata.micbias[i].discharge)
1330 val |= ARIZONA_MICB1_DISCH;
1331
1332 if (arizona->pdata.micbias[i].soft_start)
1333 val |= ARIZONA_MICB1_RATE;
1334
1335 if (arizona->pdata.micbias[i].bypass)
1336 val |= ARIZONA_MICB1_BYPASS;
1337
1338 regmap_update_bits(arizona->regmap,
1339 ARIZONA_MIC_BIAS_CTRL_1 + i,
1340 ARIZONA_MICB1_LVL_MASK |
1341 ARIZONA_MICB1_EXT_CAP |
1342 ARIZONA_MICB1_DISCH |
1343 ARIZONA_MICB1_BYPASS |
1344 ARIZONA_MICB1_RATE, val);
1345 }
1346
1347 pm_runtime_set_active(arizona->dev);
1348 pm_runtime_enable(arizona->dev);
1349
1350 /* Set up for interrupts */
1351 ret = arizona_irq_init(arizona);
1352 if (ret != 0)
1353 goto err_pm;
1354
1355 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1356 pm_runtime_use_autosuspend(arizona->dev);
1357
1358 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1359 arizona_clkgen_err, arizona);
1360 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1361 arizona_overclocked, arizona);
1362 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1363 arizona_underclocked, arizona);
1364
1365 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
1366 subdevs, n_subdevs, NULL, 0, NULL);
1367
1368 if (ret) {
1369 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1370 goto err_irq;
1371 }
1372
1373 return 0;
1374
1375err_irq:
1376 arizona_irq_exit(arizona);
1377err_pm:
1378 pm_runtime_disable(arizona->dev);
1379
1380 switch (arizona->pdata.clk32k_src) {
1381 case ARIZONA_32KZ_MCLK1:
1382 case ARIZONA_32KZ_MCLK2:
1383 arizona_clk32k_disable(arizona);
1384 break;
1385 default:
1386 break;
1387 }
1388err_reset:
1389 arizona_enable_reset(arizona);
1390 regulator_disable(arizona->dcvdd);
1391err_enable:
1392 regulator_bulk_disable(arizona->num_core_supplies,
1393 arizona->core_supplies);
1394err_dcvdd:
1395 regulator_put(arizona->dcvdd);
1396err_early:
1397 mfd_remove_devices(dev);
1398 return ret;
1399}
1400EXPORT_SYMBOL_GPL(arizona_dev_init);
1401
1402int arizona_dev_exit(struct arizona *arizona)
1403{
1404 disable_irq(arizona->irq);
1405 pm_runtime_disable(arizona->dev);
1406
1407 regulator_disable(arizona->dcvdd);
1408 regulator_put(arizona->dcvdd);
1409
1410 switch (arizona->pdata.clk32k_src) {
1411 case ARIZONA_32KZ_MCLK1:
1412 case ARIZONA_32KZ_MCLK2:
1413 arizona_clk32k_disable(arizona);
1414 break;
1415 default:
1416 break;
1417 }
1418
1419 mfd_remove_devices(arizona->dev);
1420 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1421 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1422 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1423 arizona_irq_exit(arizona);
1424 arizona_enable_reset(arizona);
1425
1426 regulator_bulk_disable(arizona->num_core_supplies,
1427 arizona->core_supplies);
1428 return 0;
1429}
1430EXPORT_SYMBOL_GPL(arizona_dev_exit);
1431
1432MODULE_LICENSE("GPL v2");