1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (c) 2014 MediaTek Inc.
 4 * Author: Shunli Wang <shunli.wang@mediatek.com>
 5 */
 6
 7#include <linux/clk-provider.h>
 8#include <linux/platform_device.h>
 9
10#include "clk-mtk.h"
11#include "clk-gate.h"
12
13#include <dt-bindings/clock/mt2701-clk.h>
14
15static const struct mtk_gate_regs hif_cg_regs = {
16	.sta_ofs = 0x0030,
17};
18
19#define GATE_HIF(_id, _name, _parent, _shift) {		\
20		.id = _id,				\
21		.name = _name,				\
22		.parent_name = _parent,			\
23		.regs = &hif_cg_regs,			\
24		.shift = _shift,			\
25		.ops = &mtk_clk_gate_ops_no_setclr_inv,	\
26	}
27
28static const struct mtk_gate hif_clks[] = {
 
29	GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),
30	GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22),
31	GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24),
32	GATE_HIF(CLK_HIFSYS_PCIE1, "pcie1_clk", "ethpll_500m_ck", 25),
33	GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),
34};
35
36static const struct of_device_id of_match_clk_mt2701_hif[] = {
37	{ .compatible = "mediatek,mt2701-hifsys", },
38	{}
39};
40
41static int clk_mt2701_hif_probe(struct platform_device *pdev)
42{
43	struct clk_onecell_data *clk_data;
44	int r;
45	struct device_node *node = pdev->dev.of_node;
46
47	clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR);
48
49	mtk_clk_register_gates(node, hif_clks, ARRAY_SIZE(hif_clks),
50						clk_data);
51
52	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
53	if (r) {
54		dev_err(&pdev->dev,
55			"could not register clock provider: %s: %d\n",
56			pdev->name, r);
57		return r;
58	}
59
60	mtk_register_reset_controller(node, 1, 0x34);
 
 
 
 
61
62	return 0;
63}
 
 
 
64
65static struct platform_driver clk_mt2701_hif_drv = {
66	.probe = clk_mt2701_hif_probe,
 
67	.driver = {
68		.name = "clk-mt2701-hif",
69		.of_match_table = of_match_clk_mt2701_hif,
70	},
71};
72
73builtin_platform_driver(clk_mt2701_hif_drv);

 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (c) 2014 MediaTek Inc.
 4 * Author: Shunli Wang <shunli.wang@mediatek.com>
 5 */
 6
 7#include <linux/clk-provider.h>
 8#include <linux/platform_device.h>
 9
10#include "clk-mtk.h"
11#include "clk-gate.h"
12
13#include <dt-bindings/clock/mt2701-clk.h>
14
15static const struct mtk_gate_regs hif_cg_regs = {
16	.sta_ofs = 0x0030,
17};
18
19#define GATE_HIF(_id, _name, _parent, _shift)				\
20	GATE_MTK(_id, _name, _parent, &hif_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
 
 
 
 
 
 
21
22static const struct mtk_gate hif_clks[] = {
23	GATE_DUMMY(CLK_DUMMY, "hif_dummy"),
24	GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21),
25	GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22),
26	GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24),
27	GATE_HIF(CLK_HIFSYS_PCIE1, "pcie1_clk", "ethpll_500m_ck", 25),
28	GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26),
29};
30
31static u16 rst_ofs[] = { 0x34, };
 
 
 
32
33static const struct mtk_clk_rst_desc clk_rst_desc = {
34	.version = MTK_RST_SIMPLE,
35	.rst_bank_ofs = rst_ofs,
36	.rst_bank_nr = ARRAY_SIZE(rst_ofs),
37};
 
 
 
 
 
 
 
 
 
 
 
 
 
38
39static const struct mtk_clk_desc hif_desc = {
40	.clks = hif_clks,
41	.num_clks = ARRAY_SIZE(hif_clks),
42	.rst_desc = &clk_rst_desc,
43};
44
45static const struct of_device_id of_match_clk_mt2701_hif[] = {
46	{ .compatible = "mediatek,mt2701-hifsys", .data = &hif_desc },
47	{ /* sentinel */ }
48};
49MODULE_DEVICE_TABLE(of, of_match_clk_mt2701_hif);
50
51static struct platform_driver clk_mt2701_hif_drv = {
52	.probe = mtk_clk_simple_probe,
53	.remove_new = mtk_clk_simple_remove,
54	.driver = {
55		.name = "clk-mt2701-hif",
56		.of_match_table = of_match_clk_mt2701_hif,
57	},
58};
59module_platform_driver(clk_mt2701_hif_drv);
60MODULE_LICENSE("GPL");