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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * hdac-ext-controller.c - HD-audio extended controller functions.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 */
11
12#include <linux/delay.h>
13#include <linux/slab.h>
14#include <sound/hda_register.h>
15#include <sound/hdaudio_ext.h>
16
17/*
18 * maximum HDAC capablities we should parse to avoid endless looping:
19 * currently we have 4 extended caps, so this is future proof for now.
20 * extend when this limit is seen meeting in real HW
21 */
22#define HDAC_MAX_CAPS 10
23
24/*
25 * processing pipe helpers - these helpers are useful for dealing with HDA
26 * new capability of processing pipelines
27 */
28
29/**
30 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
31 * @bus: the pointer to HDAC bus object
32 * @enable: flag to turn on/off the capability
33 */
34void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *bus, bool enable)
35{
36
37 if (!bus->ppcap) {
38 dev_err(bus->dev, "Address of PP capability is NULL");
39 return;
40 }
41
42 if (enable)
43 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
44 AZX_PPCTL_GPROCEN, AZX_PPCTL_GPROCEN);
45 else
46 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
47 AZX_PPCTL_GPROCEN, 0);
48}
49EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
50
51/**
52 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
53 * @bus: the pointer to HDAC bus object
54 * @enable: flag to enable/disable interrupt
55 */
56void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *bus, bool enable)
57{
58
59 if (!bus->ppcap) {
60 dev_err(bus->dev, "Address of PP capability is NULL\n");
61 return;
62 }
63
64 if (enable)
65 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
66 AZX_PPCTL_PIE, AZX_PPCTL_PIE);
67 else
68 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
69 AZX_PPCTL_PIE, 0);
70}
71EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
72
73/*
74 * Multilink helpers - these helpers are useful for dealing with HDA
75 * new multilink capability
76 */
77
78/**
79 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
80 * @bus: the pointer to HDAC bus object
81 *
82 * This will parse all links and read the mlink capabilities and add them
83 * in hlink_list of extended hdac bus
84 * Note: this will be freed on bus exit by driver
85 */
86int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus)
87{
88 int idx;
89 u32 link_count;
90 struct hdac_ext_link *hlink;
91
92 link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
93
94 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
95
96 for (idx = 0; idx < link_count; idx++) {
97 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
98 if (!hlink)
99 return -ENOMEM;
100 hlink->index = idx;
101 hlink->bus = bus;
102 hlink->ml_addr = bus->mlcap + AZX_ML_BASE +
103 (AZX_ML_INTERVAL * idx);
104 hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
105 hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
106
107 /* since link in On, update the ref */
108 hlink->ref_count = 1;
109
110 list_add_tail(&hlink->list, &bus->hlink_list);
111 }
112
113 return 0;
114}
115EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
116
117/**
118 * snd_hdac_link_free_all- free hdac extended link objects
119 *
120 * @bus: the pointer to HDAC bus object
121 */
122
123void snd_hdac_link_free_all(struct hdac_bus *bus)
124{
125 struct hdac_ext_link *l;
126
127 while (!list_empty(&bus->hlink_list)) {
128 l = list_first_entry(&bus->hlink_list, struct hdac_ext_link, list);
129 list_del(&l->list);
130 kfree(l);
131 }
132}
133EXPORT_SYMBOL_GPL(snd_hdac_link_free_all);
134
135/**
136 * snd_hdac_ext_bus_get_link_index - get link based on codec name
137 * @bus: the pointer to HDAC bus object
138 * @codec_name: codec name
139 */
140struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_bus *bus,
141 const char *codec_name)
142{
143 int i;
144 struct hdac_ext_link *hlink = NULL;
145 int bus_idx, addr;
146
147 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
148 return NULL;
149 if (bus->idx != bus_idx)
150 return NULL;
151
152 list_for_each_entry(hlink, &bus->hlink_list, list) {
153 for (i = 0; i < HDA_MAX_CODECS; i++) {
154 if (hlink->lsdiid & (0x1 << addr))
155 return hlink;
156 }
157 }
158
159 return NULL;
160}
161EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
162
163static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
164{
165 int timeout;
166 u32 val;
167 int mask = (1 << AZX_MLCTL_CPA_SHIFT);
168
169 udelay(3);
170 timeout = 150;
171
172 do {
173 val = readl(link->ml_addr + AZX_REG_ML_LCTL);
174 if (enable) {
175 if (((val & mask) >> AZX_MLCTL_CPA_SHIFT))
176 return 0;
177 } else {
178 if (!((val & mask) >> AZX_MLCTL_CPA_SHIFT))
179 return 0;
180 }
181 udelay(3);
182 } while (--timeout);
183
184 return -EIO;
185}
186
187/**
188 * snd_hdac_ext_bus_link_power_up -power up hda link
189 * @link: HD-audio extended link
190 */
191int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
192{
193 snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL,
194 AZX_MLCTL_SPA, AZX_MLCTL_SPA);
195
196 return check_hdac_link_power_active(link, true);
197}
198EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
199
200/**
201 * snd_hdac_ext_bus_link_power_down -power down hda link
202 * @link: HD-audio extended link
203 */
204int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
205{
206 snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
207
208 return check_hdac_link_power_active(link, false);
209}
210EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
211
212/**
213 * snd_hdac_ext_bus_link_power_up_all -power up all hda link
214 * @bus: the pointer to HDAC bus object
215 */
216int snd_hdac_ext_bus_link_power_up_all(struct hdac_bus *bus)
217{
218 struct hdac_ext_link *hlink = NULL;
219 int ret;
220
221 list_for_each_entry(hlink, &bus->hlink_list, list) {
222 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL,
223 AZX_MLCTL_SPA, AZX_MLCTL_SPA);
224 ret = check_hdac_link_power_active(hlink, true);
225 if (ret < 0)
226 return ret;
227 }
228
229 return 0;
230}
231EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
232
233/**
234 * snd_hdac_ext_bus_link_power_down_all -power down all hda link
235 * @bus: the pointer to HDAC bus object
236 */
237int snd_hdac_ext_bus_link_power_down_all(struct hdac_bus *bus)
238{
239 struct hdac_ext_link *hlink = NULL;
240 int ret;
241
242 list_for_each_entry(hlink, &bus->hlink_list, list) {
243 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL,
244 AZX_MLCTL_SPA, 0);
245 ret = check_hdac_link_power_active(hlink, false);
246 if (ret < 0)
247 return ret;
248 }
249
250 return 0;
251}
252EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);
253
254int snd_hdac_ext_bus_link_get(struct hdac_bus *bus,
255 struct hdac_ext_link *link)
256{
257 unsigned long codec_mask;
258 int ret = 0;
259
260 mutex_lock(&bus->lock);
261
262 /*
263 * if we move from 0 to 1, count will be 1 so power up this link
264 * as well, also check the dma status and trigger that
265 */
266 if (++link->ref_count == 1) {
267 if (!bus->cmd_dma_state) {
268 snd_hdac_bus_init_cmd_io(bus);
269 bus->cmd_dma_state = true;
270 }
271
272 ret = snd_hdac_ext_bus_link_power_up(link);
273
274 /*
275 * clear the register to invalidate all the output streams
276 */
277 snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV,
278 ML_LOSIDV_STREAM_MASK, 0);
279 /*
280 * wait for 521usec for codec to report status
281 * HDA spec section 4.3 - Codec Discovery
282 */
283 udelay(521);
284 codec_mask = snd_hdac_chip_readw(bus, STATESTS);
285 dev_dbg(bus->dev, "codec_mask = 0x%lx\n", codec_mask);
286 snd_hdac_chip_writew(bus, STATESTS, codec_mask);
287 if (!bus->codec_mask)
288 bus->codec_mask = codec_mask;
289 }
290
291 mutex_unlock(&bus->lock);
292 return ret;
293}
294EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_get);
295
296int snd_hdac_ext_bus_link_put(struct hdac_bus *bus,
297 struct hdac_ext_link *link)
298{
299 int ret = 0;
300 struct hdac_ext_link *hlink;
301 bool link_up = false;
302
303 mutex_lock(&bus->lock);
304
305 /*
306 * if we move from 1 to 0, count will be 0
307 * so power down this link as well
308 */
309 if (--link->ref_count == 0) {
310 ret = snd_hdac_ext_bus_link_power_down(link);
311
312 /*
313 * now check if all links are off, if so turn off
314 * cmd dma as well
315 */
316 list_for_each_entry(hlink, &bus->hlink_list, list) {
317 if (hlink->ref_count) {
318 link_up = true;
319 break;
320 }
321 }
322
323 if (!link_up) {
324 snd_hdac_bus_stop_cmd_io(bus);
325 bus->cmd_dma_state = false;
326 }
327 }
328
329 mutex_unlock(&bus->lock);
330 return ret;
331}
332EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_put);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * hdac-ext-controller.c - HD-audio extended controller functions.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 */
11
12#include <linux/delay.h>
13#include <linux/slab.h>
14#include <sound/hda_register.h>
15#include <sound/hdaudio_ext.h>
16
17/*
18 * processing pipe helpers - these helpers are useful for dealing with HDA
19 * new capability of processing pipelines
20 */
21
22/**
23 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
24 * @bus: the pointer to HDAC bus object
25 * @enable: flag to turn on/off the capability
26 */
27void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *bus, bool enable)
28{
29
30 if (!bus->ppcap) {
31 dev_err(bus->dev, "Address of PP capability is NULL");
32 return;
33 }
34
35 if (enable)
36 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
37 AZX_PPCTL_GPROCEN, AZX_PPCTL_GPROCEN);
38 else
39 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
40 AZX_PPCTL_GPROCEN, 0);
41}
42EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
43
44/**
45 * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
46 * @bus: the pointer to HDAC bus object
47 * @enable: flag to enable/disable interrupt
48 */
49void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_bus *bus, bool enable)
50{
51
52 if (!bus->ppcap) {
53 dev_err(bus->dev, "Address of PP capability is NULL\n");
54 return;
55 }
56
57 if (enable)
58 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
59 AZX_PPCTL_PIE, AZX_PPCTL_PIE);
60 else
61 snd_hdac_updatel(bus->ppcap, AZX_REG_PP_PPCTL,
62 AZX_PPCTL_PIE, 0);
63}
64EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
65
66/*
67 * Multilink helpers - these helpers are useful for dealing with HDA
68 * new multilink capability
69 */
70
71/**
72 * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
73 * @bus: the pointer to HDAC bus object
74 *
75 * This will parse all links and read the mlink capabilities and add them
76 * in hlink_list of extended hdac bus
77 * Note: this will be freed on bus exit by driver
78 */
79int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_bus *bus)
80{
81 int idx;
82 u32 link_count;
83 struct hdac_ext_link *hlink;
84
85 link_count = readl(bus->mlcap + AZX_REG_ML_MLCD) + 1;
86
87 dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
88
89 for (idx = 0; idx < link_count; idx++) {
90 hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
91 if (!hlink)
92 return -ENOMEM;
93 hlink->index = idx;
94 hlink->bus = bus;
95 hlink->ml_addr = bus->mlcap + AZX_ML_BASE +
96 (AZX_ML_INTERVAL * idx);
97 hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
98 hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
99
100 /* since link in On, update the ref */
101 hlink->ref_count = 1;
102
103 list_add_tail(&hlink->list, &bus->hlink_list);
104 }
105
106 return 0;
107}
108EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
109
110/**
111 * snd_hdac_ext_link_free_all- free hdac extended link objects
112 *
113 * @bus: the pointer to HDAC bus object
114 */
115
116void snd_hdac_ext_link_free_all(struct hdac_bus *bus)
117{
118 struct hdac_ext_link *hlink;
119
120 while (!list_empty(&bus->hlink_list)) {
121 hlink = list_first_entry(&bus->hlink_list, struct hdac_ext_link, list);
122 list_del(&hlink->list);
123 kfree(hlink);
124 }
125}
126EXPORT_SYMBOL_GPL(snd_hdac_ext_link_free_all);
127
128/**
129 * snd_hdac_ext_bus_get_hlink_by_addr - get hlink at specified address
130 * @bus: hlink's parent bus device
131 * @addr: codec device address
132 *
133 * Returns hlink object or NULL if matching hlink is not found.
134 */
135struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_addr(struct hdac_bus *bus, int addr)
136{
137 struct hdac_ext_link *hlink;
138
139 list_for_each_entry(hlink, &bus->hlink_list, list)
140 if (hlink->lsdiid & (0x1 << addr))
141 return hlink;
142 return NULL;
143}
144EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_hlink_by_addr);
145
146/**
147 * snd_hdac_ext_bus_get_hlink_by_name - get hlink based on codec name
148 * @bus: the pointer to HDAC bus object
149 * @codec_name: codec name
150 */
151struct hdac_ext_link *snd_hdac_ext_bus_get_hlink_by_name(struct hdac_bus *bus,
152 const char *codec_name)
153{
154 int bus_idx, addr;
155
156 if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
157 return NULL;
158 if (bus->idx != bus_idx)
159 return NULL;
160 if (addr < 0 || addr > 31)
161 return NULL;
162
163 return snd_hdac_ext_bus_get_hlink_by_addr(bus, addr);
164}
165EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_hlink_by_name);
166
167static int check_hdac_link_power_active(struct hdac_ext_link *hlink, bool enable)
168{
169 int timeout;
170 u32 val;
171 int mask = (1 << AZX_ML_LCTL_CPA_SHIFT);
172
173 udelay(3);
174 timeout = 150;
175
176 do {
177 val = readl(hlink->ml_addr + AZX_REG_ML_LCTL);
178 if (enable) {
179 if (((val & mask) >> AZX_ML_LCTL_CPA_SHIFT))
180 return 0;
181 } else {
182 if (!((val & mask) >> AZX_ML_LCTL_CPA_SHIFT))
183 return 0;
184 }
185 udelay(3);
186 } while (--timeout);
187
188 return -EIO;
189}
190
191/**
192 * snd_hdac_ext_bus_link_power_up -power up hda link
193 * @hlink: HD-audio extended link
194 */
195int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *hlink)
196{
197 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL,
198 AZX_ML_LCTL_SPA, AZX_ML_LCTL_SPA);
199
200 return check_hdac_link_power_active(hlink, true);
201}
202EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
203
204/**
205 * snd_hdac_ext_bus_link_power_down -power down hda link
206 * @hlink: HD-audio extended link
207 */
208int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *hlink)
209{
210 snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_ML_LCTL_SPA, 0);
211
212 return check_hdac_link_power_active(hlink, false);
213}
214EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
215
216/**
217 * snd_hdac_ext_bus_link_power_up_all -power up all hda link
218 * @bus: the pointer to HDAC bus object
219 */
220int snd_hdac_ext_bus_link_power_up_all(struct hdac_bus *bus)
221{
222 struct hdac_ext_link *hlink = NULL;
223 int ret;
224
225 list_for_each_entry(hlink, &bus->hlink_list, list) {
226 ret = snd_hdac_ext_bus_link_power_up(hlink);
227 if (ret < 0)
228 return ret;
229 }
230
231 return 0;
232}
233EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all);
234
235/**
236 * snd_hdac_ext_bus_link_power_down_all -power down all hda link
237 * @bus: the pointer to HDAC bus object
238 */
239int snd_hdac_ext_bus_link_power_down_all(struct hdac_bus *bus)
240{
241 struct hdac_ext_link *hlink = NULL;
242 int ret;
243
244 list_for_each_entry(hlink, &bus->hlink_list, list) {
245 ret = snd_hdac_ext_bus_link_power_down(hlink);
246 if (ret < 0)
247 return ret;
248 }
249
250 return 0;
251}
252EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);
253
254/**
255 * snd_hdac_ext_bus_link_set_stream_id - maps stream id to link output
256 * @link: HD-audio ext link to set up
257 * @stream: stream id
258 */
259void snd_hdac_ext_bus_link_set_stream_id(struct hdac_ext_link *link,
260 int stream)
261{
262 snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV, (1 << stream), 1 << stream);
263}
264EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_set_stream_id);
265
266/**
267 * snd_hdac_ext_bus_link_clear_stream_id - maps stream id to link output
268 * @link: HD-audio ext link to set up
269 * @stream: stream id
270 */
271void snd_hdac_ext_bus_link_clear_stream_id(struct hdac_ext_link *link,
272 int stream)
273{
274 snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV, (1 << stream), 0);
275}
276EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_clear_stream_id);
277
278int snd_hdac_ext_bus_link_get(struct hdac_bus *bus,
279 struct hdac_ext_link *hlink)
280{
281 unsigned long codec_mask;
282 int ret = 0;
283
284 mutex_lock(&bus->lock);
285
286 /*
287 * if we move from 0 to 1, count will be 1 so power up this link
288 * as well, also check the dma status and trigger that
289 */
290 if (++hlink->ref_count == 1) {
291 if (!bus->cmd_dma_state) {
292 snd_hdac_bus_init_cmd_io(bus);
293 bus->cmd_dma_state = true;
294 }
295
296 ret = snd_hdac_ext_bus_link_power_up(hlink);
297
298 /*
299 * clear the register to invalidate all the output streams
300 */
301 snd_hdac_updatew(hlink->ml_addr, AZX_REG_ML_LOSIDV,
302 AZX_ML_LOSIDV_STREAM_MASK, 0);
303 /*
304 * wait for 521usec for codec to report status
305 * HDA spec section 4.3 - Codec Discovery
306 */
307 udelay(521);
308 codec_mask = snd_hdac_chip_readw(bus, STATESTS);
309 dev_dbg(bus->dev, "codec_mask = 0x%lx\n", codec_mask);
310 snd_hdac_chip_writew(bus, STATESTS, codec_mask);
311 if (!bus->codec_mask)
312 bus->codec_mask = codec_mask;
313 }
314
315 mutex_unlock(&bus->lock);
316 return ret;
317}
318EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_get);
319
320int snd_hdac_ext_bus_link_put(struct hdac_bus *bus,
321 struct hdac_ext_link *hlink)
322{
323 int ret = 0;
324 struct hdac_ext_link *hlink_tmp;
325 bool link_up = false;
326
327 mutex_lock(&bus->lock);
328
329 /*
330 * if we move from 1 to 0, count will be 0
331 * so power down this link as well
332 */
333 if (--hlink->ref_count == 0) {
334 ret = snd_hdac_ext_bus_link_power_down(hlink);
335
336 /*
337 * now check if all links are off, if so turn off
338 * cmd dma as well
339 */
340 list_for_each_entry(hlink_tmp, &bus->hlink_list, list) {
341 if (hlink_tmp->ref_count) {
342 link_up = true;
343 break;
344 }
345 }
346
347 if (!link_up) {
348 snd_hdac_bus_stop_cmd_io(bus);
349 bus->cmd_dma_state = false;
350 }
351 }
352
353 mutex_unlock(&bus->lock);
354 return ret;
355}
356EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_put);
357
358static void hdac_ext_codec_link_up(struct hdac_device *codec)
359{
360 const char *devname = dev_name(&codec->dev);
361 struct hdac_ext_link *hlink =
362 snd_hdac_ext_bus_get_hlink_by_name(codec->bus, devname);
363
364 if (hlink)
365 snd_hdac_ext_bus_link_get(codec->bus, hlink);
366}
367
368static void hdac_ext_codec_link_down(struct hdac_device *codec)
369{
370 const char *devname = dev_name(&codec->dev);
371 struct hdac_ext_link *hlink =
372 snd_hdac_ext_bus_get_hlink_by_name(codec->bus, devname);
373
374 if (hlink)
375 snd_hdac_ext_bus_link_put(codec->bus, hlink);
376}
377
378void snd_hdac_ext_bus_link_power(struct hdac_device *codec, bool enable)
379{
380 struct hdac_bus *bus = codec->bus;
381 bool oldstate = test_bit(codec->addr, &bus->codec_powered);
382
383 if (enable == oldstate)
384 return;
385
386 snd_hdac_bus_link_power(codec, enable);
387
388 if (enable)
389 hdac_ext_codec_link_up(codec);
390 else
391 hdac_ext_codec_link_down(codec);
392}
393EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power);