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1// SPDX-License-Identifier: GPL-2.0+
2/*****************************************************************************/
3/*
4 * moxa.c -- MOXA Intellio family multiport serial driver.
5 *
6 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
7 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 */
12
13/*
14 * MOXA Intellio Series Driver
15 * for : LINUX
16 * date : 1999/1/7
17 * version : 5.1
18 */
19
20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
25#include <linux/firmware.h>
26#include <linux/signal.h>
27#include <linux/sched.h>
28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/serial.h>
37#include <linux/tty_driver.h>
38#include <linux/delay.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/bitops.h>
42#include <linux/slab.h>
43#include <linux/ratelimit.h>
44
45#include <asm/io.h>
46#include <linux/uaccess.h>
47
48#include "moxa.h"
49
50#define MOXA_VERSION "6.0k"
51
52#define MOXA_FW_HDRLEN 32
53
54#define MOXAMAJOR 172
55
56#define MAX_BOARDS 4 /* Don't change this value */
57#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
58#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
59
60#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
61 (brd)->boardType == MOXA_BOARD_C320_PCI)
62
63/*
64 * Define the Moxa PCI vendor and device IDs.
65 */
66#define MOXA_BUS_TYPE_ISA 0
67#define MOXA_BUS_TYPE_PCI 1
68
69enum {
70 MOXA_BOARD_C218_PCI = 1,
71 MOXA_BOARD_C218_ISA,
72 MOXA_BOARD_C320_PCI,
73 MOXA_BOARD_C320_ISA,
74 MOXA_BOARD_CP204J,
75};
76
77static char *moxa_brdname[] =
78{
79 "C218 Turbo PCI series",
80 "C218 Turbo ISA series",
81 "C320 Turbo PCI series",
82 "C320 Turbo ISA series",
83 "CP-204J series",
84};
85
86#ifdef CONFIG_PCI
87static const struct pci_device_id moxa_pcibrds[] = {
88 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
89 .driver_data = MOXA_BOARD_C218_PCI },
90 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
91 .driver_data = MOXA_BOARD_C320_PCI },
92 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
93 .driver_data = MOXA_BOARD_CP204J },
94 { 0 }
95};
96MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
97#endif /* CONFIG_PCI */
98
99struct moxa_port;
100
101static struct moxa_board_conf {
102 int boardType;
103 int numPorts;
104 int busType;
105
106 unsigned int ready;
107
108 struct moxa_port *ports;
109
110 void __iomem *basemem;
111 void __iomem *intNdx;
112 void __iomem *intPend;
113 void __iomem *intTable;
114} moxa_boards[MAX_BOARDS];
115
116struct mxser_mstatus {
117 tcflag_t cflag;
118 int cts;
119 int dsr;
120 int ri;
121 int dcd;
122};
123
124struct moxaq_str {
125 int inq;
126 int outq;
127};
128
129struct moxa_port {
130 struct tty_port port;
131 struct moxa_board_conf *board;
132 void __iomem *tableAddr;
133
134 int type;
135 int cflag;
136 unsigned long statusflags;
137
138 u8 DCDState; /* Protected by the port lock */
139 u8 lineCtrl;
140 u8 lowChkFlag;
141};
142
143struct mon_str {
144 int tick;
145 int rxcnt[MAX_PORTS];
146 int txcnt[MAX_PORTS];
147};
148
149/* statusflags */
150#define TXSTOPPED 1
151#define LOWWAIT 2
152#define EMPTYWAIT 3
153
154
155#define WAKEUP_CHARS 256
156
157static int ttymajor = MOXAMAJOR;
158static struct mon_str moxaLog;
159static unsigned int moxaFuncTout = HZ / 2;
160static unsigned int moxaLowWaterChk;
161static DEFINE_MUTEX(moxa_openlock);
162static DEFINE_SPINLOCK(moxa_lock);
163
164static unsigned long baseaddr[MAX_BOARDS];
165static unsigned int type[MAX_BOARDS];
166static unsigned int numports[MAX_BOARDS];
167static struct tty_port moxa_service_port;
168
169MODULE_AUTHOR("William Chen");
170MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
171MODULE_LICENSE("GPL");
172MODULE_FIRMWARE("c218tunx.cod");
173MODULE_FIRMWARE("cp204unx.cod");
174MODULE_FIRMWARE("c320tunx.cod");
175
176module_param_array(type, uint, NULL, 0);
177MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
178module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
179MODULE_PARM_DESC(baseaddr, "base address");
180module_param_array(numports, uint, NULL, 0);
181MODULE_PARM_DESC(numports, "numports (ignored for C218)");
182
183module_param(ttymajor, int, 0);
184
185/*
186 * static functions:
187 */
188static int moxa_open(struct tty_struct *, struct file *);
189static void moxa_close(struct tty_struct *, struct file *);
190static int moxa_write(struct tty_struct *, const unsigned char *, int);
191static int moxa_write_room(struct tty_struct *);
192static void moxa_flush_buffer(struct tty_struct *);
193static int moxa_chars_in_buffer(struct tty_struct *);
194static void moxa_set_termios(struct tty_struct *, struct ktermios *);
195static void moxa_stop(struct tty_struct *);
196static void moxa_start(struct tty_struct *);
197static void moxa_hangup(struct tty_struct *);
198static int moxa_tiocmget(struct tty_struct *tty);
199static int moxa_tiocmset(struct tty_struct *tty,
200 unsigned int set, unsigned int clear);
201static void moxa_poll(struct timer_list *);
202static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
203static void moxa_shutdown(struct tty_port *);
204static int moxa_carrier_raised(struct tty_port *);
205static void moxa_dtr_rts(struct tty_port *, int);
206/*
207 * moxa board interface functions:
208 */
209static void MoxaPortEnable(struct moxa_port *);
210static void MoxaPortDisable(struct moxa_port *);
211static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
212static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
213static void MoxaPortLineCtrl(struct moxa_port *, int, int);
214static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
215static int MoxaPortLineStatus(struct moxa_port *);
216static void MoxaPortFlushData(struct moxa_port *, int);
217static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
218static int MoxaPortReadData(struct moxa_port *);
219static int MoxaPortTxQueue(struct moxa_port *);
220static int MoxaPortRxQueue(struct moxa_port *);
221static int MoxaPortTxFree(struct moxa_port *);
222static void MoxaPortTxDisable(struct moxa_port *);
223static void MoxaPortTxEnable(struct moxa_port *);
224static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
225static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
226static void MoxaSetFifo(struct moxa_port *port, int enable);
227
228/*
229 * I/O functions
230 */
231
232static DEFINE_SPINLOCK(moxafunc_lock);
233
234static void moxa_wait_finish(void __iomem *ofsAddr)
235{
236 unsigned long end = jiffies + moxaFuncTout;
237
238 while (readw(ofsAddr + FuncCode) != 0)
239 if (time_after(jiffies, end))
240 return;
241 if (readw(ofsAddr + FuncCode) != 0)
242 printk_ratelimited(KERN_WARNING "moxa function expired\n");
243}
244
245static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
246{
247 unsigned long flags;
248 spin_lock_irqsave(&moxafunc_lock, flags);
249 writew(arg, ofsAddr + FuncArg);
250 writew(cmd, ofsAddr + FuncCode);
251 moxa_wait_finish(ofsAddr);
252 spin_unlock_irqrestore(&moxafunc_lock, flags);
253}
254
255static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
256{
257 unsigned long flags;
258 u16 ret;
259 spin_lock_irqsave(&moxafunc_lock, flags);
260 writew(arg, ofsAddr + FuncArg);
261 writew(cmd, ofsAddr + FuncCode);
262 moxa_wait_finish(ofsAddr);
263 ret = readw(ofsAddr + FuncArg);
264 spin_unlock_irqrestore(&moxafunc_lock, flags);
265 return ret;
266}
267
268static void moxa_low_water_check(void __iomem *ofsAddr)
269{
270 u16 rptr, wptr, mask, len;
271
272 if (readb(ofsAddr + FlagStat) & Xoff_state) {
273 rptr = readw(ofsAddr + RXrptr);
274 wptr = readw(ofsAddr + RXwptr);
275 mask = readw(ofsAddr + RX_mask);
276 len = (wptr - rptr) & mask;
277 if (len <= Low_water)
278 moxafunc(ofsAddr, FC_SendXon, 0);
279 }
280}
281
282/*
283 * TTY operations
284 */
285
286static int moxa_ioctl(struct tty_struct *tty,
287 unsigned int cmd, unsigned long arg)
288{
289 struct moxa_port *ch = tty->driver_data;
290 void __user *argp = (void __user *)arg;
291 int status, ret = 0;
292
293 if (tty->index == MAX_PORTS) {
294 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
295 cmd != MOXA_GETMSTATUS)
296 return -EINVAL;
297 } else if (!ch)
298 return -ENODEV;
299
300 switch (cmd) {
301 case MOXA_GETDATACOUNT:
302 moxaLog.tick = jiffies;
303 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
304 ret = -EFAULT;
305 break;
306 case MOXA_FLUSH_QUEUE:
307 MoxaPortFlushData(ch, arg);
308 break;
309 case MOXA_GET_IOQUEUE: {
310 struct moxaq_str __user *argm = argp;
311 struct moxaq_str tmp;
312 struct moxa_port *p;
313 unsigned int i, j;
314
315 for (i = 0; i < MAX_BOARDS; i++) {
316 p = moxa_boards[i].ports;
317 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
318 memset(&tmp, 0, sizeof(tmp));
319 spin_lock_bh(&moxa_lock);
320 if (moxa_boards[i].ready) {
321 tmp.inq = MoxaPortRxQueue(p);
322 tmp.outq = MoxaPortTxQueue(p);
323 }
324 spin_unlock_bh(&moxa_lock);
325 if (copy_to_user(argm, &tmp, sizeof(tmp)))
326 return -EFAULT;
327 }
328 }
329 break;
330 } case MOXA_GET_OQUEUE:
331 status = MoxaPortTxQueue(ch);
332 ret = put_user(status, (unsigned long __user *)argp);
333 break;
334 case MOXA_GET_IQUEUE:
335 status = MoxaPortRxQueue(ch);
336 ret = put_user(status, (unsigned long __user *)argp);
337 break;
338 case MOXA_GETMSTATUS: {
339 struct mxser_mstatus __user *argm = argp;
340 struct mxser_mstatus tmp;
341 struct moxa_port *p;
342 unsigned int i, j;
343
344 for (i = 0; i < MAX_BOARDS; i++) {
345 p = moxa_boards[i].ports;
346 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
347 struct tty_struct *ttyp;
348 memset(&tmp, 0, sizeof(tmp));
349 spin_lock_bh(&moxa_lock);
350 if (!moxa_boards[i].ready) {
351 spin_unlock_bh(&moxa_lock);
352 goto copy;
353 }
354
355 status = MoxaPortLineStatus(p);
356 spin_unlock_bh(&moxa_lock);
357
358 if (status & 1)
359 tmp.cts = 1;
360 if (status & 2)
361 tmp.dsr = 1;
362 if (status & 4)
363 tmp.dcd = 1;
364
365 ttyp = tty_port_tty_get(&p->port);
366 if (!ttyp)
367 tmp.cflag = p->cflag;
368 else
369 tmp.cflag = ttyp->termios.c_cflag;
370 tty_kref_put(ttyp);
371copy:
372 if (copy_to_user(argm, &tmp, sizeof(tmp)))
373 return -EFAULT;
374 }
375 }
376 break;
377 }
378 default:
379 ret = -ENOIOCTLCMD;
380 }
381 return ret;
382}
383
384static int moxa_break_ctl(struct tty_struct *tty, int state)
385{
386 struct moxa_port *port = tty->driver_data;
387
388 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
389 Magic_code);
390 return 0;
391}
392
393static const struct tty_operations moxa_ops = {
394 .open = moxa_open,
395 .close = moxa_close,
396 .write = moxa_write,
397 .write_room = moxa_write_room,
398 .flush_buffer = moxa_flush_buffer,
399 .chars_in_buffer = moxa_chars_in_buffer,
400 .ioctl = moxa_ioctl,
401 .set_termios = moxa_set_termios,
402 .stop = moxa_stop,
403 .start = moxa_start,
404 .hangup = moxa_hangup,
405 .break_ctl = moxa_break_ctl,
406 .tiocmget = moxa_tiocmget,
407 .tiocmset = moxa_tiocmset,
408 .set_serial = moxa_set_serial_info,
409 .get_serial = moxa_get_serial_info,
410};
411
412static const struct tty_port_operations moxa_port_ops = {
413 .carrier_raised = moxa_carrier_raised,
414 .dtr_rts = moxa_dtr_rts,
415 .shutdown = moxa_shutdown,
416};
417
418static struct tty_driver *moxaDriver;
419static DEFINE_TIMER(moxaTimer, moxa_poll);
420
421/*
422 * HW init
423 */
424
425static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
426{
427 switch (brd->boardType) {
428 case MOXA_BOARD_C218_ISA:
429 case MOXA_BOARD_C218_PCI:
430 if (model != 1)
431 goto err;
432 break;
433 case MOXA_BOARD_CP204J:
434 if (model != 3)
435 goto err;
436 break;
437 default:
438 if (model != 2)
439 goto err;
440 break;
441 }
442 return 0;
443err:
444 return -EINVAL;
445}
446
447static int moxa_check_fw(const void *ptr)
448{
449 const __le16 *lptr = ptr;
450
451 if (*lptr != cpu_to_le16(0x7980))
452 return -EINVAL;
453
454 return 0;
455}
456
457static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
458 size_t len)
459{
460 void __iomem *baseAddr = brd->basemem;
461 u16 tmp;
462
463 writeb(HW_reset, baseAddr + Control_reg); /* reset */
464 msleep(10);
465 memset_io(baseAddr, 0, 4096);
466 memcpy_toio(baseAddr, buf, len); /* download BIOS */
467 writeb(0, baseAddr + Control_reg); /* restart */
468
469 msleep(2000);
470
471 switch (brd->boardType) {
472 case MOXA_BOARD_C218_ISA:
473 case MOXA_BOARD_C218_PCI:
474 tmp = readw(baseAddr + C218_key);
475 if (tmp != C218_KeyCode)
476 goto err;
477 break;
478 case MOXA_BOARD_CP204J:
479 tmp = readw(baseAddr + C218_key);
480 if (tmp != CP204J_KeyCode)
481 goto err;
482 break;
483 default:
484 tmp = readw(baseAddr + C320_key);
485 if (tmp != C320_KeyCode)
486 goto err;
487 tmp = readw(baseAddr + C320_status);
488 if (tmp != STS_init) {
489 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
490 "module not found\n");
491 return -EIO;
492 }
493 break;
494 }
495
496 return 0;
497err:
498 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
499 return -EIO;
500}
501
502static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
503 size_t len)
504{
505 void __iomem *baseAddr = brd->basemem;
506
507 if (len < 7168) {
508 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
509 return -EINVAL;
510 }
511
512 writew(len - 7168 - 2, baseAddr + C320bapi_len);
513 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
514 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
515 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
516 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
517
518 return 0;
519}
520
521static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
522 size_t len)
523{
524 void __iomem *baseAddr = brd->basemem;
525 const __le16 *uptr = ptr;
526 size_t wlen, len2, j;
527 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
528 unsigned int i, retry;
529 u16 usum, keycode;
530
531 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
532 C218_KeyCode;
533
534 switch (brd->boardType) {
535 case MOXA_BOARD_CP204J:
536 case MOXA_BOARD_C218_ISA:
537 case MOXA_BOARD_C218_PCI:
538 key = C218_key;
539 loadbuf = C218_LoadBuf;
540 loadlen = C218DLoad_len;
541 checksum = C218check_sum;
542 checksum_ok = C218chksum_ok;
543 break;
544 default:
545 key = C320_key;
546 keycode = C320_KeyCode;
547 loadbuf = C320_LoadBuf;
548 loadlen = C320DLoad_len;
549 checksum = C320check_sum;
550 checksum_ok = C320chksum_ok;
551 break;
552 }
553
554 usum = 0;
555 wlen = len >> 1;
556 for (i = 0; i < wlen; i++)
557 usum += le16_to_cpu(uptr[i]);
558 retry = 0;
559 do {
560 wlen = len >> 1;
561 j = 0;
562 while (wlen) {
563 len2 = (wlen > 2048) ? 2048 : wlen;
564 wlen -= len2;
565 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
566 j += len2 << 1;
567
568 writew(len2, baseAddr + loadlen);
569 writew(0, baseAddr + key);
570 for (i = 0; i < 100; i++) {
571 if (readw(baseAddr + key) == keycode)
572 break;
573 msleep(10);
574 }
575 if (readw(baseAddr + key) != keycode)
576 return -EIO;
577 }
578 writew(0, baseAddr + loadlen);
579 writew(usum, baseAddr + checksum);
580 writew(0, baseAddr + key);
581 for (i = 0; i < 100; i++) {
582 if (readw(baseAddr + key) == keycode)
583 break;
584 msleep(10);
585 }
586 retry++;
587 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
588 if (readb(baseAddr + checksum_ok) != 1)
589 return -EIO;
590
591 writew(0, baseAddr + key);
592 for (i = 0; i < 600; i++) {
593 if (readw(baseAddr + Magic_no) == Magic_code)
594 break;
595 msleep(10);
596 }
597 if (readw(baseAddr + Magic_no) != Magic_code)
598 return -EIO;
599
600 if (MOXA_IS_320(brd)) {
601 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
602 writew(0x3800, baseAddr + TMS320_PORT1);
603 writew(0x3900, baseAddr + TMS320_PORT2);
604 writew(28499, baseAddr + TMS320_CLOCK);
605 } else {
606 writew(0x3200, baseAddr + TMS320_PORT1);
607 writew(0x3400, baseAddr + TMS320_PORT2);
608 writew(19999, baseAddr + TMS320_CLOCK);
609 }
610 }
611 writew(1, baseAddr + Disable_IRQ);
612 writew(0, baseAddr + Magic_no);
613 for (i = 0; i < 500; i++) {
614 if (readw(baseAddr + Magic_no) == Magic_code)
615 break;
616 msleep(10);
617 }
618 if (readw(baseAddr + Magic_no) != Magic_code)
619 return -EIO;
620
621 if (MOXA_IS_320(brd)) {
622 j = readw(baseAddr + Module_cnt);
623 if (j <= 0)
624 return -EIO;
625 brd->numPorts = j * 8;
626 writew(j, baseAddr + Module_no);
627 writew(0, baseAddr + Magic_no);
628 for (i = 0; i < 600; i++) {
629 if (readw(baseAddr + Magic_no) == Magic_code)
630 break;
631 msleep(10);
632 }
633 if (readw(baseAddr + Magic_no) != Magic_code)
634 return -EIO;
635 }
636 brd->intNdx = baseAddr + IRQindex;
637 brd->intPend = baseAddr + IRQpending;
638 brd->intTable = baseAddr + IRQtable;
639
640 return 0;
641}
642
643static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
644 size_t len)
645{
646 void __iomem *ofsAddr, *baseAddr = brd->basemem;
647 struct moxa_port *port;
648 int retval, i;
649
650 if (len % 2) {
651 printk(KERN_ERR "MOXA: bios length is not even\n");
652 return -EINVAL;
653 }
654
655 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
656 if (retval)
657 return retval;
658
659 switch (brd->boardType) {
660 case MOXA_BOARD_C218_ISA:
661 case MOXA_BOARD_C218_PCI:
662 case MOXA_BOARD_CP204J:
663 port = brd->ports;
664 for (i = 0; i < brd->numPorts; i++, port++) {
665 port->board = brd;
666 port->DCDState = 0;
667 port->tableAddr = baseAddr + Extern_table +
668 Extern_size * i;
669 ofsAddr = port->tableAddr;
670 writew(C218rx_mask, ofsAddr + RX_mask);
671 writew(C218tx_mask, ofsAddr + TX_mask);
672 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
673 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
674
675 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
676 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
677
678 }
679 break;
680 default:
681 port = brd->ports;
682 for (i = 0; i < brd->numPorts; i++, port++) {
683 port->board = brd;
684 port->DCDState = 0;
685 port->tableAddr = baseAddr + Extern_table +
686 Extern_size * i;
687 ofsAddr = port->tableAddr;
688 switch (brd->numPorts) {
689 case 8:
690 writew(C320p8rx_mask, ofsAddr + RX_mask);
691 writew(C320p8tx_mask, ofsAddr + TX_mask);
692 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
693 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
694 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
695 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
696
697 break;
698 case 16:
699 writew(C320p16rx_mask, ofsAddr + RX_mask);
700 writew(C320p16tx_mask, ofsAddr + TX_mask);
701 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
702 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
703 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
704 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
705 break;
706
707 case 24:
708 writew(C320p24rx_mask, ofsAddr + RX_mask);
709 writew(C320p24tx_mask, ofsAddr + TX_mask);
710 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
711 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
712 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
713 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
714 break;
715 case 32:
716 writew(C320p32rx_mask, ofsAddr + RX_mask);
717 writew(C320p32tx_mask, ofsAddr + TX_mask);
718 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
719 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
720 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
721 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
722 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
723 break;
724 }
725 }
726 break;
727 }
728 return 0;
729}
730
731static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
732{
733 const void *ptr = fw->data;
734 char rsn[64];
735 u16 lens[5];
736 size_t len;
737 unsigned int a, lenp, lencnt;
738 int ret = -EINVAL;
739 struct {
740 __le32 magic; /* 0x34303430 */
741 u8 reserved1[2];
742 u8 type; /* UNIX = 3 */
743 u8 model; /* C218T=1, C320T=2, CP204=3 */
744 u8 reserved2[8];
745 __le16 len[5];
746 } const *hdr = ptr;
747
748 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
749
750 if (fw->size < MOXA_FW_HDRLEN) {
751 strcpy(rsn, "too short (even header won't fit)");
752 goto err;
753 }
754 if (hdr->magic != cpu_to_le32(0x30343034)) {
755 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
756 goto err;
757 }
758 if (hdr->type != 3) {
759 sprintf(rsn, "not for linux, type is %u", hdr->type);
760 goto err;
761 }
762 if (moxa_check_fw_model(brd, hdr->model)) {
763 sprintf(rsn, "not for this card, model is %u", hdr->model);
764 goto err;
765 }
766
767 len = MOXA_FW_HDRLEN;
768 lencnt = hdr->model == 2 ? 5 : 3;
769 for (a = 0; a < ARRAY_SIZE(lens); a++) {
770 lens[a] = le16_to_cpu(hdr->len[a]);
771 if (lens[a] && len + lens[a] <= fw->size &&
772 moxa_check_fw(&fw->data[len]))
773 printk(KERN_WARNING "MOXA firmware: unexpected input "
774 "at offset %u, but going on\n", (u32)len);
775 if (!lens[a] && a < lencnt) {
776 sprintf(rsn, "too few entries in fw file");
777 goto err;
778 }
779 len += lens[a];
780 }
781
782 if (len != fw->size) {
783 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
784 (u32)len);
785 goto err;
786 }
787
788 ptr += MOXA_FW_HDRLEN;
789 lenp = 0; /* bios */
790
791 strcpy(rsn, "read above");
792
793 ret = moxa_load_bios(brd, ptr, lens[lenp]);
794 if (ret)
795 goto err;
796
797 /* we skip the tty section (lens[1]), since we don't need it */
798 ptr += lens[lenp] + lens[lenp + 1];
799 lenp += 2; /* comm */
800
801 if (hdr->model == 2) {
802 ret = moxa_load_320b(brd, ptr, lens[lenp]);
803 if (ret)
804 goto err;
805 /* skip another tty */
806 ptr += lens[lenp] + lens[lenp + 1];
807 lenp += 2;
808 }
809
810 ret = moxa_load_code(brd, ptr, lens[lenp]);
811 if (ret)
812 goto err;
813
814 return 0;
815err:
816 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
817 return ret;
818}
819
820static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
821{
822 const struct firmware *fw;
823 const char *file;
824 struct moxa_port *p;
825 unsigned int i, first_idx;
826 int ret;
827
828 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
829 GFP_KERNEL);
830 if (brd->ports == NULL) {
831 printk(KERN_ERR "cannot allocate memory for ports\n");
832 ret = -ENOMEM;
833 goto err;
834 }
835
836 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
837 tty_port_init(&p->port);
838 p->port.ops = &moxa_port_ops;
839 p->type = PORT_16550A;
840 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
841 }
842
843 switch (brd->boardType) {
844 case MOXA_BOARD_C218_ISA:
845 case MOXA_BOARD_C218_PCI:
846 file = "c218tunx.cod";
847 break;
848 case MOXA_BOARD_CP204J:
849 file = "cp204unx.cod";
850 break;
851 default:
852 file = "c320tunx.cod";
853 break;
854 }
855
856 ret = request_firmware(&fw, file, dev);
857 if (ret) {
858 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
859 "you've placed '%s' file into your firmware "
860 "loader directory (e.g. /lib/firmware)\n",
861 file);
862 goto err_free;
863 }
864
865 ret = moxa_load_fw(brd, fw);
866
867 release_firmware(fw);
868
869 if (ret)
870 goto err_free;
871
872 spin_lock_bh(&moxa_lock);
873 brd->ready = 1;
874 if (!timer_pending(&moxaTimer))
875 mod_timer(&moxaTimer, jiffies + HZ / 50);
876 spin_unlock_bh(&moxa_lock);
877
878 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
879 for (i = 0; i < brd->numPorts; i++)
880 tty_port_register_device(&brd->ports[i].port, moxaDriver,
881 first_idx + i, dev);
882
883 return 0;
884err_free:
885 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
886 tty_port_destroy(&brd->ports[i].port);
887 kfree(brd->ports);
888err:
889 return ret;
890}
891
892static void moxa_board_deinit(struct moxa_board_conf *brd)
893{
894 unsigned int a, opened, first_idx;
895
896 mutex_lock(&moxa_openlock);
897 spin_lock_bh(&moxa_lock);
898 brd->ready = 0;
899 spin_unlock_bh(&moxa_lock);
900
901 /* pci hot-un-plug support */
902 for (a = 0; a < brd->numPorts; a++)
903 if (tty_port_initialized(&brd->ports[a].port))
904 tty_port_tty_hangup(&brd->ports[a].port, false);
905
906 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
907 tty_port_destroy(&brd->ports[a].port);
908
909 while (1) {
910 opened = 0;
911 for (a = 0; a < brd->numPorts; a++)
912 if (tty_port_initialized(&brd->ports[a].port))
913 opened++;
914 mutex_unlock(&moxa_openlock);
915 if (!opened)
916 break;
917 msleep(50);
918 mutex_lock(&moxa_openlock);
919 }
920
921 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
922 for (a = 0; a < brd->numPorts; a++)
923 tty_unregister_device(moxaDriver, first_idx + a);
924
925 iounmap(brd->basemem);
926 brd->basemem = NULL;
927 kfree(brd->ports);
928}
929
930#ifdef CONFIG_PCI
931static int moxa_pci_probe(struct pci_dev *pdev,
932 const struct pci_device_id *ent)
933{
934 struct moxa_board_conf *board;
935 unsigned int i;
936 int board_type = ent->driver_data;
937 int retval;
938
939 retval = pci_enable_device(pdev);
940 if (retval) {
941 dev_err(&pdev->dev, "can't enable pci device\n");
942 goto err;
943 }
944
945 for (i = 0; i < MAX_BOARDS; i++)
946 if (moxa_boards[i].basemem == NULL)
947 break;
948
949 retval = -ENODEV;
950 if (i >= MAX_BOARDS) {
951 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
952 "found. Board is ignored.\n", MAX_BOARDS);
953 goto err;
954 }
955
956 board = &moxa_boards[i];
957
958 retval = pci_request_region(pdev, 2, "moxa-base");
959 if (retval) {
960 dev_err(&pdev->dev, "can't request pci region 2\n");
961 goto err;
962 }
963
964 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
965 if (board->basemem == NULL) {
966 dev_err(&pdev->dev, "can't remap io space 2\n");
967 retval = -ENOMEM;
968 goto err_reg;
969 }
970
971 board->boardType = board_type;
972 switch (board_type) {
973 case MOXA_BOARD_C218_ISA:
974 case MOXA_BOARD_C218_PCI:
975 board->numPorts = 8;
976 break;
977
978 case MOXA_BOARD_CP204J:
979 board->numPorts = 4;
980 break;
981 default:
982 board->numPorts = 0;
983 break;
984 }
985 board->busType = MOXA_BUS_TYPE_PCI;
986
987 retval = moxa_init_board(board, &pdev->dev);
988 if (retval)
989 goto err_base;
990
991 pci_set_drvdata(pdev, board);
992
993 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
994 moxa_brdname[board_type - 1], board->numPorts);
995
996 return 0;
997err_base:
998 iounmap(board->basemem);
999 board->basemem = NULL;
1000err_reg:
1001 pci_release_region(pdev, 2);
1002err:
1003 return retval;
1004}
1005
1006static void moxa_pci_remove(struct pci_dev *pdev)
1007{
1008 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1009
1010 moxa_board_deinit(brd);
1011
1012 pci_release_region(pdev, 2);
1013}
1014
1015static struct pci_driver moxa_pci_driver = {
1016 .name = "moxa",
1017 .id_table = moxa_pcibrds,
1018 .probe = moxa_pci_probe,
1019 .remove = moxa_pci_remove
1020};
1021#endif /* CONFIG_PCI */
1022
1023static int __init moxa_init(void)
1024{
1025 unsigned int isabrds = 0;
1026 int retval = 0;
1027 struct moxa_board_conf *brd = moxa_boards;
1028 unsigned int i;
1029
1030 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1031 MOXA_VERSION);
1032
1033 tty_port_init(&moxa_service_port);
1034
1035 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1036 TTY_DRIVER_REAL_RAW |
1037 TTY_DRIVER_DYNAMIC_DEV);
1038 if (IS_ERR(moxaDriver))
1039 return PTR_ERR(moxaDriver);
1040
1041 moxaDriver->name = "ttyMX";
1042 moxaDriver->major = ttymajor;
1043 moxaDriver->minor_start = 0;
1044 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1045 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1046 moxaDriver->init_termios = tty_std_termios;
1047 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1048 moxaDriver->init_termios.c_ispeed = 9600;
1049 moxaDriver->init_termios.c_ospeed = 9600;
1050 tty_set_operations(moxaDriver, &moxa_ops);
1051 /* Having one more port only for ioctls is ugly */
1052 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1053
1054 if (tty_register_driver(moxaDriver)) {
1055 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1056 put_tty_driver(moxaDriver);
1057 return -1;
1058 }
1059
1060 /* Find the boards defined from module args. */
1061
1062 for (i = 0; i < MAX_BOARDS; i++) {
1063 if (!baseaddr[i])
1064 break;
1065 if (type[i] == MOXA_BOARD_C218_ISA ||
1066 type[i] == MOXA_BOARD_C320_ISA) {
1067 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1068 isabrds + 1, moxa_brdname[type[i] - 1],
1069 baseaddr[i]);
1070 brd->boardType = type[i];
1071 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1072 numports[i];
1073 brd->busType = MOXA_BUS_TYPE_ISA;
1074 brd->basemem = ioremap(baseaddr[i], 0x4000);
1075 if (!brd->basemem) {
1076 printk(KERN_ERR "MOXA: can't remap %lx\n",
1077 baseaddr[i]);
1078 continue;
1079 }
1080 if (moxa_init_board(brd, NULL)) {
1081 iounmap(brd->basemem);
1082 brd->basemem = NULL;
1083 continue;
1084 }
1085
1086 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1087 "ready (%u ports, firmware loaded)\n",
1088 baseaddr[i], brd->numPorts);
1089
1090 brd++;
1091 isabrds++;
1092 }
1093 }
1094
1095#ifdef CONFIG_PCI
1096 retval = pci_register_driver(&moxa_pci_driver);
1097 if (retval) {
1098 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1099 if (isabrds)
1100 retval = 0;
1101 }
1102#endif
1103
1104 return retval;
1105}
1106
1107static void __exit moxa_exit(void)
1108{
1109 unsigned int i;
1110
1111#ifdef CONFIG_PCI
1112 pci_unregister_driver(&moxa_pci_driver);
1113#endif
1114
1115 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1116 if (moxa_boards[i].ready)
1117 moxa_board_deinit(&moxa_boards[i]);
1118
1119 del_timer_sync(&moxaTimer);
1120
1121 if (tty_unregister_driver(moxaDriver))
1122 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1123 "serial driver\n");
1124 put_tty_driver(moxaDriver);
1125}
1126
1127module_init(moxa_init);
1128module_exit(moxa_exit);
1129
1130static void moxa_shutdown(struct tty_port *port)
1131{
1132 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1133 MoxaPortDisable(ch);
1134 MoxaPortFlushData(ch, 2);
1135}
1136
1137static int moxa_carrier_raised(struct tty_port *port)
1138{
1139 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1140 int dcd;
1141
1142 spin_lock_irq(&port->lock);
1143 dcd = ch->DCDState;
1144 spin_unlock_irq(&port->lock);
1145 return dcd;
1146}
1147
1148static void moxa_dtr_rts(struct tty_port *port, int onoff)
1149{
1150 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1151 MoxaPortLineCtrl(ch, onoff, onoff);
1152}
1153
1154
1155static int moxa_open(struct tty_struct *tty, struct file *filp)
1156{
1157 struct moxa_board_conf *brd;
1158 struct moxa_port *ch;
1159 int port;
1160
1161 port = tty->index;
1162 if (port == MAX_PORTS) {
1163 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1164 }
1165 if (mutex_lock_interruptible(&moxa_openlock))
1166 return -ERESTARTSYS;
1167 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1168 if (!brd->ready) {
1169 mutex_unlock(&moxa_openlock);
1170 return -ENODEV;
1171 }
1172
1173 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1174 mutex_unlock(&moxa_openlock);
1175 return -ENODEV;
1176 }
1177
1178 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1179 ch->port.count++;
1180 tty->driver_data = ch;
1181 tty_port_tty_set(&ch->port, tty);
1182 mutex_lock(&ch->port.mutex);
1183 if (!tty_port_initialized(&ch->port)) {
1184 ch->statusflags = 0;
1185 moxa_set_tty_param(tty, &tty->termios);
1186 MoxaPortLineCtrl(ch, 1, 1);
1187 MoxaPortEnable(ch);
1188 MoxaSetFifo(ch, ch->type == PORT_16550A);
1189 tty_port_set_initialized(&ch->port, 1);
1190 }
1191 mutex_unlock(&ch->port.mutex);
1192 mutex_unlock(&moxa_openlock);
1193
1194 return tty_port_block_til_ready(&ch->port, tty, filp);
1195}
1196
1197static void moxa_close(struct tty_struct *tty, struct file *filp)
1198{
1199 struct moxa_port *ch = tty->driver_data;
1200 ch->cflag = tty->termios.c_cflag;
1201 tty_port_close(&ch->port, tty, filp);
1202}
1203
1204static int moxa_write(struct tty_struct *tty,
1205 const unsigned char *buf, int count)
1206{
1207 struct moxa_port *ch = tty->driver_data;
1208 unsigned long flags;
1209 int len;
1210
1211 if (ch == NULL)
1212 return 0;
1213
1214 spin_lock_irqsave(&moxa_lock, flags);
1215 len = MoxaPortWriteData(tty, buf, count);
1216 spin_unlock_irqrestore(&moxa_lock, flags);
1217
1218 set_bit(LOWWAIT, &ch->statusflags);
1219 return len;
1220}
1221
1222static int moxa_write_room(struct tty_struct *tty)
1223{
1224 struct moxa_port *ch;
1225
1226 if (tty->stopped)
1227 return 0;
1228 ch = tty->driver_data;
1229 if (ch == NULL)
1230 return 0;
1231 return MoxaPortTxFree(ch);
1232}
1233
1234static void moxa_flush_buffer(struct tty_struct *tty)
1235{
1236 struct moxa_port *ch = tty->driver_data;
1237
1238 if (ch == NULL)
1239 return;
1240 MoxaPortFlushData(ch, 1);
1241 tty_wakeup(tty);
1242}
1243
1244static int moxa_chars_in_buffer(struct tty_struct *tty)
1245{
1246 struct moxa_port *ch = tty->driver_data;
1247 int chars;
1248
1249 chars = MoxaPortTxQueue(ch);
1250 if (chars)
1251 /*
1252 * Make it possible to wakeup anything waiting for output
1253 * in tty_ioctl.c, etc.
1254 */
1255 set_bit(EMPTYWAIT, &ch->statusflags);
1256 return chars;
1257}
1258
1259static int moxa_tiocmget(struct tty_struct *tty)
1260{
1261 struct moxa_port *ch = tty->driver_data;
1262 int flag = 0, dtr, rts;
1263
1264 MoxaPortGetLineOut(ch, &dtr, &rts);
1265 if (dtr)
1266 flag |= TIOCM_DTR;
1267 if (rts)
1268 flag |= TIOCM_RTS;
1269 dtr = MoxaPortLineStatus(ch);
1270 if (dtr & 1)
1271 flag |= TIOCM_CTS;
1272 if (dtr & 2)
1273 flag |= TIOCM_DSR;
1274 if (dtr & 4)
1275 flag |= TIOCM_CD;
1276 return flag;
1277}
1278
1279static int moxa_tiocmset(struct tty_struct *tty,
1280 unsigned int set, unsigned int clear)
1281{
1282 struct moxa_port *ch;
1283 int dtr, rts;
1284
1285 mutex_lock(&moxa_openlock);
1286 ch = tty->driver_data;
1287 if (!ch) {
1288 mutex_unlock(&moxa_openlock);
1289 return -EINVAL;
1290 }
1291
1292 MoxaPortGetLineOut(ch, &dtr, &rts);
1293 if (set & TIOCM_RTS)
1294 rts = 1;
1295 if (set & TIOCM_DTR)
1296 dtr = 1;
1297 if (clear & TIOCM_RTS)
1298 rts = 0;
1299 if (clear & TIOCM_DTR)
1300 dtr = 0;
1301 MoxaPortLineCtrl(ch, dtr, rts);
1302 mutex_unlock(&moxa_openlock);
1303 return 0;
1304}
1305
1306static void moxa_set_termios(struct tty_struct *tty,
1307 struct ktermios *old_termios)
1308{
1309 struct moxa_port *ch = tty->driver_data;
1310
1311 if (ch == NULL)
1312 return;
1313 moxa_set_tty_param(tty, old_termios);
1314 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1315 wake_up_interruptible(&ch->port.open_wait);
1316}
1317
1318static void moxa_stop(struct tty_struct *tty)
1319{
1320 struct moxa_port *ch = tty->driver_data;
1321
1322 if (ch == NULL)
1323 return;
1324 MoxaPortTxDisable(ch);
1325 set_bit(TXSTOPPED, &ch->statusflags);
1326}
1327
1328
1329static void moxa_start(struct tty_struct *tty)
1330{
1331 struct moxa_port *ch = tty->driver_data;
1332
1333 if (ch == NULL)
1334 return;
1335
1336 if (!test_bit(TXSTOPPED, &ch->statusflags))
1337 return;
1338
1339 MoxaPortTxEnable(ch);
1340 clear_bit(TXSTOPPED, &ch->statusflags);
1341}
1342
1343static void moxa_hangup(struct tty_struct *tty)
1344{
1345 struct moxa_port *ch = tty->driver_data;
1346 tty_port_hangup(&ch->port);
1347}
1348
1349static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1350{
1351 unsigned long flags;
1352 dcd = !!dcd;
1353
1354 spin_lock_irqsave(&p->port.lock, flags);
1355 if (dcd != p->DCDState) {
1356 p->DCDState = dcd;
1357 spin_unlock_irqrestore(&p->port.lock, flags);
1358 if (!dcd)
1359 tty_port_tty_hangup(&p->port, true);
1360 }
1361 else
1362 spin_unlock_irqrestore(&p->port.lock, flags);
1363}
1364
1365static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1366 u16 __iomem *ip)
1367{
1368 struct tty_struct *tty = tty_port_tty_get(&p->port);
1369 void __iomem *ofsAddr;
1370 unsigned int inited = tty_port_initialized(&p->port);
1371 u16 intr;
1372
1373 if (tty) {
1374 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1375 MoxaPortTxQueue(p) == 0) {
1376 clear_bit(EMPTYWAIT, &p->statusflags);
1377 tty_wakeup(tty);
1378 }
1379 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
1380 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1381 clear_bit(LOWWAIT, &p->statusflags);
1382 tty_wakeup(tty);
1383 }
1384
1385 if (inited && !tty_throttled(tty) &&
1386 MoxaPortRxQueue(p) > 0) { /* RX */
1387 MoxaPortReadData(p);
1388 tty_schedule_flip(&p->port);
1389 }
1390 } else {
1391 clear_bit(EMPTYWAIT, &p->statusflags);
1392 MoxaPortFlushData(p, 0); /* flush RX */
1393 }
1394
1395 if (!handle) /* nothing else to do */
1396 goto put;
1397
1398 intr = readw(ip); /* port irq status */
1399 if (intr == 0)
1400 goto put;
1401
1402 writew(0, ip); /* ACK port */
1403 ofsAddr = p->tableAddr;
1404 if (intr & IntrTx) /* disable tx intr */
1405 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1406 ofsAddr + HostStat);
1407
1408 if (!inited)
1409 goto put;
1410
1411 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1412 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1413 tty_schedule_flip(&p->port);
1414 }
1415
1416 if (intr & IntrLine)
1417 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1418put:
1419 tty_kref_put(tty);
1420
1421 return 0;
1422}
1423
1424static void moxa_poll(struct timer_list *unused)
1425{
1426 struct moxa_board_conf *brd;
1427 u16 __iomem *ip;
1428 unsigned int card, port, served = 0;
1429
1430 spin_lock(&moxa_lock);
1431 for (card = 0; card < MAX_BOARDS; card++) {
1432 brd = &moxa_boards[card];
1433 if (!brd->ready)
1434 continue;
1435
1436 served++;
1437
1438 ip = NULL;
1439 if (readb(brd->intPend) == 0xff)
1440 ip = brd->intTable + readb(brd->intNdx);
1441
1442 for (port = 0; port < brd->numPorts; port++)
1443 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1444
1445 if (ip)
1446 writeb(0, brd->intPend); /* ACK */
1447
1448 if (moxaLowWaterChk) {
1449 struct moxa_port *p = brd->ports;
1450 for (port = 0; port < brd->numPorts; port++, p++)
1451 if (p->lowChkFlag) {
1452 p->lowChkFlag = 0;
1453 moxa_low_water_check(p->tableAddr);
1454 }
1455 }
1456 }
1457 moxaLowWaterChk = 0;
1458
1459 if (served)
1460 mod_timer(&moxaTimer, jiffies + HZ / 50);
1461 spin_unlock(&moxa_lock);
1462}
1463
1464/******************************************************************************/
1465
1466static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1467{
1468 register struct ktermios *ts = &tty->termios;
1469 struct moxa_port *ch = tty->driver_data;
1470 int rts, cts, txflow, rxflow, xany, baud;
1471
1472 rts = cts = txflow = rxflow = xany = 0;
1473 if (ts->c_cflag & CRTSCTS)
1474 rts = cts = 1;
1475 if (ts->c_iflag & IXON)
1476 txflow = 1;
1477 if (ts->c_iflag & IXOFF)
1478 rxflow = 1;
1479 if (ts->c_iflag & IXANY)
1480 xany = 1;
1481
1482 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1483 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1484 if (baud == -1)
1485 baud = tty_termios_baud_rate(old_termios);
1486 /* Not put the baud rate into the termios data */
1487 tty_encode_baud_rate(tty, baud, baud);
1488}
1489
1490/*****************************************************************************
1491 * Driver level functions: *
1492 *****************************************************************************/
1493
1494static void MoxaPortFlushData(struct moxa_port *port, int mode)
1495{
1496 void __iomem *ofsAddr;
1497 if (mode < 0 || mode > 2)
1498 return;
1499 ofsAddr = port->tableAddr;
1500 moxafunc(ofsAddr, FC_FlushQueue, mode);
1501 if (mode != 1) {
1502 port->lowChkFlag = 0;
1503 moxa_low_water_check(ofsAddr);
1504 }
1505}
1506
1507/*
1508 * Moxa Port Number Description:
1509 *
1510 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1511 * the port number using in MOXA driver functions will be 0 to 31 for
1512 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1513 * to 127 for fourth. For example, if you setup three MOXA boards,
1514 * first board is C218, second board is C320-16 and third board is
1515 * C320-32. The port number of first board (C218 - 8 ports) is from
1516 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1517 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1518 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1519 * 127 will be invalid.
1520 *
1521 *
1522 * Moxa Functions Description:
1523 *
1524 * Function 1: Driver initialization routine, this routine must be
1525 * called when initialized driver.
1526 * Syntax:
1527 * void MoxaDriverInit();
1528 *
1529 *
1530 * Function 2: Moxa driver private IOCTL command processing.
1531 * Syntax:
1532 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1533 *
1534 * unsigned int cmd : IOCTL command
1535 * unsigned long arg : IOCTL argument
1536 * int port : port number (0 - 127)
1537 *
1538 * return: 0 (OK)
1539 * -EINVAL
1540 * -ENOIOCTLCMD
1541 *
1542 *
1543 * Function 6: Enable this port to start Tx/Rx data.
1544 * Syntax:
1545 * void MoxaPortEnable(int port);
1546 * int port : port number (0 - 127)
1547 *
1548 *
1549 * Function 7: Disable this port
1550 * Syntax:
1551 * void MoxaPortDisable(int port);
1552 * int port : port number (0 - 127)
1553 *
1554 *
1555 * Function 10: Setting baud rate of this port.
1556 * Syntax:
1557 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1558 * int port : port number (0 - 127)
1559 * long baud : baud rate (50 - 115200)
1560 *
1561 * return: 0 : this port is invalid or baud < 50
1562 * 50 - 115200 : the real baud rate set to the port, if
1563 * the argument baud is large than maximun
1564 * available baud rate, the real setting
1565 * baud rate will be the maximun baud rate.
1566 *
1567 *
1568 * Function 12: Configure the port.
1569 * Syntax:
1570 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1571 * int port : port number (0 - 127)
1572 * struct ktermios * termio : termio structure pointer
1573 * speed_t baud : baud rate
1574 *
1575 * return: -1 : this port is invalid or termio == NULL
1576 * 0 : setting O.K.
1577 *
1578 *
1579 * Function 13: Get the DTR/RTS state of this port.
1580 * Syntax:
1581 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1582 * int port : port number (0 - 127)
1583 * int * dtrState : pointer to INT to receive the current DTR
1584 * state. (if NULL, this function will not
1585 * write to this address)
1586 * int * rtsState : pointer to INT to receive the current RTS
1587 * state. (if NULL, this function will not
1588 * write to this address)
1589 *
1590 * return: -1 : this port is invalid
1591 * 0 : O.K.
1592 *
1593 *
1594 * Function 14: Setting the DTR/RTS output state of this port.
1595 * Syntax:
1596 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1597 * int port : port number (0 - 127)
1598 * int dtrState : DTR output state (0: off, 1: on)
1599 * int rtsState : RTS output state (0: off, 1: on)
1600 *
1601 *
1602 * Function 15: Setting the flow control of this port.
1603 * Syntax:
1604 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1605 * int txFlow,int xany);
1606 * int port : port number (0 - 127)
1607 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1608 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1609 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1610 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1611 * int xany : S/W XANY flow control (0: no, 1: yes)
1612 *
1613 *
1614 * Function 16: Get ths line status of this port
1615 * Syntax:
1616 * int MoxaPortLineStatus(int port);
1617 * int port : port number (0 - 127)
1618 *
1619 * return: Bit 0 - CTS state (0: off, 1: on)
1620 * Bit 1 - DSR state (0: off, 1: on)
1621 * Bit 2 - DCD state (0: off, 1: on)
1622 *
1623 *
1624 * Function 19: Flush the Rx/Tx buffer data of this port.
1625 * Syntax:
1626 * void MoxaPortFlushData(int port, int mode);
1627 * int port : port number (0 - 127)
1628 * int mode
1629 * 0 : flush the Rx buffer
1630 * 1 : flush the Tx buffer
1631 * 2 : flush the Rx and Tx buffer
1632 *
1633 *
1634 * Function 20: Write data.
1635 * Syntax:
1636 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1637 * int port : port number (0 - 127)
1638 * unsigned char * buffer : pointer to write data buffer.
1639 * int length : write data length
1640 *
1641 * return: 0 - length : real write data length
1642 *
1643 *
1644 * Function 21: Read data.
1645 * Syntax:
1646 * int MoxaPortReadData(int port, struct tty_struct *tty);
1647 * int port : port number (0 - 127)
1648 * struct tty_struct *tty : tty for data
1649 *
1650 * return: 0 - length : real read data length
1651 *
1652 *
1653 * Function 24: Get the Tx buffer current queued data bytes
1654 * Syntax:
1655 * int MoxaPortTxQueue(int port);
1656 * int port : port number (0 - 127)
1657 *
1658 * return: .. : Tx buffer current queued data bytes
1659 *
1660 *
1661 * Function 25: Get the Tx buffer current free space
1662 * Syntax:
1663 * int MoxaPortTxFree(int port);
1664 * int port : port number (0 - 127)
1665 *
1666 * return: .. : Tx buffer current free space
1667 *
1668 *
1669 * Function 26: Get the Rx buffer current queued data bytes
1670 * Syntax:
1671 * int MoxaPortRxQueue(int port);
1672 * int port : port number (0 - 127)
1673 *
1674 * return: .. : Rx buffer current queued data bytes
1675 *
1676 *
1677 * Function 28: Disable port data transmission.
1678 * Syntax:
1679 * void MoxaPortTxDisable(int port);
1680 * int port : port number (0 - 127)
1681 *
1682 *
1683 * Function 29: Enable port data transmission.
1684 * Syntax:
1685 * void MoxaPortTxEnable(int port);
1686 * int port : port number (0 - 127)
1687 *
1688 *
1689 * Function 31: Get the received BREAK signal count and reset it.
1690 * Syntax:
1691 * int MoxaPortResetBrkCnt(int port);
1692 * int port : port number (0 - 127)
1693 *
1694 * return: 0 - .. : BREAK signal count
1695 *
1696 *
1697 */
1698
1699static void MoxaPortEnable(struct moxa_port *port)
1700{
1701 void __iomem *ofsAddr;
1702 u16 lowwater = 512;
1703
1704 ofsAddr = port->tableAddr;
1705 writew(lowwater, ofsAddr + Low_water);
1706 if (MOXA_IS_320(port->board))
1707 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1708 else
1709 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1710 ofsAddr + HostStat);
1711
1712 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1713 moxafunc(ofsAddr, FC_FlushQueue, 2);
1714
1715 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1716 MoxaPortLineStatus(port);
1717}
1718
1719static void MoxaPortDisable(struct moxa_port *port)
1720{
1721 void __iomem *ofsAddr = port->tableAddr;
1722
1723 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1724 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1725 writew(0, ofsAddr + HostStat);
1726 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1727}
1728
1729static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1730{
1731 void __iomem *ofsAddr = port->tableAddr;
1732 unsigned int clock, val;
1733 speed_t max;
1734
1735 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1736 if (baud < 50)
1737 return 0;
1738 if (baud > max)
1739 baud = max;
1740 clock = 921600;
1741 val = clock / baud;
1742 moxafunc(ofsAddr, FC_SetBaud, val);
1743 baud = clock / val;
1744 return baud;
1745}
1746
1747static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1748 speed_t baud)
1749{
1750 void __iomem *ofsAddr;
1751 tcflag_t mode = 0;
1752
1753 ofsAddr = port->tableAddr;
1754
1755 mode = termio->c_cflag & CSIZE;
1756 if (mode == CS5)
1757 mode = MX_CS5;
1758 else if (mode == CS6)
1759 mode = MX_CS6;
1760 else if (mode == CS7)
1761 mode = MX_CS7;
1762 else if (mode == CS8)
1763 mode = MX_CS8;
1764
1765 if (termio->c_cflag & CSTOPB) {
1766 if (mode == MX_CS5)
1767 mode |= MX_STOP15;
1768 else
1769 mode |= MX_STOP2;
1770 } else
1771 mode |= MX_STOP1;
1772
1773 if (termio->c_cflag & PARENB) {
1774 if (termio->c_cflag & PARODD) {
1775 if (termio->c_cflag & CMSPAR)
1776 mode |= MX_PARMARK;
1777 else
1778 mode |= MX_PARODD;
1779 } else {
1780 if (termio->c_cflag & CMSPAR)
1781 mode |= MX_PARSPACE;
1782 else
1783 mode |= MX_PAREVEN;
1784 }
1785 } else
1786 mode |= MX_PARNONE;
1787
1788 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1789
1790 if (MOXA_IS_320(port->board) && baud >= 921600)
1791 return -1;
1792
1793 baud = MoxaPortSetBaud(port, baud);
1794
1795 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
1796 spin_lock_irq(&moxafunc_lock);
1797 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1798 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1799 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
1800 moxa_wait_finish(ofsAddr);
1801 spin_unlock_irq(&moxafunc_lock);
1802
1803 }
1804 return baud;
1805}
1806
1807static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1808 int *rtsState)
1809{
1810 if (dtrState)
1811 *dtrState = !!(port->lineCtrl & DTR_ON);
1812 if (rtsState)
1813 *rtsState = !!(port->lineCtrl & RTS_ON);
1814
1815 return 0;
1816}
1817
1818static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1819{
1820 u8 mode = 0;
1821
1822 if (dtr)
1823 mode |= DTR_ON;
1824 if (rts)
1825 mode |= RTS_ON;
1826 port->lineCtrl = mode;
1827 moxafunc(port->tableAddr, FC_LineControl, mode);
1828}
1829
1830static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1831 int txflow, int rxflow, int txany)
1832{
1833 int mode = 0;
1834
1835 if (rts)
1836 mode |= RTS_FlowCtl;
1837 if (cts)
1838 mode |= CTS_FlowCtl;
1839 if (txflow)
1840 mode |= Tx_FlowCtl;
1841 if (rxflow)
1842 mode |= Rx_FlowCtl;
1843 if (txany)
1844 mode |= IXM_IXANY;
1845 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1846}
1847
1848static int MoxaPortLineStatus(struct moxa_port *port)
1849{
1850 void __iomem *ofsAddr;
1851 int val;
1852
1853 ofsAddr = port->tableAddr;
1854 if (MOXA_IS_320(port->board))
1855 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1856 else
1857 val = readw(ofsAddr + FlagStat) >> 4;
1858 val &= 0x0B;
1859 if (val & 8)
1860 val |= 4;
1861 moxa_new_dcdstate(port, val & 8);
1862 val &= 7;
1863 return val;
1864}
1865
1866static int MoxaPortWriteData(struct tty_struct *tty,
1867 const unsigned char *buffer, int len)
1868{
1869 struct moxa_port *port = tty->driver_data;
1870 void __iomem *baseAddr, *ofsAddr, *ofs;
1871 unsigned int c, total;
1872 u16 head, tail, tx_mask, spage, epage;
1873 u16 pageno, pageofs, bufhead;
1874
1875 ofsAddr = port->tableAddr;
1876 baseAddr = port->board->basemem;
1877 tx_mask = readw(ofsAddr + TX_mask);
1878 spage = readw(ofsAddr + Page_txb);
1879 epage = readw(ofsAddr + EndPage_txb);
1880 tail = readw(ofsAddr + TXwptr);
1881 head = readw(ofsAddr + TXrptr);
1882 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1883 if (c > len)
1884 c = len;
1885 moxaLog.txcnt[port->port.tty->index] += c;
1886 total = c;
1887 if (spage == epage) {
1888 bufhead = readw(ofsAddr + Ofs_txb);
1889 writew(spage, baseAddr + Control_reg);
1890 while (c > 0) {
1891 if (head > tail)
1892 len = head - tail - 1;
1893 else
1894 len = tx_mask + 1 - tail;
1895 len = (c > len) ? len : c;
1896 ofs = baseAddr + DynPage_addr + bufhead + tail;
1897 memcpy_toio(ofs, buffer, len);
1898 buffer += len;
1899 tail = (tail + len) & tx_mask;
1900 c -= len;
1901 }
1902 } else {
1903 pageno = spage + (tail >> 13);
1904 pageofs = tail & Page_mask;
1905 while (c > 0) {
1906 len = Page_size - pageofs;
1907 if (len > c)
1908 len = c;
1909 writeb(pageno, baseAddr + Control_reg);
1910 ofs = baseAddr + DynPage_addr + pageofs;
1911 memcpy_toio(ofs, buffer, len);
1912 buffer += len;
1913 if (++pageno == epage)
1914 pageno = spage;
1915 pageofs = 0;
1916 c -= len;
1917 }
1918 tail = (tail + total) & tx_mask;
1919 }
1920 writew(tail, ofsAddr + TXwptr);
1921 writeb(1, ofsAddr + CD180TXirq); /* start to send */
1922 return total;
1923}
1924
1925static int MoxaPortReadData(struct moxa_port *port)
1926{
1927 struct tty_struct *tty = port->port.tty;
1928 unsigned char *dst;
1929 void __iomem *baseAddr, *ofsAddr, *ofs;
1930 unsigned int count, len, total;
1931 u16 tail, rx_mask, spage, epage;
1932 u16 pageno, pageofs, bufhead, head;
1933
1934 ofsAddr = port->tableAddr;
1935 baseAddr = port->board->basemem;
1936 head = readw(ofsAddr + RXrptr);
1937 tail = readw(ofsAddr + RXwptr);
1938 rx_mask = readw(ofsAddr + RX_mask);
1939 spage = readw(ofsAddr + Page_rxb);
1940 epage = readw(ofsAddr + EndPage_rxb);
1941 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1942 if (count == 0)
1943 return 0;
1944
1945 total = count;
1946 moxaLog.rxcnt[tty->index] += total;
1947 if (spage == epage) {
1948 bufhead = readw(ofsAddr + Ofs_rxb);
1949 writew(spage, baseAddr + Control_reg);
1950 while (count > 0) {
1951 ofs = baseAddr + DynPage_addr + bufhead + head;
1952 len = (tail >= head) ? (tail - head) :
1953 (rx_mask + 1 - head);
1954 len = tty_prepare_flip_string(&port->port, &dst,
1955 min(len, count));
1956 memcpy_fromio(dst, ofs, len);
1957 head = (head + len) & rx_mask;
1958 count -= len;
1959 }
1960 } else {
1961 pageno = spage + (head >> 13);
1962 pageofs = head & Page_mask;
1963 while (count > 0) {
1964 writew(pageno, baseAddr + Control_reg);
1965 ofs = baseAddr + DynPage_addr + pageofs;
1966 len = tty_prepare_flip_string(&port->port, &dst,
1967 min(Page_size - pageofs, count));
1968 memcpy_fromio(dst, ofs, len);
1969
1970 count -= len;
1971 pageofs = (pageofs + len) & Page_mask;
1972 if (pageofs == 0 && ++pageno == epage)
1973 pageno = spage;
1974 }
1975 head = (head + total) & rx_mask;
1976 }
1977 writew(head, ofsAddr + RXrptr);
1978 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1979 moxaLowWaterChk = 1;
1980 port->lowChkFlag = 1;
1981 }
1982 return total;
1983}
1984
1985
1986static int MoxaPortTxQueue(struct moxa_port *port)
1987{
1988 void __iomem *ofsAddr = port->tableAddr;
1989 u16 rptr, wptr, mask;
1990
1991 rptr = readw(ofsAddr + TXrptr);
1992 wptr = readw(ofsAddr + TXwptr);
1993 mask = readw(ofsAddr + TX_mask);
1994 return (wptr - rptr) & mask;
1995}
1996
1997static int MoxaPortTxFree(struct moxa_port *port)
1998{
1999 void __iomem *ofsAddr = port->tableAddr;
2000 u16 rptr, wptr, mask;
2001
2002 rptr = readw(ofsAddr + TXrptr);
2003 wptr = readw(ofsAddr + TXwptr);
2004 mask = readw(ofsAddr + TX_mask);
2005 return mask - ((wptr - rptr) & mask);
2006}
2007
2008static int MoxaPortRxQueue(struct moxa_port *port)
2009{
2010 void __iomem *ofsAddr = port->tableAddr;
2011 u16 rptr, wptr, mask;
2012
2013 rptr = readw(ofsAddr + RXrptr);
2014 wptr = readw(ofsAddr + RXwptr);
2015 mask = readw(ofsAddr + RX_mask);
2016 return (wptr - rptr) & mask;
2017}
2018
2019static void MoxaPortTxDisable(struct moxa_port *port)
2020{
2021 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2022}
2023
2024static void MoxaPortTxEnable(struct moxa_port *port)
2025{
2026 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2027}
2028
2029static int moxa_get_serial_info(struct tty_struct *tty,
2030 struct serial_struct *ss)
2031{
2032 struct moxa_port *info = tty->driver_data;
2033
2034 if (tty->index == MAX_PORTS)
2035 return -EINVAL;
2036 if (!info)
2037 return -ENODEV;
2038 mutex_lock(&info->port.mutex);
2039 ss->type = info->type,
2040 ss->line = info->port.tty->index,
2041 ss->flags = info->port.flags,
2042 ss->baud_base = 921600,
2043 ss->close_delay = info->port.close_delay;
2044 mutex_unlock(&info->port.mutex);
2045 return 0;
2046}
2047
2048
2049static int moxa_set_serial_info(struct tty_struct *tty,
2050 struct serial_struct *ss)
2051{
2052 struct moxa_port *info = tty->driver_data;
2053
2054 if (tty->index == MAX_PORTS)
2055 return -EINVAL;
2056 if (!info)
2057 return -ENODEV;
2058
2059 if (ss->irq != 0 || ss->port != 0 ||
2060 ss->custom_divisor != 0 ||
2061 ss->baud_base != 921600)
2062 return -EPERM;
2063
2064 mutex_lock(&info->port.mutex);
2065 if (!capable(CAP_SYS_ADMIN)) {
2066 if (((ss->flags & ~ASYNC_USR_MASK) !=
2067 (info->port.flags & ~ASYNC_USR_MASK))) {
2068 mutex_unlock(&info->port.mutex);
2069 return -EPERM;
2070 }
2071 }
2072 info->port.close_delay = ss->close_delay * HZ / 100;
2073
2074 MoxaSetFifo(info, ss->type == PORT_16550A);
2075
2076 info->type = ss->type;
2077 mutex_unlock(&info->port.mutex);
2078 return 0;
2079}
2080
2081
2082
2083/*****************************************************************************
2084 * Static local functions: *
2085 *****************************************************************************/
2086
2087static void MoxaSetFifo(struct moxa_port *port, int enable)
2088{
2089 void __iomem *ofsAddr = port->tableAddr;
2090
2091 if (!enable) {
2092 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2093 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2094 } else {
2095 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2096 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2097 }
2098}
1// SPDX-License-Identifier: GPL-2.0+
2/*****************************************************************************/
3/*
4 * moxa.c -- MOXA Intellio family multiport serial driver.
5 *
6 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
7 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 */
12
13/*
14 * MOXA Intellio Series Driver
15 * for : LINUX
16 * date : 1999/1/7
17 * version : 5.1
18 */
19
20#include <linux/module.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/ioport.h>
24#include <linux/errno.h>
25#include <linux/firmware.h>
26#include <linux/signal.h>
27#include <linux/sched.h>
28#include <linux/timer.h>
29#include <linux/interrupt.h>
30#include <linux/tty.h>
31#include <linux/tty_flip.h>
32#include <linux/major.h>
33#include <linux/string.h>
34#include <linux/fcntl.h>
35#include <linux/ptrace.h>
36#include <linux/serial.h>
37#include <linux/tty_driver.h>
38#include <linux/delay.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/bitops.h>
42#include <linux/slab.h>
43#include <linux/ratelimit.h>
44
45#include <asm/io.h>
46#include <linux/uaccess.h>
47
48#define MOXA 0x400
49#define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */
50#define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */
51#define MOXA_GETDATACOUNT (MOXA + 23)
52#define MOXA_GET_IOQUEUE (MOXA + 27)
53#define MOXA_FLUSH_QUEUE (MOXA + 28)
54#define MOXA_GETMSTATUS (MOXA + 65)
55
56/*
57 * System Configuration
58 */
59
60#define Magic_code 0x404
61
62/*
63 * for C218 BIOS initialization
64 */
65#define C218_ConfBase 0x800
66#define C218_status (C218_ConfBase + 0) /* BIOS running status */
67#define C218_diag (C218_ConfBase + 2) /* diagnostic status */
68#define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
69#define C218DLoad_len (C218_ConfBase + 6) /* WORD */
70#define C218check_sum (C218_ConfBase + 8) /* BYTE */
71#define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
72#define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
73#define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
74#define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
75#define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
76
77#define C218_LoadBuf 0x0F00
78#define C218_KeyCode 0x218
79#define CP204J_KeyCode 0x204
80
81/*
82 * for C320 BIOS initialization
83 */
84#define C320_ConfBase 0x800
85#define C320_LoadBuf 0x0f00
86#define STS_init 0x05 /* for C320_status */
87
88#define C320_status C320_ConfBase + 0 /* BIOS running status */
89#define C320_diag C320_ConfBase + 2 /* diagnostic status */
90#define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */
91#define C320DLoad_len C320_ConfBase + 6 /* WORD */
92#define C320check_sum C320_ConfBase + 8 /* WORD */
93#define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */
94#define C320bapi_len C320_ConfBase + 0x0c /* WORD */
95#define C320UART_no C320_ConfBase + 0x0e /* WORD */
96
97#define C320_KeyCode 0x320
98
99#define FixPage_addr 0x0000 /* starting addr of static page */
100#define DynPage_addr 0x2000 /* starting addr of dynamic page */
101#define C218_start 0x3000 /* starting addr of C218 BIOS prg */
102#define Control_reg 0x1ff0 /* select page and reset control */
103#define HW_reset 0x80
104
105/*
106 * Function Codes
107 */
108#define FC_CardReset 0x80
109#define FC_ChannelReset 1 /* C320 firmware not supported */
110#define FC_EnableCH 2
111#define FC_DisableCH 3
112#define FC_SetParam 4
113#define FC_SetMode 5
114#define FC_SetRate 6
115#define FC_LineControl 7
116#define FC_LineStatus 8
117#define FC_XmitControl 9
118#define FC_FlushQueue 10
119#define FC_SendBreak 11
120#define FC_StopBreak 12
121#define FC_LoopbackON 13
122#define FC_LoopbackOFF 14
123#define FC_ClrIrqTable 15
124#define FC_SendXon 16
125#define FC_SetTermIrq 17 /* C320 firmware not supported */
126#define FC_SetCntIrq 18 /* C320 firmware not supported */
127#define FC_SetBreakIrq 19
128#define FC_SetLineIrq 20
129#define FC_SetFlowCtl 21
130#define FC_GenIrq 22
131#define FC_InCD180 23
132#define FC_OutCD180 24
133#define FC_InUARTreg 23
134#define FC_OutUARTreg 24
135#define FC_SetXonXoff 25
136#define FC_OutCD180CCR 26
137#define FC_ExtIQueue 27
138#define FC_ExtOQueue 28
139#define FC_ClrLineIrq 29
140#define FC_HWFlowCtl 30
141#define FC_GetClockRate 35
142#define FC_SetBaud 36
143#define FC_SetDataMode 41
144#define FC_GetCCSR 43
145#define FC_GetDataError 45
146#define FC_RxControl 50
147#define FC_ImmSend 51
148#define FC_SetXonState 52
149#define FC_SetXoffState 53
150#define FC_SetRxFIFOTrig 54
151#define FC_SetTxFIFOCnt 55
152#define FC_UnixRate 56
153#define FC_UnixResetTimer 57
154
155#define RxFIFOTrig1 0
156#define RxFIFOTrig4 1
157#define RxFIFOTrig8 2
158#define RxFIFOTrig14 3
159
160/*
161 * Dual-Ported RAM
162 */
163#define DRAM_global 0
164#define INT_data (DRAM_global + 0)
165#define Config_base (DRAM_global + 0x108)
166
167#define IRQindex (INT_data + 0)
168#define IRQpending (INT_data + 4)
169#define IRQtable (INT_data + 8)
170
171/*
172 * Interrupt Status
173 */
174#define IntrRx 0x01 /* receiver data O.K. */
175#define IntrTx 0x02 /* transmit buffer empty */
176#define IntrFunc 0x04 /* function complete */
177#define IntrBreak 0x08 /* received break */
178#define IntrLine 0x10 /* line status change
179 for transmitter */
180#define IntrIntr 0x20 /* received INTR code */
181#define IntrQuit 0x40 /* received QUIT code */
182#define IntrEOF 0x80 /* received EOF code */
183
184#define IntrRxTrigger 0x100 /* rx data count reach trigger value */
185#define IntrTxTrigger 0x200 /* tx data count below trigger value */
186
187#define Magic_no (Config_base + 0)
188#define Card_model_no (Config_base + 2)
189#define Total_ports (Config_base + 4)
190#define Module_cnt (Config_base + 8)
191#define Module_no (Config_base + 10)
192#define Timer_10ms (Config_base + 14)
193#define Disable_IRQ (Config_base + 20)
194#define TMS320_PORT1 (Config_base + 22)
195#define TMS320_PORT2 (Config_base + 24)
196#define TMS320_CLOCK (Config_base + 26)
197
198/*
199 * DATA BUFFER in DRAM
200 */
201#define Extern_table 0x400 /* Base address of the external table
202 (24 words * 64) total 3K bytes
203 (24 words * 128) total 6K bytes */
204#define Extern_size 0x60 /* 96 bytes */
205#define RXrptr 0x00 /* read pointer for RX buffer */
206#define RXwptr 0x02 /* write pointer for RX buffer */
207#define TXrptr 0x04 /* read pointer for TX buffer */
208#define TXwptr 0x06 /* write pointer for TX buffer */
209#define HostStat 0x08 /* IRQ flag and general flag */
210#define FlagStat 0x0A
211#define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */
212 /* x x x x | | | | */
213 /* | | | + CTS flow */
214 /* | | +--- RTS flow */
215 /* | +------ TX Xon/Xoff */
216 /* +--------- RX Xon/Xoff */
217#define Break_cnt 0x0E /* received break count */
218#define CD180TXirq 0x10 /* if non-0: enable TX irq */
219#define RX_mask 0x12
220#define TX_mask 0x14
221#define Ofs_rxb 0x16
222#define Ofs_txb 0x18
223#define Page_rxb 0x1A
224#define Page_txb 0x1C
225#define EndPage_rxb 0x1E
226#define EndPage_txb 0x20
227#define Data_error 0x22
228#define RxTrigger 0x28
229#define TxTrigger 0x2a
230
231#define rRXwptr 0x34
232#define Low_water 0x36
233
234#define FuncCode 0x40
235#define FuncArg 0x42
236#define FuncArg1 0x44
237
238#define C218rx_size 0x2000 /* 8K bytes */
239#define C218tx_size 0x8000 /* 32K bytes */
240
241#define C218rx_mask (C218rx_size - 1)
242#define C218tx_mask (C218tx_size - 1)
243
244#define C320p8rx_size 0x2000
245#define C320p8tx_size 0x8000
246#define C320p8rx_mask (C320p8rx_size - 1)
247#define C320p8tx_mask (C320p8tx_size - 1)
248
249#define C320p16rx_size 0x2000
250#define C320p16tx_size 0x4000
251#define C320p16rx_mask (C320p16rx_size - 1)
252#define C320p16tx_mask (C320p16tx_size - 1)
253
254#define C320p24rx_size 0x2000
255#define C320p24tx_size 0x2000
256#define C320p24rx_mask (C320p24rx_size - 1)
257#define C320p24tx_mask (C320p24tx_size - 1)
258
259#define C320p32rx_size 0x1000
260#define C320p32tx_size 0x1000
261#define C320p32rx_mask (C320p32rx_size - 1)
262#define C320p32tx_mask (C320p32tx_size - 1)
263
264#define Page_size 0x2000U
265#define Page_mask (Page_size - 1)
266#define C218rx_spage 3
267#define C218tx_spage 4
268#define C218rx_pageno 1
269#define C218tx_pageno 4
270#define C218buf_pageno 5
271
272#define C320p8rx_spage 3
273#define C320p8tx_spage 4
274#define C320p8rx_pgno 1
275#define C320p8tx_pgno 4
276#define C320p8buf_pgno 5
277
278#define C320p16rx_spage 3
279#define C320p16tx_spage 4
280#define C320p16rx_pgno 1
281#define C320p16tx_pgno 2
282#define C320p16buf_pgno 3
283
284#define C320p24rx_spage 3
285#define C320p24tx_spage 4
286#define C320p24rx_pgno 1
287#define C320p24tx_pgno 1
288#define C320p24buf_pgno 2
289
290#define C320p32rx_spage 3
291#define C320p32tx_ofs C320p32rx_size
292#define C320p32tx_spage 3
293#define C320p32buf_pgno 1
294
295/*
296 * Host Status
297 */
298#define WakeupRx 0x01
299#define WakeupTx 0x02
300#define WakeupBreak 0x08
301#define WakeupLine 0x10
302#define WakeupIntr 0x20
303#define WakeupQuit 0x40
304#define WakeupEOF 0x80 /* used in VTIME control */
305#define WakeupRxTrigger 0x100
306#define WakeupTxTrigger 0x200
307/*
308 * Flag status
309 */
310#define Rx_over 0x01
311#define Xoff_state 0x02
312#define Tx_flowOff 0x04
313#define Tx_enable 0x08
314#define CTS_state 0x10
315#define DSR_state 0x20
316#define DCD_state 0x80
317/*
318 * FlowControl
319 */
320#define CTS_FlowCtl 1
321#define RTS_FlowCtl 2
322#define Tx_FlowCtl 4
323#define Rx_FlowCtl 8
324#define IXM_IXANY 0x10
325
326#define LowWater 128
327
328#define DTR_ON 1
329#define RTS_ON 2
330#define CTS_ON 1
331#define DSR_ON 2
332#define DCD_ON 8
333
334/* mode definition */
335#define MX_CS8 0x03
336#define MX_CS7 0x02
337#define MX_CS6 0x01
338#define MX_CS5 0x00
339
340#define MX_STOP1 0x00
341#define MX_STOP15 0x04
342#define MX_STOP2 0x08
343
344#define MX_PARNONE 0x00
345#define MX_PAREVEN 0x40
346#define MX_PARODD 0xC0
347#define MX_PARMARK 0xA0
348#define MX_PARSPACE 0x20
349
350#define MOXA_VERSION "6.0k"
351
352#define MOXA_FW_HDRLEN 32
353
354#define MOXAMAJOR 172
355
356#define MAX_BOARDS 4 /* Don't change this value */
357#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
358#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
359
360#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
361 (brd)->boardType == MOXA_BOARD_C320_PCI)
362
363/*
364 * Define the Moxa PCI vendor and device IDs.
365 */
366#define MOXA_BUS_TYPE_ISA 0
367#define MOXA_BUS_TYPE_PCI 1
368
369enum {
370 MOXA_BOARD_C218_PCI = 1,
371 MOXA_BOARD_C218_ISA,
372 MOXA_BOARD_C320_PCI,
373 MOXA_BOARD_C320_ISA,
374 MOXA_BOARD_CP204J,
375};
376
377static char *moxa_brdname[] =
378{
379 "C218 Turbo PCI series",
380 "C218 Turbo ISA series",
381 "C320 Turbo PCI series",
382 "C320 Turbo ISA series",
383 "CP-204J series",
384};
385
386#ifdef CONFIG_PCI
387static const struct pci_device_id moxa_pcibrds[] = {
388 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
389 .driver_data = MOXA_BOARD_C218_PCI },
390 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
391 .driver_data = MOXA_BOARD_C320_PCI },
392 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
393 .driver_data = MOXA_BOARD_CP204J },
394 { 0 }
395};
396MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
397#endif /* CONFIG_PCI */
398
399struct moxa_port;
400
401static struct moxa_board_conf {
402 int boardType;
403 int numPorts;
404 int busType;
405
406 unsigned int ready;
407
408 struct moxa_port *ports;
409
410 void __iomem *basemem;
411 void __iomem *intNdx;
412 void __iomem *intPend;
413 void __iomem *intTable;
414} moxa_boards[MAX_BOARDS];
415
416struct mxser_mstatus {
417 tcflag_t cflag;
418 int cts;
419 int dsr;
420 int ri;
421 int dcd;
422};
423
424struct moxaq_str {
425 int inq;
426 int outq;
427};
428
429struct moxa_port {
430 struct tty_port port;
431 struct moxa_board_conf *board;
432 void __iomem *tableAddr;
433
434 int type;
435 int cflag;
436 unsigned long statusflags;
437
438 u8 DCDState; /* Protected by the port lock */
439 u8 lineCtrl;
440 u8 lowChkFlag;
441};
442
443struct mon_str {
444 int tick;
445 int rxcnt[MAX_PORTS];
446 int txcnt[MAX_PORTS];
447};
448
449/* statusflags */
450#define TXSTOPPED 1
451#define LOWWAIT 2
452#define EMPTYWAIT 3
453
454
455#define WAKEUP_CHARS 256
456
457static int ttymajor = MOXAMAJOR;
458static struct mon_str moxaLog;
459static unsigned int moxaFuncTout = HZ / 2;
460static unsigned int moxaLowWaterChk;
461static DEFINE_MUTEX(moxa_openlock);
462static DEFINE_SPINLOCK(moxa_lock);
463
464static unsigned long baseaddr[MAX_BOARDS];
465static unsigned int type[MAX_BOARDS];
466static unsigned int numports[MAX_BOARDS];
467static struct tty_port moxa_service_port;
468
469MODULE_AUTHOR("William Chen");
470MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
471MODULE_LICENSE("GPL");
472MODULE_FIRMWARE("c218tunx.cod");
473MODULE_FIRMWARE("cp204unx.cod");
474MODULE_FIRMWARE("c320tunx.cod");
475
476module_param_array(type, uint, NULL, 0);
477MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
478module_param_hw_array(baseaddr, ulong, ioport, NULL, 0);
479MODULE_PARM_DESC(baseaddr, "base address");
480module_param_array(numports, uint, NULL, 0);
481MODULE_PARM_DESC(numports, "numports (ignored for C218)");
482
483module_param(ttymajor, int, 0);
484
485/*
486 * static functions:
487 */
488static int moxa_open(struct tty_struct *, struct file *);
489static void moxa_close(struct tty_struct *, struct file *);
490static int moxa_write(struct tty_struct *, const unsigned char *, int);
491static unsigned int moxa_write_room(struct tty_struct *);
492static void moxa_flush_buffer(struct tty_struct *);
493static unsigned int moxa_chars_in_buffer(struct tty_struct *);
494static void moxa_set_termios(struct tty_struct *, const struct ktermios *);
495static void moxa_stop(struct tty_struct *);
496static void moxa_start(struct tty_struct *);
497static void moxa_hangup(struct tty_struct *);
498static int moxa_tiocmget(struct tty_struct *tty);
499static int moxa_tiocmset(struct tty_struct *tty,
500 unsigned int set, unsigned int clear);
501static void moxa_poll(struct timer_list *);
502static void moxa_set_tty_param(struct tty_struct *, const struct ktermios *);
503static void moxa_shutdown(struct tty_port *);
504static int moxa_carrier_raised(struct tty_port *);
505static void moxa_dtr_rts(struct tty_port *, int);
506/*
507 * moxa board interface functions:
508 */
509static void MoxaPortEnable(struct moxa_port *);
510static void MoxaPortDisable(struct moxa_port *);
511static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
512static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
513static void MoxaPortLineCtrl(struct moxa_port *, int, int);
514static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
515static int MoxaPortLineStatus(struct moxa_port *);
516static void MoxaPortFlushData(struct moxa_port *, int);
517static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
518static int MoxaPortReadData(struct moxa_port *);
519static unsigned int MoxaPortTxQueue(struct moxa_port *);
520static int MoxaPortRxQueue(struct moxa_port *);
521static unsigned int MoxaPortTxFree(struct moxa_port *);
522static void MoxaPortTxDisable(struct moxa_port *);
523static void MoxaPortTxEnable(struct moxa_port *);
524static int moxa_get_serial_info(struct tty_struct *, struct serial_struct *);
525static int moxa_set_serial_info(struct tty_struct *, struct serial_struct *);
526static void MoxaSetFifo(struct moxa_port *port, int enable);
527
528/*
529 * I/O functions
530 */
531
532static DEFINE_SPINLOCK(moxafunc_lock);
533
534static void moxa_wait_finish(void __iomem *ofsAddr)
535{
536 unsigned long end = jiffies + moxaFuncTout;
537
538 while (readw(ofsAddr + FuncCode) != 0)
539 if (time_after(jiffies, end))
540 return;
541 if (readw(ofsAddr + FuncCode) != 0)
542 printk_ratelimited(KERN_WARNING "moxa function expired\n");
543}
544
545static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
546{
547 unsigned long flags;
548 spin_lock_irqsave(&moxafunc_lock, flags);
549 writew(arg, ofsAddr + FuncArg);
550 writew(cmd, ofsAddr + FuncCode);
551 moxa_wait_finish(ofsAddr);
552 spin_unlock_irqrestore(&moxafunc_lock, flags);
553}
554
555static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
556{
557 unsigned long flags;
558 u16 ret;
559 spin_lock_irqsave(&moxafunc_lock, flags);
560 writew(arg, ofsAddr + FuncArg);
561 writew(cmd, ofsAddr + FuncCode);
562 moxa_wait_finish(ofsAddr);
563 ret = readw(ofsAddr + FuncArg);
564 spin_unlock_irqrestore(&moxafunc_lock, flags);
565 return ret;
566}
567
568static void moxa_low_water_check(void __iomem *ofsAddr)
569{
570 u16 rptr, wptr, mask, len;
571
572 if (readb(ofsAddr + FlagStat) & Xoff_state) {
573 rptr = readw(ofsAddr + RXrptr);
574 wptr = readw(ofsAddr + RXwptr);
575 mask = readw(ofsAddr + RX_mask);
576 len = (wptr - rptr) & mask;
577 if (len <= Low_water)
578 moxafunc(ofsAddr, FC_SendXon, 0);
579 }
580}
581
582/*
583 * TTY operations
584 */
585
586static int moxa_ioctl(struct tty_struct *tty,
587 unsigned int cmd, unsigned long arg)
588{
589 struct moxa_port *ch = tty->driver_data;
590 void __user *argp = (void __user *)arg;
591 int status, ret = 0;
592
593 if (tty->index == MAX_PORTS) {
594 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
595 cmd != MOXA_GETMSTATUS)
596 return -EINVAL;
597 } else if (!ch)
598 return -ENODEV;
599
600 switch (cmd) {
601 case MOXA_GETDATACOUNT:
602 moxaLog.tick = jiffies;
603 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
604 ret = -EFAULT;
605 break;
606 case MOXA_FLUSH_QUEUE:
607 MoxaPortFlushData(ch, arg);
608 break;
609 case MOXA_GET_IOQUEUE: {
610 struct moxaq_str __user *argm = argp;
611 struct moxaq_str tmp;
612 struct moxa_port *p;
613 unsigned int i, j;
614
615 for (i = 0; i < MAX_BOARDS; i++) {
616 p = moxa_boards[i].ports;
617 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
618 memset(&tmp, 0, sizeof(tmp));
619 spin_lock_bh(&moxa_lock);
620 if (moxa_boards[i].ready) {
621 tmp.inq = MoxaPortRxQueue(p);
622 tmp.outq = MoxaPortTxQueue(p);
623 }
624 spin_unlock_bh(&moxa_lock);
625 if (copy_to_user(argm, &tmp, sizeof(tmp)))
626 return -EFAULT;
627 }
628 }
629 break;
630 } case MOXA_GET_OQUEUE:
631 status = MoxaPortTxQueue(ch);
632 ret = put_user(status, (unsigned long __user *)argp);
633 break;
634 case MOXA_GET_IQUEUE:
635 status = MoxaPortRxQueue(ch);
636 ret = put_user(status, (unsigned long __user *)argp);
637 break;
638 case MOXA_GETMSTATUS: {
639 struct mxser_mstatus __user *argm = argp;
640 struct mxser_mstatus tmp;
641 struct moxa_port *p;
642 unsigned int i, j;
643
644 for (i = 0; i < MAX_BOARDS; i++) {
645 p = moxa_boards[i].ports;
646 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
647 struct tty_struct *ttyp;
648 memset(&tmp, 0, sizeof(tmp));
649 spin_lock_bh(&moxa_lock);
650 if (!moxa_boards[i].ready) {
651 spin_unlock_bh(&moxa_lock);
652 goto copy;
653 }
654
655 status = MoxaPortLineStatus(p);
656 spin_unlock_bh(&moxa_lock);
657
658 if (status & 1)
659 tmp.cts = 1;
660 if (status & 2)
661 tmp.dsr = 1;
662 if (status & 4)
663 tmp.dcd = 1;
664
665 ttyp = tty_port_tty_get(&p->port);
666 if (!ttyp)
667 tmp.cflag = p->cflag;
668 else
669 tmp.cflag = ttyp->termios.c_cflag;
670 tty_kref_put(ttyp);
671copy:
672 if (copy_to_user(argm, &tmp, sizeof(tmp)))
673 return -EFAULT;
674 }
675 }
676 break;
677 }
678 default:
679 ret = -ENOIOCTLCMD;
680 }
681 return ret;
682}
683
684static int moxa_break_ctl(struct tty_struct *tty, int state)
685{
686 struct moxa_port *port = tty->driver_data;
687
688 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
689 Magic_code);
690 return 0;
691}
692
693static const struct tty_operations moxa_ops = {
694 .open = moxa_open,
695 .close = moxa_close,
696 .write = moxa_write,
697 .write_room = moxa_write_room,
698 .flush_buffer = moxa_flush_buffer,
699 .chars_in_buffer = moxa_chars_in_buffer,
700 .ioctl = moxa_ioctl,
701 .set_termios = moxa_set_termios,
702 .stop = moxa_stop,
703 .start = moxa_start,
704 .hangup = moxa_hangup,
705 .break_ctl = moxa_break_ctl,
706 .tiocmget = moxa_tiocmget,
707 .tiocmset = moxa_tiocmset,
708 .set_serial = moxa_set_serial_info,
709 .get_serial = moxa_get_serial_info,
710};
711
712static const struct tty_port_operations moxa_port_ops = {
713 .carrier_raised = moxa_carrier_raised,
714 .dtr_rts = moxa_dtr_rts,
715 .shutdown = moxa_shutdown,
716};
717
718static struct tty_driver *moxaDriver;
719static DEFINE_TIMER(moxaTimer, moxa_poll);
720
721/*
722 * HW init
723 */
724
725static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
726{
727 switch (brd->boardType) {
728 case MOXA_BOARD_C218_ISA:
729 case MOXA_BOARD_C218_PCI:
730 if (model != 1)
731 goto err;
732 break;
733 case MOXA_BOARD_CP204J:
734 if (model != 3)
735 goto err;
736 break;
737 default:
738 if (model != 2)
739 goto err;
740 break;
741 }
742 return 0;
743err:
744 return -EINVAL;
745}
746
747static int moxa_check_fw(const void *ptr)
748{
749 const __le16 *lptr = ptr;
750
751 if (*lptr != cpu_to_le16(0x7980))
752 return -EINVAL;
753
754 return 0;
755}
756
757static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
758 size_t len)
759{
760 void __iomem *baseAddr = brd->basemem;
761 u16 tmp;
762
763 writeb(HW_reset, baseAddr + Control_reg); /* reset */
764 msleep(10);
765 memset_io(baseAddr, 0, 4096);
766 memcpy_toio(baseAddr, buf, len); /* download BIOS */
767 writeb(0, baseAddr + Control_reg); /* restart */
768
769 msleep(2000);
770
771 switch (brd->boardType) {
772 case MOXA_BOARD_C218_ISA:
773 case MOXA_BOARD_C218_PCI:
774 tmp = readw(baseAddr + C218_key);
775 if (tmp != C218_KeyCode)
776 goto err;
777 break;
778 case MOXA_BOARD_CP204J:
779 tmp = readw(baseAddr + C218_key);
780 if (tmp != CP204J_KeyCode)
781 goto err;
782 break;
783 default:
784 tmp = readw(baseAddr + C320_key);
785 if (tmp != C320_KeyCode)
786 goto err;
787 tmp = readw(baseAddr + C320_status);
788 if (tmp != STS_init) {
789 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
790 "module not found\n");
791 return -EIO;
792 }
793 break;
794 }
795
796 return 0;
797err:
798 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
799 return -EIO;
800}
801
802static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
803 size_t len)
804{
805 void __iomem *baseAddr = brd->basemem;
806
807 if (len < 7168) {
808 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
809 return -EINVAL;
810 }
811
812 writew(len - 7168 - 2, baseAddr + C320bapi_len);
813 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
814 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
815 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
816 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
817
818 return 0;
819}
820
821static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
822 size_t len)
823{
824 void __iomem *baseAddr = brd->basemem;
825 const __le16 *uptr = ptr;
826 size_t wlen, len2, j;
827 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
828 unsigned int i, retry;
829 u16 usum, keycode;
830
831 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
832 C218_KeyCode;
833
834 switch (brd->boardType) {
835 case MOXA_BOARD_CP204J:
836 case MOXA_BOARD_C218_ISA:
837 case MOXA_BOARD_C218_PCI:
838 key = C218_key;
839 loadbuf = C218_LoadBuf;
840 loadlen = C218DLoad_len;
841 checksum = C218check_sum;
842 checksum_ok = C218chksum_ok;
843 break;
844 default:
845 key = C320_key;
846 keycode = C320_KeyCode;
847 loadbuf = C320_LoadBuf;
848 loadlen = C320DLoad_len;
849 checksum = C320check_sum;
850 checksum_ok = C320chksum_ok;
851 break;
852 }
853
854 usum = 0;
855 wlen = len >> 1;
856 for (i = 0; i < wlen; i++)
857 usum += le16_to_cpu(uptr[i]);
858 retry = 0;
859 do {
860 wlen = len >> 1;
861 j = 0;
862 while (wlen) {
863 len2 = (wlen > 2048) ? 2048 : wlen;
864 wlen -= len2;
865 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
866 j += len2 << 1;
867
868 writew(len2, baseAddr + loadlen);
869 writew(0, baseAddr + key);
870 for (i = 0; i < 100; i++) {
871 if (readw(baseAddr + key) == keycode)
872 break;
873 msleep(10);
874 }
875 if (readw(baseAddr + key) != keycode)
876 return -EIO;
877 }
878 writew(0, baseAddr + loadlen);
879 writew(usum, baseAddr + checksum);
880 writew(0, baseAddr + key);
881 for (i = 0; i < 100; i++) {
882 if (readw(baseAddr + key) == keycode)
883 break;
884 msleep(10);
885 }
886 retry++;
887 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
888 if (readb(baseAddr + checksum_ok) != 1)
889 return -EIO;
890
891 writew(0, baseAddr + key);
892 for (i = 0; i < 600; i++) {
893 if (readw(baseAddr + Magic_no) == Magic_code)
894 break;
895 msleep(10);
896 }
897 if (readw(baseAddr + Magic_no) != Magic_code)
898 return -EIO;
899
900 if (MOXA_IS_320(brd)) {
901 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
902 writew(0x3800, baseAddr + TMS320_PORT1);
903 writew(0x3900, baseAddr + TMS320_PORT2);
904 writew(28499, baseAddr + TMS320_CLOCK);
905 } else {
906 writew(0x3200, baseAddr + TMS320_PORT1);
907 writew(0x3400, baseAddr + TMS320_PORT2);
908 writew(19999, baseAddr + TMS320_CLOCK);
909 }
910 }
911 writew(1, baseAddr + Disable_IRQ);
912 writew(0, baseAddr + Magic_no);
913 for (i = 0; i < 500; i++) {
914 if (readw(baseAddr + Magic_no) == Magic_code)
915 break;
916 msleep(10);
917 }
918 if (readw(baseAddr + Magic_no) != Magic_code)
919 return -EIO;
920
921 if (MOXA_IS_320(brd)) {
922 j = readw(baseAddr + Module_cnt);
923 if (j <= 0)
924 return -EIO;
925 brd->numPorts = j * 8;
926 writew(j, baseAddr + Module_no);
927 writew(0, baseAddr + Magic_no);
928 for (i = 0; i < 600; i++) {
929 if (readw(baseAddr + Magic_no) == Magic_code)
930 break;
931 msleep(10);
932 }
933 if (readw(baseAddr + Magic_no) != Magic_code)
934 return -EIO;
935 }
936 brd->intNdx = baseAddr + IRQindex;
937 brd->intPend = baseAddr + IRQpending;
938 brd->intTable = baseAddr + IRQtable;
939
940 return 0;
941}
942
943static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
944 size_t len)
945{
946 void __iomem *ofsAddr, *baseAddr = brd->basemem;
947 struct moxa_port *port;
948 int retval, i;
949
950 if (len % 2) {
951 printk(KERN_ERR "MOXA: bios length is not even\n");
952 return -EINVAL;
953 }
954
955 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
956 if (retval)
957 return retval;
958
959 switch (brd->boardType) {
960 case MOXA_BOARD_C218_ISA:
961 case MOXA_BOARD_C218_PCI:
962 case MOXA_BOARD_CP204J:
963 port = brd->ports;
964 for (i = 0; i < brd->numPorts; i++, port++) {
965 port->board = brd;
966 port->DCDState = 0;
967 port->tableAddr = baseAddr + Extern_table +
968 Extern_size * i;
969 ofsAddr = port->tableAddr;
970 writew(C218rx_mask, ofsAddr + RX_mask);
971 writew(C218tx_mask, ofsAddr + TX_mask);
972 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
973 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
974
975 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
976 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
977
978 }
979 break;
980 default:
981 port = brd->ports;
982 for (i = 0; i < brd->numPorts; i++, port++) {
983 port->board = brd;
984 port->DCDState = 0;
985 port->tableAddr = baseAddr + Extern_table +
986 Extern_size * i;
987 ofsAddr = port->tableAddr;
988 switch (brd->numPorts) {
989 case 8:
990 writew(C320p8rx_mask, ofsAddr + RX_mask);
991 writew(C320p8tx_mask, ofsAddr + TX_mask);
992 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
993 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
994 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
995 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
996
997 break;
998 case 16:
999 writew(C320p16rx_mask, ofsAddr + RX_mask);
1000 writew(C320p16tx_mask, ofsAddr + TX_mask);
1001 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
1002 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
1003 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
1004 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
1005 break;
1006
1007 case 24:
1008 writew(C320p24rx_mask, ofsAddr + RX_mask);
1009 writew(C320p24tx_mask, ofsAddr + TX_mask);
1010 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
1011 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
1012 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
1013 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
1014 break;
1015 case 32:
1016 writew(C320p32rx_mask, ofsAddr + RX_mask);
1017 writew(C320p32tx_mask, ofsAddr + TX_mask);
1018 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
1019 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
1020 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
1021 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
1022 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
1023 break;
1024 }
1025 }
1026 break;
1027 }
1028 return 0;
1029}
1030
1031static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
1032{
1033 const void *ptr = fw->data;
1034 char rsn[64];
1035 u16 lens[5];
1036 size_t len;
1037 unsigned int a, lenp, lencnt;
1038 int ret = -EINVAL;
1039 struct {
1040 __le32 magic; /* 0x34303430 */
1041 u8 reserved1[2];
1042 u8 type; /* UNIX = 3 */
1043 u8 model; /* C218T=1, C320T=2, CP204=3 */
1044 u8 reserved2[8];
1045 __le16 len[5];
1046 } const *hdr = ptr;
1047
1048 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
1049
1050 if (fw->size < MOXA_FW_HDRLEN) {
1051 strcpy(rsn, "too short (even header won't fit)");
1052 goto err;
1053 }
1054 if (hdr->magic != cpu_to_le32(0x30343034)) {
1055 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
1056 goto err;
1057 }
1058 if (hdr->type != 3) {
1059 sprintf(rsn, "not for linux, type is %u", hdr->type);
1060 goto err;
1061 }
1062 if (moxa_check_fw_model(brd, hdr->model)) {
1063 sprintf(rsn, "not for this card, model is %u", hdr->model);
1064 goto err;
1065 }
1066
1067 len = MOXA_FW_HDRLEN;
1068 lencnt = hdr->model == 2 ? 5 : 3;
1069 for (a = 0; a < ARRAY_SIZE(lens); a++) {
1070 lens[a] = le16_to_cpu(hdr->len[a]);
1071 if (lens[a] && len + lens[a] <= fw->size &&
1072 moxa_check_fw(&fw->data[len]))
1073 printk(KERN_WARNING "MOXA firmware: unexpected input "
1074 "at offset %u, but going on\n", (u32)len);
1075 if (!lens[a] && a < lencnt) {
1076 sprintf(rsn, "too few entries in fw file");
1077 goto err;
1078 }
1079 len += lens[a];
1080 }
1081
1082 if (len != fw->size) {
1083 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
1084 (u32)len);
1085 goto err;
1086 }
1087
1088 ptr += MOXA_FW_HDRLEN;
1089 lenp = 0; /* bios */
1090
1091 strcpy(rsn, "read above");
1092
1093 ret = moxa_load_bios(brd, ptr, lens[lenp]);
1094 if (ret)
1095 goto err;
1096
1097 /* we skip the tty section (lens[1]), since we don't need it */
1098 ptr += lens[lenp] + lens[lenp + 1];
1099 lenp += 2; /* comm */
1100
1101 if (hdr->model == 2) {
1102 ret = moxa_load_320b(brd, ptr, lens[lenp]);
1103 if (ret)
1104 goto err;
1105 /* skip another tty */
1106 ptr += lens[lenp] + lens[lenp + 1];
1107 lenp += 2;
1108 }
1109
1110 ret = moxa_load_code(brd, ptr, lens[lenp]);
1111 if (ret)
1112 goto err;
1113
1114 return 0;
1115err:
1116 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
1117 return ret;
1118}
1119
1120static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
1121{
1122 const struct firmware *fw;
1123 const char *file;
1124 struct moxa_port *p;
1125 unsigned int i, first_idx;
1126 int ret;
1127
1128 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
1129 GFP_KERNEL);
1130 if (brd->ports == NULL) {
1131 printk(KERN_ERR "cannot allocate memory for ports\n");
1132 ret = -ENOMEM;
1133 goto err;
1134 }
1135
1136 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
1137 tty_port_init(&p->port);
1138 p->port.ops = &moxa_port_ops;
1139 p->type = PORT_16550A;
1140 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1141 }
1142
1143 switch (brd->boardType) {
1144 case MOXA_BOARD_C218_ISA:
1145 case MOXA_BOARD_C218_PCI:
1146 file = "c218tunx.cod";
1147 break;
1148 case MOXA_BOARD_CP204J:
1149 file = "cp204unx.cod";
1150 break;
1151 default:
1152 file = "c320tunx.cod";
1153 break;
1154 }
1155
1156 ret = request_firmware(&fw, file, dev);
1157 if (ret) {
1158 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
1159 "you've placed '%s' file into your firmware "
1160 "loader directory (e.g. /lib/firmware)\n",
1161 file);
1162 goto err_free;
1163 }
1164
1165 ret = moxa_load_fw(brd, fw);
1166
1167 release_firmware(fw);
1168
1169 if (ret)
1170 goto err_free;
1171
1172 spin_lock_bh(&moxa_lock);
1173 brd->ready = 1;
1174 if (!timer_pending(&moxaTimer))
1175 mod_timer(&moxaTimer, jiffies + HZ / 50);
1176 spin_unlock_bh(&moxa_lock);
1177
1178 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
1179 for (i = 0; i < brd->numPorts; i++)
1180 tty_port_register_device(&brd->ports[i].port, moxaDriver,
1181 first_idx + i, dev);
1182
1183 return 0;
1184err_free:
1185 for (i = 0; i < MAX_PORTS_PER_BOARD; i++)
1186 tty_port_destroy(&brd->ports[i].port);
1187 kfree(brd->ports);
1188err:
1189 return ret;
1190}
1191
1192static void moxa_board_deinit(struct moxa_board_conf *brd)
1193{
1194 unsigned int a, opened, first_idx;
1195
1196 mutex_lock(&moxa_openlock);
1197 spin_lock_bh(&moxa_lock);
1198 brd->ready = 0;
1199 spin_unlock_bh(&moxa_lock);
1200
1201 /* pci hot-un-plug support */
1202 for (a = 0; a < brd->numPorts; a++)
1203 if (tty_port_initialized(&brd->ports[a].port))
1204 tty_port_tty_hangup(&brd->ports[a].port, false);
1205
1206 for (a = 0; a < MAX_PORTS_PER_BOARD; a++)
1207 tty_port_destroy(&brd->ports[a].port);
1208
1209 while (1) {
1210 opened = 0;
1211 for (a = 0; a < brd->numPorts; a++)
1212 if (tty_port_initialized(&brd->ports[a].port))
1213 opened++;
1214 mutex_unlock(&moxa_openlock);
1215 if (!opened)
1216 break;
1217 msleep(50);
1218 mutex_lock(&moxa_openlock);
1219 }
1220
1221 first_idx = (brd - moxa_boards) * MAX_PORTS_PER_BOARD;
1222 for (a = 0; a < brd->numPorts; a++)
1223 tty_unregister_device(moxaDriver, first_idx + a);
1224
1225 iounmap(brd->basemem);
1226 brd->basemem = NULL;
1227 kfree(brd->ports);
1228}
1229
1230#ifdef CONFIG_PCI
1231static int moxa_pci_probe(struct pci_dev *pdev,
1232 const struct pci_device_id *ent)
1233{
1234 struct moxa_board_conf *board;
1235 unsigned int i;
1236 int board_type = ent->driver_data;
1237 int retval;
1238
1239 retval = pci_enable_device(pdev);
1240 if (retval) {
1241 dev_err(&pdev->dev, "can't enable pci device\n");
1242 goto err;
1243 }
1244
1245 for (i = 0; i < MAX_BOARDS; i++)
1246 if (moxa_boards[i].basemem == NULL)
1247 break;
1248
1249 retval = -ENODEV;
1250 if (i >= MAX_BOARDS) {
1251 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
1252 "found. Board is ignored.\n", MAX_BOARDS);
1253 goto err;
1254 }
1255
1256 board = &moxa_boards[i];
1257
1258 retval = pci_request_region(pdev, 2, "moxa-base");
1259 if (retval) {
1260 dev_err(&pdev->dev, "can't request pci region 2\n");
1261 goto err;
1262 }
1263
1264 board->basemem = ioremap(pci_resource_start(pdev, 2), 0x4000);
1265 if (board->basemem == NULL) {
1266 dev_err(&pdev->dev, "can't remap io space 2\n");
1267 retval = -ENOMEM;
1268 goto err_reg;
1269 }
1270
1271 board->boardType = board_type;
1272 switch (board_type) {
1273 case MOXA_BOARD_C218_ISA:
1274 case MOXA_BOARD_C218_PCI:
1275 board->numPorts = 8;
1276 break;
1277
1278 case MOXA_BOARD_CP204J:
1279 board->numPorts = 4;
1280 break;
1281 default:
1282 board->numPorts = 0;
1283 break;
1284 }
1285 board->busType = MOXA_BUS_TYPE_PCI;
1286
1287 retval = moxa_init_board(board, &pdev->dev);
1288 if (retval)
1289 goto err_base;
1290
1291 pci_set_drvdata(pdev, board);
1292
1293 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
1294 moxa_brdname[board_type - 1], board->numPorts);
1295
1296 return 0;
1297err_base:
1298 iounmap(board->basemem);
1299 board->basemem = NULL;
1300err_reg:
1301 pci_release_region(pdev, 2);
1302err:
1303 return retval;
1304}
1305
1306static void moxa_pci_remove(struct pci_dev *pdev)
1307{
1308 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1309
1310 moxa_board_deinit(brd);
1311
1312 pci_release_region(pdev, 2);
1313}
1314
1315static struct pci_driver moxa_pci_driver = {
1316 .name = "moxa",
1317 .id_table = moxa_pcibrds,
1318 .probe = moxa_pci_probe,
1319 .remove = moxa_pci_remove
1320};
1321#endif /* CONFIG_PCI */
1322
1323static int __init moxa_init(void)
1324{
1325 unsigned int isabrds = 0;
1326 int retval = 0;
1327 struct moxa_board_conf *brd = moxa_boards;
1328 unsigned int i;
1329
1330 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1331 MOXA_VERSION);
1332
1333 tty_port_init(&moxa_service_port);
1334
1335 moxaDriver = tty_alloc_driver(MAX_PORTS + 1,
1336 TTY_DRIVER_REAL_RAW |
1337 TTY_DRIVER_DYNAMIC_DEV);
1338 if (IS_ERR(moxaDriver))
1339 return PTR_ERR(moxaDriver);
1340
1341 moxaDriver->name = "ttyMX";
1342 moxaDriver->major = ttymajor;
1343 moxaDriver->minor_start = 0;
1344 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1345 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1346 moxaDriver->init_termios = tty_std_termios;
1347 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
1348 moxaDriver->init_termios.c_ispeed = 9600;
1349 moxaDriver->init_termios.c_ospeed = 9600;
1350 tty_set_operations(moxaDriver, &moxa_ops);
1351 /* Having one more port only for ioctls is ugly */
1352 tty_port_link_device(&moxa_service_port, moxaDriver, MAX_PORTS);
1353
1354 if (tty_register_driver(moxaDriver)) {
1355 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1356 tty_driver_kref_put(moxaDriver);
1357 return -1;
1358 }
1359
1360 /* Find the boards defined from module args. */
1361
1362 for (i = 0; i < MAX_BOARDS; i++) {
1363 if (!baseaddr[i])
1364 break;
1365 if (type[i] == MOXA_BOARD_C218_ISA ||
1366 type[i] == MOXA_BOARD_C320_ISA) {
1367 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
1368 isabrds + 1, moxa_brdname[type[i] - 1],
1369 baseaddr[i]);
1370 brd->boardType = type[i];
1371 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1372 numports[i];
1373 brd->busType = MOXA_BUS_TYPE_ISA;
1374 brd->basemem = ioremap(baseaddr[i], 0x4000);
1375 if (!brd->basemem) {
1376 printk(KERN_ERR "MOXA: can't remap %lx\n",
1377 baseaddr[i]);
1378 continue;
1379 }
1380 if (moxa_init_board(brd, NULL)) {
1381 iounmap(brd->basemem);
1382 brd->basemem = NULL;
1383 continue;
1384 }
1385
1386 printk(KERN_INFO "MOXA isa board found at 0x%.8lx and "
1387 "ready (%u ports, firmware loaded)\n",
1388 baseaddr[i], brd->numPorts);
1389
1390 brd++;
1391 isabrds++;
1392 }
1393 }
1394
1395#ifdef CONFIG_PCI
1396 retval = pci_register_driver(&moxa_pci_driver);
1397 if (retval) {
1398 printk(KERN_ERR "Can't register MOXA pci driver!\n");
1399 if (isabrds)
1400 retval = 0;
1401 }
1402#endif
1403
1404 return retval;
1405}
1406
1407static void __exit moxa_exit(void)
1408{
1409 unsigned int i;
1410
1411#ifdef CONFIG_PCI
1412 pci_unregister_driver(&moxa_pci_driver);
1413#endif
1414
1415 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1416 if (moxa_boards[i].ready)
1417 moxa_board_deinit(&moxa_boards[i]);
1418
1419 del_timer_sync(&moxaTimer);
1420
1421 tty_unregister_driver(moxaDriver);
1422 tty_driver_kref_put(moxaDriver);
1423}
1424
1425module_init(moxa_init);
1426module_exit(moxa_exit);
1427
1428static void moxa_shutdown(struct tty_port *port)
1429{
1430 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1431 MoxaPortDisable(ch);
1432 MoxaPortFlushData(ch, 2);
1433}
1434
1435static int moxa_carrier_raised(struct tty_port *port)
1436{
1437 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1438 int dcd;
1439
1440 spin_lock_irq(&port->lock);
1441 dcd = ch->DCDState;
1442 spin_unlock_irq(&port->lock);
1443 return dcd;
1444}
1445
1446static void moxa_dtr_rts(struct tty_port *port, int onoff)
1447{
1448 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1449 MoxaPortLineCtrl(ch, onoff, onoff);
1450}
1451
1452
1453static int moxa_open(struct tty_struct *tty, struct file *filp)
1454{
1455 struct moxa_board_conf *brd;
1456 struct moxa_port *ch;
1457 int port;
1458
1459 port = tty->index;
1460 if (port == MAX_PORTS) {
1461 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1462 }
1463 if (mutex_lock_interruptible(&moxa_openlock))
1464 return -ERESTARTSYS;
1465 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
1466 if (!brd->ready) {
1467 mutex_unlock(&moxa_openlock);
1468 return -ENODEV;
1469 }
1470
1471 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1472 mutex_unlock(&moxa_openlock);
1473 return -ENODEV;
1474 }
1475
1476 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
1477 ch->port.count++;
1478 tty->driver_data = ch;
1479 tty_port_tty_set(&ch->port, tty);
1480 mutex_lock(&ch->port.mutex);
1481 if (!tty_port_initialized(&ch->port)) {
1482 ch->statusflags = 0;
1483 moxa_set_tty_param(tty, &tty->termios);
1484 MoxaPortLineCtrl(ch, 1, 1);
1485 MoxaPortEnable(ch);
1486 MoxaSetFifo(ch, ch->type == PORT_16550A);
1487 tty_port_set_initialized(&ch->port, 1);
1488 }
1489 mutex_unlock(&ch->port.mutex);
1490 mutex_unlock(&moxa_openlock);
1491
1492 return tty_port_block_til_ready(&ch->port, tty, filp);
1493}
1494
1495static void moxa_close(struct tty_struct *tty, struct file *filp)
1496{
1497 struct moxa_port *ch = tty->driver_data;
1498 ch->cflag = tty->termios.c_cflag;
1499 tty_port_close(&ch->port, tty, filp);
1500}
1501
1502static int moxa_write(struct tty_struct *tty,
1503 const unsigned char *buf, int count)
1504{
1505 struct moxa_port *ch = tty->driver_data;
1506 unsigned long flags;
1507 int len;
1508
1509 if (ch == NULL)
1510 return 0;
1511
1512 spin_lock_irqsave(&moxa_lock, flags);
1513 len = MoxaPortWriteData(tty, buf, count);
1514 spin_unlock_irqrestore(&moxa_lock, flags);
1515
1516 set_bit(LOWWAIT, &ch->statusflags);
1517 return len;
1518}
1519
1520static unsigned int moxa_write_room(struct tty_struct *tty)
1521{
1522 struct moxa_port *ch;
1523
1524 if (tty->flow.stopped)
1525 return 0;
1526 ch = tty->driver_data;
1527 if (ch == NULL)
1528 return 0;
1529 return MoxaPortTxFree(ch);
1530}
1531
1532static void moxa_flush_buffer(struct tty_struct *tty)
1533{
1534 struct moxa_port *ch = tty->driver_data;
1535
1536 if (ch == NULL)
1537 return;
1538 MoxaPortFlushData(ch, 1);
1539 tty_wakeup(tty);
1540}
1541
1542static unsigned int moxa_chars_in_buffer(struct tty_struct *tty)
1543{
1544 struct moxa_port *ch = tty->driver_data;
1545 unsigned int chars;
1546
1547 chars = MoxaPortTxQueue(ch);
1548 if (chars)
1549 /*
1550 * Make it possible to wakeup anything waiting for output
1551 * in tty_ioctl.c, etc.
1552 */
1553 set_bit(EMPTYWAIT, &ch->statusflags);
1554 return chars;
1555}
1556
1557static int moxa_tiocmget(struct tty_struct *tty)
1558{
1559 struct moxa_port *ch = tty->driver_data;
1560 int flag = 0, dtr, rts;
1561
1562 MoxaPortGetLineOut(ch, &dtr, &rts);
1563 if (dtr)
1564 flag |= TIOCM_DTR;
1565 if (rts)
1566 flag |= TIOCM_RTS;
1567 dtr = MoxaPortLineStatus(ch);
1568 if (dtr & 1)
1569 flag |= TIOCM_CTS;
1570 if (dtr & 2)
1571 flag |= TIOCM_DSR;
1572 if (dtr & 4)
1573 flag |= TIOCM_CD;
1574 return flag;
1575}
1576
1577static int moxa_tiocmset(struct tty_struct *tty,
1578 unsigned int set, unsigned int clear)
1579{
1580 struct moxa_port *ch;
1581 int dtr, rts;
1582
1583 mutex_lock(&moxa_openlock);
1584 ch = tty->driver_data;
1585 if (!ch) {
1586 mutex_unlock(&moxa_openlock);
1587 return -EINVAL;
1588 }
1589
1590 MoxaPortGetLineOut(ch, &dtr, &rts);
1591 if (set & TIOCM_RTS)
1592 rts = 1;
1593 if (set & TIOCM_DTR)
1594 dtr = 1;
1595 if (clear & TIOCM_RTS)
1596 rts = 0;
1597 if (clear & TIOCM_DTR)
1598 dtr = 0;
1599 MoxaPortLineCtrl(ch, dtr, rts);
1600 mutex_unlock(&moxa_openlock);
1601 return 0;
1602}
1603
1604static void moxa_set_termios(struct tty_struct *tty,
1605 const struct ktermios *old_termios)
1606{
1607 struct moxa_port *ch = tty->driver_data;
1608
1609 if (ch == NULL)
1610 return;
1611 moxa_set_tty_param(tty, old_termios);
1612 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
1613 wake_up_interruptible(&ch->port.open_wait);
1614}
1615
1616static void moxa_stop(struct tty_struct *tty)
1617{
1618 struct moxa_port *ch = tty->driver_data;
1619
1620 if (ch == NULL)
1621 return;
1622 MoxaPortTxDisable(ch);
1623 set_bit(TXSTOPPED, &ch->statusflags);
1624}
1625
1626
1627static void moxa_start(struct tty_struct *tty)
1628{
1629 struct moxa_port *ch = tty->driver_data;
1630
1631 if (ch == NULL)
1632 return;
1633
1634 if (!test_bit(TXSTOPPED, &ch->statusflags))
1635 return;
1636
1637 MoxaPortTxEnable(ch);
1638 clear_bit(TXSTOPPED, &ch->statusflags);
1639}
1640
1641static void moxa_hangup(struct tty_struct *tty)
1642{
1643 struct moxa_port *ch = tty->driver_data;
1644 tty_port_hangup(&ch->port);
1645}
1646
1647static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1648{
1649 unsigned long flags;
1650 dcd = !!dcd;
1651
1652 spin_lock_irqsave(&p->port.lock, flags);
1653 if (dcd != p->DCDState) {
1654 p->DCDState = dcd;
1655 spin_unlock_irqrestore(&p->port.lock, flags);
1656 if (!dcd)
1657 tty_port_tty_hangup(&p->port, true);
1658 }
1659 else
1660 spin_unlock_irqrestore(&p->port.lock, flags);
1661}
1662
1663static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1664 u16 __iomem *ip)
1665{
1666 struct tty_struct *tty = tty_port_tty_get(&p->port);
1667 void __iomem *ofsAddr;
1668 unsigned int inited = tty_port_initialized(&p->port);
1669 u16 intr;
1670
1671 if (tty) {
1672 if (test_bit(EMPTYWAIT, &p->statusflags) &&
1673 MoxaPortTxQueue(p) == 0) {
1674 clear_bit(EMPTYWAIT, &p->statusflags);
1675 tty_wakeup(tty);
1676 }
1677 if (test_bit(LOWWAIT, &p->statusflags) && !tty->flow.stopped &&
1678 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
1679 clear_bit(LOWWAIT, &p->statusflags);
1680 tty_wakeup(tty);
1681 }
1682
1683 if (inited && !tty_throttled(tty) &&
1684 MoxaPortRxQueue(p) > 0) { /* RX */
1685 MoxaPortReadData(p);
1686 tty_flip_buffer_push(&p->port);
1687 }
1688 } else {
1689 clear_bit(EMPTYWAIT, &p->statusflags);
1690 MoxaPortFlushData(p, 0); /* flush RX */
1691 }
1692
1693 if (!handle) /* nothing else to do */
1694 goto put;
1695
1696 intr = readw(ip); /* port irq status */
1697 if (intr == 0)
1698 goto put;
1699
1700 writew(0, ip); /* ACK port */
1701 ofsAddr = p->tableAddr;
1702 if (intr & IntrTx) /* disable tx intr */
1703 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1704 ofsAddr + HostStat);
1705
1706 if (!inited)
1707 goto put;
1708
1709 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1710 tty_insert_flip_char(&p->port, 0, TTY_BREAK);
1711 tty_flip_buffer_push(&p->port);
1712 }
1713
1714 if (intr & IntrLine)
1715 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
1716put:
1717 tty_kref_put(tty);
1718
1719 return 0;
1720}
1721
1722static void moxa_poll(struct timer_list *unused)
1723{
1724 struct moxa_board_conf *brd;
1725 u16 __iomem *ip;
1726 unsigned int card, port, served = 0;
1727
1728 spin_lock(&moxa_lock);
1729 for (card = 0; card < MAX_BOARDS; card++) {
1730 brd = &moxa_boards[card];
1731 if (!brd->ready)
1732 continue;
1733
1734 served++;
1735
1736 ip = NULL;
1737 if (readb(brd->intPend) == 0xff)
1738 ip = brd->intTable + readb(brd->intNdx);
1739
1740 for (port = 0; port < brd->numPorts; port++)
1741 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1742
1743 if (ip)
1744 writeb(0, brd->intPend); /* ACK */
1745
1746 if (moxaLowWaterChk) {
1747 struct moxa_port *p = brd->ports;
1748 for (port = 0; port < brd->numPorts; port++, p++)
1749 if (p->lowChkFlag) {
1750 p->lowChkFlag = 0;
1751 moxa_low_water_check(p->tableAddr);
1752 }
1753 }
1754 }
1755 moxaLowWaterChk = 0;
1756
1757 if (served)
1758 mod_timer(&moxaTimer, jiffies + HZ / 50);
1759 spin_unlock(&moxa_lock);
1760}
1761
1762/******************************************************************************/
1763
1764static void moxa_set_tty_param(struct tty_struct *tty,
1765 const struct ktermios *old_termios)
1766{
1767 register struct ktermios *ts = &tty->termios;
1768 struct moxa_port *ch = tty->driver_data;
1769 int rts, cts, txflow, rxflow, xany, baud;
1770
1771 rts = cts = txflow = rxflow = xany = 0;
1772 if (ts->c_cflag & CRTSCTS)
1773 rts = cts = 1;
1774 if (ts->c_iflag & IXON)
1775 txflow = 1;
1776 if (ts->c_iflag & IXOFF)
1777 rxflow = 1;
1778 if (ts->c_iflag & IXANY)
1779 xany = 1;
1780
1781 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1782 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
1783 if (baud == -1)
1784 baud = tty_termios_baud_rate(old_termios);
1785 /* Not put the baud rate into the termios data */
1786 tty_encode_baud_rate(tty, baud, baud);
1787}
1788
1789/*****************************************************************************
1790 * Driver level functions: *
1791 *****************************************************************************/
1792
1793static void MoxaPortFlushData(struct moxa_port *port, int mode)
1794{
1795 void __iomem *ofsAddr;
1796 if (mode < 0 || mode > 2)
1797 return;
1798 ofsAddr = port->tableAddr;
1799 moxafunc(ofsAddr, FC_FlushQueue, mode);
1800 if (mode != 1) {
1801 port->lowChkFlag = 0;
1802 moxa_low_water_check(ofsAddr);
1803 }
1804}
1805
1806/*
1807 * Moxa Port Number Description:
1808 *
1809 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1810 * the port number using in MOXA driver functions will be 0 to 31 for
1811 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1812 * to 127 for fourth. For example, if you setup three MOXA boards,
1813 * first board is C218, second board is C320-16 and third board is
1814 * C320-32. The port number of first board (C218 - 8 ports) is from
1815 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1816 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1817 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1818 * 127 will be invalid.
1819 *
1820 *
1821 * Moxa Functions Description:
1822 *
1823 * Function 1: Driver initialization routine, this routine must be
1824 * called when initialized driver.
1825 * Syntax:
1826 * void MoxaDriverInit();
1827 *
1828 *
1829 * Function 2: Moxa driver private IOCTL command processing.
1830 * Syntax:
1831 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1832 *
1833 * unsigned int cmd : IOCTL command
1834 * unsigned long arg : IOCTL argument
1835 * int port : port number (0 - 127)
1836 *
1837 * return: 0 (OK)
1838 * -EINVAL
1839 * -ENOIOCTLCMD
1840 *
1841 *
1842 * Function 6: Enable this port to start Tx/Rx data.
1843 * Syntax:
1844 * void MoxaPortEnable(int port);
1845 * int port : port number (0 - 127)
1846 *
1847 *
1848 * Function 7: Disable this port
1849 * Syntax:
1850 * void MoxaPortDisable(int port);
1851 * int port : port number (0 - 127)
1852 *
1853 *
1854 * Function 10: Setting baud rate of this port.
1855 * Syntax:
1856 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1857 * int port : port number (0 - 127)
1858 * long baud : baud rate (50 - 115200)
1859 *
1860 * return: 0 : this port is invalid or baud < 50
1861 * 50 - 115200 : the real baud rate set to the port, if
1862 * the argument baud is large than maximun
1863 * available baud rate, the real setting
1864 * baud rate will be the maximun baud rate.
1865 *
1866 *
1867 * Function 12: Configure the port.
1868 * Syntax:
1869 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1870 * int port : port number (0 - 127)
1871 * struct ktermios * termio : termio structure pointer
1872 * speed_t baud : baud rate
1873 *
1874 * return: -1 : this port is invalid or termio == NULL
1875 * 0 : setting O.K.
1876 *
1877 *
1878 * Function 13: Get the DTR/RTS state of this port.
1879 * Syntax:
1880 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1881 * int port : port number (0 - 127)
1882 * int * dtrState : pointer to INT to receive the current DTR
1883 * state. (if NULL, this function will not
1884 * write to this address)
1885 * int * rtsState : pointer to INT to receive the current RTS
1886 * state. (if NULL, this function will not
1887 * write to this address)
1888 *
1889 * return: -1 : this port is invalid
1890 * 0 : O.K.
1891 *
1892 *
1893 * Function 14: Setting the DTR/RTS output state of this port.
1894 * Syntax:
1895 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1896 * int port : port number (0 - 127)
1897 * int dtrState : DTR output state (0: off, 1: on)
1898 * int rtsState : RTS output state (0: off, 1: on)
1899 *
1900 *
1901 * Function 15: Setting the flow control of this port.
1902 * Syntax:
1903 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1904 * int txFlow,int xany);
1905 * int port : port number (0 - 127)
1906 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1907 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1908 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1909 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1910 * int xany : S/W XANY flow control (0: no, 1: yes)
1911 *
1912 *
1913 * Function 16: Get ths line status of this port
1914 * Syntax:
1915 * int MoxaPortLineStatus(int port);
1916 * int port : port number (0 - 127)
1917 *
1918 * return: Bit 0 - CTS state (0: off, 1: on)
1919 * Bit 1 - DSR state (0: off, 1: on)
1920 * Bit 2 - DCD state (0: off, 1: on)
1921 *
1922 *
1923 * Function 19: Flush the Rx/Tx buffer data of this port.
1924 * Syntax:
1925 * void MoxaPortFlushData(int port, int mode);
1926 * int port : port number (0 - 127)
1927 * int mode
1928 * 0 : flush the Rx buffer
1929 * 1 : flush the Tx buffer
1930 * 2 : flush the Rx and Tx buffer
1931 *
1932 *
1933 * Function 20: Write data.
1934 * Syntax:
1935 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1936 * int port : port number (0 - 127)
1937 * unsigned char * buffer : pointer to write data buffer.
1938 * int length : write data length
1939 *
1940 * return: 0 - length : real write data length
1941 *
1942 *
1943 * Function 21: Read data.
1944 * Syntax:
1945 * int MoxaPortReadData(int port, struct tty_struct *tty);
1946 * int port : port number (0 - 127)
1947 * struct tty_struct *tty : tty for data
1948 *
1949 * return: 0 - length : real read data length
1950 *
1951 *
1952 * Function 24: Get the Tx buffer current queued data bytes
1953 * Syntax:
1954 * int MoxaPortTxQueue(int port);
1955 * int port : port number (0 - 127)
1956 *
1957 * return: .. : Tx buffer current queued data bytes
1958 *
1959 *
1960 * Function 25: Get the Tx buffer current free space
1961 * Syntax:
1962 * int MoxaPortTxFree(int port);
1963 * int port : port number (0 - 127)
1964 *
1965 * return: .. : Tx buffer current free space
1966 *
1967 *
1968 * Function 26: Get the Rx buffer current queued data bytes
1969 * Syntax:
1970 * int MoxaPortRxQueue(int port);
1971 * int port : port number (0 - 127)
1972 *
1973 * return: .. : Rx buffer current queued data bytes
1974 *
1975 *
1976 * Function 28: Disable port data transmission.
1977 * Syntax:
1978 * void MoxaPortTxDisable(int port);
1979 * int port : port number (0 - 127)
1980 *
1981 *
1982 * Function 29: Enable port data transmission.
1983 * Syntax:
1984 * void MoxaPortTxEnable(int port);
1985 * int port : port number (0 - 127)
1986 *
1987 *
1988 * Function 31: Get the received BREAK signal count and reset it.
1989 * Syntax:
1990 * int MoxaPortResetBrkCnt(int port);
1991 * int port : port number (0 - 127)
1992 *
1993 * return: 0 - .. : BREAK signal count
1994 *
1995 *
1996 */
1997
1998static void MoxaPortEnable(struct moxa_port *port)
1999{
2000 void __iomem *ofsAddr;
2001 u16 lowwater = 512;
2002
2003 ofsAddr = port->tableAddr;
2004 writew(lowwater, ofsAddr + Low_water);
2005 if (MOXA_IS_320(port->board))
2006 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
2007 else
2008 writew(readw(ofsAddr + HostStat) | WakeupBreak,
2009 ofsAddr + HostStat);
2010
2011 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
2012 moxafunc(ofsAddr, FC_FlushQueue, 2);
2013
2014 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
2015 MoxaPortLineStatus(port);
2016}
2017
2018static void MoxaPortDisable(struct moxa_port *port)
2019{
2020 void __iomem *ofsAddr = port->tableAddr;
2021
2022 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
2023 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
2024 writew(0, ofsAddr + HostStat);
2025 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
2026}
2027
2028static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
2029{
2030 void __iomem *ofsAddr = port->tableAddr;
2031 unsigned int clock, val;
2032 speed_t max;
2033
2034 max = MOXA_IS_320(port->board) ? 460800 : 921600;
2035 if (baud < 50)
2036 return 0;
2037 if (baud > max)
2038 baud = max;
2039 clock = 921600;
2040 val = clock / baud;
2041 moxafunc(ofsAddr, FC_SetBaud, val);
2042 baud = clock / val;
2043 return baud;
2044}
2045
2046static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
2047 speed_t baud)
2048{
2049 void __iomem *ofsAddr;
2050 tcflag_t mode = 0;
2051
2052 ofsAddr = port->tableAddr;
2053
2054 mode = termio->c_cflag & CSIZE;
2055 if (mode == CS5)
2056 mode = MX_CS5;
2057 else if (mode == CS6)
2058 mode = MX_CS6;
2059 else if (mode == CS7)
2060 mode = MX_CS7;
2061 else if (mode == CS8)
2062 mode = MX_CS8;
2063
2064 if (termio->c_cflag & CSTOPB) {
2065 if (mode == MX_CS5)
2066 mode |= MX_STOP15;
2067 else
2068 mode |= MX_STOP2;
2069 } else
2070 mode |= MX_STOP1;
2071
2072 if (termio->c_cflag & PARENB) {
2073 if (termio->c_cflag & PARODD) {
2074 if (termio->c_cflag & CMSPAR)
2075 mode |= MX_PARMARK;
2076 else
2077 mode |= MX_PARODD;
2078 } else {
2079 if (termio->c_cflag & CMSPAR)
2080 mode |= MX_PARSPACE;
2081 else
2082 mode |= MX_PAREVEN;
2083 }
2084 } else
2085 mode |= MX_PARNONE;
2086
2087 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
2088
2089 if (MOXA_IS_320(port->board) && baud >= 921600)
2090 return -1;
2091
2092 baud = MoxaPortSetBaud(port, baud);
2093
2094 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
2095 spin_lock_irq(&moxafunc_lock);
2096 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
2097 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
2098 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
2099 moxa_wait_finish(ofsAddr);
2100 spin_unlock_irq(&moxafunc_lock);
2101
2102 }
2103 return baud;
2104}
2105
2106static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
2107 int *rtsState)
2108{
2109 if (dtrState)
2110 *dtrState = !!(port->lineCtrl & DTR_ON);
2111 if (rtsState)
2112 *rtsState = !!(port->lineCtrl & RTS_ON);
2113
2114 return 0;
2115}
2116
2117static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
2118{
2119 u8 mode = 0;
2120
2121 if (dtr)
2122 mode |= DTR_ON;
2123 if (rts)
2124 mode |= RTS_ON;
2125 port->lineCtrl = mode;
2126 moxafunc(port->tableAddr, FC_LineControl, mode);
2127}
2128
2129static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
2130 int txflow, int rxflow, int txany)
2131{
2132 int mode = 0;
2133
2134 if (rts)
2135 mode |= RTS_FlowCtl;
2136 if (cts)
2137 mode |= CTS_FlowCtl;
2138 if (txflow)
2139 mode |= Tx_FlowCtl;
2140 if (rxflow)
2141 mode |= Rx_FlowCtl;
2142 if (txany)
2143 mode |= IXM_IXANY;
2144 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
2145}
2146
2147static int MoxaPortLineStatus(struct moxa_port *port)
2148{
2149 void __iomem *ofsAddr;
2150 int val;
2151
2152 ofsAddr = port->tableAddr;
2153 if (MOXA_IS_320(port->board))
2154 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
2155 else
2156 val = readw(ofsAddr + FlagStat) >> 4;
2157 val &= 0x0B;
2158 if (val & 8)
2159 val |= 4;
2160 moxa_new_dcdstate(port, val & 8);
2161 val &= 7;
2162 return val;
2163}
2164
2165static int MoxaPortWriteData(struct tty_struct *tty,
2166 const unsigned char *buffer, int len)
2167{
2168 struct moxa_port *port = tty->driver_data;
2169 void __iomem *baseAddr, *ofsAddr, *ofs;
2170 unsigned int c, total;
2171 u16 head, tail, tx_mask, spage, epage;
2172 u16 pageno, pageofs, bufhead;
2173
2174 ofsAddr = port->tableAddr;
2175 baseAddr = port->board->basemem;
2176 tx_mask = readw(ofsAddr + TX_mask);
2177 spage = readw(ofsAddr + Page_txb);
2178 epage = readw(ofsAddr + EndPage_txb);
2179 tail = readw(ofsAddr + TXwptr);
2180 head = readw(ofsAddr + TXrptr);
2181 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
2182 if (c > len)
2183 c = len;
2184 moxaLog.txcnt[port->port.tty->index] += c;
2185 total = c;
2186 if (spage == epage) {
2187 bufhead = readw(ofsAddr + Ofs_txb);
2188 writew(spage, baseAddr + Control_reg);
2189 while (c > 0) {
2190 if (head > tail)
2191 len = head - tail - 1;
2192 else
2193 len = tx_mask + 1 - tail;
2194 len = (c > len) ? len : c;
2195 ofs = baseAddr + DynPage_addr + bufhead + tail;
2196 memcpy_toio(ofs, buffer, len);
2197 buffer += len;
2198 tail = (tail + len) & tx_mask;
2199 c -= len;
2200 }
2201 } else {
2202 pageno = spage + (tail >> 13);
2203 pageofs = tail & Page_mask;
2204 while (c > 0) {
2205 len = Page_size - pageofs;
2206 if (len > c)
2207 len = c;
2208 writeb(pageno, baseAddr + Control_reg);
2209 ofs = baseAddr + DynPage_addr + pageofs;
2210 memcpy_toio(ofs, buffer, len);
2211 buffer += len;
2212 if (++pageno == epage)
2213 pageno = spage;
2214 pageofs = 0;
2215 c -= len;
2216 }
2217 tail = (tail + total) & tx_mask;
2218 }
2219 writew(tail, ofsAddr + TXwptr);
2220 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2221 return total;
2222}
2223
2224static int MoxaPortReadData(struct moxa_port *port)
2225{
2226 struct tty_struct *tty = port->port.tty;
2227 unsigned char *dst;
2228 void __iomem *baseAddr, *ofsAddr, *ofs;
2229 unsigned int count, len, total;
2230 u16 tail, rx_mask, spage, epage;
2231 u16 pageno, pageofs, bufhead, head;
2232
2233 ofsAddr = port->tableAddr;
2234 baseAddr = port->board->basemem;
2235 head = readw(ofsAddr + RXrptr);
2236 tail = readw(ofsAddr + RXwptr);
2237 rx_mask = readw(ofsAddr + RX_mask);
2238 spage = readw(ofsAddr + Page_rxb);
2239 epage = readw(ofsAddr + EndPage_rxb);
2240 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
2241 if (count == 0)
2242 return 0;
2243
2244 total = count;
2245 moxaLog.rxcnt[tty->index] += total;
2246 if (spage == epage) {
2247 bufhead = readw(ofsAddr + Ofs_rxb);
2248 writew(spage, baseAddr + Control_reg);
2249 while (count > 0) {
2250 ofs = baseAddr + DynPage_addr + bufhead + head;
2251 len = (tail >= head) ? (tail - head) :
2252 (rx_mask + 1 - head);
2253 len = tty_prepare_flip_string(&port->port, &dst,
2254 min(len, count));
2255 memcpy_fromio(dst, ofs, len);
2256 head = (head + len) & rx_mask;
2257 count -= len;
2258 }
2259 } else {
2260 pageno = spage + (head >> 13);
2261 pageofs = head & Page_mask;
2262 while (count > 0) {
2263 writew(pageno, baseAddr + Control_reg);
2264 ofs = baseAddr + DynPage_addr + pageofs;
2265 len = tty_prepare_flip_string(&port->port, &dst,
2266 min(Page_size - pageofs, count));
2267 memcpy_fromio(dst, ofs, len);
2268
2269 count -= len;
2270 pageofs = (pageofs + len) & Page_mask;
2271 if (pageofs == 0 && ++pageno == epage)
2272 pageno = spage;
2273 }
2274 head = (head + total) & rx_mask;
2275 }
2276 writew(head, ofsAddr + RXrptr);
2277 if (readb(ofsAddr + FlagStat) & Xoff_state) {
2278 moxaLowWaterChk = 1;
2279 port->lowChkFlag = 1;
2280 }
2281 return total;
2282}
2283
2284
2285static unsigned int MoxaPortTxQueue(struct moxa_port *port)
2286{
2287 void __iomem *ofsAddr = port->tableAddr;
2288 u16 rptr, wptr, mask;
2289
2290 rptr = readw(ofsAddr + TXrptr);
2291 wptr = readw(ofsAddr + TXwptr);
2292 mask = readw(ofsAddr + TX_mask);
2293 return (wptr - rptr) & mask;
2294}
2295
2296static unsigned int MoxaPortTxFree(struct moxa_port *port)
2297{
2298 void __iomem *ofsAddr = port->tableAddr;
2299 u16 rptr, wptr, mask;
2300
2301 rptr = readw(ofsAddr + TXrptr);
2302 wptr = readw(ofsAddr + TXwptr);
2303 mask = readw(ofsAddr + TX_mask);
2304 return mask - ((wptr - rptr) & mask);
2305}
2306
2307static int MoxaPortRxQueue(struct moxa_port *port)
2308{
2309 void __iomem *ofsAddr = port->tableAddr;
2310 u16 rptr, wptr, mask;
2311
2312 rptr = readw(ofsAddr + RXrptr);
2313 wptr = readw(ofsAddr + RXwptr);
2314 mask = readw(ofsAddr + RX_mask);
2315 return (wptr - rptr) & mask;
2316}
2317
2318static void MoxaPortTxDisable(struct moxa_port *port)
2319{
2320 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
2321}
2322
2323static void MoxaPortTxEnable(struct moxa_port *port)
2324{
2325 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
2326}
2327
2328static int moxa_get_serial_info(struct tty_struct *tty,
2329 struct serial_struct *ss)
2330{
2331 struct moxa_port *info = tty->driver_data;
2332
2333 if (tty->index == MAX_PORTS)
2334 return -EINVAL;
2335 if (!info)
2336 return -ENODEV;
2337 mutex_lock(&info->port.mutex);
2338 ss->type = info->type;
2339 ss->line = info->port.tty->index;
2340 ss->flags = info->port.flags;
2341 ss->baud_base = 921600;
2342 ss->close_delay = jiffies_to_msecs(info->port.close_delay) / 10;
2343 mutex_unlock(&info->port.mutex);
2344 return 0;
2345}
2346
2347
2348static int moxa_set_serial_info(struct tty_struct *tty,
2349 struct serial_struct *ss)
2350{
2351 struct moxa_port *info = tty->driver_data;
2352 unsigned int close_delay;
2353
2354 if (tty->index == MAX_PORTS)
2355 return -EINVAL;
2356 if (!info)
2357 return -ENODEV;
2358
2359 close_delay = msecs_to_jiffies(ss->close_delay * 10);
2360
2361 mutex_lock(&info->port.mutex);
2362 if (!capable(CAP_SYS_ADMIN)) {
2363 if (close_delay != info->port.close_delay ||
2364 ss->type != info->type ||
2365 ((ss->flags & ~ASYNC_USR_MASK) !=
2366 (info->port.flags & ~ASYNC_USR_MASK))) {
2367 mutex_unlock(&info->port.mutex);
2368 return -EPERM;
2369 }
2370 } else {
2371 info->port.close_delay = close_delay;
2372
2373 MoxaSetFifo(info, ss->type == PORT_16550A);
2374
2375 info->type = ss->type;
2376 }
2377 mutex_unlock(&info->port.mutex);
2378 return 0;
2379}
2380
2381
2382
2383/*****************************************************************************
2384 * Static local functions: *
2385 *****************************************************************************/
2386
2387static void MoxaSetFifo(struct moxa_port *port, int enable)
2388{
2389 void __iomem *ofsAddr = port->tableAddr;
2390
2391 if (!enable) {
2392 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2393 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2394 } else {
2395 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2396 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2397 }
2398}