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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2015 Broadcom Corporation
4 */
5
6#ifndef _LINUX_BCM_PHY_LIB_H
7#define _LINUX_BCM_PHY_LIB_H
8
9#include <linux/brcmphy.h>
10#include <linux/phy.h>
11
12/* 28nm only register definitions */
13#define MISC_ADDR(base, channel) base, channel
14
15#define DSP_TAP10 MISC_ADDR(0x0a, 0)
16#define PLL_PLLCTRL_1 MISC_ADDR(0x32, 1)
17#define PLL_PLLCTRL_2 MISC_ADDR(0x32, 2)
18#define PLL_PLLCTRL_4 MISC_ADDR(0x33, 0)
19
20#define AFE_RXCONFIG_0 MISC_ADDR(0x38, 0)
21#define AFE_RXCONFIG_1 MISC_ADDR(0x38, 1)
22#define AFE_RXCONFIG_2 MISC_ADDR(0x38, 2)
23#define AFE_RX_LP_COUNTER MISC_ADDR(0x38, 3)
24#define AFE_TX_CONFIG MISC_ADDR(0x39, 0)
25#define AFE_VDCA_ICTRL_0 MISC_ADDR(0x39, 1)
26#define AFE_VDAC_OTHERS_0 MISC_ADDR(0x39, 3)
27#define AFE_HPF_TRIM_OTHERS MISC_ADDR(0x3a, 0)
28
29
30int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
31int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
32int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
33int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
34int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
35int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
36
37static inline int bcm_phy_write_exp_sel(struct phy_device *phydev,
38 u16 reg, u16 val)
39{
40 return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val);
41}
42
43int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val);
44int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum);
45
46int bcm_phy_write_misc(struct phy_device *phydev,
47 u16 reg, u16 chl, u16 value);
48int bcm_phy_read_misc(struct phy_device *phydev,
49 u16 reg, u16 chl);
50
51int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow,
52 u16 val);
53int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow);
54
55int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val);
56int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val);
57int __bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb);
58int bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb);
59int __bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask,
60 u16 set);
61int bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask,
62 u16 set);
63
64int bcm_phy_ack_intr(struct phy_device *phydev);
65int bcm_phy_config_intr(struct phy_device *phydev);
66
67int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down);
68
69int bcm_phy_set_eee(struct phy_device *phydev, bool enable);
70
71int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count);
72
73int bcm_phy_downshift_set(struct phy_device *phydev, u8 count);
74
75int bcm_phy_get_sset_count(struct phy_device *phydev);
76void bcm_phy_get_strings(struct phy_device *phydev, u8 *data);
77void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow,
78 struct ethtool_stats *stats, u64 *data);
79void bcm_phy_r_rc_cal_reset(struct phy_device *phydev);
80int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev);
81int bcm_phy_enable_jumbo(struct phy_device *phydev);
82
83int bcm_phy_cable_test_get_status_rdb(struct phy_device *phydev,
84 bool *finished);
85int bcm_phy_cable_test_start_rdb(struct phy_device *phydev);
86int bcm_phy_cable_test_start(struct phy_device *phydev);
87int bcm_phy_cable_test_get_status(struct phy_device *phydev, bool *finished);
88
89#endif /* _LINUX_BCM_PHY_LIB_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2015 Broadcom Corporation
4 */
5
6#ifndef _LINUX_BCM_PHY_LIB_H
7#define _LINUX_BCM_PHY_LIB_H
8
9#include <linux/brcmphy.h>
10#include <linux/phy.h>
11
12/* 28nm only register definitions */
13#define MISC_ADDR(base, channel) base, channel
14
15#define DSP_TAP10 MISC_ADDR(0x0a, 0)
16#define PLL_PLLCTRL_1 MISC_ADDR(0x32, 1)
17#define PLL_PLLCTRL_2 MISC_ADDR(0x32, 2)
18#define PLL_PLLCTRL_4 MISC_ADDR(0x33, 0)
19
20#define AFE_RXCONFIG_0 MISC_ADDR(0x38, 0)
21#define AFE_RXCONFIG_1 MISC_ADDR(0x38, 1)
22#define AFE_RXCONFIG_2 MISC_ADDR(0x38, 2)
23#define AFE_RX_LP_COUNTER MISC_ADDR(0x38, 3)
24#define AFE_TX_CONFIG MISC_ADDR(0x39, 0)
25#define AFE_VDCA_ICTRL_0 MISC_ADDR(0x39, 1)
26#define AFE_VDAC_OTHERS_0 MISC_ADDR(0x39, 3)
27#define AFE_HPF_TRIM_OTHERS MISC_ADDR(0x3a, 0)
28
29
30int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
31int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
32int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
33int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
34int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
35int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
36
37static inline int bcm_phy_write_exp_sel(struct phy_device *phydev,
38 u16 reg, u16 val)
39{
40 return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val);
41}
42
43int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val);
44int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum);
45
46int bcm_phy_write_misc(struct phy_device *phydev,
47 u16 reg, u16 chl, u16 value);
48int bcm_phy_read_misc(struct phy_device *phydev,
49 u16 reg, u16 chl);
50
51int bcm_phy_write_shadow(struct phy_device *phydev, u16 shadow,
52 u16 val);
53int bcm_phy_read_shadow(struct phy_device *phydev, u16 shadow);
54
55int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val);
56int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val);
57int __bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb);
58int bcm_phy_read_rdb(struct phy_device *phydev, u16 rdb);
59int __bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask,
60 u16 set);
61int bcm_phy_modify_rdb(struct phy_device *phydev, u16 rdb, u16 mask,
62 u16 set);
63
64int bcm_phy_ack_intr(struct phy_device *phydev);
65int bcm_phy_config_intr(struct phy_device *phydev);
66irqreturn_t bcm_phy_handle_interrupt(struct phy_device *phydev);
67
68int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down);
69
70int bcm_phy_set_eee(struct phy_device *phydev, bool enable);
71
72int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count);
73
74int bcm_phy_downshift_set(struct phy_device *phydev, u8 count);
75
76int bcm_phy_get_sset_count(struct phy_device *phydev);
77void bcm_phy_get_strings(struct phy_device *phydev, u8 *data);
78void bcm_phy_get_stats(struct phy_device *phydev, u64 *shadow,
79 struct ethtool_stats *stats, u64 *data);
80void bcm_phy_r_rc_cal_reset(struct phy_device *phydev);
81int bcm_phy_28nm_a0b0_afe_config_init(struct phy_device *phydev);
82int bcm_phy_enable_jumbo(struct phy_device *phydev);
83
84int bcm_phy_cable_test_get_status_rdb(struct phy_device *phydev,
85 bool *finished);
86int bcm_phy_cable_test_start_rdb(struct phy_device *phydev);
87int bcm_phy_cable_test_start(struct phy_device *phydev);
88int bcm_phy_cable_test_get_status(struct phy_device *phydev, bool *finished);
89
90#if IS_ENABLED(CONFIG_BCM_NET_PHYPTP)
91struct bcm_ptp_private *bcm_ptp_probe(struct phy_device *phydev);
92void bcm_ptp_config_init(struct phy_device *phydev);
93void bcm_ptp_stop(struct bcm_ptp_private *priv);
94#else
95static inline struct bcm_ptp_private *bcm_ptp_probe(struct phy_device *phydev)
96{
97 return NULL;
98}
99
100static inline void bcm_ptp_config_init(struct phy_device *phydev)
101{
102}
103
104static inline void bcm_ptp_stop(struct bcm_ptp_private *priv)
105{
106}
107#endif
108
109#endif /* _LINUX_BCM_PHY_LIB_H */