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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ZynqMP DisplayPort Subsystem Driver
4 *
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
6 *
7 * Authors:
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 */
11
12#include <linux/clk.h>
13#include <linux/dma-mapping.h>
14#include <linux/module.h>
15#include <linux/of_reserved_mem.h>
16#include <linux/platform_device.h>
17#include <linux/pm_runtime.h>
18
19#include <drm/drm_atomic_helper.h>
20#include <drm/drm_device.h>
21#include <drm/drm_drv.h>
22#include <drm/drm_fb_helper.h>
23#include <drm/drm_fourcc.h>
24#include <drm/drm_gem_cma_helper.h>
25#include <drm/drm_gem_framebuffer_helper.h>
26#include <drm/drm_managed.h>
27#include <drm/drm_mode_config.h>
28#include <drm/drm_probe_helper.h>
29#include <drm/drm_vblank.h>
30
31#include "zynqmp_disp.h"
32#include "zynqmp_dp.h"
33#include "zynqmp_dpsub.h"
34
35/* -----------------------------------------------------------------------------
36 * Dumb Buffer & Framebuffer Allocation
37 */
38
39static int zynqmp_dpsub_dumb_create(struct drm_file *file_priv,
40 struct drm_device *drm,
41 struct drm_mode_create_dumb *args)
42{
43 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
44 unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
45
46 /* Enforce the alignment constraints of the DMA engine. */
47 args->pitch = ALIGN(pitch, dpsub->dma_align);
48
49 return drm_gem_cma_dumb_create_internal(file_priv, drm, args);
50}
51
52static struct drm_framebuffer *
53zynqmp_dpsub_fb_create(struct drm_device *drm, struct drm_file *file_priv,
54 const struct drm_mode_fb_cmd2 *mode_cmd)
55{
56 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
57 struct drm_mode_fb_cmd2 cmd = *mode_cmd;
58 unsigned int i;
59
60 /* Enforce the alignment constraints of the DMA engine. */
61 for (i = 0; i < ARRAY_SIZE(cmd.pitches); ++i)
62 cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align);
63
64 return drm_gem_fb_create(drm, file_priv, &cmd);
65}
66
67static const struct drm_mode_config_funcs zynqmp_dpsub_mode_config_funcs = {
68 .fb_create = zynqmp_dpsub_fb_create,
69 .atomic_check = drm_atomic_helper_check,
70 .atomic_commit = drm_atomic_helper_commit,
71};
72
73/* -----------------------------------------------------------------------------
74 * DRM/KMS Driver
75 */
76
77DEFINE_DRM_GEM_CMA_FOPS(zynqmp_dpsub_drm_fops);
78
79static struct drm_driver zynqmp_dpsub_drm_driver = {
80 .driver_features = DRIVER_MODESET | DRIVER_GEM |
81 DRIVER_ATOMIC,
82
83 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
84 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
85 .gem_prime_export = drm_gem_prime_export,
86 .gem_prime_import = drm_gem_prime_import,
87 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
88 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
89 .gem_prime_vmap = drm_gem_cma_prime_vmap,
90 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
91 .gem_prime_mmap = drm_gem_cma_prime_mmap,
92 .gem_free_object_unlocked = drm_gem_cma_free_object,
93 .gem_vm_ops = &drm_gem_cma_vm_ops,
94 .dumb_create = zynqmp_dpsub_dumb_create,
95 .dumb_destroy = drm_gem_dumb_destroy,
96
97 .fops = &zynqmp_dpsub_drm_fops,
98
99 .name = "zynqmp-dpsub",
100 .desc = "Xilinx DisplayPort Subsystem Driver",
101 .date = "20130509",
102 .major = 1,
103 .minor = 0,
104};
105
106static int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)
107{
108 struct drm_device *drm = &dpsub->drm;
109 int ret;
110
111 /* Initialize mode config, vblank and the KMS poll helper. */
112 ret = drmm_mode_config_init(drm);
113 if (ret < 0)
114 goto err_dev_put;
115
116 drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs;
117 drm->mode_config.min_width = 0;
118 drm->mode_config.min_height = 0;
119 drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH;
120 drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT;
121
122 ret = drm_vblank_init(drm, 1);
123 if (ret)
124 goto err_dev_put;
125
126 drm->irq_enabled = 1;
127
128 drm_kms_helper_poll_init(drm);
129
130 /*
131 * Initialize the DISP and DP components. This will creates planes,
132 * CRTC, encoder and connector. The DISP should be initialized first as
133 * the DP encoder needs the CRTC.
134 */
135 ret = zynqmp_disp_drm_init(dpsub);
136 if (ret)
137 goto err_poll_fini;
138
139 ret = zynqmp_dp_drm_init(dpsub);
140 if (ret)
141 goto err_poll_fini;
142
143 /* Reset all components and register the DRM device. */
144 drm_mode_config_reset(drm);
145
146 ret = drm_dev_register(drm, 0);
147 if (ret < 0)
148 goto err_poll_fini;
149
150 /* Initialize fbdev generic emulation. */
151 drm_fbdev_generic_setup(drm, 24);
152
153 return 0;
154
155err_poll_fini:
156 drm_kms_helper_poll_fini(drm);
157err_dev_put:
158 drm_dev_put(drm);
159 return ret;
160}
161
162/* -----------------------------------------------------------------------------
163 * Power Management
164 */
165
166static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev)
167{
168 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
169
170 return drm_mode_config_helper_suspend(&dpsub->drm);
171}
172
173static int __maybe_unused zynqmp_dpsub_resume(struct device *dev)
174{
175 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
176
177 return drm_mode_config_helper_resume(&dpsub->drm);
178}
179
180static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
181 SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume)
182};
183
184/* -----------------------------------------------------------------------------
185 * Probe & Remove
186 */
187
188static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub)
189{
190 int ret;
191
192 dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk");
193 if (IS_ERR(dpsub->apb_clk))
194 return PTR_ERR(dpsub->apb_clk);
195
196 ret = clk_prepare_enable(dpsub->apb_clk);
197 if (ret) {
198 dev_err(dpsub->dev, "failed to enable the APB clock\n");
199 return ret;
200 }
201
202 return 0;
203}
204
205static int zynqmp_dpsub_probe(struct platform_device *pdev)
206{
207 struct zynqmp_dpsub *dpsub;
208 int ret;
209
210 /* Allocate private data. */
211 dpsub = kzalloc(sizeof(*dpsub), GFP_KERNEL);
212 if (!dpsub)
213 return -ENOMEM;
214
215 dpsub->dev = &pdev->dev;
216 platform_set_drvdata(pdev, dpsub);
217
218 dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT));
219
220 /*
221 * Initialize the DRM device early, as the DRM core mandates usage of
222 * the managed memory helpers tied to the DRM device.
223 */
224 ret = drm_dev_init(&dpsub->drm, &zynqmp_dpsub_drm_driver, &pdev->dev);
225 if (ret < 0) {
226 kfree(dpsub);
227 return ret;
228 }
229
230 drmm_add_final_kfree(&dpsub->drm, dpsub);
231
232 /* Try the reserved memory. Proceed if there's none. */
233 of_reserved_mem_device_init(&pdev->dev);
234
235 ret = zynqmp_dpsub_init_clocks(dpsub);
236 if (ret < 0)
237 goto err_mem;
238
239 pm_runtime_enable(&pdev->dev);
240
241 /*
242 * DP should be probed first so that the zynqmp_disp can set the output
243 * format accordingly.
244 */
245 ret = zynqmp_dp_probe(dpsub, &dpsub->drm);
246 if (ret)
247 goto err_pm;
248
249 ret = zynqmp_disp_probe(dpsub, &dpsub->drm);
250 if (ret)
251 goto err_dp;
252
253 ret = zynqmp_dpsub_drm_init(dpsub);
254 if (ret)
255 goto err_disp;
256
257 dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed");
258
259 return 0;
260
261err_disp:
262 zynqmp_disp_remove(dpsub);
263err_dp:
264 zynqmp_dp_remove(dpsub);
265err_pm:
266 pm_runtime_disable(&pdev->dev);
267 clk_disable_unprepare(dpsub->apb_clk);
268err_mem:
269 of_reserved_mem_device_release(&pdev->dev);
270 return ret;
271}
272
273static int zynqmp_dpsub_remove(struct platform_device *pdev)
274{
275 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
276 struct drm_device *drm = &dpsub->drm;
277
278 drm_dev_unregister(drm);
279 drm_atomic_helper_shutdown(drm);
280 drm_kms_helper_poll_fini(drm);
281
282 zynqmp_disp_remove(dpsub);
283 zynqmp_dp_remove(dpsub);
284
285 pm_runtime_disable(&pdev->dev);
286 clk_disable_unprepare(dpsub->apb_clk);
287 of_reserved_mem_device_release(&pdev->dev);
288
289 drm_dev_put(drm);
290
291 return 0;
292}
293
294static void zynqmp_dpsub_shutdown(struct platform_device *pdev)
295{
296 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
297
298 drm_atomic_helper_shutdown(&dpsub->drm);
299}
300
301static const struct of_device_id zynqmp_dpsub_of_match[] = {
302 { .compatible = "xlnx,zynqmp-dpsub-1.7", },
303 { /* end of table */ },
304};
305MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match);
306
307static struct platform_driver zynqmp_dpsub_driver = {
308 .probe = zynqmp_dpsub_probe,
309 .remove = zynqmp_dpsub_remove,
310 .shutdown = zynqmp_dpsub_shutdown,
311 .driver = {
312 .name = "zynqmp-dpsub",
313 .pm = &zynqmp_dpsub_pm_ops,
314 .of_match_table = zynqmp_dpsub_of_match,
315 },
316};
317
318module_platform_driver(zynqmp_dpsub_driver);
319
320MODULE_AUTHOR("Xilinx, Inc.");
321MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver");
322MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ZynqMP DisplayPort Subsystem Driver
4 *
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
6 *
7 * Authors:
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 */
11
12#include <linux/clk.h>
13#include <linux/dma-mapping.h>
14#include <linux/module.h>
15#include <linux/of_graph.h>
16#include <linux/of_reserved_mem.h>
17#include <linux/platform_device.h>
18#include <linux/pm_runtime.h>
19#include <linux/slab.h>
20
21#include <drm/drm_atomic_helper.h>
22#include <drm/drm_bridge.h>
23#include <drm/drm_modeset_helper.h>
24#include <drm/drm_module.h>
25
26#include "zynqmp_disp.h"
27#include "zynqmp_dp.h"
28#include "zynqmp_dpsub.h"
29#include "zynqmp_kms.h"
30
31/* -----------------------------------------------------------------------------
32 * Power Management
33 */
34
35static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev)
36{
37 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
38
39 if (!dpsub->drm)
40 return 0;
41
42 return drm_mode_config_helper_suspend(&dpsub->drm->dev);
43}
44
45static int __maybe_unused zynqmp_dpsub_resume(struct device *dev)
46{
47 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
48
49 if (!dpsub->drm)
50 return 0;
51
52 return drm_mode_config_helper_resume(&dpsub->drm->dev);
53}
54
55static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
56 SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume)
57};
58
59/* -----------------------------------------------------------------------------
60 * DPSUB Configuration
61 */
62
63/**
64 * zynqmp_dpsub_audio_enabled - If the audio is enabled
65 * @dpsub: DisplayPort subsystem
66 *
67 * Return if the audio is enabled depending on the audio clock.
68 *
69 * Return: true if audio is enabled, or false.
70 */
71bool zynqmp_dpsub_audio_enabled(struct zynqmp_dpsub *dpsub)
72{
73 return !!dpsub->aud_clk;
74}
75
76/**
77 * zynqmp_dpsub_get_audio_clk_rate - Get the current audio clock rate
78 * @dpsub: DisplayPort subsystem
79 *
80 * Return: the current audio clock rate.
81 */
82unsigned int zynqmp_dpsub_get_audio_clk_rate(struct zynqmp_dpsub *dpsub)
83{
84 if (zynqmp_dpsub_audio_enabled(dpsub))
85 return 0;
86 return clk_get_rate(dpsub->aud_clk);
87}
88
89/* -----------------------------------------------------------------------------
90 * Probe & Remove
91 */
92
93static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub)
94{
95 int ret;
96
97 dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk");
98 if (IS_ERR(dpsub->apb_clk))
99 return PTR_ERR(dpsub->apb_clk);
100
101 ret = clk_prepare_enable(dpsub->apb_clk);
102 if (ret) {
103 dev_err(dpsub->dev, "failed to enable the APB clock\n");
104 return ret;
105 }
106
107 /*
108 * Try the live PL video clock, and fall back to the PS clock if the
109 * live PL video clock isn't valid.
110 */
111 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_live_video_in_clk");
112 if (!IS_ERR(dpsub->vid_clk))
113 dpsub->vid_clk_from_ps = false;
114 else if (PTR_ERR(dpsub->vid_clk) == -EPROBE_DEFER)
115 return PTR_ERR(dpsub->vid_clk);
116
117 if (IS_ERR_OR_NULL(dpsub->vid_clk)) {
118 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_vtc_pixel_clk_in");
119 if (IS_ERR(dpsub->vid_clk)) {
120 dev_err(dpsub->dev, "failed to init any video clock\n");
121 return PTR_ERR(dpsub->vid_clk);
122 }
123 dpsub->vid_clk_from_ps = true;
124 }
125
126 /*
127 * Try the live PL audio clock, and fall back to the PS clock if the
128 * live PL audio clock isn't valid. Missing audio clock disables audio
129 * but isn't an error.
130 */
131 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_live_audio_aclk");
132 if (!IS_ERR(dpsub->aud_clk)) {
133 dpsub->aud_clk_from_ps = false;
134 return 0;
135 }
136
137 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_aud_clk");
138 if (!IS_ERR(dpsub->aud_clk)) {
139 dpsub->aud_clk_from_ps = true;
140 return 0;
141 }
142
143 dev_info(dpsub->dev, "audio disabled due to missing clock\n");
144 return 0;
145}
146
147static int zynqmp_dpsub_parse_dt(struct zynqmp_dpsub *dpsub)
148{
149 struct device_node *np;
150 unsigned int i;
151
152 /*
153 * For backward compatibility with old device trees that don't contain
154 * ports, consider that only the DP output port is connected if no
155 * ports child no exists.
156 */
157 np = of_get_child_by_name(dpsub->dev->of_node, "ports");
158 of_node_put(np);
159 if (!np) {
160 dev_warn(dpsub->dev, "missing ports, update DT bindings\n");
161 dpsub->connected_ports = BIT(ZYNQMP_DPSUB_PORT_OUT_DP);
162 dpsub->dma_enabled = true;
163 return 0;
164 }
165
166 /* Check which ports are connected. */
167 for (i = 0; i < ZYNQMP_DPSUB_NUM_PORTS; ++i) {
168 struct device_node *np;
169
170 np = of_graph_get_remote_node(dpsub->dev->of_node, i, -1);
171 if (np) {
172 dpsub->connected_ports |= BIT(i);
173 of_node_put(np);
174 }
175 }
176
177 /* Sanity checks. */
178 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) &&
179 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))) {
180 dev_err(dpsub->dev, "only one live video input is supported\n");
181 return -EINVAL;
182 }
183
184 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) ||
185 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))) {
186 if (dpsub->vid_clk_from_ps) {
187 dev_err(dpsub->dev,
188 "live video input requires PL clock\n");
189 return -EINVAL;
190 }
191 } else {
192 dpsub->dma_enabled = true;
193 }
194
195 if (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_AUDIO))
196 dev_warn(dpsub->dev, "live audio unsupported, ignoring\n");
197
198 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_VIDEO)) ||
199 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_AUDIO)))
200 dev_warn(dpsub->dev, "output to PL unsupported, ignoring\n");
201
202 if (!(dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_DP))) {
203 dev_err(dpsub->dev, "DP output port not connected\n");
204 return -EINVAL;
205 }
206
207 return 0;
208}
209
210void zynqmp_dpsub_release(struct zynqmp_dpsub *dpsub)
211{
212 kfree(dpsub->disp);
213 kfree(dpsub->dp);
214 kfree(dpsub);
215}
216
217static int zynqmp_dpsub_probe(struct platform_device *pdev)
218{
219 struct zynqmp_dpsub *dpsub;
220 int ret;
221
222 /* Allocate private data. */
223 dpsub = kzalloc(sizeof(*dpsub), GFP_KERNEL);
224 if (!dpsub)
225 return -ENOMEM;
226
227 dpsub->dev = &pdev->dev;
228 platform_set_drvdata(pdev, dpsub);
229
230 dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT));
231
232 /* Try the reserved memory. Proceed if there's none. */
233 of_reserved_mem_device_init(&pdev->dev);
234
235 ret = zynqmp_dpsub_init_clocks(dpsub);
236 if (ret < 0)
237 goto err_mem;
238
239 ret = zynqmp_dpsub_parse_dt(dpsub);
240 if (ret < 0)
241 goto err_mem;
242
243 pm_runtime_enable(&pdev->dev);
244
245 /*
246 * DP should be probed first so that the zynqmp_disp can set the output
247 * format accordingly.
248 */
249 ret = zynqmp_dp_probe(dpsub);
250 if (ret)
251 goto err_pm;
252
253 ret = zynqmp_disp_probe(dpsub);
254 if (ret)
255 goto err_dp;
256
257 if (dpsub->dma_enabled) {
258 ret = zynqmp_dpsub_drm_init(dpsub);
259 if (ret)
260 goto err_disp;
261 } else {
262 drm_bridge_add(dpsub->bridge);
263 }
264
265 dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed");
266
267 return 0;
268
269err_disp:
270 zynqmp_disp_remove(dpsub);
271err_dp:
272 zynqmp_dp_remove(dpsub);
273err_pm:
274 pm_runtime_disable(&pdev->dev);
275 clk_disable_unprepare(dpsub->apb_clk);
276err_mem:
277 of_reserved_mem_device_release(&pdev->dev);
278 if (!dpsub->drm)
279 zynqmp_dpsub_release(dpsub);
280 return ret;
281}
282
283static int zynqmp_dpsub_remove(struct platform_device *pdev)
284{
285 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
286
287 if (dpsub->drm)
288 zynqmp_dpsub_drm_cleanup(dpsub);
289 else
290 drm_bridge_remove(dpsub->bridge);
291
292 zynqmp_disp_remove(dpsub);
293 zynqmp_dp_remove(dpsub);
294
295 pm_runtime_disable(&pdev->dev);
296 clk_disable_unprepare(dpsub->apb_clk);
297 of_reserved_mem_device_release(&pdev->dev);
298
299 if (!dpsub->drm)
300 zynqmp_dpsub_release(dpsub);
301
302 return 0;
303}
304
305static void zynqmp_dpsub_shutdown(struct platform_device *pdev)
306{
307 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
308
309 if (!dpsub->drm)
310 return;
311
312 drm_atomic_helper_shutdown(&dpsub->drm->dev);
313}
314
315static const struct of_device_id zynqmp_dpsub_of_match[] = {
316 { .compatible = "xlnx,zynqmp-dpsub-1.7", },
317 { /* end of table */ },
318};
319MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match);
320
321static struct platform_driver zynqmp_dpsub_driver = {
322 .probe = zynqmp_dpsub_probe,
323 .remove = zynqmp_dpsub_remove,
324 .shutdown = zynqmp_dpsub_shutdown,
325 .driver = {
326 .name = "zynqmp-dpsub",
327 .pm = &zynqmp_dpsub_pm_ops,
328 .of_match_table = zynqmp_dpsub_of_match,
329 },
330};
331
332drm_module_platform_driver(zynqmp_dpsub_driver);
333
334MODULE_AUTHOR("Xilinx, Inc.");
335MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver");
336MODULE_LICENSE("GPL v2");