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1/*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef _DCN30_RESOURCE_H_
27#define _DCN30_RESOURCE_H_
28
29#include "core_types.h"
30
31#define TO_DCN30_RES_POOL(pool)\
32 container_of(pool, struct dcn30_resource_pool, base)
33
34struct dc;
35struct resource_pool;
36struct _vcs_dpi_display_pipe_params_st;
37
38struct dcn30_resource_pool {
39 struct resource_pool base;
40};
41struct resource_pool *dcn30_create_resource_pool(
42 const struct dc_init_data *init_data,
43 struct dc *dc);
44
45void dcn30_set_mcif_arb_params(
46 struct dc *dc,
47 struct dc_state *context,
48 display_e2e_pipe_params_st *pipes,
49 int pipe_cnt);
50
51unsigned int dcn30_calc_max_scaled_time(
52 unsigned int time_per_pixel,
53 enum mmhubbub_wbif_mode mode,
54 unsigned int urgent_watermark);
55
56bool dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
57 bool fast_validate);
58void dcn30_populate_dml_writeback_from_context(
59 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
60
61int dcn30_populate_dml_pipes_from_context(
62 struct dc *dc, struct dc_state *context,
63 display_e2e_pipe_params_st *pipes);
64
65bool dcn30_acquire_post_bldn_3dlut(
66 struct resource_context *res_ctx,
67 const struct resource_pool *pool,
68 int mpcc_id,
69 struct dc_3dlut **lut,
70 struct dc_transfer_func **shaper);
71
72bool dcn30_release_post_bldn_3dlut(
73 struct resource_context *res_ctx,
74 const struct resource_pool *pool,
75 struct dc_3dlut **lut,
76 struct dc_transfer_func **shaper);
77
78enum dc_status dcn30_add_stream_to_ctx(
79 struct dc *dc,
80 struct dc_state *new_ctx,
81 struct dc_stream_state *dc_stream);
82#endif /* _DCN30_RESOURCE_H_ */
1/*
2 * Copyright 2020 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef _DCN30_RESOURCE_H_
27#define _DCN30_RESOURCE_H_
28
29#include "core_types.h"
30
31#define TO_DCN30_RES_POOL(pool)\
32 container_of(pool, struct dcn30_resource_pool, base)
33
34struct dc;
35struct resource_pool;
36struct _vcs_dpi_display_pipe_params_st;
37
38extern struct _vcs_dpi_ip_params_st dcn3_0_ip;
39extern struct _vcs_dpi_soc_bounding_box_st dcn3_0_soc;
40
41struct dcn30_resource_pool {
42 struct resource_pool base;
43};
44struct resource_pool *dcn30_create_resource_pool(
45 const struct dc_init_data *init_data,
46 struct dc *dc);
47
48void dcn30_set_mcif_arb_params(
49 struct dc *dc,
50 struct dc_state *context,
51 display_e2e_pipe_params_st *pipes,
52 int pipe_cnt);
53
54unsigned int dcn30_calc_max_scaled_time(
55 unsigned int time_per_pixel,
56 enum mmhubbub_wbif_mode mode,
57 unsigned int urgent_watermark);
58
59bool dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
60 bool fast_validate);
61bool dcn30_internal_validate_bw(
62 struct dc *dc,
63 struct dc_state *context,
64 display_e2e_pipe_params_st *pipes,
65 int *pipe_cnt_out,
66 int *vlevel_out,
67 bool fast_validate);
68void dcn30_calculate_wm_and_dlg(
69 struct dc *dc, struct dc_state *context,
70 display_e2e_pipe_params_st *pipes,
71 int pipe_cnt,
72 int vlevel);
73void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
74void dcn30_populate_dml_writeback_from_context(
75 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
76
77int dcn30_populate_dml_pipes_from_context(
78 struct dc *dc, struct dc_state *context,
79 display_e2e_pipe_params_st *pipes,
80 bool fast_validate);
81
82bool dcn30_acquire_post_bldn_3dlut(
83 struct resource_context *res_ctx,
84 const struct resource_pool *pool,
85 int mpcc_id,
86 struct dc_3dlut **lut,
87 struct dc_transfer_func **shaper);
88
89bool dcn30_release_post_bldn_3dlut(
90 struct resource_context *res_ctx,
91 const struct resource_pool *pool,
92 struct dc_3dlut **lut,
93 struct dc_transfer_func **shaper);
94
95enum dc_status dcn30_add_stream_to_ctx(
96 struct dc *dc,
97 struct dc_state *new_ctx,
98 struct dc_stream_state *dc_stream);
99
100void dcn30_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
101
102bool dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);
103void dcn30_setup_mclk_switch_using_fw_based_vblank_stretch(struct dc *dc, struct dc_state *context);
104int dcn30_find_dummy_latency_index_for_fw_based_mclk_switch(struct dc *dc, struct dc_state *context,
105 display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel);
106
107#endif /* _DCN30_RESOURCE_H_ */