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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Derived from arch/i386/kernel/irq.c
4 * Copyright (C) 1992 Linus Torvalds
5 * Adapted from arch/i386 by Gary Thomas
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
8 * Copyright (C) 1996-2001 Cort Dougan
9 * Adapted for Power Macintosh by Paul Mackerras
10 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
11 *
12 * This file contains the code used by various IRQ handling routines:
13 * asking for different IRQ's should be done through these routines
14 * instead of just grabbing them. Thus setups with different IRQ numbers
15 * shouldn't result in any weird surprises, and installing new handlers
16 * should be easier.
17 */
18
19#undef DEBUG
20
21#include <linux/export.h>
22#include <linux/threads.h>
23#include <linux/kernel_stat.h>
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/ptrace.h>
27#include <linux/ioport.h>
28#include <linux/interrupt.h>
29#include <linux/timex.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/delay.h>
33#include <linux/irq.h>
34#include <linux/seq_file.h>
35#include <linux/cpumask.h>
36#include <linux/profile.h>
37#include <linux/bitops.h>
38#include <linux/list.h>
39#include <linux/radix-tree.h>
40#include <linux/mutex.h>
41#include <linux/pci.h>
42#include <linux/debugfs.h>
43#include <linux/of.h>
44#include <linux/of_irq.h>
45#include <linux/vmalloc.h>
46#include <linux/pgtable.h>
47#include <linux/static_call.h>
48
49#include <linux/uaccess.h>
50#include <asm/interrupt.h>
51#include <asm/io.h>
52#include <asm/irq.h>
53#include <asm/cache.h>
54#include <asm/ptrace.h>
55#include <asm/machdep.h>
56#include <asm/udbg.h>
57#include <asm/smp.h>
58#include <asm/hw_irq.h>
59#include <asm/softirq_stack.h>
60#include <asm/ppc_asm.h>
61
62#include <asm/paca.h>
63#include <asm/firmware.h>
64#include <asm/lv1call.h>
65#include <asm/dbell.h>
66#include <asm/trace.h>
67#include <asm/cpu_has_feature.h>
68
69int distribute_irqs = 1;
70
71static inline void next_interrupt(struct pt_regs *regs)
72{
73 /*
74 * Softirq processing can enable/disable irqs, which will leave
75 * MSR[EE] enabled and the soft mask set to IRQS_DISABLED. Fix
76 * this up.
77 */
78 if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS))
79 hard_irq_disable();
80 else
81 irq_soft_mask_set(IRQS_ALL_DISABLED);
82
83 /*
84 * We are responding to the next interrupt, so interrupt-off
85 * latencies should be reset here.
86 */
87 trace_hardirqs_on();
88 trace_hardirqs_off();
89}
90
91static inline bool irq_happened_test_and_clear(u8 irq)
92{
93 if (local_paca->irq_happened & irq) {
94 local_paca->irq_happened &= ~irq;
95 return true;
96 }
97 return false;
98}
99
100void replay_soft_interrupts(void)
101{
102 struct pt_regs regs;
103
104 /*
105 * Be careful here, calling these interrupt handlers can cause
106 * softirqs to be raised, which they may run when calling irq_exit,
107 * which will cause local_irq_enable() to be run, which can then
108 * recurse into this function. Don't keep any state across
109 * interrupt handler calls which may change underneath us.
110 *
111 * Softirqs can not be disabled over replay to stop this recursion
112 * because interrupts taken in idle code may require RCU softirq
113 * to run in the irq RCU tracking context. This is a hard problem
114 * to fix without changes to the softirq or idle layer.
115 *
116 * We use local_paca rather than get_paca() to avoid all the
117 * debug_smp_processor_id() business in this low level function.
118 */
119
120 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) {
121 WARN_ON_ONCE(mfmsr() & MSR_EE);
122 WARN_ON(!(local_paca->irq_happened & PACA_IRQ_HARD_DIS));
123 }
124
125 ppc_save_regs(®s);
126 regs.softe = IRQS_ENABLED;
127 regs.msr |= MSR_EE;
128
129again:
130 /*
131 * Force the delivery of pending soft-disabled interrupts on PS3.
132 * Any HV call will have this side effect.
133 */
134 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
135 u64 tmp, tmp2;
136 lv1_get_version_info(&tmp, &tmp2);
137 }
138
139 /*
140 * Check if an hypervisor Maintenance interrupt happened.
141 * This is a higher priority interrupt than the others, so
142 * replay it first.
143 */
144 if (IS_ENABLED(CONFIG_PPC_BOOK3S) &&
145 irq_happened_test_and_clear(PACA_IRQ_HMI)) {
146 regs.trap = INTERRUPT_HMI;
147 handle_hmi_exception(®s);
148 next_interrupt(®s);
149 }
150
151 if (irq_happened_test_and_clear(PACA_IRQ_DEC)) {
152 regs.trap = INTERRUPT_DECREMENTER;
153 timer_interrupt(®s);
154 next_interrupt(®s);
155 }
156
157 if (irq_happened_test_and_clear(PACA_IRQ_EE)) {
158 regs.trap = INTERRUPT_EXTERNAL;
159 do_IRQ(®s);
160 next_interrupt(®s);
161 }
162
163 if (IS_ENABLED(CONFIG_PPC_DOORBELL) &&
164 irq_happened_test_and_clear(PACA_IRQ_DBELL)) {
165 regs.trap = INTERRUPT_DOORBELL;
166 doorbell_exception(®s);
167 next_interrupt(®s);
168 }
169
170 /* Book3E does not support soft-masking PMI interrupts */
171 if (IS_ENABLED(CONFIG_PPC_BOOK3S) &&
172 irq_happened_test_and_clear(PACA_IRQ_PMI)) {
173 regs.trap = INTERRUPT_PERFMON;
174 performance_monitor_exception(®s);
175 next_interrupt(®s);
176 }
177
178 /*
179 * Softirq processing can enable and disable interrupts, which can
180 * result in new irqs becoming pending. Must keep looping until we
181 * have cleared out all pending interrupts.
182 */
183 if (local_paca->irq_happened & ~PACA_IRQ_HARD_DIS)
184 goto again;
185}
186
187#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_KUAP)
188static inline void replay_soft_interrupts_irqrestore(void)
189{
190 unsigned long kuap_state = get_kuap();
191
192 /*
193 * Check if anything calls local_irq_enable/restore() when KUAP is
194 * disabled (user access enabled). We handle that case here by saving
195 * and re-locking AMR but we shouldn't get here in the first place,
196 * hence the warning.
197 */
198 kuap_assert_locked();
199
200 if (kuap_state != AMR_KUAP_BLOCKED)
201 set_kuap(AMR_KUAP_BLOCKED);
202
203 replay_soft_interrupts();
204
205 if (kuap_state != AMR_KUAP_BLOCKED)
206 set_kuap(kuap_state);
207}
208#else
209#define replay_soft_interrupts_irqrestore() replay_soft_interrupts()
210#endif
211
212notrace void arch_local_irq_restore(unsigned long mask)
213{
214 unsigned char irq_happened;
215
216 /* Write the new soft-enabled value if it is a disable */
217 if (mask) {
218 irq_soft_mask_set(mask);
219 return;
220 }
221
222 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
223 WARN_ON_ONCE(in_nmi() || in_hardirq());
224
225 /*
226 * After the stb, interrupts are unmasked and there are no interrupts
227 * pending replay. The restart sequence makes this atomic with
228 * respect to soft-masked interrupts. If this was just a simple code
229 * sequence, a soft-masked interrupt could become pending right after
230 * the comparison and before the stb.
231 *
232 * This allows interrupts to be unmasked without hard disabling, and
233 * also without new hard interrupts coming in ahead of pending ones.
234 */
235 asm_volatile_goto(
236"1: \n"
237" lbz 9,%0(13) \n"
238" cmpwi 9,0 \n"
239" bne %l[happened] \n"
240" stb 9,%1(13) \n"
241"2: \n"
242 RESTART_TABLE(1b, 2b, 1b)
243 : : "i" (offsetof(struct paca_struct, irq_happened)),
244 "i" (offsetof(struct paca_struct, irq_soft_mask))
245 : "cr0", "r9"
246 : happened);
247
248 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
249 WARN_ON_ONCE(!(mfmsr() & MSR_EE));
250
251 return;
252
253happened:
254 irq_happened = READ_ONCE(local_paca->irq_happened);
255 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
256 WARN_ON_ONCE(!irq_happened);
257
258 if (irq_happened == PACA_IRQ_HARD_DIS) {
259 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
260 WARN_ON_ONCE(mfmsr() & MSR_EE);
261 irq_soft_mask_set(IRQS_ENABLED);
262 local_paca->irq_happened = 0;
263 __hard_irq_enable();
264 return;
265 }
266
267 /* Have interrupts to replay, need to hard disable first */
268 if (!(irq_happened & PACA_IRQ_HARD_DIS)) {
269 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) {
270 if (!(mfmsr() & MSR_EE)) {
271 /*
272 * An interrupt could have come in and cleared
273 * MSR[EE] and set IRQ_HARD_DIS, so check
274 * IRQ_HARD_DIS again and warn if it is still
275 * clear.
276 */
277 irq_happened = READ_ONCE(local_paca->irq_happened);
278 WARN_ON_ONCE(!(irq_happened & PACA_IRQ_HARD_DIS));
279 }
280 }
281 __hard_irq_disable();
282 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
283 } else {
284 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) {
285 if (WARN_ON_ONCE(mfmsr() & MSR_EE))
286 __hard_irq_disable();
287 }
288 }
289
290 /*
291 * Disable preempt here, so that the below preempt_enable will
292 * perform resched if required (a replayed interrupt may set
293 * need_resched).
294 */
295 preempt_disable();
296 irq_soft_mask_set(IRQS_ALL_DISABLED);
297 trace_hardirqs_off();
298
299 replay_soft_interrupts_irqrestore();
300
301 trace_hardirqs_on();
302 irq_soft_mask_set(IRQS_ENABLED);
303 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
304 WARN_ON(local_paca->irq_happened != PACA_IRQ_HARD_DIS);
305 local_paca->irq_happened = 0;
306 __hard_irq_enable();
307 preempt_enable();
308}
309EXPORT_SYMBOL(arch_local_irq_restore);
310
311/*
312 * This is a helper to use when about to go into idle low-power
313 * when the latter has the side effect of re-enabling interrupts
314 * (such as calling H_CEDE under pHyp).
315 *
316 * You call this function with interrupts soft-disabled (this is
317 * already the case when ppc_md.power_save is called). The function
318 * will return whether to enter power save or just return.
319 *
320 * In the former case, it will have notified lockdep of interrupts
321 * being re-enabled and generally sanitized the lazy irq state,
322 * and in the latter case it will leave with interrupts hard
323 * disabled and marked as such, so the local_irq_enable() call
324 * in arch_cpu_idle() will properly re-enable everything.
325 */
326bool prep_irq_for_idle(void)
327{
328 /*
329 * First we need to hard disable to ensure no interrupt
330 * occurs before we effectively enter the low power state
331 */
332 __hard_irq_disable();
333 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
334
335 /*
336 * If anything happened while we were soft-disabled,
337 * we return now and do not enter the low power state.
338 */
339 if (lazy_irq_pending())
340 return false;
341
342 /* Tell lockdep we are about to re-enable */
343 trace_hardirqs_on();
344
345 /*
346 * Mark interrupts as soft-enabled and clear the
347 * PACA_IRQ_HARD_DIS from the pending mask since we
348 * are about to hard enable as well as a side effect
349 * of entering the low power state.
350 */
351 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
352 irq_soft_mask_set(IRQS_ENABLED);
353
354 /* Tell the caller to enter the low power state */
355 return true;
356}
357
358#ifdef CONFIG_PPC_BOOK3S
359/*
360 * This is for idle sequences that return with IRQs off, but the
361 * idle state itself wakes on interrupt. Tell the irq tracer that
362 * IRQs are enabled for the duration of idle so it does not get long
363 * off times. Must be paired with fini_irq_for_idle_irqsoff.
364 */
365bool prep_irq_for_idle_irqsoff(void)
366{
367 WARN_ON(!irqs_disabled());
368
369 /*
370 * First we need to hard disable to ensure no interrupt
371 * occurs before we effectively enter the low power state
372 */
373 __hard_irq_disable();
374 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
375
376 /*
377 * If anything happened while we were soft-disabled,
378 * we return now and do not enter the low power state.
379 */
380 if (lazy_irq_pending())
381 return false;
382
383 /* Tell lockdep we are about to re-enable */
384 trace_hardirqs_on();
385
386 return true;
387}
388
389/*
390 * Take the SRR1 wakeup reason, index into this table to find the
391 * appropriate irq_happened bit.
392 *
393 * Sytem reset exceptions taken in idle state also come through here,
394 * but they are NMI interrupts so do not need to wait for IRQs to be
395 * restored, and should be taken as early as practical. These are marked
396 * with 0xff in the table. The Power ISA specifies 0100b as the system
397 * reset interrupt reason.
398 */
399#define IRQ_SYSTEM_RESET 0xff
400
401static const u8 srr1_to_lazyirq[0x10] = {
402 0, 0, 0,
403 PACA_IRQ_DBELL,
404 IRQ_SYSTEM_RESET,
405 PACA_IRQ_DBELL,
406 PACA_IRQ_DEC,
407 0,
408 PACA_IRQ_EE,
409 PACA_IRQ_EE,
410 PACA_IRQ_HMI,
411 0, 0, 0, 0, 0 };
412
413void replay_system_reset(void)
414{
415 struct pt_regs regs;
416
417 ppc_save_regs(®s);
418 regs.trap = 0x100;
419 get_paca()->in_nmi = 1;
420 system_reset_exception(®s);
421 get_paca()->in_nmi = 0;
422}
423EXPORT_SYMBOL_GPL(replay_system_reset);
424
425void irq_set_pending_from_srr1(unsigned long srr1)
426{
427 unsigned int idx = (srr1 & SRR1_WAKEMASK_P8) >> 18;
428 u8 reason = srr1_to_lazyirq[idx];
429
430 /*
431 * Take the system reset now, which is immediately after registers
432 * are restored from idle. It's an NMI, so interrupts need not be
433 * re-enabled before it is taken.
434 */
435 if (unlikely(reason == IRQ_SYSTEM_RESET)) {
436 replay_system_reset();
437 return;
438 }
439
440 if (reason == PACA_IRQ_DBELL) {
441 /*
442 * When doorbell triggers a system reset wakeup, the message
443 * is not cleared, so if the doorbell interrupt is replayed
444 * and the IPI handled, the doorbell interrupt would still
445 * fire when EE is enabled.
446 *
447 * To avoid taking the superfluous doorbell interrupt,
448 * execute a msgclr here before the interrupt is replayed.
449 */
450 ppc_msgclr(PPC_DBELL_MSGTYPE);
451 }
452
453 /*
454 * The 0 index (SRR1[42:45]=b0000) must always evaluate to 0,
455 * so this can be called unconditionally with the SRR1 wake
456 * reason as returned by the idle code, which uses 0 to mean no
457 * interrupt.
458 *
459 * If a future CPU was to designate this as an interrupt reason,
460 * then a new index for no interrupt must be assigned.
461 */
462 local_paca->irq_happened |= reason;
463}
464#endif /* CONFIG_PPC_BOOK3S */
465
466/*
467 * Force a replay of the external interrupt handler on this CPU.
468 */
469void force_external_irq_replay(void)
470{
471 /*
472 * This must only be called with interrupts soft-disabled,
473 * the replay will happen when re-enabling.
474 */
475 WARN_ON(!arch_irqs_disabled());
476
477 /*
478 * Interrupts must always be hard disabled before irq_happened is
479 * modified (to prevent lost update in case of interrupt between
480 * load and store).
481 */
482 __hard_irq_disable();
483 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
484
485 /* Indicate in the PACA that we have an interrupt to replay */
486 local_paca->irq_happened |= PACA_IRQ_EE;
487}
488
489static int __init setup_noirqdistrib(char *str)
490{
491 distribute_irqs = 0;
492 return 1;
493}
494
495__setup("noirqdistrib", setup_noirqdistrib);