1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
 4 */
 5
 6#include <linux/interrupt.h>
 7#include <linux/irqchip.h>
 8#include <asm/mach_desc.h>
 
 
 9#include <asm/smp.h>
10
11/*
12 * Late Interrupt system init called from start_kernel for Boot CPU only
13 *
14 * Since slab must already be initialized, platforms can start doing any
15 * needed request_irq( )s
16 */
17void __init init_IRQ(void)
18{
19	/*
20	 * process the entire interrupt tree in one go
21	 * Any external intc will be setup provided DT chains them
22	 * properly
23	 */
24	irqchip_init();
25
26#ifdef CONFIG_SMP
27	/* a SMP H/w block could do IPI IRQ request here */
28	if (plat_smp_ops.init_per_cpu)
29		plat_smp_ops.init_per_cpu(smp_processor_id());
30#endif
31
32	if (machine_desc->init_per_cpu)
33		machine_desc->init_per_cpu(smp_processor_id());
34}
35
36/*
37 * "C" Entry point for any ARC ISR, called from low level vector handler
38 * @irq is the vector number read from ICAUSE reg of on-chip intc
39 */
40void arch_do_IRQ(unsigned int hwirq, struct pt_regs *regs)
41{
42	handle_domain_irq(NULL, hwirq, regs);
 
 
 
 
 
 
43}

 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
 4 */
 5
 6#include <linux/interrupt.h>
 7#include <linux/irqchip.h>
 8#include <asm/mach_desc.h>
 9
10#include <asm/irq_regs.h>
11#include <asm/smp.h>
12
13/*
14 * Late Interrupt system init called from start_kernel for Boot CPU only
15 *
16 * Since slab must already be initialized, platforms can start doing any
17 * needed request_irq( )s
18 */
19void __init init_IRQ(void)
20{
21	/*
22	 * process the entire interrupt tree in one go
23	 * Any external intc will be setup provided DT chains them
24	 * properly
25	 */
26	irqchip_init();
27
28#ifdef CONFIG_SMP
29	/* a SMP H/w block could do IPI IRQ request here */
30	if (plat_smp_ops.init_per_cpu)
31		plat_smp_ops.init_per_cpu(smp_processor_id());
32#endif
33
34	if (machine_desc->init_per_cpu)
35		machine_desc->init_per_cpu(smp_processor_id());
36}
37
38/*
39 * "C" Entry point for any ARC ISR, called from low level vector handler
40 * @irq is the vector number read from ICAUSE reg of on-chip intc
41 */
42void arch_do_IRQ(unsigned int hwirq, struct pt_regs *regs)
43{
44	struct pt_regs *old_regs;
45
46	irq_enter();
47	old_regs = set_irq_regs(regs);
48	generic_handle_domain_irq(NULL, hwirq);
49	set_irq_regs(old_regs);
50	irq_exit();
51}