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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * PCI <-> OF mapping helpers
4 *
5 * Copyright 2011 IBM Corp.
6 */
7#define pr_fmt(fmt) "PCI: OF: " fmt
8
9#include <linux/irqdomain.h>
10#include <linux/kernel.h>
11#include <linux/pci.h>
12#include <linux/of.h>
13#include <linux/of_irq.h>
14#include <linux/of_address.h>
15#include <linux/of_pci.h>
16#include "pci.h"
17
18#ifdef CONFIG_PCI
19void pci_set_of_node(struct pci_dev *dev)
20{
21 if (!dev->bus->dev.of_node)
22 return;
23 dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node,
24 dev->devfn);
25 if (dev->dev.of_node)
26 dev->dev.fwnode = &dev->dev.of_node->fwnode;
27}
28
29void pci_release_of_node(struct pci_dev *dev)
30{
31 of_node_put(dev->dev.of_node);
32 dev->dev.of_node = NULL;
33 dev->dev.fwnode = NULL;
34}
35
36void pci_set_bus_of_node(struct pci_bus *bus)
37{
38 struct device_node *node;
39
40 if (bus->self == NULL) {
41 node = pcibios_get_phb_of_node(bus);
42 } else {
43 node = of_node_get(bus->self->dev.of_node);
44 if (node && of_property_read_bool(node, "external-facing"))
45 bus->self->external_facing = true;
46 }
47
48 bus->dev.of_node = node;
49
50 if (bus->dev.of_node)
51 bus->dev.fwnode = &bus->dev.of_node->fwnode;
52}
53
54void pci_release_bus_of_node(struct pci_bus *bus)
55{
56 of_node_put(bus->dev.of_node);
57 bus->dev.of_node = NULL;
58 bus->dev.fwnode = NULL;
59}
60
61struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus)
62{
63 /* This should only be called for PHBs */
64 if (WARN_ON(bus->self || bus->parent))
65 return NULL;
66
67 /*
68 * Look for a node pointer in either the intermediary device we
69 * create above the root bus or its own parent. Normally only
70 * the later is populated.
71 */
72 if (bus->bridge->of_node)
73 return of_node_get(bus->bridge->of_node);
74 if (bus->bridge->parent && bus->bridge->parent->of_node)
75 return of_node_get(bus->bridge->parent->of_node);
76 return NULL;
77}
78
79struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus)
80{
81#ifdef CONFIG_IRQ_DOMAIN
82 struct irq_domain *d;
83
84 if (!bus->dev.of_node)
85 return NULL;
86
87 /* Start looking for a phandle to an MSI controller. */
88 d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
89 if (d)
90 return d;
91
92 /*
93 * If we don't have an msi-parent property, look for a domain
94 * directly attached to the host bridge.
95 */
96 d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
97 if (d)
98 return d;
99
100 return irq_find_host(bus->dev.of_node);
101#else
102 return NULL;
103#endif
104}
105
106static inline int __of_pci_pci_compare(struct device_node *node,
107 unsigned int data)
108{
109 int devfn;
110
111 devfn = of_pci_get_devfn(node);
112 if (devfn < 0)
113 return 0;
114
115 return devfn == data;
116}
117
118struct device_node *of_pci_find_child_device(struct device_node *parent,
119 unsigned int devfn)
120{
121 struct device_node *node, *node2;
122
123 for_each_child_of_node(parent, node) {
124 if (__of_pci_pci_compare(node, devfn))
125 return node;
126 /*
127 * Some OFs create a parent node "multifunc-device" as
128 * a fake root for all functions of a multi-function
129 * device we go down them as well.
130 */
131 if (of_node_name_eq(node, "multifunc-device")) {
132 for_each_child_of_node(node, node2) {
133 if (__of_pci_pci_compare(node2, devfn)) {
134 of_node_put(node);
135 return node2;
136 }
137 }
138 }
139 }
140 return NULL;
141}
142EXPORT_SYMBOL_GPL(of_pci_find_child_device);
143
144/**
145 * of_pci_get_devfn() - Get device and function numbers for a device node
146 * @np: device node
147 *
148 * Parses a standard 5-cell PCI resource and returns an 8-bit value that can
149 * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
150 * and function numbers respectively. On error a negative error code is
151 * returned.
152 */
153int of_pci_get_devfn(struct device_node *np)
154{
155 u32 reg[5];
156 int error;
157
158 error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
159 if (error)
160 return error;
161
162 return (reg[0] >> 8) & 0xff;
163}
164EXPORT_SYMBOL_GPL(of_pci_get_devfn);
165
166/**
167 * of_pci_parse_bus_range() - parse the bus-range property of a PCI device
168 * @node: device node
169 * @res: address to a struct resource to return the bus-range
170 *
171 * Returns 0 on success or a negative error-code on failure.
172 */
173int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
174{
175 u32 bus_range[2];
176 int error;
177
178 error = of_property_read_u32_array(node, "bus-range", bus_range,
179 ARRAY_SIZE(bus_range));
180 if (error)
181 return error;
182
183 res->name = node->name;
184 res->start = bus_range[0];
185 res->end = bus_range[1];
186 res->flags = IORESOURCE_BUS;
187
188 return 0;
189}
190EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
191
192/**
193 * This function will try to obtain the host bridge domain number by
194 * finding a property called "linux,pci-domain" of the given device node.
195 *
196 * @node: device tree node with the domain information
197 *
198 * Returns the associated domain number from DT in the range [0-0xffff], or
199 * a negative value if the required property is not found.
200 */
201int of_get_pci_domain_nr(struct device_node *node)
202{
203 u32 domain;
204 int error;
205
206 error = of_property_read_u32(node, "linux,pci-domain", &domain);
207 if (error)
208 return error;
209
210 return (u16)domain;
211}
212EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
213
214/**
215 * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
216 * is present and valid
217 */
218void of_pci_check_probe_only(void)
219{
220 u32 val;
221 int ret;
222
223 ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
224 if (ret) {
225 if (ret == -ENODATA || ret == -EOVERFLOW)
226 pr_warn("linux,pci-probe-only without valid value, ignoring\n");
227 return;
228 }
229
230 if (val)
231 pci_add_flags(PCI_PROBE_ONLY);
232 else
233 pci_clear_flags(PCI_PROBE_ONLY);
234
235 pr_info("PROBE_ONLY %sabled\n", val ? "en" : "dis");
236}
237EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
238
239/**
240 * devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
241 * host bridge resources from DT
242 * @dev: host bridge device
243 * @busno: bus number associated with the bridge root bus
244 * @bus_max: maximum number of buses for this bridge
245 * @resources: list where the range of resources will be added after DT parsing
246 * @ib_resources: list where the range of inbound resources (with addresses
247 * from 'dma-ranges') will be added after DT parsing
248 * @io_base: pointer to a variable that will contain on return the physical
249 * address for the start of the I/O range. Can be NULL if the caller doesn't
250 * expect I/O ranges to be present in the device tree.
251 *
252 * This function will parse the "ranges" property of a PCI host bridge device
253 * node and setup the resource mapping based on its content. It is expected
254 * that the property conforms with the Power ePAPR document.
255 *
256 * It returns zero if the range parsing has been successful or a standard error
257 * value if it failed.
258 */
259static int devm_of_pci_get_host_bridge_resources(struct device *dev,
260 unsigned char busno, unsigned char bus_max,
261 struct list_head *resources,
262 struct list_head *ib_resources,
263 resource_size_t *io_base)
264{
265 struct device_node *dev_node = dev->of_node;
266 struct resource *res, tmp_res;
267 struct resource *bus_range;
268 struct of_pci_range range;
269 struct of_pci_range_parser parser;
270 const char *range_type;
271 int err;
272
273 if (io_base)
274 *io_base = (resource_size_t)OF_BAD_ADDR;
275
276 bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
277 if (!bus_range)
278 return -ENOMEM;
279
280 dev_info(dev, "host bridge %pOF ranges:\n", dev_node);
281
282 err = of_pci_parse_bus_range(dev_node, bus_range);
283 if (err) {
284 bus_range->start = busno;
285 bus_range->end = bus_max;
286 bus_range->flags = IORESOURCE_BUS;
287 dev_info(dev, " No bus range found for %pOF, using %pR\n",
288 dev_node, bus_range);
289 } else {
290 if (bus_range->end > bus_range->start + bus_max)
291 bus_range->end = bus_range->start + bus_max;
292 }
293 pci_add_resource(resources, bus_range);
294
295 /* Check for ranges property */
296 err = of_pci_range_parser_init(&parser, dev_node);
297 if (err)
298 goto failed;
299
300 dev_dbg(dev, "Parsing ranges property...\n");
301 for_each_of_pci_range(&parser, &range) {
302 /* Read next ranges element */
303 if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
304 range_type = "IO";
305 else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
306 range_type = "MEM";
307 else
308 range_type = "err";
309 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",
310 range_type, range.cpu_addr,
311 range.cpu_addr + range.size - 1, range.pci_addr);
312
313 /*
314 * If we failed translation or got a zero-sized region
315 * then skip this range
316 */
317 if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
318 continue;
319
320 err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
321 if (err)
322 continue;
323
324 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
325 if (!res) {
326 err = -ENOMEM;
327 goto failed;
328 }
329
330 if (resource_type(res) == IORESOURCE_IO) {
331 if (!io_base) {
332 dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
333 dev_node);
334 err = -EINVAL;
335 goto failed;
336 }
337 if (*io_base != (resource_size_t)OF_BAD_ADDR)
338 dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
339 dev_node);
340 *io_base = range.cpu_addr;
341 }
342
343 pci_add_resource_offset(resources, res, res->start - range.pci_addr);
344 }
345
346 /* Check for dma-ranges property */
347 if (!ib_resources)
348 return 0;
349 err = of_pci_dma_range_parser_init(&parser, dev_node);
350 if (err)
351 return 0;
352
353 dev_dbg(dev, "Parsing dma-ranges property...\n");
354 for_each_of_pci_range(&parser, &range) {
355 struct resource_entry *entry;
356 /*
357 * If we failed translation or got a zero-sized region
358 * then skip this range
359 */
360 if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) ||
361 range.cpu_addr == OF_BAD_ADDR || range.size == 0)
362 continue;
363
364 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",
365 "IB MEM", range.cpu_addr,
366 range.cpu_addr + range.size - 1, range.pci_addr);
367
368
369 err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
370 if (err)
371 continue;
372
373 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
374 if (!res) {
375 err = -ENOMEM;
376 goto failed;
377 }
378
379 /* Keep the resource list sorted */
380 resource_list_for_each_entry(entry, ib_resources)
381 if (entry->res->start > res->start)
382 break;
383
384 pci_add_resource_offset(&entry->node, res,
385 res->start - range.pci_addr);
386 }
387
388 return 0;
389
390failed:
391 pci_free_resource_list(resources);
392 return err;
393}
394
395#if IS_ENABLED(CONFIG_OF_IRQ)
396/**
397 * of_irq_parse_pci - Resolve the interrupt for a PCI device
398 * @pdev: the device whose interrupt is to be resolved
399 * @out_irq: structure of_phandle_args filled by this function
400 *
401 * This function resolves the PCI interrupt for a given PCI device. If a
402 * device-node exists for a given pci_dev, it will use normal OF tree
403 * walking. If not, it will implement standard swizzling and walk up the
404 * PCI tree until an device-node is found, at which point it will finish
405 * resolving using the OF tree walking.
406 */
407static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
408{
409 struct device_node *dn, *ppnode;
410 struct pci_dev *ppdev;
411 __be32 laddr[3];
412 u8 pin;
413 int rc;
414
415 /*
416 * Check if we have a device node, if yes, fallback to standard
417 * device tree parsing
418 */
419 dn = pci_device_to_OF_node(pdev);
420 if (dn) {
421 rc = of_irq_parse_one(dn, 0, out_irq);
422 if (!rc)
423 return rc;
424 }
425
426 /*
427 * Ok, we don't, time to have fun. Let's start by building up an
428 * interrupt spec. we assume #interrupt-cells is 1, which is standard
429 * for PCI. If you do different, then don't use that routine.
430 */
431 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
432 if (rc != 0)
433 goto err;
434 /* No pin, exit with no error message. */
435 if (pin == 0)
436 return -ENODEV;
437
438 /* Now we walk up the PCI tree */
439 for (;;) {
440 /* Get the pci_dev of our parent */
441 ppdev = pdev->bus->self;
442
443 /* Ouch, it's a host bridge... */
444 if (ppdev == NULL) {
445 ppnode = pci_bus_to_OF_node(pdev->bus);
446
447 /* No node for host bridge ? give up */
448 if (ppnode == NULL) {
449 rc = -EINVAL;
450 goto err;
451 }
452 } else {
453 /* We found a P2P bridge, check if it has a node */
454 ppnode = pci_device_to_OF_node(ppdev);
455 }
456
457 /*
458 * Ok, we have found a parent with a device-node, hand over to
459 * the OF parsing code.
460 * We build a unit address from the linux device to be used for
461 * resolution. Note that we use the linux bus number which may
462 * not match your firmware bus numbering.
463 * Fortunately, in most cases, interrupt-map-mask doesn't
464 * include the bus number as part of the matching.
465 * You should still be careful about that though if you intend
466 * to rely on this function (you ship a firmware that doesn't
467 * create device nodes for all PCI devices).
468 */
469 if (ppnode)
470 break;
471
472 /*
473 * We can only get here if we hit a P2P bridge with no node;
474 * let's do standard swizzling and try again
475 */
476 pin = pci_swizzle_interrupt_pin(pdev, pin);
477 pdev = ppdev;
478 }
479
480 out_irq->np = ppnode;
481 out_irq->args_count = 1;
482 out_irq->args[0] = pin;
483 laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
484 laddr[1] = laddr[2] = cpu_to_be32(0);
485 rc = of_irq_parse_raw(laddr, out_irq);
486 if (rc)
487 goto err;
488 return 0;
489err:
490 if (rc == -ENOENT) {
491 dev_warn(&pdev->dev,
492 "%s: no interrupt-map found, INTx interrupts not available\n",
493 __func__);
494 pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n",
495 __func__);
496 } else {
497 dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc);
498 }
499 return rc;
500}
501
502/**
503 * of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ
504 * @dev: The PCI device needing an IRQ
505 * @slot: PCI slot number; passed when used as map_irq callback. Unused
506 * @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused
507 *
508 * @slot and @pin are unused, but included in the function so that this
509 * function can be used directly as the map_irq callback to
510 * pci_assign_irq() and struct pci_host_bridge.map_irq pointer
511 */
512int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
513{
514 struct of_phandle_args oirq;
515 int ret;
516
517 ret = of_irq_parse_pci(dev, &oirq);
518 if (ret)
519 return 0; /* Proper return code 0 == NO_IRQ */
520
521 return irq_create_of_mapping(&oirq);
522}
523EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
524#endif /* CONFIG_OF_IRQ */
525
526static int pci_parse_request_of_pci_ranges(struct device *dev,
527 struct pci_host_bridge *bridge)
528{
529 int err, res_valid = 0;
530 resource_size_t iobase;
531 struct resource_entry *win, *tmp;
532
533 INIT_LIST_HEAD(&bridge->windows);
534 INIT_LIST_HEAD(&bridge->dma_ranges);
535
536 err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows,
537 &bridge->dma_ranges, &iobase);
538 if (err)
539 return err;
540
541 err = devm_request_pci_bus_resources(dev, &bridge->windows);
542 if (err)
543 return err;
544
545 resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
546 struct resource *res = win->res;
547
548 switch (resource_type(res)) {
549 case IORESOURCE_IO:
550 err = devm_pci_remap_iospace(dev, res, iobase);
551 if (err) {
552 dev_warn(dev, "error %d: failed to map resource %pR\n",
553 err, res);
554 resource_list_destroy_entry(win);
555 }
556 break;
557 case IORESOURCE_MEM:
558 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
559 break;
560 }
561 }
562
563 if (!res_valid)
564 dev_warn(dev, "non-prefetchable memory resource required\n");
565
566 return 0;
567}
568
569int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
570{
571 if (!dev->of_node)
572 return 0;
573
574 bridge->swizzle_irq = pci_common_swizzle;
575 bridge->map_irq = of_irq_parse_and_map_pci;
576
577 return pci_parse_request_of_pci_ranges(dev, bridge);
578}
579
580#endif /* CONFIG_PCI */
581
582/**
583 * This function will try to find the limitation of link speed by finding
584 * a property called "max-link-speed" of the given device node.
585 *
586 * @node: device tree node with the max link speed information
587 *
588 * Returns the associated max link speed from DT, or a negative value if the
589 * required property is not found or is invalid.
590 */
591int of_pci_get_max_link_speed(struct device_node *node)
592{
593 u32 max_link_speed;
594
595 if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
596 max_link_speed == 0 || max_link_speed > 4)
597 return -EINVAL;
598
599 return max_link_speed;
600}
601EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * PCI <-> OF mapping helpers
4 *
5 * Copyright 2011 IBM Corp.
6 */
7#define pr_fmt(fmt) "PCI: OF: " fmt
8
9#include <linux/irqdomain.h>
10#include <linux/kernel.h>
11#include <linux/pci.h>
12#include <linux/of.h>
13#include <linux/of_irq.h>
14#include <linux/of_address.h>
15#include <linux/of_pci.h>
16#include "pci.h"
17
18#ifdef CONFIG_PCI
19void pci_set_of_node(struct pci_dev *dev)
20{
21 if (!dev->bus->dev.of_node)
22 return;
23 dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node,
24 dev->devfn);
25 if (dev->dev.of_node)
26 dev->dev.fwnode = &dev->dev.of_node->fwnode;
27}
28
29void pci_release_of_node(struct pci_dev *dev)
30{
31 of_node_put(dev->dev.of_node);
32 dev->dev.of_node = NULL;
33 dev->dev.fwnode = NULL;
34}
35
36void pci_set_bus_of_node(struct pci_bus *bus)
37{
38 struct device_node *node;
39
40 if (bus->self == NULL) {
41 node = pcibios_get_phb_of_node(bus);
42 } else {
43 node = of_node_get(bus->self->dev.of_node);
44 if (node && of_property_read_bool(node, "external-facing"))
45 bus->self->external_facing = true;
46 }
47
48 bus->dev.of_node = node;
49
50 if (bus->dev.of_node)
51 bus->dev.fwnode = &bus->dev.of_node->fwnode;
52}
53
54void pci_release_bus_of_node(struct pci_bus *bus)
55{
56 of_node_put(bus->dev.of_node);
57 bus->dev.of_node = NULL;
58 bus->dev.fwnode = NULL;
59}
60
61struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus)
62{
63 /* This should only be called for PHBs */
64 if (WARN_ON(bus->self || bus->parent))
65 return NULL;
66
67 /*
68 * Look for a node pointer in either the intermediary device we
69 * create above the root bus or its own parent. Normally only
70 * the later is populated.
71 */
72 if (bus->bridge->of_node)
73 return of_node_get(bus->bridge->of_node);
74 if (bus->bridge->parent && bus->bridge->parent->of_node)
75 return of_node_get(bus->bridge->parent->of_node);
76 return NULL;
77}
78
79struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus)
80{
81#ifdef CONFIG_IRQ_DOMAIN
82 struct irq_domain *d;
83
84 if (!bus->dev.of_node)
85 return NULL;
86
87 /* Start looking for a phandle to an MSI controller. */
88 d = of_msi_get_domain(&bus->dev, bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
89 if (d)
90 return d;
91
92 /*
93 * If we don't have an msi-parent property, look for a domain
94 * directly attached to the host bridge.
95 */
96 d = irq_find_matching_host(bus->dev.of_node, DOMAIN_BUS_PCI_MSI);
97 if (d)
98 return d;
99
100 return irq_find_host(bus->dev.of_node);
101#else
102 return NULL;
103#endif
104}
105
106bool pci_host_of_has_msi_map(struct device *dev)
107{
108 if (dev && dev->of_node)
109 return of_get_property(dev->of_node, "msi-map", NULL);
110 return false;
111}
112
113static inline int __of_pci_pci_compare(struct device_node *node,
114 unsigned int data)
115{
116 int devfn;
117
118 devfn = of_pci_get_devfn(node);
119 if (devfn < 0)
120 return 0;
121
122 return devfn == data;
123}
124
125struct device_node *of_pci_find_child_device(struct device_node *parent,
126 unsigned int devfn)
127{
128 struct device_node *node, *node2;
129
130 for_each_child_of_node(parent, node) {
131 if (__of_pci_pci_compare(node, devfn))
132 return node;
133 /*
134 * Some OFs create a parent node "multifunc-device" as
135 * a fake root for all functions of a multi-function
136 * device we go down them as well.
137 */
138 if (of_node_name_eq(node, "multifunc-device")) {
139 for_each_child_of_node(node, node2) {
140 if (__of_pci_pci_compare(node2, devfn)) {
141 of_node_put(node);
142 return node2;
143 }
144 }
145 }
146 }
147 return NULL;
148}
149EXPORT_SYMBOL_GPL(of_pci_find_child_device);
150
151/**
152 * of_pci_get_devfn() - Get device and function numbers for a device node
153 * @np: device node
154 *
155 * Parses a standard 5-cell PCI resource and returns an 8-bit value that can
156 * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
157 * and function numbers respectively. On error a negative error code is
158 * returned.
159 */
160int of_pci_get_devfn(struct device_node *np)
161{
162 u32 reg[5];
163 int error;
164
165 error = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
166 if (error)
167 return error;
168
169 return (reg[0] >> 8) & 0xff;
170}
171EXPORT_SYMBOL_GPL(of_pci_get_devfn);
172
173/**
174 * of_pci_parse_bus_range() - parse the bus-range property of a PCI device
175 * @node: device node
176 * @res: address to a struct resource to return the bus-range
177 *
178 * Returns 0 on success or a negative error-code on failure.
179 */
180int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
181{
182 u32 bus_range[2];
183 int error;
184
185 error = of_property_read_u32_array(node, "bus-range", bus_range,
186 ARRAY_SIZE(bus_range));
187 if (error)
188 return error;
189
190 res->name = node->name;
191 res->start = bus_range[0];
192 res->end = bus_range[1];
193 res->flags = IORESOURCE_BUS;
194
195 return 0;
196}
197EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
198
199/**
200 * of_get_pci_domain_nr - Find the host bridge domain number
201 * of the given device node.
202 * @node: Device tree node with the domain information.
203 *
204 * This function will try to obtain the host bridge domain number by finding
205 * a property called "linux,pci-domain" of the given device node.
206 *
207 * Return:
208 * * > 0 - On success, an associated domain number.
209 * * -EINVAL - The property "linux,pci-domain" does not exist.
210 * * -ENODATA - The linux,pci-domain" property does not have value.
211 * * -EOVERFLOW - Invalid "linux,pci-domain" property value.
212 *
213 * Returns the associated domain number from DT in the range [0-0xffff], or
214 * a negative value if the required property is not found.
215 */
216int of_get_pci_domain_nr(struct device_node *node)
217{
218 u32 domain;
219 int error;
220
221 error = of_property_read_u32(node, "linux,pci-domain", &domain);
222 if (error)
223 return error;
224
225 return (u16)domain;
226}
227EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
228
229/**
230 * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
231 * is present and valid
232 */
233void of_pci_check_probe_only(void)
234{
235 u32 val;
236 int ret;
237
238 ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val);
239 if (ret) {
240 if (ret == -ENODATA || ret == -EOVERFLOW)
241 pr_warn("linux,pci-probe-only without valid value, ignoring\n");
242 return;
243 }
244
245 if (val)
246 pci_add_flags(PCI_PROBE_ONLY);
247 else
248 pci_clear_flags(PCI_PROBE_ONLY);
249
250 pr_info("PROBE_ONLY %s\n", val ? "enabled" : "disabled");
251}
252EXPORT_SYMBOL_GPL(of_pci_check_probe_only);
253
254/**
255 * devm_of_pci_get_host_bridge_resources() - Resource-managed parsing of PCI
256 * host bridge resources from DT
257 * @dev: host bridge device
258 * @busno: bus number associated with the bridge root bus
259 * @bus_max: maximum number of buses for this bridge
260 * @resources: list where the range of resources will be added after DT parsing
261 * @ib_resources: list where the range of inbound resources (with addresses
262 * from 'dma-ranges') will be added after DT parsing
263 * @io_base: pointer to a variable that will contain on return the physical
264 * address for the start of the I/O range. Can be NULL if the caller doesn't
265 * expect I/O ranges to be present in the device tree.
266 *
267 * This function will parse the "ranges" property of a PCI host bridge device
268 * node and setup the resource mapping based on its content. It is expected
269 * that the property conforms with the Power ePAPR document.
270 *
271 * It returns zero if the range parsing has been successful or a standard error
272 * value if it failed.
273 */
274static int devm_of_pci_get_host_bridge_resources(struct device *dev,
275 unsigned char busno, unsigned char bus_max,
276 struct list_head *resources,
277 struct list_head *ib_resources,
278 resource_size_t *io_base)
279{
280 struct device_node *dev_node = dev->of_node;
281 struct resource *res, tmp_res;
282 struct resource *bus_range;
283 struct of_pci_range range;
284 struct of_pci_range_parser parser;
285 const char *range_type;
286 int err;
287
288 if (io_base)
289 *io_base = (resource_size_t)OF_BAD_ADDR;
290
291 bus_range = devm_kzalloc(dev, sizeof(*bus_range), GFP_KERNEL);
292 if (!bus_range)
293 return -ENOMEM;
294
295 dev_info(dev, "host bridge %pOF ranges:\n", dev_node);
296
297 err = of_pci_parse_bus_range(dev_node, bus_range);
298 if (err) {
299 bus_range->start = busno;
300 bus_range->end = bus_max;
301 bus_range->flags = IORESOURCE_BUS;
302 dev_info(dev, " No bus range found for %pOF, using %pR\n",
303 dev_node, bus_range);
304 } else {
305 if (bus_range->end > bus_range->start + bus_max)
306 bus_range->end = bus_range->start + bus_max;
307 }
308 pci_add_resource(resources, bus_range);
309
310 /* Check for ranges property */
311 err = of_pci_range_parser_init(&parser, dev_node);
312 if (err)
313 return 0;
314
315 dev_dbg(dev, "Parsing ranges property...\n");
316 for_each_of_pci_range(&parser, &range) {
317 /* Read next ranges element */
318 if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)
319 range_type = "IO";
320 else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
321 range_type = "MEM";
322 else
323 range_type = "err";
324 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",
325 range_type, range.cpu_addr,
326 range.cpu_addr + range.size - 1, range.pci_addr);
327
328 /*
329 * If we failed translation or got a zero-sized region
330 * then skip this range
331 */
332 if (range.cpu_addr == OF_BAD_ADDR || range.size == 0)
333 continue;
334
335 err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
336 if (err)
337 continue;
338
339 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
340 if (!res) {
341 err = -ENOMEM;
342 goto failed;
343 }
344
345 if (resource_type(res) == IORESOURCE_IO) {
346 if (!io_base) {
347 dev_err(dev, "I/O range found for %pOF. Please provide an io_base pointer to save CPU base address\n",
348 dev_node);
349 err = -EINVAL;
350 goto failed;
351 }
352 if (*io_base != (resource_size_t)OF_BAD_ADDR)
353 dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
354 dev_node);
355 *io_base = range.cpu_addr;
356 } else if (resource_type(res) == IORESOURCE_MEM) {
357 res->flags &= ~IORESOURCE_MEM_64;
358 }
359
360 pci_add_resource_offset(resources, res, res->start - range.pci_addr);
361 }
362
363 /* Check for dma-ranges property */
364 if (!ib_resources)
365 return 0;
366 err = of_pci_dma_range_parser_init(&parser, dev_node);
367 if (err)
368 return 0;
369
370 dev_dbg(dev, "Parsing dma-ranges property...\n");
371 for_each_of_pci_range(&parser, &range) {
372 /*
373 * If we failed translation or got a zero-sized region
374 * then skip this range
375 */
376 if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) ||
377 range.cpu_addr == OF_BAD_ADDR || range.size == 0)
378 continue;
379
380 dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",
381 "IB MEM", range.cpu_addr,
382 range.cpu_addr + range.size - 1, range.pci_addr);
383
384
385 err = of_pci_range_to_resource(&range, dev_node, &tmp_res);
386 if (err)
387 continue;
388
389 res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL);
390 if (!res) {
391 err = -ENOMEM;
392 goto failed;
393 }
394
395 pci_add_resource_offset(ib_resources, res,
396 res->start - range.pci_addr);
397 }
398
399 return 0;
400
401failed:
402 pci_free_resource_list(resources);
403 return err;
404}
405
406#if IS_ENABLED(CONFIG_OF_IRQ)
407/**
408 * of_irq_parse_pci - Resolve the interrupt for a PCI device
409 * @pdev: the device whose interrupt is to be resolved
410 * @out_irq: structure of_phandle_args filled by this function
411 *
412 * This function resolves the PCI interrupt for a given PCI device. If a
413 * device-node exists for a given pci_dev, it will use normal OF tree
414 * walking. If not, it will implement standard swizzling and walk up the
415 * PCI tree until an device-node is found, at which point it will finish
416 * resolving using the OF tree walking.
417 */
418static int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq)
419{
420 struct device_node *dn, *ppnode = NULL;
421 struct pci_dev *ppdev;
422 __be32 laddr[3];
423 u8 pin;
424 int rc;
425
426 /*
427 * Check if we have a device node, if yes, fallback to standard
428 * device tree parsing
429 */
430 dn = pci_device_to_OF_node(pdev);
431 if (dn) {
432 rc = of_irq_parse_one(dn, 0, out_irq);
433 if (!rc)
434 return rc;
435 }
436
437 /*
438 * Ok, we don't, time to have fun. Let's start by building up an
439 * interrupt spec. we assume #interrupt-cells is 1, which is standard
440 * for PCI. If you do different, then don't use that routine.
441 */
442 rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
443 if (rc != 0)
444 goto err;
445 /* No pin, exit with no error message. */
446 if (pin == 0)
447 return -ENODEV;
448
449 /* Local interrupt-map in the device node? Use it! */
450 if (of_get_property(dn, "interrupt-map", NULL)) {
451 pin = pci_swizzle_interrupt_pin(pdev, pin);
452 ppnode = dn;
453 }
454
455 /* Now we walk up the PCI tree */
456 while (!ppnode) {
457 /* Get the pci_dev of our parent */
458 ppdev = pdev->bus->self;
459
460 /* Ouch, it's a host bridge... */
461 if (ppdev == NULL) {
462 ppnode = pci_bus_to_OF_node(pdev->bus);
463
464 /* No node for host bridge ? give up */
465 if (ppnode == NULL) {
466 rc = -EINVAL;
467 goto err;
468 }
469 } else {
470 /* We found a P2P bridge, check if it has a node */
471 ppnode = pci_device_to_OF_node(ppdev);
472 }
473
474 /*
475 * Ok, we have found a parent with a device-node, hand over to
476 * the OF parsing code.
477 * We build a unit address from the linux device to be used for
478 * resolution. Note that we use the linux bus number which may
479 * not match your firmware bus numbering.
480 * Fortunately, in most cases, interrupt-map-mask doesn't
481 * include the bus number as part of the matching.
482 * You should still be careful about that though if you intend
483 * to rely on this function (you ship a firmware that doesn't
484 * create device nodes for all PCI devices).
485 */
486 if (ppnode)
487 break;
488
489 /*
490 * We can only get here if we hit a P2P bridge with no node;
491 * let's do standard swizzling and try again
492 */
493 pin = pci_swizzle_interrupt_pin(pdev, pin);
494 pdev = ppdev;
495 }
496
497 out_irq->np = ppnode;
498 out_irq->args_count = 1;
499 out_irq->args[0] = pin;
500 laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
501 laddr[1] = laddr[2] = cpu_to_be32(0);
502 rc = of_irq_parse_raw(laddr, out_irq);
503 if (rc)
504 goto err;
505 return 0;
506err:
507 if (rc == -ENOENT) {
508 dev_warn(&pdev->dev,
509 "%s: no interrupt-map found, INTx interrupts not available\n",
510 __func__);
511 pr_warn_once("%s: possibly some PCI slots don't have level triggered interrupts capability\n",
512 __func__);
513 } else {
514 dev_err(&pdev->dev, "%s: failed with rc=%d\n", __func__, rc);
515 }
516 return rc;
517}
518
519/**
520 * of_irq_parse_and_map_pci() - Decode a PCI IRQ from the device tree and map to a VIRQ
521 * @dev: The PCI device needing an IRQ
522 * @slot: PCI slot number; passed when used as map_irq callback. Unused
523 * @pin: PCI IRQ pin number; passed when used as map_irq callback. Unused
524 *
525 * @slot and @pin are unused, but included in the function so that this
526 * function can be used directly as the map_irq callback to
527 * pci_assign_irq() and struct pci_host_bridge.map_irq pointer
528 */
529int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
530{
531 struct of_phandle_args oirq;
532 int ret;
533
534 ret = of_irq_parse_pci(dev, &oirq);
535 if (ret)
536 return 0; /* Proper return code 0 == NO_IRQ */
537
538 return irq_create_of_mapping(&oirq);
539}
540EXPORT_SYMBOL_GPL(of_irq_parse_and_map_pci);
541#endif /* CONFIG_OF_IRQ */
542
543static int pci_parse_request_of_pci_ranges(struct device *dev,
544 struct pci_host_bridge *bridge)
545{
546 int err, res_valid = 0;
547 resource_size_t iobase;
548 struct resource_entry *win, *tmp;
549
550 INIT_LIST_HEAD(&bridge->windows);
551 INIT_LIST_HEAD(&bridge->dma_ranges);
552
553 err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows,
554 &bridge->dma_ranges, &iobase);
555 if (err)
556 return err;
557
558 err = devm_request_pci_bus_resources(dev, &bridge->windows);
559 if (err)
560 return err;
561
562 resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
563 struct resource *res = win->res;
564
565 switch (resource_type(res)) {
566 case IORESOURCE_IO:
567 err = devm_pci_remap_iospace(dev, res, iobase);
568 if (err) {
569 dev_warn(dev, "error %d: failed to map resource %pR\n",
570 err, res);
571 resource_list_destroy_entry(win);
572 }
573 break;
574 case IORESOURCE_MEM:
575 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
576
577 if (!(res->flags & IORESOURCE_PREFETCH))
578 if (upper_32_bits(resource_size(res)))
579 dev_warn(dev, "Memory resource size exceeds max for 32 bits\n");
580
581 break;
582 }
583 }
584
585 if (!res_valid)
586 dev_warn(dev, "non-prefetchable memory resource required\n");
587
588 return 0;
589}
590
591int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *bridge)
592{
593 if (!dev->of_node)
594 return 0;
595
596 bridge->swizzle_irq = pci_common_swizzle;
597 bridge->map_irq = of_irq_parse_and_map_pci;
598
599 return pci_parse_request_of_pci_ranges(dev, bridge);
600}
601
602#endif /* CONFIG_PCI */
603
604/**
605 * of_pci_get_max_link_speed - Find the maximum link speed of the given device node.
606 * @node: Device tree node with the maximum link speed information.
607 *
608 * This function will try to find the limitation of link speed by finding
609 * a property called "max-link-speed" of the given device node.
610 *
611 * Return:
612 * * > 0 - On success, a maximum link speed.
613 * * -EINVAL - Invalid "max-link-speed" property value, or failure to access
614 * the property of the device tree node.
615 *
616 * Returns the associated max link speed from DT, or a negative value if the
617 * required property is not found or is invalid.
618 */
619int of_pci_get_max_link_speed(struct device_node *node)
620{
621 u32 max_link_speed;
622
623 if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
624 max_link_speed == 0 || max_link_speed > 4)
625 return -EINVAL;
626
627 return max_link_speed;
628}
629EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
630
631/**
632 * of_pci_get_slot_power_limit - Parses the "slot-power-limit-milliwatt"
633 * property.
634 *
635 * @node: device tree node with the slot power limit information
636 * @slot_power_limit_value: pointer where the value should be stored in PCIe
637 * Slot Capabilities Register format
638 * @slot_power_limit_scale: pointer where the scale should be stored in PCIe
639 * Slot Capabilities Register format
640 *
641 * Returns the slot power limit in milliwatts and if @slot_power_limit_value
642 * and @slot_power_limit_scale pointers are non-NULL, fills in the value and
643 * scale in format used by PCIe Slot Capabilities Register.
644 *
645 * If the property is not found or is invalid, returns 0.
646 */
647u32 of_pci_get_slot_power_limit(struct device_node *node,
648 u8 *slot_power_limit_value,
649 u8 *slot_power_limit_scale)
650{
651 u32 slot_power_limit_mw;
652 u8 value, scale;
653
654 if (of_property_read_u32(node, "slot-power-limit-milliwatt",
655 &slot_power_limit_mw))
656 slot_power_limit_mw = 0;
657
658 /* Calculate Slot Power Limit Value and Slot Power Limit Scale */
659 if (slot_power_limit_mw == 0) {
660 value = 0x00;
661 scale = 0;
662 } else if (slot_power_limit_mw <= 255) {
663 value = slot_power_limit_mw;
664 scale = 3;
665 } else if (slot_power_limit_mw <= 255*10) {
666 value = slot_power_limit_mw / 10;
667 scale = 2;
668 slot_power_limit_mw = slot_power_limit_mw / 10 * 10;
669 } else if (slot_power_limit_mw <= 255*100) {
670 value = slot_power_limit_mw / 100;
671 scale = 1;
672 slot_power_limit_mw = slot_power_limit_mw / 100 * 100;
673 } else if (slot_power_limit_mw <= 239*1000) {
674 value = slot_power_limit_mw / 1000;
675 scale = 0;
676 slot_power_limit_mw = slot_power_limit_mw / 1000 * 1000;
677 } else if (slot_power_limit_mw < 250*1000) {
678 value = 0xEF;
679 scale = 0;
680 slot_power_limit_mw = 239*1000;
681 } else if (slot_power_limit_mw <= 600*1000) {
682 value = 0xF0 + (slot_power_limit_mw / 1000 - 250) / 25;
683 scale = 0;
684 slot_power_limit_mw = slot_power_limit_mw / (1000*25) * (1000*25);
685 } else {
686 value = 0xFE;
687 scale = 0;
688 slot_power_limit_mw = 600*1000;
689 }
690
691 if (slot_power_limit_value)
692 *slot_power_limit_value = value;
693
694 if (slot_power_limit_scale)
695 *slot_power_limit_scale = scale;
696
697 return slot_power_limit_mw;
698}
699EXPORT_SYMBOL_GPL(of_pci_get_slot_power_limit);