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v5.9
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * I2C Link Layer for Samsung S3FWRN5 NCI based Driver
  4 *
  5 * Copyright (C) 2015 Samsung Electrnoics
  6 * Robert Baldyga <r.baldyga@samsung.com>
  7 */
  8
 
  9#include <linux/i2c.h>
 10#include <linux/gpio.h>
 11#include <linux/delay.h>
 12#include <linux/of_gpio.h>
 13#include <linux/of_irq.h>
 14#include <linux/module.h>
 15
 16#include <net/nfc/nfc.h>
 17
 18#include "s3fwrn5.h"
 19
 20#define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c"
 21
 22#define S3FWRN5_I2C_MAX_PAYLOAD 32
 23#define S3FWRN5_EN_WAIT_TIME 150
 24
 25struct s3fwrn5_i2c_phy {
 
 26	struct i2c_client *i2c_dev;
 27	struct nci_dev *ndev;
 28
 29	unsigned int gpio_en;
 30	unsigned int gpio_fw_wake;
 31
 32	struct mutex mutex;
 33
 34	enum s3fwrn5_mode mode;
 35	unsigned int irq_skip:1;
 36};
 37
 38static void s3fwrn5_i2c_set_wake(void *phy_id, bool wake)
 39{
 40	struct s3fwrn5_i2c_phy *phy = phy_id;
 41
 42	mutex_lock(&phy->mutex);
 43	gpio_set_value(phy->gpio_fw_wake, wake);
 44	msleep(S3FWRN5_EN_WAIT_TIME/2);
 45	mutex_unlock(&phy->mutex);
 46}
 47
 48static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode)
 49{
 50	struct s3fwrn5_i2c_phy *phy = phy_id;
 51
 52	mutex_lock(&phy->mutex);
 53
 54	if (phy->mode == mode)
 55		goto out;
 56
 57	phy->mode = mode;
 58
 59	gpio_set_value(phy->gpio_en, 1);
 60	gpio_set_value(phy->gpio_fw_wake, 0);
 61	if (mode == S3FWRN5_MODE_FW)
 62		gpio_set_value(phy->gpio_fw_wake, 1);
 63
 64	if (mode != S3FWRN5_MODE_COLD) {
 65		msleep(S3FWRN5_EN_WAIT_TIME);
 66		gpio_set_value(phy->gpio_en, 0);
 67		msleep(S3FWRN5_EN_WAIT_TIME/2);
 68	}
 69
 70	phy->irq_skip = true;
 71
 72out:
 73	mutex_unlock(&phy->mutex);
 74}
 75
 76static enum s3fwrn5_mode s3fwrn5_i2c_get_mode(void *phy_id)
 77{
 78	struct s3fwrn5_i2c_phy *phy = phy_id;
 79	enum s3fwrn5_mode mode;
 80
 81	mutex_lock(&phy->mutex);
 82
 83	mode = phy->mode;
 84
 85	mutex_unlock(&phy->mutex);
 86
 87	return mode;
 88}
 89
 90static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb)
 91{
 92	struct s3fwrn5_i2c_phy *phy = phy_id;
 93	int ret;
 94
 95	mutex_lock(&phy->mutex);
 96
 97	phy->irq_skip = false;
 98
 99	ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
100	if (ret == -EREMOTEIO) {
101		/* Retry, chip was in standby */
102		usleep_range(110000, 120000);
103		ret  = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
104	}
105
106	mutex_unlock(&phy->mutex);
107
108	if (ret < 0)
109		return ret;
110
111	if (ret != skb->len)
112		return -EREMOTEIO;
113
114	return 0;
115}
116
117static const struct s3fwrn5_phy_ops i2c_phy_ops = {
118	.set_wake = s3fwrn5_i2c_set_wake,
119	.set_mode = s3fwrn5_i2c_set_mode,
120	.get_mode = s3fwrn5_i2c_get_mode,
121	.write = s3fwrn5_i2c_write,
122};
123
124static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy)
125{
126	struct sk_buff *skb;
127	size_t hdr_size;
128	size_t data_len;
129	char hdr[4];
130	int ret;
131
132	hdr_size = (phy->mode == S3FWRN5_MODE_NCI) ?
133		NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE;
134	ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size);
135	if (ret < 0)
136		return ret;
137
138	if (ret < hdr_size)
139		return -EBADMSG;
140
141	data_len = (phy->mode == S3FWRN5_MODE_NCI) ?
142		((struct nci_ctrl_hdr *)hdr)->plen :
143		((struct s3fwrn5_fw_header *)hdr)->len;
144
145	skb = alloc_skb(hdr_size + data_len, GFP_KERNEL);
146	if (!skb)
147		return -ENOMEM;
148
149	skb_put_data(skb, hdr, hdr_size);
150
151	if (data_len == 0)
152		goto out;
153
154	ret = i2c_master_recv(phy->i2c_dev, skb_put(skb, data_len), data_len);
155	if (ret != data_len) {
156		kfree_skb(skb);
157		return -EBADMSG;
158	}
159
160out:
161	return s3fwrn5_recv_frame(phy->ndev, skb, phy->mode);
162}
163
164static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id)
165{
166	struct s3fwrn5_i2c_phy *phy = phy_id;
167	int ret = 0;
168
169	if (!phy || !phy->ndev) {
170		WARN_ON_ONCE(1);
171		return IRQ_NONE;
172	}
173
174	mutex_lock(&phy->mutex);
175
176	if (phy->irq_skip)
177		goto out;
178
179	switch (phy->mode) {
180	case S3FWRN5_MODE_NCI:
181	case S3FWRN5_MODE_FW:
182		ret = s3fwrn5_i2c_read(phy);
183		break;
184	case S3FWRN5_MODE_COLD:
185		ret = -EREMOTEIO;
186		break;
187	}
188
189out:
190	mutex_unlock(&phy->mutex);
191
192	return IRQ_HANDLED;
193}
194
195static int s3fwrn5_i2c_parse_dt(struct i2c_client *client)
196{
197	struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
198	struct device_node *np = client->dev.of_node;
199
200	if (!np)
201		return -ENODEV;
202
203	phy->gpio_en = of_get_named_gpio(np, "s3fwrn5,en-gpios", 0);
204	if (!gpio_is_valid(phy->gpio_en))
205		return -ENODEV;
 
 
 
 
 
 
206
207	phy->gpio_fw_wake = of_get_named_gpio(np, "s3fwrn5,fw-gpios", 0);
208	if (!gpio_is_valid(phy->gpio_fw_wake))
209		return -ENODEV;
 
 
 
 
 
 
210
211	return 0;
212}
213
214static int s3fwrn5_i2c_probe(struct i2c_client *client,
215				  const struct i2c_device_id *id)
216{
217	struct s3fwrn5_i2c_phy *phy;
218	int ret;
219
220	phy = devm_kzalloc(&client->dev, sizeof(*phy), GFP_KERNEL);
221	if (!phy)
222		return -ENOMEM;
223
224	mutex_init(&phy->mutex);
225	phy->mode = S3FWRN5_MODE_COLD;
226	phy->irq_skip = true;
227
228	phy->i2c_dev = client;
229	i2c_set_clientdata(client, phy);
230
231	ret = s3fwrn5_i2c_parse_dt(client);
232	if (ret < 0)
233		return ret;
234
235	ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_en,
236		GPIOF_OUT_INIT_HIGH, "s3fwrn5_en");
237	if (ret < 0)
238		return ret;
239
240	ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->gpio_fw_wake,
241		GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake");
 
242	if (ret < 0)
243		return ret;
244
245	ret = s3fwrn5_probe(&phy->ndev, phy, &phy->i2c_dev->dev, &i2c_phy_ops,
246		S3FWRN5_I2C_MAX_PAYLOAD);
 
 
 
 
 
 
 
 
 
 
 
247	if (ret < 0)
248		return ret;
249
250	ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL,
251		s3fwrn5_i2c_irq_thread_fn, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
252		S3FWRN5_I2C_DRIVER_NAME, phy);
253	if (ret)
254		s3fwrn5_remove(phy->ndev);
255
 
 
 
 
256	return ret;
257}
258
259static int s3fwrn5_i2c_remove(struct i2c_client *client)
260{
261	struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
262
263	s3fwrn5_remove(phy->ndev);
264
265	return 0;
266}
267
268static const struct i2c_device_id s3fwrn5_i2c_id_table[] = {
269	{S3FWRN5_I2C_DRIVER_NAME, 0},
270	{}
271};
272MODULE_DEVICE_TABLE(i2c, s3fwrn5_i2c_id_table);
273
274static const struct of_device_id of_s3fwrn5_i2c_match[] = {
275	{ .compatible = "samsung,s3fwrn5-i2c", },
276	{}
277};
278MODULE_DEVICE_TABLE(of, of_s3fwrn5_i2c_match);
279
280static struct i2c_driver s3fwrn5_i2c_driver = {
281	.driver = {
282		.name = S3FWRN5_I2C_DRIVER_NAME,
283		.of_match_table = of_match_ptr(of_s3fwrn5_i2c_match),
284	},
285	.probe = s3fwrn5_i2c_probe,
286	.remove = s3fwrn5_i2c_remove,
287	.id_table = s3fwrn5_i2c_id_table,
288};
289
290module_i2c_driver(s3fwrn5_i2c_driver);
291
292MODULE_LICENSE("GPL");
293MODULE_DESCRIPTION("I2C driver for Samsung S3FWRN5");
294MODULE_AUTHOR("Robert Baldyga <r.baldyga@samsung.com>");
v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * I2C Link Layer for Samsung S3FWRN5 NCI based Driver
  4 *
  5 * Copyright (C) 2015 Samsung Electrnoics
  6 * Robert Baldyga <r.baldyga@samsung.com>
  7 */
  8
  9#include <linux/clk.h>
 10#include <linux/i2c.h>
 11#include <linux/gpio.h>
 12#include <linux/delay.h>
 13#include <linux/of_gpio.h>
 14#include <linux/of_irq.h>
 15#include <linux/module.h>
 16
 17#include <net/nfc/nfc.h>
 18
 19#include "phy_common.h"
 20
 21#define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c"
 22
 
 
 
 23struct s3fwrn5_i2c_phy {
 24	struct phy_common common;
 25	struct i2c_client *i2c_dev;
 26	struct clk *clk;
 
 
 
 27
 
 
 
 28	unsigned int irq_skip:1;
 29};
 30
 
 
 
 
 
 
 
 
 
 
 31static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode)
 32{
 33	struct s3fwrn5_i2c_phy *phy = phy_id;
 34
 35	mutex_lock(&phy->common.mutex);
 36
 37	if (s3fwrn5_phy_power_ctrl(&phy->common, mode) == false)
 38		goto out;
 39
 
 
 
 
 
 
 
 
 
 
 
 
 
 40	phy->irq_skip = true;
 41
 42out:
 43	mutex_unlock(&phy->common.mutex);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 44}
 45
 46static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb)
 47{
 48	struct s3fwrn5_i2c_phy *phy = phy_id;
 49	int ret;
 50
 51	mutex_lock(&phy->common.mutex);
 52
 53	phy->irq_skip = false;
 54
 55	ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
 56	if (ret == -EREMOTEIO) {
 57		/* Retry, chip was in standby */
 58		usleep_range(110000, 120000);
 59		ret  = i2c_master_send(phy->i2c_dev, skb->data, skb->len);
 60	}
 61
 62	mutex_unlock(&phy->common.mutex);
 63
 64	if (ret < 0)
 65		return ret;
 66
 67	if (ret != skb->len)
 68		return -EREMOTEIO;
 69
 70	return 0;
 71}
 72
 73static const struct s3fwrn5_phy_ops i2c_phy_ops = {
 74	.set_wake = s3fwrn5_phy_set_wake,
 75	.set_mode = s3fwrn5_i2c_set_mode,
 76	.get_mode = s3fwrn5_phy_get_mode,
 77	.write = s3fwrn5_i2c_write,
 78};
 79
 80static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy)
 81{
 82	struct sk_buff *skb;
 83	size_t hdr_size;
 84	size_t data_len;
 85	char hdr[4];
 86	int ret;
 87
 88	hdr_size = (phy->common.mode == S3FWRN5_MODE_NCI) ?
 89		NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE;
 90	ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size);
 91	if (ret < 0)
 92		return ret;
 93
 94	if (ret < hdr_size)
 95		return -EBADMSG;
 96
 97	data_len = (phy->common.mode == S3FWRN5_MODE_NCI) ?
 98		((struct nci_ctrl_hdr *)hdr)->plen :
 99		((struct s3fwrn5_fw_header *)hdr)->len;
100
101	skb = alloc_skb(hdr_size + data_len, GFP_KERNEL);
102	if (!skb)
103		return -ENOMEM;
104
105	skb_put_data(skb, hdr, hdr_size);
106
107	if (data_len == 0)
108		goto out;
109
110	ret = i2c_master_recv(phy->i2c_dev, skb_put(skb, data_len), data_len);
111	if (ret != data_len) {
112		kfree_skb(skb);
113		return -EBADMSG;
114	}
115
116out:
117	return s3fwrn5_recv_frame(phy->common.ndev, skb, phy->common.mode);
118}
119
120static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id)
121{
122	struct s3fwrn5_i2c_phy *phy = phy_id;
 
123
124	if (!phy || !phy->common.ndev) {
125		WARN_ON_ONCE(1);
126		return IRQ_NONE;
127	}
128
129	mutex_lock(&phy->common.mutex);
130
131	if (phy->irq_skip)
132		goto out;
133
134	switch (phy->common.mode) {
135	case S3FWRN5_MODE_NCI:
136	case S3FWRN5_MODE_FW:
137		s3fwrn5_i2c_read(phy);
138		break;
139	case S3FWRN5_MODE_COLD:
 
140		break;
141	}
142
143out:
144	mutex_unlock(&phy->common.mutex);
145
146	return IRQ_HANDLED;
147}
148
149static int s3fwrn5_i2c_parse_dt(struct i2c_client *client)
150{
151	struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
152	struct device_node *np = client->dev.of_node;
153
154	if (!np)
155		return -ENODEV;
156
157	phy->common.gpio_en = of_get_named_gpio(np, "en-gpios", 0);
158	if (!gpio_is_valid(phy->common.gpio_en)) {
159		/* Support also deprecated property */
160		phy->common.gpio_en = of_get_named_gpio(np,
161							"s3fwrn5,en-gpios",
162							0);
163		if (!gpio_is_valid(phy->common.gpio_en))
164			return -ENODEV;
165	}
166
167	phy->common.gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0);
168	if (!gpio_is_valid(phy->common.gpio_fw_wake)) {
169		/* Support also deprecated property */
170		phy->common.gpio_fw_wake = of_get_named_gpio(np,
171							     "s3fwrn5,fw-gpios",
172							     0);
173		if (!gpio_is_valid(phy->common.gpio_fw_wake))
174			return -ENODEV;
175	}
176
177	return 0;
178}
179
180static int s3fwrn5_i2c_probe(struct i2c_client *client)
 
181{
182	struct s3fwrn5_i2c_phy *phy;
183	int ret;
184
185	phy = devm_kzalloc(&client->dev, sizeof(*phy), GFP_KERNEL);
186	if (!phy)
187		return -ENOMEM;
188
189	mutex_init(&phy->common.mutex);
190	phy->common.mode = S3FWRN5_MODE_COLD;
191	phy->irq_skip = true;
192
193	phy->i2c_dev = client;
194	i2c_set_clientdata(client, phy);
195
196	ret = s3fwrn5_i2c_parse_dt(client);
197	if (ret < 0)
198		return ret;
199
200	ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->common.gpio_en,
201				    GPIOF_OUT_INIT_HIGH, "s3fwrn5_en");
202	if (ret < 0)
203		return ret;
204
205	ret = devm_gpio_request_one(&phy->i2c_dev->dev,
206				    phy->common.gpio_fw_wake,
207				    GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake");
208	if (ret < 0)
209		return ret;
210
211	/*
212	 * S3FWRN5 depends on a clock input ("XI" pin) to function properly.
213	 * Depending on the hardware configuration this could be an always-on
214	 * oscillator or some external clock that must be explicitly enabled.
215	 * Make sure the clock is running before starting S3FWRN5.
216	 */
217	phy->clk = devm_clk_get_optional_enabled(&client->dev, NULL);
218	if (IS_ERR(phy->clk))
219		return dev_err_probe(&client->dev, PTR_ERR(phy->clk),
220				     "failed to get clock\n");
221
222	ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev,
223			    &i2c_phy_ops);
224	if (ret < 0)
225		return ret;
226
227	ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL,
228		s3fwrn5_i2c_irq_thread_fn, IRQF_ONESHOT,
229		S3FWRN5_I2C_DRIVER_NAME, phy);
230	if (ret)
231		goto s3fwrn5_remove;
232
233	return 0;
234
235s3fwrn5_remove:
236	s3fwrn5_remove(phy->common.ndev);
237	return ret;
238}
239
240static void s3fwrn5_i2c_remove(struct i2c_client *client)
241{
242	struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client);
243
244	s3fwrn5_remove(phy->common.ndev);
 
 
245}
246
247static const struct i2c_device_id s3fwrn5_i2c_id_table[] = {
248	{ S3FWRN5_I2C_DRIVER_NAME },
249	{}
250};
251MODULE_DEVICE_TABLE(i2c, s3fwrn5_i2c_id_table);
252
253static const struct of_device_id of_s3fwrn5_i2c_match[] __maybe_unused = {
254	{ .compatible = "samsung,s3fwrn5-i2c", },
255	{}
256};
257MODULE_DEVICE_TABLE(of, of_s3fwrn5_i2c_match);
258
259static struct i2c_driver s3fwrn5_i2c_driver = {
260	.driver = {
261		.name = S3FWRN5_I2C_DRIVER_NAME,
262		.of_match_table = of_match_ptr(of_s3fwrn5_i2c_match),
263	},
264	.probe = s3fwrn5_i2c_probe,
265	.remove = s3fwrn5_i2c_remove,
266	.id_table = s3fwrn5_i2c_id_table,
267};
268
269module_i2c_driver(s3fwrn5_i2c_driver);
270
271MODULE_LICENSE("GPL");
272MODULE_DESCRIPTION("I2C driver for Samsung S3FWRN5");
273MODULE_AUTHOR("Robert Baldyga <r.baldyga@samsung.com>");