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1/* SPDX-License-Identifier: GPL-2.0 */
2/* ld script to make ARM Linux kernel
3 * taken from the i386 version by Russell King
4 * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
5 */
6
7/* No __ro_after_init data in the .rodata section - which will always be ro */
8#define RO_AFTER_INIT_DATA
9
10#include <linux/sizes.h>
11
12#include <asm-generic/vmlinux.lds.h>
13#include <asm/cache.h>
14#include <asm/thread_info.h>
15#include <asm/memory.h>
16#include <asm/mpu.h>
17#include <asm/page.h>
18
19#include "vmlinux.lds.h"
20
21OUTPUT_ARCH(arm)
22ENTRY(stext)
23
24#ifndef __ARMEB__
25jiffies = jiffies_64;
26#else
27jiffies = jiffies_64 + 4;
28#endif
29
30SECTIONS
31{
32 /*
33 * XXX: The linker does not define how output sections are
34 * assigned to input sections when there are multiple statements
35 * matching the same input section name. There is no documented
36 * order of matching.
37 *
38 * unwind exit sections must be discarded before the rest of the
39 * unwind sections get included.
40 */
41 /DISCARD/ : {
42 ARM_DISCARD
43 *(.alt.smp.init)
44 *(.pv_table)
45 }
46
47 . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
48 _xiprom = .; /* XIP ROM area to be mapped */
49
50 .head.text : {
51 _text = .;
52 HEAD_TEXT
53 }
54
55 .text : { /* Real text segment */
56 _stext = .; /* Text and read-only data */
57 ARM_TEXT
58 }
59
60 RO_DATA(PAGE_SIZE)
61
62 . = ALIGN(4);
63 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
64 __start___ex_table = .;
65 ARM_MMU_KEEP(*(__ex_table))
66 __stop___ex_table = .;
67 }
68
69#ifdef CONFIG_ARM_UNWIND
70 ARM_UNWIND_SECTIONS
71#endif
72
73 _etext = .; /* End of text and rodata section */
74
75 ARM_VECTORS
76 INIT_TEXT_SECTION(8)
77 .exit.text : {
78 ARM_EXIT_KEEP(EXIT_TEXT)
79 }
80 .init.proc.info : {
81 ARM_CPU_DISCARD(PROC_INFO)
82 }
83 .init.arch.info : {
84 __arch_info_begin = .;
85 *(.arch.info.init)
86 __arch_info_end = .;
87 }
88 .init.tagtable : {
89 __tagtable_begin = .;
90 *(.taglist.init)
91 __tagtable_end = .;
92 }
93 .init.rodata : {
94 INIT_SETUP(16)
95 INIT_CALLS
96 CON_INITCALL
97 INIT_RAM_FS
98 }
99
100#ifdef CONFIG_ARM_MPU
101 . = ALIGN(SZ_128K);
102#endif
103 _exiprom = .; /* End of XIP ROM area */
104
105/*
106 * From this point, stuff is considered writable and will be copied to RAM
107 */
108 __data_loc = ALIGN(4); /* location in file */
109 . = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */
110#undef LOAD_OFFSET
111#define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
112
113 . = ALIGN(THREAD_SIZE);
114 _sdata = .;
115 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
116 .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
117 *(.data..ro_after_init)
118 }
119 _edata = .;
120
121 . = ALIGN(PAGE_SIZE);
122 __init_begin = .;
123 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
124 INIT_DATA
125 }
126 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
127 ARM_EXIT_KEEP(EXIT_DATA)
128 }
129#ifdef CONFIG_SMP
130 PERCPU_SECTION(L1_CACHE_BYTES)
131#endif
132
133#ifdef CONFIG_HAVE_TCM
134 ARM_TCM
135#endif
136
137 /*
138 * End of copied data. We need a dummy section to get its LMA.
139 * Also located before final ALIGN() as trailing padding is not stored
140 * in the resulting binary file and useless to copy.
141 */
142 .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
143 _edata_loc = LOADADDR(.data.endmark);
144
145 . = ALIGN(PAGE_SIZE);
146 __init_end = .;
147
148 BSS_SECTION(0, 0, 8)
149#ifdef CONFIG_ARM_MPU
150 . = ALIGN(PMSAv8_MINALIGN);
151#endif
152 _end = .;
153
154 STABS_DEBUG
155}
156
157/*
158 * These must never be empty
159 * If you have to comment these two assert statements out, your
160 * binutils is too old (for other reasons as well)
161 */
162ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
163ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
164
165#ifdef CONFIG_XIP_DEFLATED_DATA
166/*
167 * The .bss is used as a stack area for __inflate_kernel_data() whose stack
168 * frame is 9568 bytes. Make sure it has extra room left.
169 */
170ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
171#endif
172
173#ifdef CONFIG_ARM_MPU
174/*
175 * Due to PMSAv7 restriction on base address and size we have to
176 * enforce minimal alignment restrictions. It was seen that weaker
177 * alignment restriction on _xiprom will likely force XIP address
178 * space spawns multiple MPU regions thus it is likely we run in
179 * situation when we are reprogramming MPU region we run on with
180 * something which doesn't cover reprogramming code itself, so as soon
181 * as we update MPU settings we'd immediately try to execute straight
182 * from background region which is XN.
183 * It seem that alignment in 1M should suit most users.
184 * _exiprom is aligned as 1/8 of 1M so can be covered by subregion
185 * disable
186 */
187ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
188ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
189#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2/* ld script to make ARM Linux kernel
3 * taken from the i386 version by Russell King
4 * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
5 */
6
7/* No __ro_after_init data in the .rodata section - which will always be ro */
8#define RO_AFTER_INIT_DATA
9
10#include <linux/sizes.h>
11
12#include <asm/vmlinux.lds.h>
13#include <asm/cache.h>
14#include <asm/thread_info.h>
15#include <asm/page.h>
16#include <asm/mpu.h>
17
18OUTPUT_ARCH(arm)
19ENTRY(stext)
20
21#ifndef __ARMEB__
22jiffies = jiffies_64;
23#else
24jiffies = jiffies_64 + 4;
25#endif
26
27SECTIONS
28{
29 /*
30 * XXX: The linker does not define how output sections are
31 * assigned to input sections when there are multiple statements
32 * matching the same input section name. There is no documented
33 * order of matching.
34 *
35 * unwind exit sections must be discarded before the rest of the
36 * unwind sections get included.
37 */
38 /DISCARD/ : {
39 ARM_DISCARD
40 *(.alt.smp.init)
41 *(.pv_table)
42#ifndef CONFIG_ARM_UNWIND
43 *(.ARM.exidx) *(.ARM.exidx.*)
44 *(.ARM.extab) *(.ARM.extab.*)
45#endif
46 }
47
48 . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
49 _xiprom = .; /* XIP ROM area to be mapped */
50
51 .head.text : {
52 _text = .;
53 HEAD_TEXT
54 }
55
56 .text : { /* Real text segment */
57 _stext = .; /* Text and read-only data */
58 ARM_TEXT
59 }
60
61 RO_DATA(PAGE_SIZE)
62
63 . = ALIGN(4);
64 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
65 __start___ex_table = .;
66 ARM_MMU_KEEP(KEEP(*(__ex_table)))
67 __stop___ex_table = .;
68 }
69
70#ifdef CONFIG_ARM_UNWIND
71 ARM_UNWIND_SECTIONS
72#endif
73
74 _etext = .; /* End of text and rodata section */
75
76 ARM_VECTORS
77 INIT_TEXT_SECTION(8)
78 .exit.text : {
79 ARM_EXIT_KEEP(EXIT_TEXT)
80 }
81 .init.proc.info : {
82 ARM_CPU_DISCARD(PROC_INFO)
83 }
84 .init.arch.info : {
85 __arch_info_begin = .;
86 KEEP(*(.arch.info.init))
87 __arch_info_end = .;
88 }
89 .init.tagtable : {
90 __tagtable_begin = .;
91 *(.taglist.init)
92 __tagtable_end = .;
93 }
94 .init.rodata : {
95 INIT_SETUP(16)
96 INIT_CALLS
97 CON_INITCALL
98 INIT_RAM_FS
99 }
100
101#ifdef CONFIG_ARM_MPU
102 . = ALIGN(SZ_128K);
103#endif
104 _exiprom = .; /* End of XIP ROM area */
105
106/*
107 * From this point, stuff is considered writable and will be copied to RAM
108 */
109 __data_loc = ALIGN(4); /* location in file */
110 . = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */
111#undef LOAD_OFFSET
112#define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
113
114 . = ALIGN(THREAD_SIZE);
115 _sdata = .;
116 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
117 .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
118 *(.data..ro_after_init)
119 }
120 _edata = .;
121
122 . = ALIGN(PAGE_SIZE);
123 __init_begin = .;
124 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
125 INIT_DATA
126 }
127 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
128 ARM_EXIT_KEEP(EXIT_DATA)
129 }
130#ifdef CONFIG_SMP
131 PERCPU_SECTION(L1_CACHE_BYTES)
132#endif
133
134#ifdef CONFIG_HAVE_TCM
135 ARM_TCM
136#endif
137
138 /*
139 * End of copied data. We need a dummy section to get its LMA.
140 * Also located before final ALIGN() as trailing padding is not stored
141 * in the resulting binary file and useless to copy.
142 */
143 .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
144 _edata_loc = LOADADDR(.data.endmark);
145
146 . = ALIGN(PAGE_SIZE);
147 __init_end = .;
148
149 BSS_SECTION(0, 0, 8)
150#ifdef CONFIG_ARM_MPU
151 . = ALIGN(PMSAv8_MINALIGN);
152#endif
153 _end = .;
154
155 STABS_DEBUG
156 DWARF_DEBUG
157 ARM_DETAILS
158
159 ARM_ASSERTS
160}
161
162/*
163 * These must never be empty
164 * If you have to comment these two assert statements out, your
165 * binutils is too old (for other reasons as well)
166 */
167ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
168#ifndef CONFIG_COMPILE_TEST
169ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
170#endif
171
172#ifdef CONFIG_XIP_DEFLATED_DATA
173/*
174 * The .bss is used as a stack area for __inflate_kernel_data() whose stack
175 * frame is 9568 bytes. Make sure it has extra room left.
176 */
177ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
178#endif
179
180#if defined(CONFIG_ARM_MPU) && !defined(CONFIG_COMPILE_TEST)
181/*
182 * Due to PMSAv7 restriction on base address and size we have to
183 * enforce minimal alignment restrictions. It was seen that weaker
184 * alignment restriction on _xiprom will likely force XIP address
185 * space spawns multiple MPU regions thus it is likely we run in
186 * situation when we are reprogramming MPU region we run on with
187 * something which doesn't cover reprogramming code itself, so as soon
188 * as we update MPU settings we'd immediately try to execute straight
189 * from background region which is XN.
190 * It seem that alignment in 1M should suit most users.
191 * _exiprom is aligned as 1/8 of 1M so can be covered by subregion
192 * disable
193 */
194ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
195ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
196#endif