Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Xilinx Zynq MPSoC Firmware layer
4 *
5 * Copyright (C) 2014-2020 Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Davorin Mista <davorin.mista@aggios.com>
9 * Jolly Shah <jollys@xilinx.com>
10 * Rajan Vaja <rajanv@xilinx.com>
11 */
12
13#include <linux/arm-smccc.h>
14#include <linux/compiler.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/mfd/core.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_platform.h>
21#include <linux/slab.h>
22#include <linux/uaccess.h>
23
24#include <linux/firmware/xlnx-zynqmp.h>
25#include "zynqmp-debug.h"
26
27static bool feature_check_enabled;
28static u32 zynqmp_pm_features[PM_API_MAX];
29
30static const struct mfd_cell firmware_devs[] = {
31 {
32 .name = "zynqmp_power_controller",
33 },
34};
35
36/**
37 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
38 * @ret_status: PMUFW return code
39 *
40 * Return: corresponding Linux error code
41 */
42static int zynqmp_pm_ret_code(u32 ret_status)
43{
44 switch (ret_status) {
45 case XST_PM_SUCCESS:
46 case XST_PM_DOUBLE_REQ:
47 return 0;
48 case XST_PM_NO_FEATURE:
49 return -ENOTSUPP;
50 case XST_PM_NO_ACCESS:
51 return -EACCES;
52 case XST_PM_ABORT_SUSPEND:
53 return -ECANCELED;
54 case XST_PM_MULT_USER:
55 return -EUSERS;
56 case XST_PM_INTERNAL:
57 case XST_PM_CONFLICT:
58 case XST_PM_INVALID_NODE:
59 default:
60 return -EINVAL;
61 }
62}
63
64static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
65 u32 *ret_payload)
66{
67 return -ENODEV;
68}
69
70/*
71 * PM function call wrapper
72 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
73 */
74static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
75
76/**
77 * do_fw_call_smc() - Call system-level platform management layer (SMC)
78 * @arg0: Argument 0 to SMC call
79 * @arg1: Argument 1 to SMC call
80 * @arg2: Argument 2 to SMC call
81 * @ret_payload: Returned value array
82 *
83 * Invoke platform management function via SMC call (no hypervisor present).
84 *
85 * Return: Returns status, either success or error+reason
86 */
87static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
88 u32 *ret_payload)
89{
90 struct arm_smccc_res res;
91
92 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
93
94 if (ret_payload) {
95 ret_payload[0] = lower_32_bits(res.a0);
96 ret_payload[1] = upper_32_bits(res.a0);
97 ret_payload[2] = lower_32_bits(res.a1);
98 ret_payload[3] = upper_32_bits(res.a1);
99 }
100
101 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
102}
103
104/**
105 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
106 * @arg0: Argument 0 to HVC call
107 * @arg1: Argument 1 to HVC call
108 * @arg2: Argument 2 to HVC call
109 * @ret_payload: Returned value array
110 *
111 * Invoke platform management function via HVC
112 * HVC-based for communication through hypervisor
113 * (no direct communication with ATF).
114 *
115 * Return: Returns status, either success or error+reason
116 */
117static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
118 u32 *ret_payload)
119{
120 struct arm_smccc_res res;
121
122 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
123
124 if (ret_payload) {
125 ret_payload[0] = lower_32_bits(res.a0);
126 ret_payload[1] = upper_32_bits(res.a0);
127 ret_payload[2] = lower_32_bits(res.a1);
128 ret_payload[3] = upper_32_bits(res.a1);
129 }
130
131 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
132}
133
134/**
135 * zynqmp_pm_feature() - Check weather given feature is supported or not
136 * @api_id: API ID to check
137 *
138 * Return: Returns status, either success or error+reason
139 */
140static int zynqmp_pm_feature(u32 api_id)
141{
142 int ret;
143 u32 ret_payload[PAYLOAD_ARG_CNT];
144 u64 smc_arg[2];
145
146 if (!feature_check_enabled)
147 return 0;
148
149 /* Return value if feature is already checked */
150 if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED)
151 return zynqmp_pm_features[api_id];
152
153 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
154 smc_arg[1] = api_id;
155
156 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
157 if (ret) {
158 zynqmp_pm_features[api_id] = PM_FEATURE_INVALID;
159 return PM_FEATURE_INVALID;
160 }
161
162 zynqmp_pm_features[api_id] = ret_payload[1];
163
164 return zynqmp_pm_features[api_id];
165}
166
167/**
168 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
169 * caller function depending on the configuration
170 * @pm_api_id: Requested PM-API call
171 * @arg0: Argument 0 to requested PM-API call
172 * @arg1: Argument 1 to requested PM-API call
173 * @arg2: Argument 2 to requested PM-API call
174 * @arg3: Argument 3 to requested PM-API call
175 * @ret_payload: Returned value array
176 *
177 * Invoke platform management function for SMC or HVC call, depending on
178 * configuration.
179 * Following SMC Calling Convention (SMCCC) for SMC64:
180 * Pm Function Identifier,
181 * PM_SIP_SVC + PM_API_ID =
182 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
183 * ((SMC_64) << FUNCID_CC_SHIFT)
184 * ((SIP_START) << FUNCID_OEN_SHIFT)
185 * ((PM_API_ID) & FUNCID_NUM_MASK))
186 *
187 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
188 * PM_API_ID - Platform Management API ID.
189 *
190 * Return: Returns status, either success or error+reason
191 */
192int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
193 u32 arg2, u32 arg3, u32 *ret_payload)
194{
195 /*
196 * Added SIP service call Function Identifier
197 * Make sure to stay in x0 register
198 */
199 u64 smc_arg[4];
200
201 if (zynqmp_pm_feature(pm_api_id) == PM_FEATURE_INVALID)
202 return -ENOTSUPP;
203
204 smc_arg[0] = PM_SIP_SVC | pm_api_id;
205 smc_arg[1] = ((u64)arg1 << 32) | arg0;
206 smc_arg[2] = ((u64)arg3 << 32) | arg2;
207
208 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
209}
210
211static u32 pm_api_version;
212static u32 pm_tz_version;
213
214/**
215 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
216 * @version: Returned version value
217 *
218 * Return: Returns status, either success or error+reason
219 */
220int zynqmp_pm_get_api_version(u32 *version)
221{
222 u32 ret_payload[PAYLOAD_ARG_CNT];
223 int ret;
224
225 if (!version)
226 return -EINVAL;
227
228 /* Check is PM API version already verified */
229 if (pm_api_version > 0) {
230 *version = pm_api_version;
231 return 0;
232 }
233 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
234 *version = ret_payload[1];
235
236 return ret;
237}
238EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
239
240/**
241 * zynqmp_pm_get_chipid - Get silicon ID registers
242 * @idcode: IDCODE register
243 * @version: version register
244 *
245 * Return: Returns the status of the operation and the idcode and version
246 * registers in @idcode and @version.
247 */
248int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
249{
250 u32 ret_payload[PAYLOAD_ARG_CNT];
251 int ret;
252
253 if (!idcode || !version)
254 return -EINVAL;
255
256 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
257 *idcode = ret_payload[1];
258 *version = ret_payload[2];
259
260 return ret;
261}
262EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
263
264/**
265 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
266 * @version: Returned version value
267 *
268 * Return: Returns status, either success or error+reason
269 */
270static int zynqmp_pm_get_trustzone_version(u32 *version)
271{
272 u32 ret_payload[PAYLOAD_ARG_CNT];
273 int ret;
274
275 if (!version)
276 return -EINVAL;
277
278 /* Check is PM trustzone version already verified */
279 if (pm_tz_version > 0) {
280 *version = pm_tz_version;
281 return 0;
282 }
283 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
284 0, 0, ret_payload);
285 *version = ret_payload[1];
286
287 return ret;
288}
289
290/**
291 * get_set_conduit_method() - Choose SMC or HVC based communication
292 * @np: Pointer to the device_node structure
293 *
294 * Use SMC or HVC-based functions to communicate with EL2/EL3.
295 *
296 * Return: Returns 0 on success or error code
297 */
298static int get_set_conduit_method(struct device_node *np)
299{
300 const char *method;
301
302 if (of_property_read_string(np, "method", &method)) {
303 pr_warn("%s missing \"method\" property\n", __func__);
304 return -ENXIO;
305 }
306
307 if (!strcmp("hvc", method)) {
308 do_fw_call = do_fw_call_hvc;
309 } else if (!strcmp("smc", method)) {
310 do_fw_call = do_fw_call_smc;
311 } else {
312 pr_warn("%s Invalid \"method\" property: %s\n",
313 __func__, method);
314 return -EINVAL;
315 }
316
317 return 0;
318}
319
320/**
321 * zynqmp_pm_query_data() - Get query data from firmware
322 * @qdata: Variable to the zynqmp_pm_query_data structure
323 * @out: Returned output value
324 *
325 * Return: Returns status, either success or error+reason
326 */
327int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
328{
329 int ret;
330
331 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
332 qdata.arg2, qdata.arg3, out);
333
334 /*
335 * For clock name query, all bytes in SMC response are clock name
336 * characters and return code is always success. For invalid clocks,
337 * clock name bytes would be zeros.
338 */
339 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
340}
341EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
342
343/**
344 * zynqmp_pm_clock_enable() - Enable the clock for given id
345 * @clock_id: ID of the clock to be enabled
346 *
347 * This function is used by master to enable the clock
348 * including peripherals and PLL clocks.
349 *
350 * Return: Returns status, either success or error+reason
351 */
352int zynqmp_pm_clock_enable(u32 clock_id)
353{
354 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
355}
356EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
357
358/**
359 * zynqmp_pm_clock_disable() - Disable the clock for given id
360 * @clock_id: ID of the clock to be disable
361 *
362 * This function is used by master to disable the clock
363 * including peripherals and PLL clocks.
364 *
365 * Return: Returns status, either success or error+reason
366 */
367int zynqmp_pm_clock_disable(u32 clock_id)
368{
369 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
370}
371EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
372
373/**
374 * zynqmp_pm_clock_getstate() - Get the clock state for given id
375 * @clock_id: ID of the clock to be queried
376 * @state: 1/0 (Enabled/Disabled)
377 *
378 * This function is used by master to get the state of clock
379 * including peripherals and PLL clocks.
380 *
381 * Return: Returns status, either success or error+reason
382 */
383int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
384{
385 u32 ret_payload[PAYLOAD_ARG_CNT];
386 int ret;
387
388 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
389 0, 0, ret_payload);
390 *state = ret_payload[1];
391
392 return ret;
393}
394EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
395
396/**
397 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
398 * @clock_id: ID of the clock
399 * @divider: divider value
400 *
401 * This function is used by master to set divider for any clock
402 * to achieve desired rate.
403 *
404 * Return: Returns status, either success or error+reason
405 */
406int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
407{
408 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
409 0, 0, NULL);
410}
411EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
412
413/**
414 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
415 * @clock_id: ID of the clock
416 * @divider: divider value
417 *
418 * This function is used by master to get divider values
419 * for any clock.
420 *
421 * Return: Returns status, either success or error+reason
422 */
423int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
424{
425 u32 ret_payload[PAYLOAD_ARG_CNT];
426 int ret;
427
428 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
429 0, 0, ret_payload);
430 *divider = ret_payload[1];
431
432 return ret;
433}
434EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
435
436/**
437 * zynqmp_pm_clock_setrate() - Set the clock rate for given id
438 * @clock_id: ID of the clock
439 * @rate: rate value in hz
440 *
441 * This function is used by master to set rate for any clock.
442 *
443 * Return: Returns status, either success or error+reason
444 */
445int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
446{
447 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
448 lower_32_bits(rate),
449 upper_32_bits(rate),
450 0, NULL);
451}
452EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
453
454/**
455 * zynqmp_pm_clock_getrate() - Get the clock rate for given id
456 * @clock_id: ID of the clock
457 * @rate: rate value in hz
458 *
459 * This function is used by master to get rate
460 * for any clock.
461 *
462 * Return: Returns status, either success or error+reason
463 */
464int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
465{
466 u32 ret_payload[PAYLOAD_ARG_CNT];
467 int ret;
468
469 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
470 0, 0, ret_payload);
471 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
472
473 return ret;
474}
475EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
476
477/**
478 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
479 * @clock_id: ID of the clock
480 * @parent_id: parent id
481 *
482 * This function is used by master to set parent for any clock.
483 *
484 * Return: Returns status, either success or error+reason
485 */
486int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
487{
488 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
489 parent_id, 0, 0, NULL);
490}
491EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
492
493/**
494 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
495 * @clock_id: ID of the clock
496 * @parent_id: parent id
497 *
498 * This function is used by master to get parent index
499 * for any clock.
500 *
501 * Return: Returns status, either success or error+reason
502 */
503int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
504{
505 u32 ret_payload[PAYLOAD_ARG_CNT];
506 int ret;
507
508 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
509 0, 0, ret_payload);
510 *parent_id = ret_payload[1];
511
512 return ret;
513}
514EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
515
516/**
517 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
518 *
519 * @clk_id: PLL clock ID
520 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
521 *
522 * This function sets PLL mode
523 *
524 * Return: Returns status, either success or error+reason
525 */
526int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
527{
528 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
529 clk_id, mode, NULL);
530}
531EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
532
533/**
534 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
535 *
536 * @clk_id: PLL clock ID
537 * @mode: PLL mode
538 *
539 * This function return current PLL mode
540 *
541 * Return: Returns status, either success or error+reason
542 */
543int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
544{
545 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
546 clk_id, 0, mode);
547}
548EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
549
550/**
551 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
552 *
553 * @clk_id: PLL clock ID
554 * @data: fraction data
555 *
556 * This function sets fraction data.
557 * It is valid for fraction mode only.
558 *
559 * Return: Returns status, either success or error+reason
560 */
561int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
562{
563 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
564 clk_id, data, NULL);
565}
566EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
567
568/**
569 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
570 *
571 * @clk_id: PLL clock ID
572 * @data: fraction data
573 *
574 * This function returns fraction data value.
575 *
576 * Return: Returns status, either success or error+reason
577 */
578int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
579{
580 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
581 clk_id, 0, data);
582}
583EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
584
585/**
586 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
587 *
588 * @node_id Node ID of the device
589 * @type Type of tap delay to set (input/output)
590 * @value Value to set fot the tap delay
591 *
592 * This function sets input/output tap delay for the SD device.
593 *
594 * @return Returns status, either success or error+reason
595 */
596int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
597{
598 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
599 type, value, NULL);
600}
601EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
602
603/**
604 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
605 *
606 * @node_id Node ID of the device
607 * @type Reset type
608 *
609 * This function resets DLL logic for the SD device.
610 *
611 * @return Returns status, either success or error+reason
612 */
613int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
614{
615 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
616 type, 0, NULL);
617}
618EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
619
620/**
621 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
622 * @index GGS register index
623 * @value Register value to be written
624 *
625 * This function writes value to GGS register.
626 *
627 * @return Returns status, either success or error+reason
628 */
629int zynqmp_pm_write_ggs(u32 index, u32 value)
630{
631 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
632 index, value, NULL);
633}
634EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
635
636/**
637 * zynqmp_pm_write_ggs() - PM API for reading global general storage (ggs)
638 * @index GGS register index
639 * @value Register value to be written
640 *
641 * This function returns GGS register value.
642 *
643 * @return Returns status, either success or error+reason
644 */
645int zynqmp_pm_read_ggs(u32 index, u32 *value)
646{
647 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
648 index, 0, value);
649}
650EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
651
652/**
653 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
654 * storage (pggs)
655 * @index PGGS register index
656 * @value Register value to be written
657 *
658 * This function writes value to PGGS register.
659 *
660 * @return Returns status, either success or error+reason
661 */
662int zynqmp_pm_write_pggs(u32 index, u32 value)
663{
664 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
665 NULL);
666}
667EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
668
669/**
670 * zynqmp_pm_write_pggs() - PM API for reading persistent global general
671 * storage (pggs)
672 * @index PGGS register index
673 * @value Register value to be written
674 *
675 * This function returns PGGS register value.
676 *
677 * @return Returns status, either success or error+reason
678 */
679int zynqmp_pm_read_pggs(u32 index, u32 *value)
680{
681 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
682 value);
683}
684EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
685
686/**
687 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
688 * @value Status value to be written
689 *
690 * This function sets healthy bit value to indicate boot health status
691 * to firmware.
692 *
693 * @return Returns status, either success or error+reason
694 */
695int zynqmp_pm_set_boot_health_status(u32 value)
696{
697 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
698 value, 0, NULL);
699}
700
701/**
702 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
703 * @reset: Reset to be configured
704 * @assert_flag: Flag stating should reset be asserted (1) or
705 * released (0)
706 *
707 * Return: Returns status, either success or error+reason
708 */
709int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
710 const enum zynqmp_pm_reset_action assert_flag)
711{
712 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
713 0, 0, NULL);
714}
715EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
716
717/**
718 * zynqmp_pm_reset_get_status - Get status of the reset
719 * @reset: Reset whose status should be returned
720 * @status: Returned status
721 *
722 * Return: Returns status, either success or error+reason
723 */
724int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
725{
726 u32 ret_payload[PAYLOAD_ARG_CNT];
727 int ret;
728
729 if (!status)
730 return -EINVAL;
731
732 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
733 0, 0, ret_payload);
734 *status = ret_payload[1];
735
736 return ret;
737}
738EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
739
740/**
741 * zynqmp_pm_fpga_load - Perform the fpga load
742 * @address: Address to write to
743 * @size: pl bitstream size
744 * @flags: Bitstream type
745 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
746 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
747 *
748 * This function provides access to pmufw. To transfer
749 * the required bitstream into PL.
750 *
751 * Return: Returns status, either success or error+reason
752 */
753int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
754{
755 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
756 upper_32_bits(address), size, flags, NULL);
757}
758EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
759
760/**
761 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
762 * @value: Value to read
763 *
764 * This function provides access to the pmufw to get the PCAP
765 * status
766 *
767 * Return: Returns status, either success or error+reason
768 */
769int zynqmp_pm_fpga_get_status(u32 *value)
770{
771 u32 ret_payload[PAYLOAD_ARG_CNT];
772 int ret;
773
774 if (!value)
775 return -EINVAL;
776
777 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
778 *value = ret_payload[1];
779
780 return ret;
781}
782EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
783
784/**
785 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
786 * master has initialized its own power management
787 *
788 * This API function is to be used for notify the power management controller
789 * about the completed power management initialization.
790 *
791 * Return: Returns status, either success or error+reason
792 */
793int zynqmp_pm_init_finalize(void)
794{
795 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
796}
797EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
798
799/**
800 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
801 * @mode: Mode to set for system suspend
802 *
803 * This API function is used to set mode of system suspend.
804 *
805 * Return: Returns status, either success or error+reason
806 */
807int zynqmp_pm_set_suspend_mode(u32 mode)
808{
809 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
810}
811EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
812
813/**
814 * zynqmp_pm_request_node() - Request a node with specific capabilities
815 * @node: Node ID of the slave
816 * @capabilities: Requested capabilities of the slave
817 * @qos: Quality of service (not supported)
818 * @ack: Flag to specify whether acknowledge is requested
819 *
820 * This function is used by master to request particular node from firmware.
821 * Every master must request node before using it.
822 *
823 * Return: Returns status, either success or error+reason
824 */
825int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
826 const u32 qos, const enum zynqmp_pm_request_ack ack)
827{
828 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
829 qos, ack, NULL);
830}
831EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
832
833/**
834 * zynqmp_pm_release_node() - Release a node
835 * @node: Node ID of the slave
836 *
837 * This function is used by master to inform firmware that master
838 * has released node. Once released, master must not use that node
839 * without re-request.
840 *
841 * Return: Returns status, either success or error+reason
842 */
843int zynqmp_pm_release_node(const u32 node)
844{
845 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
846}
847EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
848
849/**
850 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
851 * @node: Node ID of the slave
852 * @capabilities: Requested capabilities of the slave
853 * @qos: Quality of service (not supported)
854 * @ack: Flag to specify whether acknowledge is requested
855 *
856 * This API function is to be used for slaves a PU already has requested
857 * to change its capabilities.
858 *
859 * Return: Returns status, either success or error+reason
860 */
861int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
862 const u32 qos,
863 const enum zynqmp_pm_request_ack ack)
864{
865 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
866 qos, ack, NULL);
867}
868EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
869
870/**
871 * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
872 * AES-GCM core.
873 * @address: Address of the AesParams structure.
874 * @out: Returned output value
875 *
876 * Return: Returns status, either success or error code.
877 */
878int zynqmp_pm_aes_engine(const u64 address, u32 *out)
879{
880 u32 ret_payload[PAYLOAD_ARG_CNT];
881 int ret;
882
883 if (!out)
884 return -EINVAL;
885
886 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
887 lower_32_bits(address),
888 0, 0, ret_payload);
889 *out = ret_payload[1];
890
891 return ret;
892}
893EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
894
895/**
896 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
897 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
898 * @subtype: Specifies which system should be restarted or shut down
899 *
900 * Return: Returns status, either success or error+reason
901 */
902int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
903{
904 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
905 0, 0, NULL);
906}
907
908/**
909 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
910 * @subtype: Shutdown subtype
911 * @name: Matching string for scope argument
912 *
913 * This struct encapsulates mapping between shutdown scope ID and string.
914 */
915struct zynqmp_pm_shutdown_scope {
916 const enum zynqmp_pm_shutdown_subtype subtype;
917 const char *name;
918};
919
920static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
921 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
922 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
923 .name = "subsystem",
924 },
925 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
926 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
927 .name = "ps_only",
928 },
929 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
930 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
931 .name = "system",
932 },
933};
934
935static struct zynqmp_pm_shutdown_scope *selected_scope =
936 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
937
938/**
939 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
940 * @scope_string: Shutdown scope string
941 *
942 * Return: Return pointer to matching shutdown scope struct from
943 * array of available options in system if string is valid,
944 * otherwise returns NULL.
945 */
946static struct zynqmp_pm_shutdown_scope*
947 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
948{
949 int count;
950
951 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
952 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
953 return &shutdown_scopes[count];
954
955 return NULL;
956}
957
958static ssize_t shutdown_scope_show(struct device *device,
959 struct device_attribute *attr,
960 char *buf)
961{
962 int i;
963
964 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
965 if (&shutdown_scopes[i] == selected_scope) {
966 strcat(buf, "[");
967 strcat(buf, shutdown_scopes[i].name);
968 strcat(buf, "]");
969 } else {
970 strcat(buf, shutdown_scopes[i].name);
971 }
972 strcat(buf, " ");
973 }
974 strcat(buf, "\n");
975
976 return strlen(buf);
977}
978
979static ssize_t shutdown_scope_store(struct device *device,
980 struct device_attribute *attr,
981 const char *buf, size_t count)
982{
983 int ret;
984 struct zynqmp_pm_shutdown_scope *scope;
985
986 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
987 if (!scope)
988 return -EINVAL;
989
990 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
991 scope->subtype);
992 if (ret) {
993 pr_err("unable to set shutdown scope %s\n", buf);
994 return ret;
995 }
996
997 selected_scope = scope;
998
999 return count;
1000}
1001
1002static DEVICE_ATTR_RW(shutdown_scope);
1003
1004static ssize_t health_status_store(struct device *device,
1005 struct device_attribute *attr,
1006 const char *buf, size_t count)
1007{
1008 int ret;
1009 unsigned int value;
1010
1011 ret = kstrtouint(buf, 10, &value);
1012 if (ret)
1013 return ret;
1014
1015 ret = zynqmp_pm_set_boot_health_status(value);
1016 if (ret) {
1017 dev_err(device, "unable to set healthy bit value to %u\n",
1018 value);
1019 return ret;
1020 }
1021
1022 return count;
1023}
1024
1025static DEVICE_ATTR_WO(health_status);
1026
1027static ssize_t ggs_show(struct device *device,
1028 struct device_attribute *attr,
1029 char *buf,
1030 u32 reg)
1031{
1032 int ret;
1033 u32 ret_payload[PAYLOAD_ARG_CNT];
1034
1035 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1036 if (ret)
1037 return ret;
1038
1039 return sprintf(buf, "0x%x\n", ret_payload[1]);
1040}
1041
1042static ssize_t ggs_store(struct device *device,
1043 struct device_attribute *attr,
1044 const char *buf, size_t count,
1045 u32 reg)
1046{
1047 long value;
1048 int ret;
1049
1050 if (reg >= GSS_NUM_REGS)
1051 return -EINVAL;
1052
1053 ret = kstrtol(buf, 16, &value);
1054 if (ret) {
1055 count = -EFAULT;
1056 goto err;
1057 }
1058
1059 ret = zynqmp_pm_write_ggs(reg, value);
1060 if (ret)
1061 count = -EFAULT;
1062err:
1063 return count;
1064}
1065
1066/* GGS register show functions */
1067#define GGS0_SHOW(N) \
1068 ssize_t ggs##N##_show(struct device *device, \
1069 struct device_attribute *attr, \
1070 char *buf) \
1071 { \
1072 return ggs_show(device, attr, buf, N); \
1073 }
1074
1075static GGS0_SHOW(0);
1076static GGS0_SHOW(1);
1077static GGS0_SHOW(2);
1078static GGS0_SHOW(3);
1079
1080/* GGS register store function */
1081#define GGS0_STORE(N) \
1082 ssize_t ggs##N##_store(struct device *device, \
1083 struct device_attribute *attr, \
1084 const char *buf, \
1085 size_t count) \
1086 { \
1087 return ggs_store(device, attr, buf, count, N); \
1088 }
1089
1090static GGS0_STORE(0);
1091static GGS0_STORE(1);
1092static GGS0_STORE(2);
1093static GGS0_STORE(3);
1094
1095static ssize_t pggs_show(struct device *device,
1096 struct device_attribute *attr,
1097 char *buf,
1098 u32 reg)
1099{
1100 int ret;
1101 u32 ret_payload[PAYLOAD_ARG_CNT];
1102
1103 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1104 if (ret)
1105 return ret;
1106
1107 return sprintf(buf, "0x%x\n", ret_payload[1]);
1108}
1109
1110static ssize_t pggs_store(struct device *device,
1111 struct device_attribute *attr,
1112 const char *buf, size_t count,
1113 u32 reg)
1114{
1115 long value;
1116 int ret;
1117
1118 if (reg >= GSS_NUM_REGS)
1119 return -EINVAL;
1120
1121 ret = kstrtol(buf, 16, &value);
1122 if (ret) {
1123 count = -EFAULT;
1124 goto err;
1125 }
1126
1127 ret = zynqmp_pm_write_pggs(reg, value);
1128 if (ret)
1129 count = -EFAULT;
1130
1131err:
1132 return count;
1133}
1134
1135#define PGGS0_SHOW(N) \
1136 ssize_t pggs##N##_show(struct device *device, \
1137 struct device_attribute *attr, \
1138 char *buf) \
1139 { \
1140 return pggs_show(device, attr, buf, N); \
1141 }
1142
1143#define PGGS0_STORE(N) \
1144 ssize_t pggs##N##_store(struct device *device, \
1145 struct device_attribute *attr, \
1146 const char *buf, \
1147 size_t count) \
1148 { \
1149 return pggs_store(device, attr, buf, count, N); \
1150 }
1151
1152/* PGGS register show functions */
1153static PGGS0_SHOW(0);
1154static PGGS0_SHOW(1);
1155static PGGS0_SHOW(2);
1156static PGGS0_SHOW(3);
1157
1158/* PGGS register store functions */
1159static PGGS0_STORE(0);
1160static PGGS0_STORE(1);
1161static PGGS0_STORE(2);
1162static PGGS0_STORE(3);
1163
1164/* GGS register attributes */
1165static DEVICE_ATTR_RW(ggs0);
1166static DEVICE_ATTR_RW(ggs1);
1167static DEVICE_ATTR_RW(ggs2);
1168static DEVICE_ATTR_RW(ggs3);
1169
1170/* PGGS register attributes */
1171static DEVICE_ATTR_RW(pggs0);
1172static DEVICE_ATTR_RW(pggs1);
1173static DEVICE_ATTR_RW(pggs2);
1174static DEVICE_ATTR_RW(pggs3);
1175
1176static struct attribute *zynqmp_firmware_attrs[] = {
1177 &dev_attr_ggs0.attr,
1178 &dev_attr_ggs1.attr,
1179 &dev_attr_ggs2.attr,
1180 &dev_attr_ggs3.attr,
1181 &dev_attr_pggs0.attr,
1182 &dev_attr_pggs1.attr,
1183 &dev_attr_pggs2.attr,
1184 &dev_attr_pggs3.attr,
1185 &dev_attr_shutdown_scope.attr,
1186 &dev_attr_health_status.attr,
1187 NULL,
1188};
1189
1190ATTRIBUTE_GROUPS(zynqmp_firmware);
1191
1192static int zynqmp_firmware_probe(struct platform_device *pdev)
1193{
1194 struct device *dev = &pdev->dev;
1195 struct device_node *np;
1196 int ret;
1197
1198 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1199 if (!np) {
1200 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1201 if (!np)
1202 return 0;
1203
1204 feature_check_enabled = true;
1205 }
1206 of_node_put(np);
1207
1208 ret = get_set_conduit_method(dev->of_node);
1209 if (ret)
1210 return ret;
1211
1212 /* Check PM API version number */
1213 zynqmp_pm_get_api_version(&pm_api_version);
1214 if (pm_api_version < ZYNQMP_PM_VERSION) {
1215 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1216 __func__,
1217 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1218 pm_api_version >> 16, pm_api_version & 0xFFFF);
1219 }
1220
1221 pr_info("%s Platform Management API v%d.%d\n", __func__,
1222 pm_api_version >> 16, pm_api_version & 0xFFFF);
1223
1224 /* Check trustzone version number */
1225 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1226 if (ret)
1227 panic("Legacy trustzone found without version support\n");
1228
1229 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1230 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1231 __func__,
1232 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1233 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1234
1235 pr_info("%s Trustzone version v%d.%d\n", __func__,
1236 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1237
1238 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1239 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1240 if (ret) {
1241 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1242 return ret;
1243 }
1244
1245 zynqmp_pm_api_debugfs_init();
1246
1247 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1248}
1249
1250static int zynqmp_firmware_remove(struct platform_device *pdev)
1251{
1252 mfd_remove_devices(&pdev->dev);
1253 zynqmp_pm_api_debugfs_exit();
1254
1255 return 0;
1256}
1257
1258static const struct of_device_id zynqmp_firmware_of_match[] = {
1259 {.compatible = "xlnx,zynqmp-firmware"},
1260 {.compatible = "xlnx,versal-firmware"},
1261 {},
1262};
1263MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1264
1265static struct platform_driver zynqmp_firmware_driver = {
1266 .driver = {
1267 .name = "zynqmp_firmware",
1268 .of_match_table = zynqmp_firmware_of_match,
1269 .dev_groups = zynqmp_firmware_groups,
1270 },
1271 .probe = zynqmp_firmware_probe,
1272 .remove = zynqmp_firmware_remove,
1273};
1274module_platform_driver(zynqmp_firmware_driver);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Xilinx Zynq MPSoC Firmware layer
4 *
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
7 *
8 * Michal Simek <michal.simek@amd.com>
9 * Davorin Mista <davorin.mista@aggios.com>
10 * Jolly Shah <jollys@xilinx.com>
11 * Rajan Vaja <rajanv@xilinx.com>
12 */
13
14#include <linux/arm-smccc.h>
15#include <linux/compiler.h>
16#include <linux/device.h>
17#include <linux/init.h>
18#include <linux/mfd/core.h>
19#include <linux/module.h>
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
24#include <linux/uaccess.h>
25#include <linux/hashtable.h>
26
27#include <linux/firmware/xlnx-zynqmp.h>
28#include <linux/firmware/xlnx-event-manager.h>
29#include "zynqmp-debug.h"
30
31/* Max HashMap Order for PM API feature check (1<<7 = 128) */
32#define PM_API_FEATURE_CHECK_MAX_ORDER 7
33
34/* CRL registers and bitfields */
35#define CRL_APB_BASE 0xFF5E0000U
36/* BOOT_PIN_CTRL- Used to control the mode pins after boot */
37#define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U))
38/* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
39#define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU
40
41/* IOCTL/QUERY feature payload size */
42#define FEATURE_PAYLOAD_SIZE 2
43
44static bool feature_check_enabled;
45static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
46static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
47static u32 query_features[FEATURE_PAYLOAD_SIZE];
48
49static u32 sip_svc_version;
50static struct platform_device *em_dev;
51
52/**
53 * struct zynqmp_devinfo - Structure for Zynqmp device instance
54 * @dev: Device Pointer
55 * @feature_conf_id: Feature conf id
56 */
57struct zynqmp_devinfo {
58 struct device *dev;
59 u32 feature_conf_id;
60};
61
62/**
63 * struct pm_api_feature_data - PM API Feature data
64 * @pm_api_id: PM API Id, used as key to index into hashmap
65 * @feature_status: status of PM API feature: valid, invalid
66 * @hentry: hlist_node that hooks this entry into hashtable
67 */
68struct pm_api_feature_data {
69 u32 pm_api_id;
70 int feature_status;
71 struct hlist_node hentry;
72};
73
74static const struct mfd_cell firmware_devs[] = {
75 {
76 .name = "zynqmp_power_controller",
77 },
78};
79
80/**
81 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
82 * @ret_status: PMUFW return code
83 *
84 * Return: corresponding Linux error code
85 */
86static int zynqmp_pm_ret_code(u32 ret_status)
87{
88 switch (ret_status) {
89 case XST_PM_SUCCESS:
90 case XST_PM_DOUBLE_REQ:
91 return 0;
92 case XST_PM_NO_FEATURE:
93 return -ENOTSUPP;
94 case XST_PM_INVALID_VERSION:
95 return -EOPNOTSUPP;
96 case XST_PM_NO_ACCESS:
97 return -EACCES;
98 case XST_PM_ABORT_SUSPEND:
99 return -ECANCELED;
100 case XST_PM_MULT_USER:
101 return -EUSERS;
102 case XST_PM_INTERNAL:
103 case XST_PM_CONFLICT:
104 case XST_PM_INVALID_NODE:
105 case XST_PM_INVALID_CRC:
106 default:
107 return -EINVAL;
108 }
109}
110
111static noinline int do_fw_call_fail(u32 *ret_payload, u32 num_args, ...)
112{
113 return -ENODEV;
114}
115
116/*
117 * PM function call wrapper
118 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
119 */
120static int (*do_fw_call)(u32 *ret_payload, u32, ...) = do_fw_call_fail;
121
122/**
123 * do_fw_call_smc() - Call system-level platform management layer (SMC)
124 * @num_args: Number of variable arguments should be <= 8
125 * @ret_payload: Returned value array
126 *
127 * Invoke platform management function via SMC call (no hypervisor present).
128 *
129 * Return: Returns status, either success or error+reason
130 */
131static noinline int do_fw_call_smc(u32 *ret_payload, u32 num_args, ...)
132{
133 struct arm_smccc_res res;
134 u64 args[8] = {0};
135 va_list arg_list;
136 u8 i;
137
138 if (num_args > 8)
139 return -EINVAL;
140
141 va_start(arg_list, num_args);
142
143 for (i = 0; i < num_args; i++)
144 args[i] = va_arg(arg_list, u64);
145
146 va_end(arg_list);
147
148 arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
149
150 if (ret_payload) {
151 ret_payload[0] = lower_32_bits(res.a0);
152 ret_payload[1] = upper_32_bits(res.a0);
153 ret_payload[2] = lower_32_bits(res.a1);
154 ret_payload[3] = upper_32_bits(res.a1);
155 ret_payload[4] = lower_32_bits(res.a2);
156 ret_payload[5] = upper_32_bits(res.a2);
157 ret_payload[6] = lower_32_bits(res.a3);
158 }
159
160 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
161}
162
163/**
164 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
165 * @num_args: Number of variable arguments should be <= 8
166 * @ret_payload: Returned value array
167 *
168 * Invoke platform management function via HVC
169 * HVC-based for communication through hypervisor
170 * (no direct communication with ATF).
171 *
172 * Return: Returns status, either success or error+reason
173 */
174static noinline int do_fw_call_hvc(u32 *ret_payload, u32 num_args, ...)
175{
176 struct arm_smccc_res res;
177 u64 args[8] = {0};
178 va_list arg_list;
179 u8 i;
180
181 if (num_args > 8)
182 return -EINVAL;
183
184 va_start(arg_list, num_args);
185
186 for (i = 0; i < num_args; i++)
187 args[i] = va_arg(arg_list, u64);
188
189 va_end(arg_list);
190
191 arm_smccc_hvc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
192
193 if (ret_payload) {
194 ret_payload[0] = lower_32_bits(res.a0);
195 ret_payload[1] = upper_32_bits(res.a0);
196 ret_payload[2] = lower_32_bits(res.a1);
197 ret_payload[3] = upper_32_bits(res.a1);
198 ret_payload[4] = lower_32_bits(res.a2);
199 ret_payload[5] = upper_32_bits(res.a2);
200 ret_payload[6] = lower_32_bits(res.a3);
201 }
202
203 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
204}
205
206static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
207{
208 int ret;
209 u64 smc_arg[2];
210 u32 module_id;
211 u32 feature_check_api_id;
212
213 module_id = FIELD_GET(MODULE_ID_MASK, api_id);
214
215 /*
216 * Feature check of APIs belonging to PM, XSEM, and TF-A are handled by calling
217 * PM_FEATURE_CHECK API. For other modules, call PM_API_FEATURES API.
218 */
219 if (module_id == PM_MODULE_ID || module_id == XSEM_MODULE_ID || module_id == TF_A_MODULE_ID)
220 feature_check_api_id = PM_FEATURE_CHECK;
221 else
222 feature_check_api_id = PM_API_FEATURES;
223
224 /*
225 * Feature check of TF-A APIs is done in the TF-A layer and it expects for
226 * MODULE_ID_MASK bits of SMC's arg[0] to be the same as PM_MODULE_ID.
227 */
228 if (module_id == TF_A_MODULE_ID) {
229 module_id = PM_MODULE_ID;
230 smc_arg[1] = api_id;
231 } else {
232 smc_arg[1] = (api_id & API_ID_MASK);
233 }
234
235 smc_arg[0] = PM_SIP_SVC | FIELD_PREP(MODULE_ID_MASK, module_id) | feature_check_api_id;
236
237 ret = do_fw_call(ret_payload, 2, smc_arg[0], smc_arg[1]);
238 if (ret)
239 ret = -EOPNOTSUPP;
240 else
241 ret = ret_payload[1];
242
243 return ret;
244}
245
246static int do_feature_check_call(const u32 api_id)
247{
248 int ret;
249 u32 ret_payload[PAYLOAD_ARG_CNT];
250 struct pm_api_feature_data *feature_data;
251
252 /* Check for existing entry in hash table for given api */
253 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
254 api_id) {
255 if (feature_data->pm_api_id == api_id)
256 return feature_data->feature_status;
257 }
258
259 /* Add new entry if not present */
260 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
261 if (!feature_data)
262 return -ENOMEM;
263
264 feature_data->pm_api_id = api_id;
265 ret = __do_feature_check_call(api_id, ret_payload);
266
267 feature_data->feature_status = ret;
268 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
269
270 if (api_id == PM_IOCTL)
271 /* Store supported IOCTL IDs mask */
272 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
273 else if (api_id == PM_QUERY_DATA)
274 /* Store supported QUERY IDs mask */
275 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
276
277 return ret;
278}
279
280/**
281 * zynqmp_pm_feature() - Check whether given feature is supported or not and
282 * store supported IOCTL/QUERY ID mask
283 * @api_id: API ID to check
284 *
285 * Return: Returns status, either success or error+reason
286 */
287int zynqmp_pm_feature(const u32 api_id)
288{
289 int ret;
290
291 if (!feature_check_enabled)
292 return 0;
293
294 ret = do_feature_check_call(api_id);
295
296 return ret;
297}
298EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
299
300/**
301 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
302 * is supported or not
303 * @api_id: PM_IOCTL or PM_QUERY_DATA
304 * @id: IOCTL or QUERY function IDs
305 *
306 * Return: Returns status, either success or error+reason
307 */
308int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
309{
310 int ret;
311 u32 *bit_mask;
312
313 /* Input arguments validation */
314 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
315 return -EINVAL;
316
317 /* Check feature check API version */
318 ret = do_feature_check_call(PM_FEATURE_CHECK);
319 if (ret < 0)
320 return ret;
321
322 /* Check if feature check version 2 is supported or not */
323 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
324 /*
325 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
326 * QUERY ID feature status.
327 */
328 ret = do_feature_check_call(api_id);
329 if (ret < 0)
330 return ret;
331
332 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
333
334 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
335 return -EOPNOTSUPP;
336 } else {
337 return -ENODATA;
338 }
339
340 return 0;
341}
342EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
343
344/**
345 * zynqmp_pm_invoke_fw_fn() - Invoke the system-level platform management layer
346 * caller function depending on the configuration
347 * @pm_api_id: Requested PM-API call
348 * @ret_payload: Returned value array
349 * @num_args: Number of arguments to requested PM-API call
350 *
351 * Invoke platform management function for SMC or HVC call, depending on
352 * configuration.
353 * Following SMC Calling Convention (SMCCC) for SMC64:
354 * Pm Function Identifier,
355 * PM_SIP_SVC + PASS_THROUGH_FW_CMD_ID =
356 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
357 * ((SMC_64) << FUNCID_CC_SHIFT)
358 * ((SIP_START) << FUNCID_OEN_SHIFT)
359 * (PASS_THROUGH_FW_CMD_ID))
360 *
361 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
362 * PASS_THROUGH_FW_CMD_ID - Fixed SiP SVC call ID for FW specific calls.
363 *
364 * Return: Returns status, either success or error+reason
365 */
366int zynqmp_pm_invoke_fw_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...)
367{
368 /*
369 * Added SIP service call Function Identifier
370 * Make sure to stay in x0 register
371 */
372 u64 smc_arg[SMC_ARG_CNT_64];
373 int ret, i;
374 va_list arg_list;
375 u32 args[SMC_ARG_CNT_32] = {0};
376 u32 module_id;
377
378 if (num_args > SMC_ARG_CNT_32)
379 return -EINVAL;
380
381 va_start(arg_list, num_args);
382
383 /* Check if feature is supported or not */
384 ret = zynqmp_pm_feature(pm_api_id);
385 if (ret < 0)
386 return ret;
387
388 for (i = 0; i < num_args; i++)
389 args[i] = va_arg(arg_list, u32);
390
391 va_end(arg_list);
392
393 module_id = FIELD_GET(PLM_MODULE_ID_MASK, pm_api_id);
394
395 if (module_id == 0)
396 module_id = XPM_MODULE_ID;
397
398 smc_arg[0] = PM_SIP_SVC | PASS_THROUGH_FW_CMD_ID;
399 smc_arg[1] = ((u64)args[0] << 32U) | FIELD_PREP(PLM_MODULE_ID_MASK, module_id) |
400 (pm_api_id & API_ID_MASK);
401 for (i = 1; i < (SMC_ARG_CNT_64 - 1); i++)
402 smc_arg[i + 1] = ((u64)args[(i * 2)] << 32U) | args[(i * 2) - 1];
403
404 return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
405 smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]);
406}
407
408/**
409 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
410 * caller function depending on the configuration
411 * @pm_api_id: Requested PM-API call
412 * @ret_payload: Returned value array
413 * @num_args: Number of arguments to requested PM-API call
414 *
415 * Invoke platform management function for SMC or HVC call, depending on
416 * configuration.
417 * Following SMC Calling Convention (SMCCC) for SMC64:
418 * Pm Function Identifier,
419 * PM_SIP_SVC + PM_API_ID =
420 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
421 * ((SMC_64) << FUNCID_CC_SHIFT)
422 * ((SIP_START) << FUNCID_OEN_SHIFT)
423 * ((PM_API_ID) & FUNCID_NUM_MASK))
424 *
425 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
426 * PM_API_ID - Platform Management API ID.
427 *
428 * Return: Returns status, either success or error+reason
429 */
430int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 *ret_payload, u32 num_args, ...)
431{
432 /*
433 * Added SIP service call Function Identifier
434 * Make sure to stay in x0 register
435 */
436 u64 smc_arg[8];
437 int ret, i;
438 va_list arg_list;
439 u32 args[14] = {0};
440
441 if (num_args > 14)
442 return -EINVAL;
443
444 va_start(arg_list, num_args);
445
446 /* Check if feature is supported or not */
447 ret = zynqmp_pm_feature(pm_api_id);
448 if (ret < 0)
449 return ret;
450
451 for (i = 0; i < num_args; i++)
452 args[i] = va_arg(arg_list, u32);
453
454 va_end(arg_list);
455
456 smc_arg[0] = PM_SIP_SVC | pm_api_id;
457 for (i = 0; i < 7; i++)
458 smc_arg[i + 1] = ((u64)args[(i * 2) + 1] << 32) | args[i * 2];
459
460 return do_fw_call(ret_payload, 8, smc_arg[0], smc_arg[1], smc_arg[2], smc_arg[3],
461 smc_arg[4], smc_arg[5], smc_arg[6], smc_arg[7]);
462}
463
464static u32 pm_api_version;
465static u32 pm_tz_version;
466static u32 pm_family_code;
467static u32 pm_sub_family_code;
468
469int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
470{
471 int ret;
472
473 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, NULL, 2, sgi_num, reset);
474 if (ret != -EOPNOTSUPP && !ret)
475 return ret;
476
477 /* try old implementation as fallback strategy if above fails */
478 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, IOCTL_REGISTER_SGI, sgi_num, reset);
479}
480
481/**
482 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
483 * @version: Returned version value
484 *
485 * Return: Returns status, either success or error+reason
486 */
487int zynqmp_pm_get_api_version(u32 *version)
488{
489 u32 ret_payload[PAYLOAD_ARG_CNT];
490 int ret;
491
492 if (!version)
493 return -EINVAL;
494
495 /* Check is PM API version already verified */
496 if (pm_api_version > 0) {
497 *version = pm_api_version;
498 return 0;
499 }
500 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, ret_payload, 0);
501 *version = ret_payload[1];
502
503 return ret;
504}
505EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
506
507/**
508 * zynqmp_pm_get_chipid - Get silicon ID registers
509 * @idcode: IDCODE register
510 * @version: version register
511 *
512 * Return: Returns the status of the operation and the idcode and version
513 * registers in @idcode and @version.
514 */
515int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
516{
517 u32 ret_payload[PAYLOAD_ARG_CNT];
518 int ret;
519
520 if (!idcode || !version)
521 return -EINVAL;
522
523 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
524 *idcode = ret_payload[1];
525 *version = ret_payload[2];
526
527 return ret;
528}
529EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
530
531/**
532 * zynqmp_pm_get_family_info() - Get family info of platform
533 * @family: Returned family code value
534 * @subfamily: Returned sub-family code value
535 *
536 * Return: Returns status, either success or error+reason
537 */
538int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily)
539{
540 u32 ret_payload[PAYLOAD_ARG_CNT];
541 u32 idcode;
542 int ret;
543
544 /* Check is family or sub-family code already received */
545 if (pm_family_code && pm_sub_family_code) {
546 *family = pm_family_code;
547 *subfamily = pm_sub_family_code;
548 return 0;
549 }
550
551 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, ret_payload, 0);
552 if (ret < 0)
553 return ret;
554
555 idcode = ret_payload[1];
556 pm_family_code = FIELD_GET(FAMILY_CODE_MASK, idcode);
557 pm_sub_family_code = FIELD_GET(SUB_FAMILY_CODE_MASK, idcode);
558 *family = pm_family_code;
559 *subfamily = pm_sub_family_code;
560
561 return 0;
562}
563EXPORT_SYMBOL_GPL(zynqmp_pm_get_family_info);
564
565/**
566 * zynqmp_pm_get_sip_svc_version() - Get SiP service call version
567 * @version: Returned version value
568 *
569 * Return: Returns status, either success or error+reason
570 */
571static int zynqmp_pm_get_sip_svc_version(u32 *version)
572{
573 struct arm_smccc_res res;
574 u64 args[SMC_ARG_CNT_64] = {0};
575
576 if (!version)
577 return -EINVAL;
578
579 /* Check if SiP SVC version already verified */
580 if (sip_svc_version > 0) {
581 *version = sip_svc_version;
582 return 0;
583 }
584
585 args[0] = GET_SIP_SVC_VERSION;
586
587 arm_smccc_smc(args[0], args[1], args[2], args[3], args[4], args[5], args[6], args[7], &res);
588
589 *version = ((lower_32_bits(res.a0) << 16U) | lower_32_bits(res.a1));
590
591 return zynqmp_pm_ret_code(XST_PM_SUCCESS);
592}
593
594/**
595 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
596 * @version: Returned version value
597 *
598 * Return: Returns status, either success or error+reason
599 */
600static int zynqmp_pm_get_trustzone_version(u32 *version)
601{
602 u32 ret_payload[PAYLOAD_ARG_CNT];
603 int ret;
604
605 if (!version)
606 return -EINVAL;
607
608 /* Check is PM trustzone version already verified */
609 if (pm_tz_version > 0) {
610 *version = pm_tz_version;
611 return 0;
612 }
613 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, ret_payload, 0);
614 *version = ret_payload[1];
615
616 return ret;
617}
618
619/**
620 * get_set_conduit_method() - Choose SMC or HVC based communication
621 * @np: Pointer to the device_node structure
622 *
623 * Use SMC or HVC-based functions to communicate with EL2/EL3.
624 *
625 * Return: Returns 0 on success or error code
626 */
627static int get_set_conduit_method(struct device_node *np)
628{
629 const char *method;
630
631 if (of_property_read_string(np, "method", &method)) {
632 pr_warn("%s missing \"method\" property\n", __func__);
633 return -ENXIO;
634 }
635
636 if (!strcmp("hvc", method)) {
637 do_fw_call = do_fw_call_hvc;
638 } else if (!strcmp("smc", method)) {
639 do_fw_call = do_fw_call_smc;
640 } else {
641 pr_warn("%s Invalid \"method\" property: %s\n",
642 __func__, method);
643 return -EINVAL;
644 }
645
646 return 0;
647}
648
649/**
650 * zynqmp_pm_query_data() - Get query data from firmware
651 * @qdata: Variable to the zynqmp_pm_query_data structure
652 * @out: Returned output value
653 *
654 * Return: Returns status, either success or error+reason
655 */
656int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
657{
658 int ret, i = 0;
659 u32 ret_payload[PAYLOAD_ARG_CNT] = {0};
660
661 if (sip_svc_version >= SIP_SVC_PASSTHROUGH_VERSION) {
662 ret = zynqmp_pm_invoke_fw_fn(PM_QUERY_DATA, ret_payload, 4,
663 qdata.qid, qdata.arg1,
664 qdata.arg2, qdata.arg3);
665 /* To support backward compatibility */
666 if (!ret && !ret_payload[0]) {
667 /*
668 * TF-A passes return status on 0th index but
669 * api to get clock name reads data from 0th
670 * index so pass data at 0th index instead of
671 * return status
672 */
673 if (qdata.qid == PM_QID_CLOCK_GET_NAME ||
674 qdata.qid == PM_QID_PINCTRL_GET_FUNCTION_NAME)
675 i = 1;
676
677 for (; i < PAYLOAD_ARG_CNT; i++, out++)
678 *out = ret_payload[i];
679
680 return ret;
681 }
682 }
683
684 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, out, 4, qdata.qid,
685 qdata.arg1, qdata.arg2, qdata.arg3);
686
687 /*
688 * For clock name query, all bytes in SMC response are clock name
689 * characters and return code is always success. For invalid clocks,
690 * clock name bytes would be zeros.
691 */
692 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
693}
694EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
695
696/**
697 * zynqmp_pm_clock_enable() - Enable the clock for given id
698 * @clock_id: ID of the clock to be enabled
699 *
700 * This function is used by master to enable the clock
701 * including peripherals and PLL clocks.
702 *
703 * Return: Returns status, either success or error+reason
704 */
705int zynqmp_pm_clock_enable(u32 clock_id)
706{
707 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, NULL, 1, clock_id);
708}
709EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
710
711/**
712 * zynqmp_pm_clock_disable() - Disable the clock for given id
713 * @clock_id: ID of the clock to be disable
714 *
715 * This function is used by master to disable the clock
716 * including peripherals and PLL clocks.
717 *
718 * Return: Returns status, either success or error+reason
719 */
720int zynqmp_pm_clock_disable(u32 clock_id)
721{
722 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, NULL, 1, clock_id);
723}
724EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
725
726/**
727 * zynqmp_pm_clock_getstate() - Get the clock state for given id
728 * @clock_id: ID of the clock to be queried
729 * @state: 1/0 (Enabled/Disabled)
730 *
731 * This function is used by master to get the state of clock
732 * including peripherals and PLL clocks.
733 *
734 * Return: Returns status, either success or error+reason
735 */
736int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
737{
738 u32 ret_payload[PAYLOAD_ARG_CNT];
739 int ret;
740
741 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, ret_payload, 1, clock_id);
742 *state = ret_payload[1];
743
744 return ret;
745}
746EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
747
748/**
749 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
750 * @clock_id: ID of the clock
751 * @divider: divider value
752 *
753 * This function is used by master to set divider for any clock
754 * to achieve desired rate.
755 *
756 * Return: Returns status, either success or error+reason
757 */
758int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
759{
760 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, NULL, 2, clock_id, divider);
761}
762EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
763
764/**
765 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
766 * @clock_id: ID of the clock
767 * @divider: divider value
768 *
769 * This function is used by master to get divider values
770 * for any clock.
771 *
772 * Return: Returns status, either success or error+reason
773 */
774int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
775{
776 u32 ret_payload[PAYLOAD_ARG_CNT];
777 int ret;
778
779 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, ret_payload, 1, clock_id);
780 *divider = ret_payload[1];
781
782 return ret;
783}
784EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
785
786/**
787 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
788 * @clock_id: ID of the clock
789 * @parent_id: parent id
790 *
791 * This function is used by master to set parent for any clock.
792 *
793 * Return: Returns status, either success or error+reason
794 */
795int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
796{
797 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, NULL, 2, clock_id, parent_id);
798}
799EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
800
801/**
802 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
803 * @clock_id: ID of the clock
804 * @parent_id: parent id
805 *
806 * This function is used by master to get parent index
807 * for any clock.
808 *
809 * Return: Returns status, either success or error+reason
810 */
811int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
812{
813 u32 ret_payload[PAYLOAD_ARG_CNT];
814 int ret;
815
816 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, ret_payload, 1, clock_id);
817 *parent_id = ret_payload[1];
818
819 return ret;
820}
821EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
822
823/**
824 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
825 *
826 * @clk_id: PLL clock ID
827 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
828 *
829 * This function sets PLL mode
830 *
831 * Return: Returns status, either success or error+reason
832 */
833int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
834{
835 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode);
836}
837EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
838
839/**
840 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
841 *
842 * @clk_id: PLL clock ID
843 * @mode: PLL mode
844 *
845 * This function return current PLL mode
846 *
847 * Return: Returns status, either success or error+reason
848 */
849int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
850{
851 return zynqmp_pm_invoke_fn(PM_IOCTL, mode, 3, 0, IOCTL_GET_PLL_FRAC_MODE, clk_id);
852}
853EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
854
855/**
856 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
857 *
858 * @clk_id: PLL clock ID
859 * @data: fraction data
860 *
861 * This function sets fraction data.
862 * It is valid for fraction mode only.
863 *
864 * Return: Returns status, either success or error+reason
865 */
866int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
867{
868 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data);
869}
870EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
871
872/**
873 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
874 *
875 * @clk_id: PLL clock ID
876 * @data: fraction data
877 *
878 * This function returns fraction data value.
879 *
880 * Return: Returns status, either success or error+reason
881 */
882int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
883{
884 return zynqmp_pm_invoke_fn(PM_IOCTL, data, 3, 0, IOCTL_GET_PLL_FRAC_DATA, clk_id);
885}
886EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
887
888/**
889 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
890 *
891 * @node_id: Node ID of the device
892 * @type: Type of tap delay to set (input/output)
893 * @value: Value to set fot the tap delay
894 *
895 * This function sets input/output tap delay for the SD device.
896 *
897 * Return: Returns status, either success or error+reason
898 */
899int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
900{
901 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL;
902 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);
903
904 if (value) {
905 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type,
906 value);
907 }
908
909 /*
910 * Work around completely misdesigned firmware API on Xilinx ZynqMP.
911 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only
912 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA
913 * bits, but there is no matching call to clear those bits. If those
914 * bits are not cleared, SDMMC tuning may fail.
915 *
916 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to
917 * allow complete unrestricted access to all address space, including
918 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access
919 * to which was supposed to be protected by the current firmware API.
920 *
921 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
922 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
923 */
924 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 2, reg, mask);
925}
926EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
927
928/**
929 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
930 *
931 * @node_id: Node ID of the device
932 * @type: Reset type
933 *
934 * This function resets DLL logic for the SD device.
935 *
936 * Return: Returns status, either success or error+reason
937 */
938int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
939{
940 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type);
941}
942EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
943
944/**
945 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
946 *
947 * @dev_id: Device Id of the OSPI device.
948 * @select: OSPI Mux select value.
949 *
950 * This function select the OSPI Mux.
951 *
952 * Return: Returns status, either success or error+reason
953 */
954int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
955{
956 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, dev_id, IOCTL_OSPI_MUX_SELECT, select);
957}
958EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
959
960/**
961 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
962 * @index: GGS register index
963 * @value: Register value to be written
964 *
965 * This function writes value to GGS register.
966 *
967 * Return: Returns status, either success or error+reason
968 */
969int zynqmp_pm_write_ggs(u32 index, u32 value)
970{
971 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_GGS, index, value);
972}
973EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
974
975/**
976 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
977 * @index: GGS register index
978 * @value: Register value to be written
979 *
980 * This function returns GGS register value.
981 *
982 * Return: Returns status, either success or error+reason
983 */
984int zynqmp_pm_read_ggs(u32 index, u32 *value)
985{
986 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_GGS, index);
987}
988EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
989
990/**
991 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
992 * storage (pggs)
993 * @index: PGGS register index
994 * @value: Register value to be written
995 *
996 * This function writes value to PGGS register.
997 *
998 * Return: Returns status, either success or error+reason
999 */
1000int zynqmp_pm_write_pggs(u32 index, u32 value)
1001{
1002 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_WRITE_PGGS, index, value);
1003}
1004EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
1005
1006/**
1007 * zynqmp_pm_read_pggs() - PM API for reading persistent global general
1008 * storage (pggs)
1009 * @index: PGGS register index
1010 * @value: Register value to be written
1011 *
1012 * This function returns PGGS register value.
1013 *
1014 * Return: Returns status, either success or error+reason
1015 */
1016int zynqmp_pm_read_pggs(u32 index, u32 *value)
1017{
1018 return zynqmp_pm_invoke_fn(PM_IOCTL, value, 3, 0, IOCTL_READ_PGGS, index);
1019}
1020EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
1021
1022int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
1023{
1024 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_TAPDELAY_BYPASS, index, value);
1025}
1026EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
1027
1028/**
1029 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
1030 * @value: Status value to be written
1031 *
1032 * This function sets healthy bit value to indicate boot health status
1033 * to firmware.
1034 *
1035 * Return: Returns status, either success or error+reason
1036 */
1037int zynqmp_pm_set_boot_health_status(u32 value)
1038{
1039 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, 0, IOCTL_SET_BOOT_HEALTH_STATUS, value);
1040}
1041
1042/**
1043 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
1044 * @reset: Reset to be configured
1045 * @assert_flag: Flag stating should reset be asserted (1) or
1046 * released (0)
1047 *
1048 * Return: Returns status, either success or error+reason
1049 */
1050int zynqmp_pm_reset_assert(const u32 reset,
1051 const enum zynqmp_pm_reset_action assert_flag)
1052{
1053 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, NULL, 2, reset, assert_flag);
1054}
1055EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
1056
1057/**
1058 * zynqmp_pm_reset_get_status - Get status of the reset
1059 * @reset: Reset whose status should be returned
1060 * @status: Returned status
1061 *
1062 * Return: Returns status, either success or error+reason
1063 */
1064int zynqmp_pm_reset_get_status(const u32 reset, u32 *status)
1065{
1066 u32 ret_payload[PAYLOAD_ARG_CNT];
1067 int ret;
1068
1069 if (!status)
1070 return -EINVAL;
1071
1072 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, ret_payload, 1, reset);
1073 *status = ret_payload[1];
1074
1075 return ret;
1076}
1077EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
1078
1079/**
1080 * zynqmp_pm_fpga_load - Perform the fpga load
1081 * @address: Address to write to
1082 * @size: pl bitstream size
1083 * @flags: Bitstream type
1084 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
1085 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
1086 *
1087 * This function provides access to pmufw. To transfer
1088 * the required bitstream into PL.
1089 *
1090 * Return: Returns status, either success or error+reason
1091 */
1092int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
1093{
1094 u32 ret_payload[PAYLOAD_ARG_CNT];
1095 int ret;
1096
1097 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, ret_payload, 4, lower_32_bits(address),
1098 upper_32_bits(address), size, flags);
1099 if (ret_payload[0])
1100 return -ret_payload[0];
1101
1102 return ret;
1103}
1104EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
1105
1106/**
1107 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
1108 * @value: Value to read
1109 *
1110 * This function provides access to the pmufw to get the PCAP
1111 * status
1112 *
1113 * Return: Returns status, either success or error+reason
1114 */
1115int zynqmp_pm_fpga_get_status(u32 *value)
1116{
1117 u32 ret_payload[PAYLOAD_ARG_CNT];
1118 int ret;
1119
1120 if (!value)
1121 return -EINVAL;
1122
1123 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, ret_payload, 0);
1124 *value = ret_payload[1];
1125
1126 return ret;
1127}
1128EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
1129
1130/**
1131 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
1132 * @value: Buffer to store FPGA configuration status.
1133 *
1134 * This function provides access to the pmufw to get the FPGA configuration
1135 * status
1136 *
1137 * Return: 0 on success, a negative value on error
1138 */
1139int zynqmp_pm_fpga_get_config_status(u32 *value)
1140{
1141 u32 ret_payload[PAYLOAD_ARG_CNT];
1142 u32 buf, lower_addr, upper_addr;
1143 int ret;
1144
1145 if (!value)
1146 return -EINVAL;
1147
1148 lower_addr = lower_32_bits((u64)&buf);
1149 upper_addr = upper_32_bits((u64)&buf);
1150
1151 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ, ret_payload, 4,
1152 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET, lower_addr, upper_addr,
1153 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG);
1154
1155 *value = ret_payload[1];
1156
1157 return ret;
1158}
1159EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
1160
1161/**
1162 * zynqmp_pm_pinctrl_request - Request Pin from firmware
1163 * @pin: Pin number to request
1164 *
1165 * This function requests pin from firmware.
1166 *
1167 * Return: Returns status, either success or error+reason.
1168 */
1169int zynqmp_pm_pinctrl_request(const u32 pin)
1170{
1171 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, NULL, 1, pin);
1172}
1173EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
1174
1175/**
1176 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
1177 * @pin: Pin number to release
1178 *
1179 * This function release pin from firmware.
1180 *
1181 * Return: Returns status, either success or error+reason.
1182 */
1183int zynqmp_pm_pinctrl_release(const u32 pin)
1184{
1185 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, NULL, 1, pin);
1186}
1187EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
1188
1189/**
1190 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1191 * @pin: Pin number
1192 * @id: Function ID to set
1193 *
1194 * This function sets requested function for the given pin.
1195 *
1196 * Return: Returns status, either success or error+reason.
1197 */
1198int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1199{
1200 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, NULL, 2, pin, id);
1201}
1202EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1203
1204/**
1205 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1206 * @pin: Pin number
1207 * @param: Parameter to get
1208 * @value: Buffer to store parameter value
1209 *
1210 * This function gets requested configuration parameter for the given pin.
1211 *
1212 * Return: Returns status, either success or error+reason.
1213 */
1214int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1215 u32 *value)
1216{
1217 u32 ret_payload[PAYLOAD_ARG_CNT];
1218 int ret;
1219
1220 if (!value)
1221 return -EINVAL;
1222
1223 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, ret_payload, 2, pin, param);
1224 *value = ret_payload[1];
1225
1226 return ret;
1227}
1228EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1229
1230/**
1231 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1232 * @pin: Pin number
1233 * @param: Parameter to set
1234 * @value: Parameter value to set
1235 *
1236 * This function sets requested configuration parameter for the given pin.
1237 *
1238 * Return: Returns status, either success or error+reason.
1239 */
1240int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1241 u32 value)
1242{
1243 int ret;
1244
1245 if (pm_family_code == ZYNQMP_FAMILY_CODE &&
1246 param == PM_PINCTRL_CONFIG_TRI_STATE) {
1247 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET);
1248 if (ret < PM_PINCTRL_PARAM_SET_VERSION) {
1249 pr_warn("The requested pinctrl feature is not supported in the current firmware.\n"
1250 "Expected firmware version is 2023.1 and above for this feature to work.\r\n");
1251 return -EOPNOTSUPP;
1252 }
1253 }
1254
1255 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, NULL, 3, pin, param, value);
1256}
1257EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1258
1259/**
1260 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1261 * @ps_mode: Returned output value of ps_mode
1262 *
1263 * This API function is to be used for notify the power management controller
1264 * to read bootpin status.
1265 *
1266 * Return: status, either success or error+reason
1267 */
1268unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1269{
1270 unsigned int ret;
1271 u32 ret_payload[PAYLOAD_ARG_CNT];
1272
1273 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, ret_payload, 1, CRL_APB_BOOT_PIN_CTRL);
1274
1275 *ps_mode = ret_payload[1];
1276
1277 return ret;
1278}
1279EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1280
1281/**
1282 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1283 * @ps_mode: Value to be written to the bootpin ctrl register
1284 *
1285 * This API function is to be used for notify the power management controller
1286 * to configure bootpin.
1287 *
1288 * Return: Returns status, either success or error+reason
1289 */
1290int zynqmp_pm_bootmode_write(u32 ps_mode)
1291{
1292 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, NULL, 3, CRL_APB_BOOT_PIN_CTRL,
1293 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode);
1294}
1295EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1296
1297/**
1298 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1299 * master has initialized its own power management
1300 *
1301 * Return: Returns status, either success or error+reason
1302 *
1303 * This API function is to be used for notify the power management controller
1304 * about the completed power management initialization.
1305 */
1306int zynqmp_pm_init_finalize(void)
1307{
1308 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, NULL, 0);
1309}
1310EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1311
1312/**
1313 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
1314 * @mode: Mode to set for system suspend
1315 *
1316 * This API function is used to set mode of system suspend.
1317 *
1318 * Return: Returns status, either success or error+reason
1319 */
1320int zynqmp_pm_set_suspend_mode(u32 mode)
1321{
1322 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, NULL, 1, mode);
1323}
1324EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1325
1326/**
1327 * zynqmp_pm_request_node() - Request a node with specific capabilities
1328 * @node: Node ID of the slave
1329 * @capabilities: Requested capabilities of the slave
1330 * @qos: Quality of service (not supported)
1331 * @ack: Flag to specify whether acknowledge is requested
1332 *
1333 * This function is used by master to request particular node from firmware.
1334 * Every master must request node before using it.
1335 *
1336 * Return: Returns status, either success or error+reason
1337 */
1338int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1339 const u32 qos, const enum zynqmp_pm_request_ack ack)
1340{
1341 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, NULL, 4, node, capabilities, qos, ack);
1342}
1343EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1344
1345/**
1346 * zynqmp_pm_release_node() - Release a node
1347 * @node: Node ID of the slave
1348 *
1349 * This function is used by master to inform firmware that master
1350 * has released node. Once released, master must not use that node
1351 * without re-request.
1352 *
1353 * Return: Returns status, either success or error+reason
1354 */
1355int zynqmp_pm_release_node(const u32 node)
1356{
1357 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, NULL, 1, node);
1358}
1359EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1360
1361/**
1362 * zynqmp_pm_get_rpu_mode() - Get RPU mode
1363 * @node_id: Node ID of the device
1364 * @rpu_mode: return by reference value
1365 * either split or lockstep
1366 *
1367 * Return: return 0 on success or error+reason.
1368 * if success, then rpu_mode will be set
1369 * to current rpu mode.
1370 */
1371int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1372{
1373 u32 ret_payload[PAYLOAD_ARG_CNT];
1374 int ret;
1375
1376 ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE);
1377
1378 /* only set rpu_mode if no error */
1379 if (ret == XST_PM_SUCCESS)
1380 *rpu_mode = ret_payload[0];
1381
1382 return ret;
1383}
1384EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1385
1386/**
1387 * zynqmp_pm_set_rpu_mode() - Set RPU mode
1388 * @node_id: Node ID of the device
1389 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep
1390 *
1391 * This function is used to set RPU mode to split or
1392 * lockstep
1393 *
1394 * Return: Returns status, either success or error+reason
1395 */
1396int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1397{
1398 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE,
1399 (u32)rpu_mode);
1400}
1401EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1402
1403/**
1404 * zynqmp_pm_set_tcm_config - configure TCM
1405 * @node_id: Firmware specific TCM subsystem ID
1406 * @tcm_mode: Argument 1 to requested IOCTL call
1407 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1408 *
1409 * This function is used to set RPU mode to split or combined
1410 *
1411 * Return: status: 0 for success, else failure
1412 */
1413int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1414{
1415 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG,
1416 (u32)tcm_mode);
1417}
1418EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1419
1420/**
1421 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1422 * be powered down forcefully
1423 * @node: Node ID of the targeted PU or subsystem
1424 * @ack: Flag to specify whether acknowledge is requested
1425 *
1426 * Return: status, either success or error+reason
1427 */
1428int zynqmp_pm_force_pwrdwn(const u32 node,
1429 const enum zynqmp_pm_request_ack ack)
1430{
1431 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, NULL, 2, node, ack);
1432}
1433EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1434
1435/**
1436 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1437 * @node: Node ID of the master or subsystem
1438 * @set_addr: Specifies whether the address argument is relevant
1439 * @address: Address from which to resume when woken up
1440 * @ack: Flag to specify whether acknowledge requested
1441 *
1442 * Return: status, either success or error+reason
1443 */
1444int zynqmp_pm_request_wake(const u32 node,
1445 const bool set_addr,
1446 const u64 address,
1447 const enum zynqmp_pm_request_ack ack)
1448{
1449 /* set_addr flag is encoded into 1st bit of address */
1450 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, NULL, 4, node, address | set_addr,
1451 address >> 32, ack);
1452}
1453EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1454
1455/**
1456 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1457 * @node: Node ID of the slave
1458 * @capabilities: Requested capabilities of the slave
1459 * @qos: Quality of service (not supported)
1460 * @ack: Flag to specify whether acknowledge is requested
1461 *
1462 * This API function is to be used for slaves a PU already has requested
1463 * to change its capabilities.
1464 *
1465 * Return: Returns status, either success or error+reason
1466 */
1467int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1468 const u32 qos,
1469 const enum zynqmp_pm_request_ack ack)
1470{
1471 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, NULL, 4, node, capabilities, qos, ack);
1472}
1473EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1474
1475/**
1476 * zynqmp_pm_load_pdi - Load and process PDI
1477 * @src: Source device where PDI is located
1478 * @address: PDI src address
1479 *
1480 * This function provides support to load PDI from linux
1481 *
1482 * Return: Returns status, either success or error+reason
1483 */
1484int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1485{
1486 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, NULL, 3, src, lower_32_bits(address),
1487 upper_32_bits(address));
1488}
1489EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1490
1491/**
1492 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1493 * AES-GCM core.
1494 * @address: Address of the AesParams structure.
1495 * @out: Returned output value
1496 *
1497 * Return: Returns status, either success or error code.
1498 */
1499int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1500{
1501 u32 ret_payload[PAYLOAD_ARG_CNT];
1502 int ret;
1503
1504 if (!out)
1505 return -EINVAL;
1506
1507 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, ret_payload, 2, upper_32_bits(address),
1508 lower_32_bits(address));
1509 *out = ret_payload[1];
1510
1511 return ret;
1512}
1513EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1514
1515/**
1516 * zynqmp_pm_efuse_access - Provides access to efuse memory.
1517 * @address: Address of the efuse params structure
1518 * @out: Returned output value
1519 *
1520 * Return: Returns status, either success or error code.
1521 */
1522int zynqmp_pm_efuse_access(const u64 address, u32 *out)
1523{
1524 u32 ret_payload[PAYLOAD_ARG_CNT];
1525 int ret;
1526
1527 if (!out)
1528 return -EINVAL;
1529
1530 ret = zynqmp_pm_invoke_fn(PM_EFUSE_ACCESS, ret_payload, 2,
1531 upper_32_bits(address),
1532 lower_32_bits(address));
1533 *out = ret_payload[1];
1534
1535 return ret;
1536}
1537EXPORT_SYMBOL_GPL(zynqmp_pm_efuse_access);
1538
1539/**
1540 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1541 * @address: Address of the data/ Address of output buffer where
1542 * hash should be stored.
1543 * @size: Size of the data.
1544 * @flags:
1545 * BIT(0) - for initializing csudma driver and SHA3(Here address
1546 * and size inputs can be NULL).
1547 * BIT(1) - to call Sha3_Update API which can be called multiple
1548 * times when data is not contiguous.
1549 * BIT(2) - to get final hash of the whole updated data.
1550 * Hash will be overwritten at provided address with
1551 * 48 bytes.
1552 *
1553 * Return: Returns status, either success or error code.
1554 */
1555int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1556{
1557 u32 lower_addr = lower_32_bits(address);
1558 u32 upper_addr = upper_32_bits(address);
1559
1560 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, NULL, 4, upper_addr, lower_addr, size, flags);
1561}
1562EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1563
1564/**
1565 * zynqmp_pm_register_notifier() - PM API for register a subsystem
1566 * to be notified about specific
1567 * event/error.
1568 * @node: Node ID to which the event is related.
1569 * @event: Event Mask of Error events for which wants to get notified.
1570 * @wake: Wake subsystem upon capturing the event if value 1
1571 * @enable: Enable the registration for value 1, disable for value 0
1572 *
1573 * This function is used to register/un-register for particular node-event
1574 * combination in firmware.
1575 *
1576 * Return: Returns status, either success or error+reason
1577 */
1578
1579int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1580 const u32 wake, const u32 enable)
1581{
1582 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, NULL, 4, node, event, wake, enable);
1583}
1584EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1585
1586/**
1587 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1588 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
1589 * @subtype: Specifies which system should be restarted or shut down
1590 *
1591 * Return: Returns status, either success or error+reason
1592 */
1593int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1594{
1595 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, NULL, 2, type, subtype);
1596}
1597
1598/**
1599 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1600 * @id: The config ID of the feature to be configured
1601 * @value: The config value of the feature to be configured
1602 *
1603 * Return: Returns 0 on success or error value on failure.
1604 */
1605int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1606{
1607 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, 0, IOCTL_SET_FEATURE_CONFIG, id, value);
1608}
1609
1610/**
1611 * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1612 * @id: The config id of the feature to be queried
1613 * @payload: Returned value array
1614 *
1615 * Return: Returns 0 on success or error value on failure.
1616 */
1617int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1618 u32 *payload)
1619{
1620 return zynqmp_pm_invoke_fn(PM_IOCTL, payload, 3, 0, IOCTL_GET_FEATURE_CONFIG, id);
1621}
1622
1623/**
1624 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1625 * @node: SD node ID
1626 * @config: The config type of SD registers
1627 * @value: Value to be set
1628 *
1629 * Return: Returns 0 on success or error value on failure.
1630 */
1631int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1632{
1633 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_SD_CONFIG, config, value);
1634}
1635EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1636
1637/**
1638 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1639 * @node: GEM node ID
1640 * @config: The config type of GEM registers
1641 * @value: Value to be set
1642 *
1643 * Return: Returns 0 on success or error value on failure.
1644 */
1645int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1646 u32 value)
1647{
1648 return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node, IOCTL_SET_GEM_CONFIG, config, value);
1649}
1650EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1651
1652/**
1653 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1654 * @subtype: Shutdown subtype
1655 * @name: Matching string for scope argument
1656 *
1657 * This struct encapsulates mapping between shutdown scope ID and string.
1658 */
1659struct zynqmp_pm_shutdown_scope {
1660 const enum zynqmp_pm_shutdown_subtype subtype;
1661 const char *name;
1662};
1663
1664static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1665 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1666 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1667 .name = "subsystem",
1668 },
1669 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1670 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1671 .name = "ps_only",
1672 },
1673 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1674 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1675 .name = "system",
1676 },
1677};
1678
1679static struct zynqmp_pm_shutdown_scope *selected_scope =
1680 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1681
1682/**
1683 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1684 * @scope_string: Shutdown scope string
1685 *
1686 * Return: Return pointer to matching shutdown scope struct from
1687 * array of available options in system if string is valid,
1688 * otherwise returns NULL.
1689 */
1690static struct zynqmp_pm_shutdown_scope*
1691 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1692{
1693 int count;
1694
1695 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1696 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1697 return &shutdown_scopes[count];
1698
1699 return NULL;
1700}
1701
1702static ssize_t shutdown_scope_show(struct device *device,
1703 struct device_attribute *attr,
1704 char *buf)
1705{
1706 int i;
1707
1708 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1709 if (&shutdown_scopes[i] == selected_scope) {
1710 strcat(buf, "[");
1711 strcat(buf, shutdown_scopes[i].name);
1712 strcat(buf, "]");
1713 } else {
1714 strcat(buf, shutdown_scopes[i].name);
1715 }
1716 strcat(buf, " ");
1717 }
1718 strcat(buf, "\n");
1719
1720 return strlen(buf);
1721}
1722
1723static ssize_t shutdown_scope_store(struct device *device,
1724 struct device_attribute *attr,
1725 const char *buf, size_t count)
1726{
1727 int ret;
1728 struct zynqmp_pm_shutdown_scope *scope;
1729
1730 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1731 if (!scope)
1732 return -EINVAL;
1733
1734 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1735 scope->subtype);
1736 if (ret) {
1737 pr_err("unable to set shutdown scope %s\n", buf);
1738 return ret;
1739 }
1740
1741 selected_scope = scope;
1742
1743 return count;
1744}
1745
1746static DEVICE_ATTR_RW(shutdown_scope);
1747
1748static ssize_t health_status_store(struct device *device,
1749 struct device_attribute *attr,
1750 const char *buf, size_t count)
1751{
1752 int ret;
1753 unsigned int value;
1754
1755 ret = kstrtouint(buf, 10, &value);
1756 if (ret)
1757 return ret;
1758
1759 ret = zynqmp_pm_set_boot_health_status(value);
1760 if (ret) {
1761 dev_err(device, "unable to set healthy bit value to %u\n",
1762 value);
1763 return ret;
1764 }
1765
1766 return count;
1767}
1768
1769static DEVICE_ATTR_WO(health_status);
1770
1771static ssize_t ggs_show(struct device *device,
1772 struct device_attribute *attr,
1773 char *buf,
1774 u32 reg)
1775{
1776 int ret;
1777 u32 ret_payload[PAYLOAD_ARG_CNT];
1778
1779 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1780 if (ret)
1781 return ret;
1782
1783 return sprintf(buf, "0x%x\n", ret_payload[1]);
1784}
1785
1786static ssize_t ggs_store(struct device *device,
1787 struct device_attribute *attr,
1788 const char *buf, size_t count,
1789 u32 reg)
1790{
1791 long value;
1792 int ret;
1793
1794 if (reg >= GSS_NUM_REGS)
1795 return -EINVAL;
1796
1797 ret = kstrtol(buf, 16, &value);
1798 if (ret) {
1799 count = -EFAULT;
1800 goto err;
1801 }
1802
1803 ret = zynqmp_pm_write_ggs(reg, value);
1804 if (ret)
1805 count = -EFAULT;
1806err:
1807 return count;
1808}
1809
1810/* GGS register show functions */
1811#define GGS0_SHOW(N) \
1812 ssize_t ggs##N##_show(struct device *device, \
1813 struct device_attribute *attr, \
1814 char *buf) \
1815 { \
1816 return ggs_show(device, attr, buf, N); \
1817 }
1818
1819static GGS0_SHOW(0);
1820static GGS0_SHOW(1);
1821static GGS0_SHOW(2);
1822static GGS0_SHOW(3);
1823
1824/* GGS register store function */
1825#define GGS0_STORE(N) \
1826 ssize_t ggs##N##_store(struct device *device, \
1827 struct device_attribute *attr, \
1828 const char *buf, \
1829 size_t count) \
1830 { \
1831 return ggs_store(device, attr, buf, count, N); \
1832 }
1833
1834static GGS0_STORE(0);
1835static GGS0_STORE(1);
1836static GGS0_STORE(2);
1837static GGS0_STORE(3);
1838
1839static ssize_t pggs_show(struct device *device,
1840 struct device_attribute *attr,
1841 char *buf,
1842 u32 reg)
1843{
1844 int ret;
1845 u32 ret_payload[PAYLOAD_ARG_CNT];
1846
1847 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1848 if (ret)
1849 return ret;
1850
1851 return sprintf(buf, "0x%x\n", ret_payload[1]);
1852}
1853
1854static ssize_t pggs_store(struct device *device,
1855 struct device_attribute *attr,
1856 const char *buf, size_t count,
1857 u32 reg)
1858{
1859 long value;
1860 int ret;
1861
1862 if (reg >= GSS_NUM_REGS)
1863 return -EINVAL;
1864
1865 ret = kstrtol(buf, 16, &value);
1866 if (ret) {
1867 count = -EFAULT;
1868 goto err;
1869 }
1870
1871 ret = zynqmp_pm_write_pggs(reg, value);
1872 if (ret)
1873 count = -EFAULT;
1874
1875err:
1876 return count;
1877}
1878
1879#define PGGS0_SHOW(N) \
1880 ssize_t pggs##N##_show(struct device *device, \
1881 struct device_attribute *attr, \
1882 char *buf) \
1883 { \
1884 return pggs_show(device, attr, buf, N); \
1885 }
1886
1887#define PGGS0_STORE(N) \
1888 ssize_t pggs##N##_store(struct device *device, \
1889 struct device_attribute *attr, \
1890 const char *buf, \
1891 size_t count) \
1892 { \
1893 return pggs_store(device, attr, buf, count, N); \
1894 }
1895
1896/* PGGS register show functions */
1897static PGGS0_SHOW(0);
1898static PGGS0_SHOW(1);
1899static PGGS0_SHOW(2);
1900static PGGS0_SHOW(3);
1901
1902/* PGGS register store functions */
1903static PGGS0_STORE(0);
1904static PGGS0_STORE(1);
1905static PGGS0_STORE(2);
1906static PGGS0_STORE(3);
1907
1908/* GGS register attributes */
1909static DEVICE_ATTR_RW(ggs0);
1910static DEVICE_ATTR_RW(ggs1);
1911static DEVICE_ATTR_RW(ggs2);
1912static DEVICE_ATTR_RW(ggs3);
1913
1914/* PGGS register attributes */
1915static DEVICE_ATTR_RW(pggs0);
1916static DEVICE_ATTR_RW(pggs1);
1917static DEVICE_ATTR_RW(pggs2);
1918static DEVICE_ATTR_RW(pggs3);
1919
1920static ssize_t feature_config_id_show(struct device *device,
1921 struct device_attribute *attr,
1922 char *buf)
1923{
1924 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1925
1926 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1927}
1928
1929static ssize_t feature_config_id_store(struct device *device,
1930 struct device_attribute *attr,
1931 const char *buf, size_t count)
1932{
1933 u32 config_id;
1934 int ret;
1935 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1936
1937 if (!buf)
1938 return -EINVAL;
1939
1940 ret = kstrtou32(buf, 10, &config_id);
1941 if (ret)
1942 return ret;
1943
1944 devinfo->feature_conf_id = config_id;
1945
1946 return count;
1947}
1948
1949static DEVICE_ATTR_RW(feature_config_id);
1950
1951static ssize_t feature_config_value_show(struct device *device,
1952 struct device_attribute *attr,
1953 char *buf)
1954{
1955 int ret;
1956 u32 ret_payload[PAYLOAD_ARG_CNT];
1957 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1958
1959 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1960 ret_payload);
1961 if (ret)
1962 return ret;
1963
1964 return sysfs_emit(buf, "%d\n", ret_payload[1]);
1965}
1966
1967static ssize_t feature_config_value_store(struct device *device,
1968 struct device_attribute *attr,
1969 const char *buf, size_t count)
1970{
1971 u32 value;
1972 int ret;
1973 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1974
1975 if (!buf)
1976 return -EINVAL;
1977
1978 ret = kstrtou32(buf, 10, &value);
1979 if (ret)
1980 return ret;
1981
1982 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1983 value);
1984 if (ret)
1985 return ret;
1986
1987 return count;
1988}
1989
1990static DEVICE_ATTR_RW(feature_config_value);
1991
1992static struct attribute *zynqmp_firmware_attrs[] = {
1993 &dev_attr_ggs0.attr,
1994 &dev_attr_ggs1.attr,
1995 &dev_attr_ggs2.attr,
1996 &dev_attr_ggs3.attr,
1997 &dev_attr_pggs0.attr,
1998 &dev_attr_pggs1.attr,
1999 &dev_attr_pggs2.attr,
2000 &dev_attr_pggs3.attr,
2001 &dev_attr_shutdown_scope.attr,
2002 &dev_attr_health_status.attr,
2003 &dev_attr_feature_config_id.attr,
2004 &dev_attr_feature_config_value.attr,
2005 NULL,
2006};
2007
2008ATTRIBUTE_GROUPS(zynqmp_firmware);
2009
2010static int zynqmp_firmware_probe(struct platform_device *pdev)
2011{
2012 struct device *dev = &pdev->dev;
2013 struct zynqmp_devinfo *devinfo;
2014 int ret;
2015
2016 ret = get_set_conduit_method(dev->of_node);
2017 if (ret)
2018 return ret;
2019
2020 /* Get SiP SVC version number */
2021 ret = zynqmp_pm_get_sip_svc_version(&sip_svc_version);
2022 if (ret)
2023 return ret;
2024
2025 ret = do_feature_check_call(PM_FEATURE_CHECK);
2026 if (ret >= 0 && ((ret & FIRMWARE_VERSION_MASK) >= PM_API_VERSION_1))
2027 feature_check_enabled = true;
2028
2029 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
2030 if (!devinfo)
2031 return -ENOMEM;
2032
2033 devinfo->dev = dev;
2034
2035 platform_set_drvdata(pdev, devinfo);
2036
2037 /* Check PM API version number */
2038 ret = zynqmp_pm_get_api_version(&pm_api_version);
2039 if (ret)
2040 return ret;
2041
2042 if (pm_api_version < ZYNQMP_PM_VERSION) {
2043 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
2044 __func__,
2045 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
2046 pm_api_version >> 16, pm_api_version & 0xFFFF);
2047 }
2048
2049 pr_info("%s Platform Management API v%d.%d\n", __func__,
2050 pm_api_version >> 16, pm_api_version & 0xFFFF);
2051
2052 /* Get the Family code and sub family code of platform */
2053 ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code);
2054 if (ret < 0)
2055 return ret;
2056
2057 /* Check trustzone version number */
2058 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
2059 if (ret)
2060 panic("Legacy trustzone found without version support\n");
2061
2062 if (pm_tz_version < ZYNQMP_TZ_VERSION)
2063 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
2064 __func__,
2065 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
2066 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
2067
2068 pr_info("%s Trustzone version v%d.%d\n", __func__,
2069 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
2070
2071 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
2072 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
2073 if (ret) {
2074 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
2075 return ret;
2076 }
2077
2078 zynqmp_pm_api_debugfs_init();
2079
2080 if (pm_family_code == VERSAL_FAMILY_CODE) {
2081 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
2082 -1, NULL, 0);
2083 if (IS_ERR(em_dev))
2084 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
2085 }
2086
2087 return of_platform_populate(dev->of_node, NULL, NULL, dev);
2088}
2089
2090static void zynqmp_firmware_remove(struct platform_device *pdev)
2091{
2092 struct pm_api_feature_data *feature_data;
2093 struct hlist_node *tmp;
2094 int i;
2095
2096 mfd_remove_devices(&pdev->dev);
2097 zynqmp_pm_api_debugfs_exit();
2098
2099 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
2100 hash_del(&feature_data->hentry);
2101 kfree(feature_data);
2102 }
2103
2104 platform_device_unregister(em_dev);
2105}
2106
2107static const struct of_device_id zynqmp_firmware_of_match[] = {
2108 {.compatible = "xlnx,zynqmp-firmware"},
2109 {.compatible = "xlnx,versal-firmware"},
2110 {},
2111};
2112MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
2113
2114static struct platform_driver zynqmp_firmware_driver = {
2115 .driver = {
2116 .name = "zynqmp_firmware",
2117 .of_match_table = zynqmp_firmware_of_match,
2118 .dev_groups = zynqmp_firmware_groups,
2119 },
2120 .probe = zynqmp_firmware_probe,
2121 .remove = zynqmp_firmware_remove,
2122};
2123module_platform_driver(zynqmp_firmware_driver);