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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * cacheinfo support - processor cache information via sysfs
4 *
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
6 * Author: Sudeep Holla <sudeep.holla@arm.com>
7 */
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/acpi.h>
11#include <linux/bitops.h>
12#include <linux/cacheinfo.h>
13#include <linux/compiler.h>
14#include <linux/cpu.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/of.h>
18#include <linux/sched.h>
19#include <linux/slab.h>
20#include <linux/smp.h>
21#include <linux/sysfs.h>
22
23/* pointer to per cpu cacheinfo */
24static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
25#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
26#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
27#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
28
29struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
30{
31 return ci_cacheinfo(cpu);
32}
33
34#ifdef CONFIG_OF
35static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
36 struct cacheinfo *sib_leaf)
37{
38 return sib_leaf->fw_token == this_leaf->fw_token;
39}
40
41/* OF properties to query for a given cache type */
42struct cache_type_info {
43 const char *size_prop;
44 const char *line_size_props[2];
45 const char *nr_sets_prop;
46};
47
48static const struct cache_type_info cache_type_info[] = {
49 {
50 .size_prop = "cache-size",
51 .line_size_props = { "cache-line-size",
52 "cache-block-size", },
53 .nr_sets_prop = "cache-sets",
54 }, {
55 .size_prop = "i-cache-size",
56 .line_size_props = { "i-cache-line-size",
57 "i-cache-block-size", },
58 .nr_sets_prop = "i-cache-sets",
59 }, {
60 .size_prop = "d-cache-size",
61 .line_size_props = { "d-cache-line-size",
62 "d-cache-block-size", },
63 .nr_sets_prop = "d-cache-sets",
64 },
65};
66
67static inline int get_cacheinfo_idx(enum cache_type type)
68{
69 if (type == CACHE_TYPE_UNIFIED)
70 return 0;
71 return type;
72}
73
74static void cache_size(struct cacheinfo *this_leaf, struct device_node *np)
75{
76 const char *propname;
77 int ct_idx;
78
79 ct_idx = get_cacheinfo_idx(this_leaf->type);
80 propname = cache_type_info[ct_idx].size_prop;
81
82 of_property_read_u32(np, propname, &this_leaf->size);
83}
84
85/* not cache_line_size() because that's a macro in include/linux/cache.h */
86static void cache_get_line_size(struct cacheinfo *this_leaf,
87 struct device_node *np)
88{
89 int i, lim, ct_idx;
90
91 ct_idx = get_cacheinfo_idx(this_leaf->type);
92 lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props);
93
94 for (i = 0; i < lim; i++) {
95 int ret;
96 u32 line_size;
97 const char *propname;
98
99 propname = cache_type_info[ct_idx].line_size_props[i];
100 ret = of_property_read_u32(np, propname, &line_size);
101 if (!ret) {
102 this_leaf->coherency_line_size = line_size;
103 break;
104 }
105 }
106}
107
108static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np)
109{
110 const char *propname;
111 int ct_idx;
112
113 ct_idx = get_cacheinfo_idx(this_leaf->type);
114 propname = cache_type_info[ct_idx].nr_sets_prop;
115
116 of_property_read_u32(np, propname, &this_leaf->number_of_sets);
117}
118
119static void cache_associativity(struct cacheinfo *this_leaf)
120{
121 unsigned int line_size = this_leaf->coherency_line_size;
122 unsigned int nr_sets = this_leaf->number_of_sets;
123 unsigned int size = this_leaf->size;
124
125 /*
126 * If the cache is fully associative, there is no need to
127 * check the other properties.
128 */
129 if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0))
130 this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
131}
132
133static bool cache_node_is_unified(struct cacheinfo *this_leaf,
134 struct device_node *np)
135{
136 return of_property_read_bool(np, "cache-unified");
137}
138
139static void cache_of_set_props(struct cacheinfo *this_leaf,
140 struct device_node *np)
141{
142 /*
143 * init_cache_level must setup the cache level correctly
144 * overriding the architecturally specified levels, so
145 * if type is NONE at this stage, it should be unified
146 */
147 if (this_leaf->type == CACHE_TYPE_NOCACHE &&
148 cache_node_is_unified(this_leaf, np))
149 this_leaf->type = CACHE_TYPE_UNIFIED;
150 cache_size(this_leaf, np);
151 cache_get_line_size(this_leaf, np);
152 cache_nr_sets(this_leaf, np);
153 cache_associativity(this_leaf);
154}
155
156static int cache_setup_of_node(unsigned int cpu)
157{
158 struct device_node *np;
159 struct cacheinfo *this_leaf;
160 struct device *cpu_dev = get_cpu_device(cpu);
161 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
162 unsigned int index = 0;
163
164 /* skip if fw_token is already populated */
165 if (this_cpu_ci->info_list->fw_token) {
166 return 0;
167 }
168
169 if (!cpu_dev) {
170 pr_err("No cpu device for CPU %d\n", cpu);
171 return -ENODEV;
172 }
173 np = cpu_dev->of_node;
174 if (!np) {
175 pr_err("Failed to find cpu%d device node\n", cpu);
176 return -ENOENT;
177 }
178
179 while (index < cache_leaves(cpu)) {
180 this_leaf = this_cpu_ci->info_list + index;
181 if (this_leaf->level != 1)
182 np = of_find_next_cache_node(np);
183 else
184 np = of_node_get(np);/* cpu node itself */
185 if (!np)
186 break;
187 cache_of_set_props(this_leaf, np);
188 this_leaf->fw_token = np;
189 index++;
190 }
191
192 if (index != cache_leaves(cpu)) /* not all OF nodes populated */
193 return -ENOENT;
194
195 return 0;
196}
197#else
198static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
199static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
200 struct cacheinfo *sib_leaf)
201{
202 /*
203 * For non-DT/ACPI systems, assume unique level 1 caches, system-wide
204 * shared caches for all other levels. This will be used only if
205 * arch specific code has not populated shared_cpu_map
206 */
207 return !(this_leaf->level == 1);
208}
209#endif
210
211int __weak cache_setup_acpi(unsigned int cpu)
212{
213 return -ENOTSUPP;
214}
215
216unsigned int coherency_max_size;
217
218static int cache_shared_cpu_map_setup(unsigned int cpu)
219{
220 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
221 struct cacheinfo *this_leaf, *sib_leaf;
222 unsigned int index;
223 int ret = 0;
224
225 if (this_cpu_ci->cpu_map_populated)
226 return 0;
227
228 if (of_have_populated_dt())
229 ret = cache_setup_of_node(cpu);
230 else if (!acpi_disabled)
231 ret = cache_setup_acpi(cpu);
232
233 if (ret)
234 return ret;
235
236 for (index = 0; index < cache_leaves(cpu); index++) {
237 unsigned int i;
238
239 this_leaf = this_cpu_ci->info_list + index;
240 /* skip if shared_cpu_map is already populated */
241 if (!cpumask_empty(&this_leaf->shared_cpu_map))
242 continue;
243
244 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
245 for_each_online_cpu(i) {
246 struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
247
248 if (i == cpu || !sib_cpu_ci->info_list)
249 continue;/* skip if itself or no cacheinfo */
250 sib_leaf = sib_cpu_ci->info_list + index;
251 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
252 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
253 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
254 }
255 }
256 /* record the maximum cache line size */
257 if (this_leaf->coherency_line_size > coherency_max_size)
258 coherency_max_size = this_leaf->coherency_line_size;
259 }
260
261 return 0;
262}
263
264static void cache_shared_cpu_map_remove(unsigned int cpu)
265{
266 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
267 struct cacheinfo *this_leaf, *sib_leaf;
268 unsigned int sibling, index;
269
270 for (index = 0; index < cache_leaves(cpu); index++) {
271 this_leaf = this_cpu_ci->info_list + index;
272 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
273 struct cpu_cacheinfo *sib_cpu_ci;
274
275 if (sibling == cpu) /* skip itself */
276 continue;
277
278 sib_cpu_ci = get_cpu_cacheinfo(sibling);
279 if (!sib_cpu_ci->info_list)
280 continue;
281
282 sib_leaf = sib_cpu_ci->info_list + index;
283 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
284 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
285 }
286 if (of_have_populated_dt())
287 of_node_put(this_leaf->fw_token);
288 }
289}
290
291static void free_cache_attributes(unsigned int cpu)
292{
293 if (!per_cpu_cacheinfo(cpu))
294 return;
295
296 cache_shared_cpu_map_remove(cpu);
297
298 kfree(per_cpu_cacheinfo(cpu));
299 per_cpu_cacheinfo(cpu) = NULL;
300}
301
302int __weak init_cache_level(unsigned int cpu)
303{
304 return -ENOENT;
305}
306
307int __weak populate_cache_leaves(unsigned int cpu)
308{
309 return -ENOENT;
310}
311
312static int detect_cache_attributes(unsigned int cpu)
313{
314 int ret;
315
316 if (init_cache_level(cpu) || !cache_leaves(cpu))
317 return -ENOENT;
318
319 per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
320 sizeof(struct cacheinfo), GFP_KERNEL);
321 if (per_cpu_cacheinfo(cpu) == NULL)
322 return -ENOMEM;
323
324 /*
325 * populate_cache_leaves() may completely setup the cache leaves and
326 * shared_cpu_map or it may leave it partially setup.
327 */
328 ret = populate_cache_leaves(cpu);
329 if (ret)
330 goto free_ci;
331 /*
332 * For systems using DT for cache hierarchy, fw_token
333 * and shared_cpu_map will be set up here only if they are
334 * not populated already
335 */
336 ret = cache_shared_cpu_map_setup(cpu);
337 if (ret) {
338 pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
339 goto free_ci;
340 }
341
342 return 0;
343
344free_ci:
345 free_cache_attributes(cpu);
346 return ret;
347}
348
349/* pointer to cpuX/cache device */
350static DEFINE_PER_CPU(struct device *, ci_cache_dev);
351#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
352
353static cpumask_t cache_dev_map;
354
355/* pointer to array of devices for cpuX/cache/indexY */
356static DEFINE_PER_CPU(struct device **, ci_index_dev);
357#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
358#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
359
360#define show_one(file_name, object) \
361static ssize_t file_name##_show(struct device *dev, \
362 struct device_attribute *attr, char *buf) \
363{ \
364 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
365 return sprintf(buf, "%u\n", this_leaf->object); \
366}
367
368show_one(id, id);
369show_one(level, level);
370show_one(coherency_line_size, coherency_line_size);
371show_one(number_of_sets, number_of_sets);
372show_one(physical_line_partition, physical_line_partition);
373show_one(ways_of_associativity, ways_of_associativity);
374
375static ssize_t size_show(struct device *dev,
376 struct device_attribute *attr, char *buf)
377{
378 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
379
380 return sprintf(buf, "%uK\n", this_leaf->size >> 10);
381}
382
383static ssize_t shared_cpumap_show_func(struct device *dev, bool list, char *buf)
384{
385 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
386 const struct cpumask *mask = &this_leaf->shared_cpu_map;
387
388 return cpumap_print_to_pagebuf(list, buf, mask);
389}
390
391static ssize_t shared_cpu_map_show(struct device *dev,
392 struct device_attribute *attr, char *buf)
393{
394 return shared_cpumap_show_func(dev, false, buf);
395}
396
397static ssize_t shared_cpu_list_show(struct device *dev,
398 struct device_attribute *attr, char *buf)
399{
400 return shared_cpumap_show_func(dev, true, buf);
401}
402
403static ssize_t type_show(struct device *dev,
404 struct device_attribute *attr, char *buf)
405{
406 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
407
408 switch (this_leaf->type) {
409 case CACHE_TYPE_DATA:
410 return sprintf(buf, "Data\n");
411 case CACHE_TYPE_INST:
412 return sprintf(buf, "Instruction\n");
413 case CACHE_TYPE_UNIFIED:
414 return sprintf(buf, "Unified\n");
415 default:
416 return -EINVAL;
417 }
418}
419
420static ssize_t allocation_policy_show(struct device *dev,
421 struct device_attribute *attr, char *buf)
422{
423 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
424 unsigned int ci_attr = this_leaf->attributes;
425 int n = 0;
426
427 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
428 n = sprintf(buf, "ReadWriteAllocate\n");
429 else if (ci_attr & CACHE_READ_ALLOCATE)
430 n = sprintf(buf, "ReadAllocate\n");
431 else if (ci_attr & CACHE_WRITE_ALLOCATE)
432 n = sprintf(buf, "WriteAllocate\n");
433 return n;
434}
435
436static ssize_t write_policy_show(struct device *dev,
437 struct device_attribute *attr, char *buf)
438{
439 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
440 unsigned int ci_attr = this_leaf->attributes;
441 int n = 0;
442
443 if (ci_attr & CACHE_WRITE_THROUGH)
444 n = sprintf(buf, "WriteThrough\n");
445 else if (ci_attr & CACHE_WRITE_BACK)
446 n = sprintf(buf, "WriteBack\n");
447 return n;
448}
449
450static DEVICE_ATTR_RO(id);
451static DEVICE_ATTR_RO(level);
452static DEVICE_ATTR_RO(type);
453static DEVICE_ATTR_RO(coherency_line_size);
454static DEVICE_ATTR_RO(ways_of_associativity);
455static DEVICE_ATTR_RO(number_of_sets);
456static DEVICE_ATTR_RO(size);
457static DEVICE_ATTR_RO(allocation_policy);
458static DEVICE_ATTR_RO(write_policy);
459static DEVICE_ATTR_RO(shared_cpu_map);
460static DEVICE_ATTR_RO(shared_cpu_list);
461static DEVICE_ATTR_RO(physical_line_partition);
462
463static struct attribute *cache_default_attrs[] = {
464 &dev_attr_id.attr,
465 &dev_attr_type.attr,
466 &dev_attr_level.attr,
467 &dev_attr_shared_cpu_map.attr,
468 &dev_attr_shared_cpu_list.attr,
469 &dev_attr_coherency_line_size.attr,
470 &dev_attr_ways_of_associativity.attr,
471 &dev_attr_number_of_sets.attr,
472 &dev_attr_size.attr,
473 &dev_attr_allocation_policy.attr,
474 &dev_attr_write_policy.attr,
475 &dev_attr_physical_line_partition.attr,
476 NULL
477};
478
479static umode_t
480cache_default_attrs_is_visible(struct kobject *kobj,
481 struct attribute *attr, int unused)
482{
483 struct device *dev = kobj_to_dev(kobj);
484 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
485 const struct cpumask *mask = &this_leaf->shared_cpu_map;
486 umode_t mode = attr->mode;
487
488 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
489 return mode;
490 if ((attr == &dev_attr_type.attr) && this_leaf->type)
491 return mode;
492 if ((attr == &dev_attr_level.attr) && this_leaf->level)
493 return mode;
494 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
495 return mode;
496 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
497 return mode;
498 if ((attr == &dev_attr_coherency_line_size.attr) &&
499 this_leaf->coherency_line_size)
500 return mode;
501 if ((attr == &dev_attr_ways_of_associativity.attr) &&
502 this_leaf->size) /* allow 0 = full associativity */
503 return mode;
504 if ((attr == &dev_attr_number_of_sets.attr) &&
505 this_leaf->number_of_sets)
506 return mode;
507 if ((attr == &dev_attr_size.attr) && this_leaf->size)
508 return mode;
509 if ((attr == &dev_attr_write_policy.attr) &&
510 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
511 return mode;
512 if ((attr == &dev_attr_allocation_policy.attr) &&
513 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
514 return mode;
515 if ((attr == &dev_attr_physical_line_partition.attr) &&
516 this_leaf->physical_line_partition)
517 return mode;
518
519 return 0;
520}
521
522static const struct attribute_group cache_default_group = {
523 .attrs = cache_default_attrs,
524 .is_visible = cache_default_attrs_is_visible,
525};
526
527static const struct attribute_group *cache_default_groups[] = {
528 &cache_default_group,
529 NULL,
530};
531
532static const struct attribute_group *cache_private_groups[] = {
533 &cache_default_group,
534 NULL, /* Place holder for private group */
535 NULL,
536};
537
538const struct attribute_group *
539__weak cache_get_priv_group(struct cacheinfo *this_leaf)
540{
541 return NULL;
542}
543
544static const struct attribute_group **
545cache_get_attribute_groups(struct cacheinfo *this_leaf)
546{
547 const struct attribute_group *priv_group =
548 cache_get_priv_group(this_leaf);
549
550 if (!priv_group)
551 return cache_default_groups;
552
553 if (!cache_private_groups[1])
554 cache_private_groups[1] = priv_group;
555
556 return cache_private_groups;
557}
558
559/* Add/Remove cache interface for CPU device */
560static void cpu_cache_sysfs_exit(unsigned int cpu)
561{
562 int i;
563 struct device *ci_dev;
564
565 if (per_cpu_index_dev(cpu)) {
566 for (i = 0; i < cache_leaves(cpu); i++) {
567 ci_dev = per_cache_index_dev(cpu, i);
568 if (!ci_dev)
569 continue;
570 device_unregister(ci_dev);
571 }
572 kfree(per_cpu_index_dev(cpu));
573 per_cpu_index_dev(cpu) = NULL;
574 }
575 device_unregister(per_cpu_cache_dev(cpu));
576 per_cpu_cache_dev(cpu) = NULL;
577}
578
579static int cpu_cache_sysfs_init(unsigned int cpu)
580{
581 struct device *dev = get_cpu_device(cpu);
582
583 if (per_cpu_cacheinfo(cpu) == NULL)
584 return -ENOENT;
585
586 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
587 if (IS_ERR(per_cpu_cache_dev(cpu)))
588 return PTR_ERR(per_cpu_cache_dev(cpu));
589
590 /* Allocate all required memory */
591 per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu),
592 sizeof(struct device *), GFP_KERNEL);
593 if (unlikely(per_cpu_index_dev(cpu) == NULL))
594 goto err_out;
595
596 return 0;
597
598err_out:
599 cpu_cache_sysfs_exit(cpu);
600 return -ENOMEM;
601}
602
603static int cache_add_dev(unsigned int cpu)
604{
605 unsigned int i;
606 int rc;
607 struct device *ci_dev, *parent;
608 struct cacheinfo *this_leaf;
609 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
610 const struct attribute_group **cache_groups;
611
612 rc = cpu_cache_sysfs_init(cpu);
613 if (unlikely(rc < 0))
614 return rc;
615
616 parent = per_cpu_cache_dev(cpu);
617 for (i = 0; i < cache_leaves(cpu); i++) {
618 this_leaf = this_cpu_ci->info_list + i;
619 if (this_leaf->disable_sysfs)
620 continue;
621 if (this_leaf->type == CACHE_TYPE_NOCACHE)
622 break;
623 cache_groups = cache_get_attribute_groups(this_leaf);
624 ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
625 "index%1u", i);
626 if (IS_ERR(ci_dev)) {
627 rc = PTR_ERR(ci_dev);
628 goto err;
629 }
630 per_cache_index_dev(cpu, i) = ci_dev;
631 }
632 cpumask_set_cpu(cpu, &cache_dev_map);
633
634 return 0;
635err:
636 cpu_cache_sysfs_exit(cpu);
637 return rc;
638}
639
640static int cacheinfo_cpu_online(unsigned int cpu)
641{
642 int rc = detect_cache_attributes(cpu);
643
644 if (rc)
645 return rc;
646 rc = cache_add_dev(cpu);
647 if (rc)
648 free_cache_attributes(cpu);
649 return rc;
650}
651
652static int cacheinfo_cpu_pre_down(unsigned int cpu)
653{
654 if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map))
655 cpu_cache_sysfs_exit(cpu);
656
657 free_cache_attributes(cpu);
658 return 0;
659}
660
661static int __init cacheinfo_sysfs_init(void)
662{
663 return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE,
664 "base/cacheinfo:online",
665 cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
666}
667device_initcall(cacheinfo_sysfs_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * cacheinfo support - processor cache information via sysfs
4 *
5 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
6 * Author: Sudeep Holla <sudeep.holla@arm.com>
7 */
8#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10#include <linux/acpi.h>
11#include <linux/bitops.h>
12#include <linux/cacheinfo.h>
13#include <linux/compiler.h>
14#include <linux/cpu.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/of.h>
18#include <linux/sched.h>
19#include <linux/slab.h>
20#include <linux/smp.h>
21#include <linux/sysfs.h>
22
23/* pointer to per cpu cacheinfo */
24static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
25#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
26#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
27#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
28#define per_cpu_cacheinfo_idx(cpu, idx) \
29 (per_cpu_cacheinfo(cpu) + (idx))
30
31/* Set if no cache information is found in DT/ACPI. */
32static bool use_arch_info;
33
34struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
35{
36 return ci_cacheinfo(cpu);
37}
38
39static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
40 struct cacheinfo *sib_leaf)
41{
42 /*
43 * For non DT/ACPI systems, assume unique level 1 caches,
44 * system-wide shared caches for all other levels.
45 */
46 if (!(IS_ENABLED(CONFIG_OF) || IS_ENABLED(CONFIG_ACPI)) ||
47 use_arch_info)
48 return (this_leaf->level != 1) && (sib_leaf->level != 1);
49
50 if ((sib_leaf->attributes & CACHE_ID) &&
51 (this_leaf->attributes & CACHE_ID))
52 return sib_leaf->id == this_leaf->id;
53
54 return sib_leaf->fw_token == this_leaf->fw_token;
55}
56
57bool last_level_cache_is_valid(unsigned int cpu)
58{
59 struct cacheinfo *llc;
60
61 if (!cache_leaves(cpu) || !per_cpu_cacheinfo(cpu))
62 return false;
63
64 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
65
66 return (llc->attributes & CACHE_ID) || !!llc->fw_token;
67
68}
69
70bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
71{
72 struct cacheinfo *llc_x, *llc_y;
73
74 if (!last_level_cache_is_valid(cpu_x) ||
75 !last_level_cache_is_valid(cpu_y))
76 return false;
77
78 llc_x = per_cpu_cacheinfo_idx(cpu_x, cache_leaves(cpu_x) - 1);
79 llc_y = per_cpu_cacheinfo_idx(cpu_y, cache_leaves(cpu_y) - 1);
80
81 return cache_leaves_are_shared(llc_x, llc_y);
82}
83
84#ifdef CONFIG_OF
85
86static bool of_check_cache_nodes(struct device_node *np);
87
88/* OF properties to query for a given cache type */
89struct cache_type_info {
90 const char *size_prop;
91 const char *line_size_props[2];
92 const char *nr_sets_prop;
93};
94
95static const struct cache_type_info cache_type_info[] = {
96 {
97 .size_prop = "cache-size",
98 .line_size_props = { "cache-line-size",
99 "cache-block-size", },
100 .nr_sets_prop = "cache-sets",
101 }, {
102 .size_prop = "i-cache-size",
103 .line_size_props = { "i-cache-line-size",
104 "i-cache-block-size", },
105 .nr_sets_prop = "i-cache-sets",
106 }, {
107 .size_prop = "d-cache-size",
108 .line_size_props = { "d-cache-line-size",
109 "d-cache-block-size", },
110 .nr_sets_prop = "d-cache-sets",
111 },
112};
113
114static inline int get_cacheinfo_idx(enum cache_type type)
115{
116 if (type == CACHE_TYPE_UNIFIED)
117 return 0;
118 return type;
119}
120
121static void cache_size(struct cacheinfo *this_leaf, struct device_node *np)
122{
123 const char *propname;
124 int ct_idx;
125
126 ct_idx = get_cacheinfo_idx(this_leaf->type);
127 propname = cache_type_info[ct_idx].size_prop;
128
129 of_property_read_u32(np, propname, &this_leaf->size);
130}
131
132/* not cache_line_size() because that's a macro in include/linux/cache.h */
133static void cache_get_line_size(struct cacheinfo *this_leaf,
134 struct device_node *np)
135{
136 int i, lim, ct_idx;
137
138 ct_idx = get_cacheinfo_idx(this_leaf->type);
139 lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props);
140
141 for (i = 0; i < lim; i++) {
142 int ret;
143 u32 line_size;
144 const char *propname;
145
146 propname = cache_type_info[ct_idx].line_size_props[i];
147 ret = of_property_read_u32(np, propname, &line_size);
148 if (!ret) {
149 this_leaf->coherency_line_size = line_size;
150 break;
151 }
152 }
153}
154
155static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np)
156{
157 const char *propname;
158 int ct_idx;
159
160 ct_idx = get_cacheinfo_idx(this_leaf->type);
161 propname = cache_type_info[ct_idx].nr_sets_prop;
162
163 of_property_read_u32(np, propname, &this_leaf->number_of_sets);
164}
165
166static void cache_associativity(struct cacheinfo *this_leaf)
167{
168 unsigned int line_size = this_leaf->coherency_line_size;
169 unsigned int nr_sets = this_leaf->number_of_sets;
170 unsigned int size = this_leaf->size;
171
172 /*
173 * If the cache is fully associative, there is no need to
174 * check the other properties.
175 */
176 if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0))
177 this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
178}
179
180static bool cache_node_is_unified(struct cacheinfo *this_leaf,
181 struct device_node *np)
182{
183 return of_property_read_bool(np, "cache-unified");
184}
185
186static void cache_of_set_props(struct cacheinfo *this_leaf,
187 struct device_node *np)
188{
189 /*
190 * init_cache_level must setup the cache level correctly
191 * overriding the architecturally specified levels, so
192 * if type is NONE at this stage, it should be unified
193 */
194 if (this_leaf->type == CACHE_TYPE_NOCACHE &&
195 cache_node_is_unified(this_leaf, np))
196 this_leaf->type = CACHE_TYPE_UNIFIED;
197 cache_size(this_leaf, np);
198 cache_get_line_size(this_leaf, np);
199 cache_nr_sets(this_leaf, np);
200 cache_associativity(this_leaf);
201}
202
203static int cache_setup_of_node(unsigned int cpu)
204{
205 struct cacheinfo *this_leaf;
206 unsigned int index = 0;
207
208 struct device_node *np __free(device_node) = of_cpu_device_node_get(cpu);
209 if (!np) {
210 pr_err("Failed to find cpu%d device node\n", cpu);
211 return -ENOENT;
212 }
213
214 if (!of_check_cache_nodes(np)) {
215 return -ENOENT;
216 }
217
218 while (index < cache_leaves(cpu)) {
219 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
220 if (this_leaf->level != 1) {
221 struct device_node *prev __free(device_node) = np;
222 np = of_find_next_cache_node(np);
223 if (!np)
224 break;
225 }
226 cache_of_set_props(this_leaf, np);
227 this_leaf->fw_token = np;
228 index++;
229 }
230
231 if (index != cache_leaves(cpu)) /* not all OF nodes populated */
232 return -ENOENT;
233
234 return 0;
235}
236
237static bool of_check_cache_nodes(struct device_node *np)
238{
239 if (of_property_present(np, "cache-size") ||
240 of_property_present(np, "i-cache-size") ||
241 of_property_present(np, "d-cache-size") ||
242 of_property_present(np, "cache-unified"))
243 return true;
244
245 struct device_node *next __free(device_node) = of_find_next_cache_node(np);
246 if (next) {
247 return true;
248 }
249
250 return false;
251}
252
253static int of_count_cache_leaves(struct device_node *np)
254{
255 unsigned int leaves = 0;
256
257 if (of_property_present(np, "cache-size"))
258 ++leaves;
259 if (of_property_present(np, "i-cache-size"))
260 ++leaves;
261 if (of_property_present(np, "d-cache-size"))
262 ++leaves;
263
264 if (!leaves) {
265 /* The '[i-|d-|]cache-size' property is required, but
266 * if absent, fallback on the 'cache-unified' property.
267 */
268 if (of_property_read_bool(np, "cache-unified"))
269 return 1;
270 else
271 return 2;
272 }
273
274 return leaves;
275}
276
277int init_of_cache_level(unsigned int cpu)
278{
279 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
280 struct device_node *np __free(device_node) = of_cpu_device_node_get(cpu);
281 unsigned int levels = 0, leaves, level;
282
283 if (!of_check_cache_nodes(np)) {
284 return -ENOENT;
285 }
286
287 leaves = of_count_cache_leaves(np);
288 if (leaves > 0)
289 levels = 1;
290
291 while (1) {
292 struct device_node *prev __free(device_node) = np;
293 np = of_find_next_cache_node(np);
294 if (!np)
295 break;
296
297 if (!of_device_is_compatible(np, "cache"))
298 return -EINVAL;
299 if (of_property_read_u32(np, "cache-level", &level))
300 return -EINVAL;
301 if (level <= levels)
302 return -EINVAL;
303
304 leaves += of_count_cache_leaves(np);
305 levels = level;
306 }
307
308 this_cpu_ci->num_levels = levels;
309 this_cpu_ci->num_leaves = leaves;
310
311 return 0;
312}
313
314#else
315static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
316int init_of_cache_level(unsigned int cpu) { return 0; }
317#endif
318
319int __weak cache_setup_acpi(unsigned int cpu)
320{
321 return -ENOTSUPP;
322}
323
324unsigned int coherency_max_size;
325
326static int cache_setup_properties(unsigned int cpu)
327{
328 int ret = 0;
329
330 if (of_have_populated_dt())
331 ret = cache_setup_of_node(cpu);
332 else if (!acpi_disabled)
333 ret = cache_setup_acpi(cpu);
334
335 // Assume there is no cache information available in DT/ACPI from now.
336 if (ret && use_arch_cache_info())
337 use_arch_info = true;
338
339 return ret;
340}
341
342static int cache_shared_cpu_map_setup(unsigned int cpu)
343{
344 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
345 struct cacheinfo *this_leaf, *sib_leaf;
346 unsigned int index, sib_index;
347 int ret = 0;
348
349 if (this_cpu_ci->cpu_map_populated)
350 return 0;
351
352 /*
353 * skip setting up cache properties if LLC is valid, just need
354 * to update the shared cpu_map if the cache attributes were
355 * populated early before all the cpus are brought online
356 */
357 if (!last_level_cache_is_valid(cpu) && !use_arch_info) {
358 ret = cache_setup_properties(cpu);
359 if (ret)
360 return ret;
361 }
362
363 for (index = 0; index < cache_leaves(cpu); index++) {
364 unsigned int i;
365
366 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
367
368 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
369 for_each_online_cpu(i) {
370 if (i == cpu || !per_cpu_cacheinfo(i))
371 continue;/* skip if itself or no cacheinfo */
372 for (sib_index = 0; sib_index < cache_leaves(i); sib_index++) {
373 sib_leaf = per_cpu_cacheinfo_idx(i, sib_index);
374
375 /*
376 * Comparing cache IDs only makes sense if the leaves
377 * belong to the same cache level of same type. Skip
378 * the check if level and type do not match.
379 */
380 if (sib_leaf->level != this_leaf->level ||
381 sib_leaf->type != this_leaf->type)
382 continue;
383
384 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
385 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
386 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
387 break;
388 }
389 }
390 }
391 /* record the maximum cache line size */
392 if (this_leaf->coherency_line_size > coherency_max_size)
393 coherency_max_size = this_leaf->coherency_line_size;
394 }
395
396 /* shared_cpu_map is now populated for the cpu */
397 this_cpu_ci->cpu_map_populated = true;
398 return 0;
399}
400
401static void cache_shared_cpu_map_remove(unsigned int cpu)
402{
403 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
404 struct cacheinfo *this_leaf, *sib_leaf;
405 unsigned int sibling, index, sib_index;
406
407 for (index = 0; index < cache_leaves(cpu); index++) {
408 this_leaf = per_cpu_cacheinfo_idx(cpu, index);
409 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
410 if (sibling == cpu || !per_cpu_cacheinfo(sibling))
411 continue;/* skip if itself or no cacheinfo */
412
413 for (sib_index = 0; sib_index < cache_leaves(sibling); sib_index++) {
414 sib_leaf = per_cpu_cacheinfo_idx(sibling, sib_index);
415
416 /*
417 * Comparing cache IDs only makes sense if the leaves
418 * belong to the same cache level of same type. Skip
419 * the check if level and type do not match.
420 */
421 if (sib_leaf->level != this_leaf->level ||
422 sib_leaf->type != this_leaf->type)
423 continue;
424
425 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
426 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
427 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
428 break;
429 }
430 }
431 }
432 }
433
434 /* cpu is no longer populated in the shared map */
435 this_cpu_ci->cpu_map_populated = false;
436}
437
438static void free_cache_attributes(unsigned int cpu)
439{
440 if (!per_cpu_cacheinfo(cpu))
441 return;
442
443 cache_shared_cpu_map_remove(cpu);
444}
445
446int __weak early_cache_level(unsigned int cpu)
447{
448 return -ENOENT;
449}
450
451int __weak init_cache_level(unsigned int cpu)
452{
453 return -ENOENT;
454}
455
456int __weak populate_cache_leaves(unsigned int cpu)
457{
458 return -ENOENT;
459}
460
461static inline int allocate_cache_info(int cpu)
462{
463 per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu), sizeof(struct cacheinfo), GFP_ATOMIC);
464 if (!per_cpu_cacheinfo(cpu)) {
465 cache_leaves(cpu) = 0;
466 return -ENOMEM;
467 }
468
469 return 0;
470}
471
472int fetch_cache_info(unsigned int cpu)
473{
474 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
475 unsigned int levels = 0, split_levels = 0;
476 int ret;
477
478 if (acpi_disabled) {
479 ret = init_of_cache_level(cpu);
480 } else {
481 ret = acpi_get_cache_info(cpu, &levels, &split_levels);
482 if (!ret) {
483 this_cpu_ci->num_levels = levels;
484 /*
485 * This assumes that:
486 * - there cannot be any split caches (data/instruction)
487 * above a unified cache
488 * - data/instruction caches come by pair
489 */
490 this_cpu_ci->num_leaves = levels + split_levels;
491 }
492 }
493
494 if (ret || !cache_leaves(cpu)) {
495 ret = early_cache_level(cpu);
496 if (ret)
497 return ret;
498
499 if (!cache_leaves(cpu))
500 return -ENOENT;
501
502 this_cpu_ci->early_ci_levels = true;
503 }
504
505 return allocate_cache_info(cpu);
506}
507
508static inline int init_level_allocate_ci(unsigned int cpu)
509{
510 unsigned int early_leaves = cache_leaves(cpu);
511
512 /* Since early initialization/allocation of the cacheinfo is allowed
513 * via fetch_cache_info() and this also gets called as CPU hotplug
514 * callbacks via cacheinfo_cpu_online, the init/alloc can be skipped
515 * as it will happen only once (the cacheinfo memory is never freed).
516 * Just populate the cacheinfo. However, if the cacheinfo has been
517 * allocated early through the arch-specific early_cache_level() call,
518 * there is a chance the info is wrong (this can happen on arm64). In
519 * that case, call init_cache_level() anyway to give the arch-specific
520 * code a chance to make things right.
521 */
522 if (per_cpu_cacheinfo(cpu) && !ci_cacheinfo(cpu)->early_ci_levels)
523 return 0;
524
525 if (init_cache_level(cpu) || !cache_leaves(cpu))
526 return -ENOENT;
527
528 /*
529 * Now that we have properly initialized the cache level info, make
530 * sure we don't try to do that again the next time we are called
531 * (e.g. as CPU hotplug callbacks).
532 */
533 ci_cacheinfo(cpu)->early_ci_levels = false;
534
535 /*
536 * Some architectures (e.g., x86) do not use early initialization.
537 * Allocate memory now in such case.
538 */
539 if (cache_leaves(cpu) <= early_leaves && per_cpu_cacheinfo(cpu))
540 return 0;
541
542 kfree(per_cpu_cacheinfo(cpu));
543 return allocate_cache_info(cpu);
544}
545
546int detect_cache_attributes(unsigned int cpu)
547{
548 int ret;
549
550 ret = init_level_allocate_ci(cpu);
551 if (ret)
552 return ret;
553
554 /*
555 * If LLC is valid the cache leaves were already populated so just go to
556 * update the cpu map.
557 */
558 if (!last_level_cache_is_valid(cpu)) {
559 /*
560 * populate_cache_leaves() may completely setup the cache leaves and
561 * shared_cpu_map or it may leave it partially setup.
562 */
563 ret = populate_cache_leaves(cpu);
564 if (ret)
565 goto free_ci;
566 }
567
568 /*
569 * For systems using DT for cache hierarchy, fw_token
570 * and shared_cpu_map will be set up here only if they are
571 * not populated already
572 */
573 ret = cache_shared_cpu_map_setup(cpu);
574 if (ret) {
575 pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
576 goto free_ci;
577 }
578
579 return 0;
580
581free_ci:
582 free_cache_attributes(cpu);
583 return ret;
584}
585
586/* pointer to cpuX/cache device */
587static DEFINE_PER_CPU(struct device *, ci_cache_dev);
588#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
589
590static cpumask_t cache_dev_map;
591
592/* pointer to array of devices for cpuX/cache/indexY */
593static DEFINE_PER_CPU(struct device **, ci_index_dev);
594#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
595#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
596
597#define show_one(file_name, object) \
598static ssize_t file_name##_show(struct device *dev, \
599 struct device_attribute *attr, char *buf) \
600{ \
601 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
602 return sysfs_emit(buf, "%u\n", this_leaf->object); \
603}
604
605show_one(id, id);
606show_one(level, level);
607show_one(coherency_line_size, coherency_line_size);
608show_one(number_of_sets, number_of_sets);
609show_one(physical_line_partition, physical_line_partition);
610show_one(ways_of_associativity, ways_of_associativity);
611
612static ssize_t size_show(struct device *dev,
613 struct device_attribute *attr, char *buf)
614{
615 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
616
617 return sysfs_emit(buf, "%uK\n", this_leaf->size >> 10);
618}
619
620static ssize_t shared_cpu_map_show(struct device *dev,
621 struct device_attribute *attr, char *buf)
622{
623 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
624 const struct cpumask *mask = &this_leaf->shared_cpu_map;
625
626 return sysfs_emit(buf, "%*pb\n", nr_cpu_ids, mask);
627}
628
629static ssize_t shared_cpu_list_show(struct device *dev,
630 struct device_attribute *attr, char *buf)
631{
632 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
633 const struct cpumask *mask = &this_leaf->shared_cpu_map;
634
635 return sysfs_emit(buf, "%*pbl\n", nr_cpu_ids, mask);
636}
637
638static ssize_t type_show(struct device *dev,
639 struct device_attribute *attr, char *buf)
640{
641 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
642 const char *output;
643
644 switch (this_leaf->type) {
645 case CACHE_TYPE_DATA:
646 output = "Data";
647 break;
648 case CACHE_TYPE_INST:
649 output = "Instruction";
650 break;
651 case CACHE_TYPE_UNIFIED:
652 output = "Unified";
653 break;
654 default:
655 return -EINVAL;
656 }
657
658 return sysfs_emit(buf, "%s\n", output);
659}
660
661static ssize_t allocation_policy_show(struct device *dev,
662 struct device_attribute *attr, char *buf)
663{
664 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
665 unsigned int ci_attr = this_leaf->attributes;
666 const char *output;
667
668 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
669 output = "ReadWriteAllocate";
670 else if (ci_attr & CACHE_READ_ALLOCATE)
671 output = "ReadAllocate";
672 else if (ci_attr & CACHE_WRITE_ALLOCATE)
673 output = "WriteAllocate";
674 else
675 return 0;
676
677 return sysfs_emit(buf, "%s\n", output);
678}
679
680static ssize_t write_policy_show(struct device *dev,
681 struct device_attribute *attr, char *buf)
682{
683 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
684 unsigned int ci_attr = this_leaf->attributes;
685 int n = 0;
686
687 if (ci_attr & CACHE_WRITE_THROUGH)
688 n = sysfs_emit(buf, "WriteThrough\n");
689 else if (ci_attr & CACHE_WRITE_BACK)
690 n = sysfs_emit(buf, "WriteBack\n");
691 return n;
692}
693
694static DEVICE_ATTR_RO(id);
695static DEVICE_ATTR_RO(level);
696static DEVICE_ATTR_RO(type);
697static DEVICE_ATTR_RO(coherency_line_size);
698static DEVICE_ATTR_RO(ways_of_associativity);
699static DEVICE_ATTR_RO(number_of_sets);
700static DEVICE_ATTR_RO(size);
701static DEVICE_ATTR_RO(allocation_policy);
702static DEVICE_ATTR_RO(write_policy);
703static DEVICE_ATTR_RO(shared_cpu_map);
704static DEVICE_ATTR_RO(shared_cpu_list);
705static DEVICE_ATTR_RO(physical_line_partition);
706
707static struct attribute *cache_default_attrs[] = {
708 &dev_attr_id.attr,
709 &dev_attr_type.attr,
710 &dev_attr_level.attr,
711 &dev_attr_shared_cpu_map.attr,
712 &dev_attr_shared_cpu_list.attr,
713 &dev_attr_coherency_line_size.attr,
714 &dev_attr_ways_of_associativity.attr,
715 &dev_attr_number_of_sets.attr,
716 &dev_attr_size.attr,
717 &dev_attr_allocation_policy.attr,
718 &dev_attr_write_policy.attr,
719 &dev_attr_physical_line_partition.attr,
720 NULL
721};
722
723static umode_t
724cache_default_attrs_is_visible(struct kobject *kobj,
725 struct attribute *attr, int unused)
726{
727 struct device *dev = kobj_to_dev(kobj);
728 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
729 const struct cpumask *mask = &this_leaf->shared_cpu_map;
730 umode_t mode = attr->mode;
731
732 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
733 return mode;
734 if ((attr == &dev_attr_type.attr) && this_leaf->type)
735 return mode;
736 if ((attr == &dev_attr_level.attr) && this_leaf->level)
737 return mode;
738 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
739 return mode;
740 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
741 return mode;
742 if ((attr == &dev_attr_coherency_line_size.attr) &&
743 this_leaf->coherency_line_size)
744 return mode;
745 if ((attr == &dev_attr_ways_of_associativity.attr) &&
746 this_leaf->size) /* allow 0 = full associativity */
747 return mode;
748 if ((attr == &dev_attr_number_of_sets.attr) &&
749 this_leaf->number_of_sets)
750 return mode;
751 if ((attr == &dev_attr_size.attr) && this_leaf->size)
752 return mode;
753 if ((attr == &dev_attr_write_policy.attr) &&
754 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
755 return mode;
756 if ((attr == &dev_attr_allocation_policy.attr) &&
757 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
758 return mode;
759 if ((attr == &dev_attr_physical_line_partition.attr) &&
760 this_leaf->physical_line_partition)
761 return mode;
762
763 return 0;
764}
765
766static const struct attribute_group cache_default_group = {
767 .attrs = cache_default_attrs,
768 .is_visible = cache_default_attrs_is_visible,
769};
770
771static const struct attribute_group *cache_default_groups[] = {
772 &cache_default_group,
773 NULL,
774};
775
776static const struct attribute_group *cache_private_groups[] = {
777 &cache_default_group,
778 NULL, /* Place holder for private group */
779 NULL,
780};
781
782const struct attribute_group *
783__weak cache_get_priv_group(struct cacheinfo *this_leaf)
784{
785 return NULL;
786}
787
788static const struct attribute_group **
789cache_get_attribute_groups(struct cacheinfo *this_leaf)
790{
791 const struct attribute_group *priv_group =
792 cache_get_priv_group(this_leaf);
793
794 if (!priv_group)
795 return cache_default_groups;
796
797 if (!cache_private_groups[1])
798 cache_private_groups[1] = priv_group;
799
800 return cache_private_groups;
801}
802
803/* Add/Remove cache interface for CPU device */
804static void cpu_cache_sysfs_exit(unsigned int cpu)
805{
806 int i;
807 struct device *ci_dev;
808
809 if (per_cpu_index_dev(cpu)) {
810 for (i = 0; i < cache_leaves(cpu); i++) {
811 ci_dev = per_cache_index_dev(cpu, i);
812 if (!ci_dev)
813 continue;
814 device_unregister(ci_dev);
815 }
816 kfree(per_cpu_index_dev(cpu));
817 per_cpu_index_dev(cpu) = NULL;
818 }
819 device_unregister(per_cpu_cache_dev(cpu));
820 per_cpu_cache_dev(cpu) = NULL;
821}
822
823static int cpu_cache_sysfs_init(unsigned int cpu)
824{
825 struct device *dev = get_cpu_device(cpu);
826
827 if (per_cpu_cacheinfo(cpu) == NULL)
828 return -ENOENT;
829
830 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
831 if (IS_ERR(per_cpu_cache_dev(cpu)))
832 return PTR_ERR(per_cpu_cache_dev(cpu));
833
834 /* Allocate all required memory */
835 per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu),
836 sizeof(struct device *), GFP_KERNEL);
837 if (unlikely(per_cpu_index_dev(cpu) == NULL))
838 goto err_out;
839
840 return 0;
841
842err_out:
843 cpu_cache_sysfs_exit(cpu);
844 return -ENOMEM;
845}
846
847static int cache_add_dev(unsigned int cpu)
848{
849 unsigned int i;
850 int rc;
851 struct device *ci_dev, *parent;
852 struct cacheinfo *this_leaf;
853 const struct attribute_group **cache_groups;
854
855 rc = cpu_cache_sysfs_init(cpu);
856 if (unlikely(rc < 0))
857 return rc;
858
859 parent = per_cpu_cache_dev(cpu);
860 for (i = 0; i < cache_leaves(cpu); i++) {
861 this_leaf = per_cpu_cacheinfo_idx(cpu, i);
862 if (this_leaf->disable_sysfs)
863 continue;
864 if (this_leaf->type == CACHE_TYPE_NOCACHE)
865 break;
866 cache_groups = cache_get_attribute_groups(this_leaf);
867 ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
868 "index%1u", i);
869 if (IS_ERR(ci_dev)) {
870 rc = PTR_ERR(ci_dev);
871 goto err;
872 }
873 per_cache_index_dev(cpu, i) = ci_dev;
874 }
875 cpumask_set_cpu(cpu, &cache_dev_map);
876
877 return 0;
878err:
879 cpu_cache_sysfs_exit(cpu);
880 return rc;
881}
882
883static unsigned int cpu_map_shared_cache(bool online, unsigned int cpu,
884 cpumask_t **map)
885{
886 struct cacheinfo *llc, *sib_llc;
887 unsigned int sibling;
888
889 if (!last_level_cache_is_valid(cpu))
890 return 0;
891
892 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
893
894 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
895 return 0;
896
897 if (online) {
898 *map = &llc->shared_cpu_map;
899 return cpumask_weight(*map);
900 }
901
902 /* shared_cpu_map of offlined CPU will be cleared, so use sibling map */
903 for_each_cpu(sibling, &llc->shared_cpu_map) {
904 if (sibling == cpu || !last_level_cache_is_valid(sibling))
905 continue;
906 sib_llc = per_cpu_cacheinfo_idx(sibling, cache_leaves(sibling) - 1);
907 *map = &sib_llc->shared_cpu_map;
908 return cpumask_weight(*map);
909 }
910
911 return 0;
912}
913
914/*
915 * Calculate the size of the per-CPU data cache slice. This can be
916 * used to estimate the size of the data cache slice that can be used
917 * by one CPU under ideal circumstances. UNIFIED caches are counted
918 * in addition to DATA caches. So, please consider code cache usage
919 * when use the result.
920 *
921 * Because the cache inclusive/non-inclusive information isn't
922 * available, we just use the size of the per-CPU slice of LLC to make
923 * the result more predictable across architectures.
924 */
925static void update_per_cpu_data_slice_size_cpu(unsigned int cpu)
926{
927 struct cpu_cacheinfo *ci;
928 struct cacheinfo *llc;
929 unsigned int nr_shared;
930
931 if (!last_level_cache_is_valid(cpu))
932 return;
933
934 ci = ci_cacheinfo(cpu);
935 llc = per_cpu_cacheinfo_idx(cpu, cache_leaves(cpu) - 1);
936
937 if (llc->type != CACHE_TYPE_DATA && llc->type != CACHE_TYPE_UNIFIED)
938 return;
939
940 nr_shared = cpumask_weight(&llc->shared_cpu_map);
941 if (nr_shared)
942 ci->per_cpu_data_slice_size = llc->size / nr_shared;
943}
944
945static void update_per_cpu_data_slice_size(bool cpu_online, unsigned int cpu,
946 cpumask_t *cpu_map)
947{
948 unsigned int icpu;
949
950 for_each_cpu(icpu, cpu_map) {
951 if (!cpu_online && icpu == cpu)
952 continue;
953 update_per_cpu_data_slice_size_cpu(icpu);
954 setup_pcp_cacheinfo(icpu);
955 }
956}
957
958static int cacheinfo_cpu_online(unsigned int cpu)
959{
960 int rc = detect_cache_attributes(cpu);
961 cpumask_t *cpu_map;
962
963 if (rc)
964 return rc;
965 rc = cache_add_dev(cpu);
966 if (rc)
967 goto err;
968 if (cpu_map_shared_cache(true, cpu, &cpu_map))
969 update_per_cpu_data_slice_size(true, cpu, cpu_map);
970 return 0;
971err:
972 free_cache_attributes(cpu);
973 return rc;
974}
975
976static int cacheinfo_cpu_pre_down(unsigned int cpu)
977{
978 cpumask_t *cpu_map;
979 unsigned int nr_shared;
980
981 nr_shared = cpu_map_shared_cache(false, cpu, &cpu_map);
982 if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map))
983 cpu_cache_sysfs_exit(cpu);
984
985 free_cache_attributes(cpu);
986 if (nr_shared > 1)
987 update_per_cpu_data_slice_size(false, cpu, cpu_map);
988 return 0;
989}
990
991static int __init cacheinfo_sysfs_init(void)
992{
993 return cpuhp_setup_state(CPUHP_AP_BASE_CACHEINFO_ONLINE,
994 "base/cacheinfo:online",
995 cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
996}
997device_initcall(cacheinfo_sysfs_init);