1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
  4 *
  5 * Largely derived from at91_dataflash.c:
  6 *  Copyright (C) 2003-2005 SAN People (Pty) Ltd
  7*/
  8#include <linux/module.h>
  9#include <linux/slab.h>
 10#include <linux/delay.h>
 11#include <linux/device.h>
 12#include <linux/mutex.h>
 13#include <linux/err.h>
 14#include <linux/math64.h>
 15#include <linux/of.h>
 16#include <linux/of_device.h>
 17
 18#include <linux/spi/spi.h>
 19#include <linux/spi/flash.h>
 20
 21#include <linux/mtd/mtd.h>
 22#include <linux/mtd/partitions.h>
 23
 24/*
 25 * DataFlash is a kind of SPI flash.  Most AT45 chips have two buffers in
 26 * each chip, which may be used for double buffered I/O; but this driver
 27 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
 28 *
 29 * Sometimes DataFlash is packaged in MMC-format cards, although the
 30 * MMC stack can't (yet?) distinguish between MMC and DataFlash
 31 * protocols during enumeration.
 32 */
 33
 34/* reads can bypass the buffers */
 35#define OP_READ_CONTINUOUS	0xE8
 36#define OP_READ_PAGE		0xD2
 37
 38/* group B requests can run even while status reports "busy" */
 39#define OP_READ_STATUS		0xD7	/* group B */
 40
 41/* move data between host and buffer */
 42#define OP_READ_BUFFER1		0xD4	/* group B */
 43#define OP_READ_BUFFER2		0xD6	/* group B */
 44#define OP_WRITE_BUFFER1	0x84	/* group B */
 45#define OP_WRITE_BUFFER2	0x87	/* group B */
 46
 47/* erasing flash */
 48#define OP_ERASE_PAGE		0x81
 49#define OP_ERASE_BLOCK		0x50
 50
 51/* move data between buffer and flash */
 52#define OP_TRANSFER_BUF1	0x53
 53#define OP_TRANSFER_BUF2	0x55
 54#define OP_MREAD_BUFFER1	0xD4
 55#define OP_MREAD_BUFFER2	0xD6
 56#define OP_MWERASE_BUFFER1	0x83
 57#define OP_MWERASE_BUFFER2	0x86
 58#define OP_MWRITE_BUFFER1	0x88	/* sector must be pre-erased */
 59#define OP_MWRITE_BUFFER2	0x89	/* sector must be pre-erased */
 60
 61/* write to buffer, then write-erase to flash */
 62#define OP_PROGRAM_VIA_BUF1	0x82
 63#define OP_PROGRAM_VIA_BUF2	0x85
 64
 65/* compare buffer to flash */
 66#define OP_COMPARE_BUF1		0x60
 67#define OP_COMPARE_BUF2		0x61
 68
 69/* read flash to buffer, then write-erase to flash */
 70#define OP_REWRITE_VIA_BUF1	0x58
 71#define OP_REWRITE_VIA_BUF2	0x59
 72
 73/* newer chips report JEDEC manufacturer and device IDs; chip
 74 * serial number and OTP bits; and per-sector writeprotect.
 75 */
 76#define OP_READ_ID		0x9F
 77#define OP_READ_SECURITY	0x77
 78#define OP_WRITE_SECURITY_REVC	0x9A
 79#define OP_WRITE_SECURITY	0x9B	/* revision D */
 80
 81#define CFI_MFR_ATMEL		0x1F
 82
 83#define DATAFLASH_SHIFT_EXTID	24
 84#define DATAFLASH_SHIFT_ID	40
 85
 86struct dataflash {
 87	u8			command[4];
 88	char			name[24];
 89
 90	unsigned short		page_offset;	/* offset in flash address */
 91	unsigned int		page_size;	/* of bytes per page */
 92
 93	struct mutex		lock;
 94	struct spi_device	*spi;
 95
 96	struct mtd_info		mtd;
 97};
 98
 99#ifdef CONFIG_OF
100static const struct of_device_id dataflash_dt_ids[] = {
101	{ .compatible = "atmel,at45", },
102	{ .compatible = "atmel,dataflash", },
103	{ /* sentinel */ }
104};
105MODULE_DEVICE_TABLE(of, dataflash_dt_ids);
106#endif
107
108/* ......................................................................... */
109
110/*
111 * Return the status of the DataFlash device.
112 */
113static inline int dataflash_status(struct spi_device *spi)
114{
115	/* NOTE:  at45db321c over 25 MHz wants to write
116	 * a dummy byte after the opcode...
117	 */
118	return spi_w8r8(spi, OP_READ_STATUS);
119}
120
121/*
122 * Poll the DataFlash device until it is READY.
123 * This usually takes 5-20 msec or so; more for sector erase.
124 */
125static int dataflash_waitready(struct spi_device *spi)
126{
127	int	status;
128
129	for (;;) {
130		status = dataflash_status(spi);
131		if (status < 0) {
132			dev_dbg(&spi->dev, "status %d?\n", status);
133			status = 0;
134		}
135
136		if (status & (1 << 7))	/* RDY/nBSY */
137			return status;
138
139		usleep_range(3000, 4000);
140	}
141}
142
143/* ......................................................................... */
144
145/*
146 * Erase pages of flash.
147 */
148static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
149{
150	struct dataflash	*priv = mtd->priv;
151	struct spi_device	*spi = priv->spi;
152	struct spi_transfer	x = { };
153	struct spi_message	msg;
154	unsigned		blocksize = priv->page_size << 3;
155	u8			*command;
156	u32			rem;
157
158	dev_dbg(&spi->dev, "erase addr=0x%llx len 0x%llx\n",
159		(long long)instr->addr, (long long)instr->len);
160
161	div_u64_rem(instr->len, priv->page_size, &rem);
162	if (rem)
163		return -EINVAL;
164	div_u64_rem(instr->addr, priv->page_size, &rem);
165	if (rem)
166		return -EINVAL;
167
168	spi_message_init(&msg);
169
170	x.tx_buf = command = priv->command;
171	x.len = 4;
172	spi_message_add_tail(&x, &msg);
173
174	mutex_lock(&priv->lock);
175	while (instr->len > 0) {
176		unsigned int	pageaddr;
177		int		status;
178		int		do_block;
179
180		/* Calculate flash page address; use block erase (for speed) if
181		 * we're at a block boundary and need to erase the whole block.
182		 */
183		pageaddr = div_u64(instr->addr, priv->page_size);
184		do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
185		pageaddr = pageaddr << priv->page_offset;
186
187		command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
188		command[1] = (u8)(pageaddr >> 16);
189		command[2] = (u8)(pageaddr >> 8);
190		command[3] = 0;
191
192		dev_dbg(&spi->dev, "ERASE %s: (%x) %x %x %x [%i]\n",
193			do_block ? "block" : "page",
194			command[0], command[1], command[2], command[3],
195			pageaddr);
196
197		status = spi_sync(spi, &msg);
198		(void) dataflash_waitready(spi);
199
200		if (status < 0) {
201			dev_err(&spi->dev, "erase %x, err %d\n",
202				pageaddr, status);
203			/* REVISIT:  can retry instr->retries times; or
204			 * giveup and instr->fail_addr = instr->addr;
205			 */
206			continue;
207		}
208
209		if (do_block) {
210			instr->addr += blocksize;
211			instr->len -= blocksize;
212		} else {
213			instr->addr += priv->page_size;
214			instr->len -= priv->page_size;
215		}
216	}
217	mutex_unlock(&priv->lock);
218
219	return 0;
220}
221
222/*
223 * Read from the DataFlash device.
224 *   from   : Start offset in flash device
225 *   len    : Amount to read
226 *   retlen : About of data actually read
227 *   buf    : Buffer containing the data
228 */
229static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
230			       size_t *retlen, u_char *buf)
231{
232	struct dataflash	*priv = mtd->priv;
233	struct spi_transfer	x[2] = { };
234	struct spi_message	msg;
235	unsigned int		addr;
236	u8			*command;
237	int			status;
238
239	dev_dbg(&priv->spi->dev, "read 0x%x..0x%x\n",
240		  (unsigned int)from, (unsigned int)(from + len));
241
242	/* Calculate flash page/byte address */
243	addr = (((unsigned)from / priv->page_size) << priv->page_offset)
244		+ ((unsigned)from % priv->page_size);
245
246	command = priv->command;
247
248	dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n",
249		command[0], command[1], command[2], command[3]);
250
251	spi_message_init(&msg);
252
253	x[0].tx_buf = command;
254	x[0].len = 8;
255	spi_message_add_tail(&x[0], &msg);
256
257	x[1].rx_buf = buf;
258	x[1].len = len;
259	spi_message_add_tail(&x[1], &msg);
260
261	mutex_lock(&priv->lock);
262
263	/* Continuous read, max clock = f(car) which may be less than
264	 * the peak rate available.  Some chips support commands with
265	 * fewer "don't care" bytes.  Both buffers stay unchanged.
266	 */
267	command[0] = OP_READ_CONTINUOUS;
268	command[1] = (u8)(addr >> 16);
269	command[2] = (u8)(addr >> 8);
270	command[3] = (u8)(addr >> 0);
271	/* plus 4 "don't care" bytes */
272
273	status = spi_sync(priv->spi, &msg);
274	mutex_unlock(&priv->lock);
275
276	if (status >= 0) {
277		*retlen = msg.actual_length - 8;
278		status = 0;
279	} else
280		dev_dbg(&priv->spi->dev, "read %x..%x --> %d\n",
281			(unsigned)from, (unsigned)(from + len),
282			status);
283	return status;
284}
285
286/*
287 * Write to the DataFlash device.
288 *   to     : Start offset in flash device
289 *   len    : Amount to write
290 *   retlen : Amount of data actually written
291 *   buf    : Buffer containing the data
292 */
293static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
294				size_t * retlen, const u_char * buf)
295{
296	struct dataflash	*priv = mtd->priv;
297	struct spi_device	*spi = priv->spi;
298	struct spi_transfer	x[2] = { };
299	struct spi_message	msg;
300	unsigned int		pageaddr, addr, offset, writelen;
301	size_t			remaining = len;
302	u_char			*writebuf = (u_char *) buf;
303	int			status = -EINVAL;
304	u8			*command;
305
306	dev_dbg(&spi->dev, "write 0x%x..0x%x\n",
307		(unsigned int)to, (unsigned int)(to + len));
308
309	spi_message_init(&msg);
310
311	x[0].tx_buf = command = priv->command;
312	x[0].len = 4;
313	spi_message_add_tail(&x[0], &msg);
314
315	pageaddr = ((unsigned)to / priv->page_size);
316	offset = ((unsigned)to % priv->page_size);
317	if (offset + len > priv->page_size)
318		writelen = priv->page_size - offset;
319	else
320		writelen = len;
321
322	mutex_lock(&priv->lock);
323	while (remaining > 0) {
324		dev_dbg(&spi->dev, "write @ %i:%i len=%i\n",
325			pageaddr, offset, writelen);
326
327		/* REVISIT:
328		 * (a) each page in a sector must be rewritten at least
329		 *     once every 10K sibling erase/program operations.
330		 * (b) for pages that are already erased, we could
331		 *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
332		 * (c) WRITE to buffer could be done while waiting for
333		 *     a previous MWRITE/MWERASE to complete ...
334		 * (d) error handling here seems to be mostly missing.
335		 *
336		 * Two persistent bits per page, plus a per-sector counter,
337		 * could support (a) and (b) ... we might consider using
338		 * the second half of sector zero, which is just one block,
339		 * to track that state.  (On AT91, that sector should also
340		 * support boot-from-DataFlash.)
341		 */
342
343		addr = pageaddr << priv->page_offset;
344
345		/* (1) Maybe transfer partial page to Buffer1 */
346		if (writelen != priv->page_size) {
347			command[0] = OP_TRANSFER_BUF1;
348			command[1] = (addr & 0x00FF0000) >> 16;
349			command[2] = (addr & 0x0000FF00) >> 8;
350			command[3] = 0;
351
352			dev_dbg(&spi->dev, "TRANSFER: (%x) %x %x %x\n",
353				command[0], command[1], command[2], command[3]);
354
355			status = spi_sync(spi, &msg);
356			if (status < 0)
357				dev_dbg(&spi->dev, "xfer %u -> %d\n",
358					addr, status);
359
360			(void) dataflash_waitready(priv->spi);
361		}
362
363		/* (2) Program full page via Buffer1 */
364		addr += offset;
365		command[0] = OP_PROGRAM_VIA_BUF1;
366		command[1] = (addr & 0x00FF0000) >> 16;
367		command[2] = (addr & 0x0000FF00) >> 8;
368		command[3] = (addr & 0x000000FF);
369
370		dev_dbg(&spi->dev, "PROGRAM: (%x) %x %x %x\n",
371			command[0], command[1], command[2], command[3]);
372
373		x[1].tx_buf = writebuf;
374		x[1].len = writelen;
375		spi_message_add_tail(x + 1, &msg);
376		status = spi_sync(spi, &msg);
377		spi_transfer_del(x + 1);
378		if (status < 0)
379			dev_dbg(&spi->dev, "pgm %u/%u -> %d\n",
380				addr, writelen, status);
381
382		(void) dataflash_waitready(priv->spi);
383
384
385#ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
386
387		/* (3) Compare to Buffer1 */
388		addr = pageaddr << priv->page_offset;
389		command[0] = OP_COMPARE_BUF1;
390		command[1] = (addr & 0x00FF0000) >> 16;
391		command[2] = (addr & 0x0000FF00) >> 8;
392		command[3] = 0;
393
394		dev_dbg(&spi->dev, "COMPARE: (%x) %x %x %x\n",
395			command[0], command[1], command[2], command[3]);
396
397		status = spi_sync(spi, &msg);
398		if (status < 0)
399			dev_dbg(&spi->dev, "compare %u -> %d\n",
400				addr, status);
401
402		status = dataflash_waitready(priv->spi);
403
404		/* Check result of the compare operation */
405		if (status & (1 << 6)) {
406			dev_err(&spi->dev, "compare page %u, err %d\n",
407				pageaddr, status);
408			remaining = 0;
409			status = -EIO;
410			break;
411		} else
412			status = 0;
413
414#endif	/* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
415
416		remaining = remaining - writelen;
417		pageaddr++;
418		offset = 0;
419		writebuf += writelen;
420		*retlen += writelen;
421
422		if (remaining > priv->page_size)
423			writelen = priv->page_size;
424		else
425			writelen = remaining;
426	}
427	mutex_unlock(&priv->lock);
428
429	return status;
430}
431
432/* ......................................................................... */
433
434#ifdef CONFIG_MTD_DATAFLASH_OTP
435
436static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len,
437				  size_t *retlen, struct otp_info *info)
438{
439	/* Report both blocks as identical:  bytes 0..64, locked.
440	 * Unless the user block changed from all-ones, we can't
441	 * tell whether it's still writable; so we assume it isn't.
442	 */
443	info->start = 0;
444	info->length = 64;
445	info->locked = 1;
446	*retlen = sizeof(*info);
447	return 0;
448}
449
450static ssize_t otp_read(struct spi_device *spi, unsigned base,
451		u8 *buf, loff_t off, size_t len)
452{
453	struct spi_message	m;
454	size_t			l;
455	u8			*scratch;
456	struct spi_transfer	t;
457	int			status;
458
459	if (off > 64)
460		return -EINVAL;
461
462	if ((off + len) > 64)
463		len = 64 - off;
464
465	spi_message_init(&m);
466
467	l = 4 + base + off + len;
468	scratch = kzalloc(l, GFP_KERNEL);
469	if (!scratch)
470		return -ENOMEM;
471
472	/* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
473	 * IN:  ignore 4 bytes, data bytes 0..N (max 127)
474	 */
475	scratch[0] = OP_READ_SECURITY;
476
477	memset(&t, 0, sizeof t);
478	t.tx_buf = scratch;
479	t.rx_buf = scratch;
480	t.len = l;
481	spi_message_add_tail(&t, &m);
482
483	dataflash_waitready(spi);
484
485	status = spi_sync(spi, &m);
486	if (status >= 0) {
487		memcpy(buf, scratch + 4 + base + off, len);
488		status = len;
489	}
490
491	kfree(scratch);
492	return status;
493}
494
495static int dataflash_read_fact_otp(struct mtd_info *mtd,
496		loff_t from, size_t len, size_t *retlen, u_char *buf)
497{
498	struct dataflash	*priv = mtd->priv;
499	int			status;
500
501	/* 64 bytes, from 0..63 ... start at 64 on-chip */
502	mutex_lock(&priv->lock);
503	status = otp_read(priv->spi, 64, buf, from, len);
504	mutex_unlock(&priv->lock);
505
506	if (status < 0)
507		return status;
508	*retlen = status;
509	return 0;
510}
511
512static int dataflash_read_user_otp(struct mtd_info *mtd,
513		loff_t from, size_t len, size_t *retlen, u_char *buf)
514{
515	struct dataflash	*priv = mtd->priv;
516	int			status;
517
518	/* 64 bytes, from 0..63 ... start at 0 on-chip */
519	mutex_lock(&priv->lock);
520	status = otp_read(priv->spi, 0, buf, from, len);
521	mutex_unlock(&priv->lock);
522
523	if (status < 0)
524		return status;
525	*retlen = status;
526	return 0;
527}
528
529static int dataflash_write_user_otp(struct mtd_info *mtd,
530		loff_t from, size_t len, size_t *retlen, u_char *buf)
531{
532	struct spi_message	m;
533	const size_t		l = 4 + 64;
534	u8			*scratch;
535	struct spi_transfer	t;
536	struct dataflash	*priv = mtd->priv;
537	int			status;
538
539	if (from >= 64) {
540		/*
541		 * Attempting to write beyond the end of OTP memory,
542		 * no data can be written.
543		 */
544		*retlen = 0;
545		return 0;
546	}
547
548	/* Truncate the write to fit into OTP memory. */
549	if ((from + len) > 64)
550		len = 64 - from;
551
552	/* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
553	 * IN:  ignore all
554	 */
555	scratch = kzalloc(l, GFP_KERNEL);
556	if (!scratch)
557		return -ENOMEM;
558	scratch[0] = OP_WRITE_SECURITY;
559	memcpy(scratch + 4 + from, buf, len);
560
561	spi_message_init(&m);
562
563	memset(&t, 0, sizeof t);
564	t.tx_buf = scratch;
565	t.len = l;
566	spi_message_add_tail(&t, &m);
567
568	/* Write the OTP bits, if they've not yet been written.
569	 * This modifies SRAM buffer1.
570	 */
571	mutex_lock(&priv->lock);
572	dataflash_waitready(priv->spi);
573	status = spi_sync(priv->spi, &m);
574	mutex_unlock(&priv->lock);
575
576	kfree(scratch);
577
578	if (status >= 0) {
579		status = 0;
580		*retlen = len;
581	}
582	return status;
583}
584
585static char *otp_setup(struct mtd_info *device, char revision)
586{
587	device->_get_fact_prot_info = dataflash_get_otp_info;
588	device->_read_fact_prot_reg = dataflash_read_fact_otp;
589	device->_get_user_prot_info = dataflash_get_otp_info;
590	device->_read_user_prot_reg = dataflash_read_user_otp;
591
592	/* rev c parts (at45db321c and at45db1281 only!) use a
593	 * different write procedure; not (yet?) implemented.
594	 */
595	if (revision > 'c')
596		device->_write_user_prot_reg = dataflash_write_user_otp;
597
598	return ", OTP";
599}
600
601#else
602
603static char *otp_setup(struct mtd_info *device, char revision)
604{
605	return " (OTP)";
606}
607
608#endif
609
610/* ......................................................................... */
611
612/*
613 * Register DataFlash device with MTD subsystem.
614 */
615static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
616			     int pagesize, int pageoffset, char revision)
617{
618	struct dataflash		*priv;
619	struct mtd_info			*device;
620	struct flash_platform_data	*pdata = dev_get_platdata(&spi->dev);
621	char				*otp_tag = "";
622	int				err = 0;
623
624	priv = kzalloc(sizeof *priv, GFP_KERNEL);
625	if (!priv)
626		return -ENOMEM;
627
628	mutex_init(&priv->lock);
629	priv->spi = spi;
630	priv->page_size = pagesize;
631	priv->page_offset = pageoffset;
632
633	/* name must be usable with cmdlinepart */
634	sprintf(priv->name, "spi%d.%d-%s",
635			spi->master->bus_num, spi->chip_select,
636			name);
637
638	device = &priv->mtd;
639	device->name = (pdata && pdata->name) ? pdata->name : priv->name;
640	device->size = nr_pages * pagesize;
641	device->erasesize = pagesize;
642	device->writesize = pagesize;
643	device->type = MTD_DATAFLASH;
644	device->flags = MTD_WRITEABLE;
645	device->_erase = dataflash_erase;
646	device->_read = dataflash_read;
647	device->_write = dataflash_write;
648	device->priv = priv;
649
650	device->dev.parent = &spi->dev;
651	mtd_set_of_node(device, spi->dev.of_node);
652
653	if (revision >= 'c')
654		otp_tag = otp_setup(device, revision);
655
656	dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
657			name, (long long)((device->size + 1023) >> 10),
658			pagesize, otp_tag);
659	spi_set_drvdata(spi, priv);
660
661	err = mtd_device_register(device,
662			pdata ? pdata->parts : NULL,
663			pdata ? pdata->nr_parts : 0);
664
665	if (!err)
666		return 0;
667
668	kfree(priv);
669	return err;
670}
671
672static inline int add_dataflash(struct spi_device *spi, char *name,
673				int nr_pages, int pagesize, int pageoffset)
674{
675	return add_dataflash_otp(spi, name, nr_pages, pagesize,
676			pageoffset, 0);
677}
678
679struct flash_info {
680	char		*name;
681
682	/* JEDEC id has a high byte of zero plus three data bytes:
683	 * the manufacturer id, then a two byte device id.
684	 */
685	u64		jedec_id;
686
687	/* The size listed here is what works with OP_ERASE_PAGE. */
688	unsigned	nr_pages;
689	u16		pagesize;
690	u16		pageoffset;
691
692	u16		flags;
693#define SUP_EXTID	0x0004		/* supports extended ID data */
694#define SUP_POW2PS	0x0002		/* supports 2^N byte pages */
695#define IS_POW2PS	0x0001		/* uses 2^N byte pages */
696};
697
698static struct flash_info dataflash_data[] = {
699
700	/*
701	 * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
702	 * one with IS_POW2PS and the other without.  The entry with the
703	 * non-2^N byte page size can't name exact chip revisions without
704	 * losing backwards compatibility for cmdlinepart.
705	 *
706	 * These newer chips also support 128-byte security registers (with
707	 * 64 bytes one-time-programmable) and software write-protection.
708	 */
709	{ "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
710	{ "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
711
712	{ "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
713	{ "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
714
715	{ "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
716	{ "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
717
718	{ "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
719	{ "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
720
721	{ "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
722	{ "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
723
724	{ "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},		/* rev C */
725
726	{ "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
727	{ "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
728
729	{ "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
730	{ "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
731
732	{ "AT45DB641E",  0x1f28000100ULL, 32768, 264, 9, SUP_EXTID | SUP_POW2PS},
733	{ "at45db641e",  0x1f28000100ULL, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS},
734};
735
736static struct flash_info *jedec_lookup(struct spi_device *spi,
737				       u64 jedec, bool use_extid)
738{
739	struct flash_info *info;
740	int status;
741
742	for (info = dataflash_data;
743	     info < dataflash_data + ARRAY_SIZE(dataflash_data);
744	     info++) {
745		if (use_extid && !(info->flags & SUP_EXTID))
746			continue;
747
748		if (info->jedec_id == jedec) {
749			dev_dbg(&spi->dev, "OTP, sector protect%s\n",
750				(info->flags & SUP_POW2PS) ?
751				", binary pagesize" : "");
752			if (info->flags & SUP_POW2PS) {
753				status = dataflash_status(spi);
754				if (status < 0) {
755					dev_dbg(&spi->dev, "status error %d\n",
756						status);
757					return ERR_PTR(status);
758				}
759				if (status & 0x1) {
760					if (info->flags & IS_POW2PS)
761						return info;
762				} else {
763					if (!(info->flags & IS_POW2PS))
764						return info;
765				}
766			} else
767				return info;
768		}
769	}
770
771	return ERR_PTR(-ENODEV);
772}
773
774static struct flash_info *jedec_probe(struct spi_device *spi)
775{
776	int ret;
777	u8 code = OP_READ_ID;
778	u64 jedec;
779	u8 id[sizeof(jedec)] = {0};
780	const unsigned int id_size = 5;
781	struct flash_info *info;
782
783	/*
784	 * JEDEC also defines an optional "extended device information"
785	 * string for after vendor-specific data, after the three bytes
786	 * we use here.  Supporting some chips might require using it.
787	 *
788	 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
789	 * That's not an error; only rev C and newer chips handle it, and
790	 * only Atmel sells these chips.
791	 */
792	ret = spi_write_then_read(spi, &code, 1, id, id_size);
793	if (ret < 0) {
794		dev_dbg(&spi->dev, "error %d reading JEDEC ID\n", ret);
795		return ERR_PTR(ret);
796	}
797
798	if (id[0] != CFI_MFR_ATMEL)
799		return NULL;
800
801	jedec = be64_to_cpup((__be64 *)id);
802
803	/*
804	 * First, try to match device using extended device
805	 * information
806	 */
807	info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_EXTID, true);
808	if (!IS_ERR(info))
809		return info;
810	/*
811	 * If that fails, make another pass using regular ID
812	 * information
813	 */
814	info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_ID, false);
815	if (!IS_ERR(info))
816		return info;
817	/*
818	 * Treat other chips as errors ... we won't know the right page
819	 * size (it might be binary) even when we can tell which density
820	 * class is involved (legacy chip id scheme).
821	 */
822	dev_warn(&spi->dev, "JEDEC id %016llx not handled\n", jedec);
823	return ERR_PTR(-ENODEV);
824}
825
826/*
827 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
828 * or else the ID code embedded in the status bits:
829 *
830 *   Device      Density         ID code          #Pages PageSize  Offset
831 *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
832 *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
833 *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
834 *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
835 *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
836 *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
837 *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
838 *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
839 */
840static int dataflash_probe(struct spi_device *spi)
841{
842	int status;
843	struct flash_info	*info;
844
845	/*
846	 * Try to detect dataflash by JEDEC ID.
847	 * If it succeeds we know we have either a C or D part.
848	 * D will support power of 2 pagesize option.
849	 * Both support the security register, though with different
850	 * write procedures.
851	 */
852	info = jedec_probe(spi);
853	if (IS_ERR(info))
854		return PTR_ERR(info);
855	if (info != NULL)
856		return add_dataflash_otp(spi, info->name, info->nr_pages,
857				info->pagesize, info->pageoffset,
858				(info->flags & SUP_POW2PS) ? 'd' : 'c');
859
860	/*
861	 * Older chips support only legacy commands, identifing
862	 * capacity using bits in the status byte.
863	 */
864	status = dataflash_status(spi);
865	if (status <= 0 || status == 0xff) {
866		dev_dbg(&spi->dev, "status error %d\n", status);
867		if (status == 0 || status == 0xff)
868			status = -ENODEV;
869		return status;
870	}
871
872	/* if there's a device there, assume it's dataflash.
873	 * board setup should have set spi->max_speed_max to
874	 * match f(car) for continuous reads, mode 0 or 3.
875	 */
876	switch (status & 0x3c) {
877	case 0x0c:	/* 0 0 1 1 x x */
878		status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
879		break;
880	case 0x14:	/* 0 1 0 1 x x */
881		status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
882		break;
883	case 0x1c:	/* 0 1 1 1 x x */
884		status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
885		break;
886	case 0x24:	/* 1 0 0 1 x x */
887		status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
888		break;
889	case 0x2c:	/* 1 0 1 1 x x */
890		status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
891		break;
892	case 0x34:	/* 1 1 0 1 x x */
893		status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
894		break;
895	case 0x38:	/* 1 1 1 x x x */
896	case 0x3c:
897		status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
898		break;
899	/* obsolete AT45DB1282 not (yet?) supported */
900	default:
901		dev_info(&spi->dev, "unsupported device (%x)\n",
902				status & 0x3c);
903		status = -ENODEV;
904	}
905
906	if (status < 0)
907		dev_dbg(&spi->dev, "add_dataflash --> %d\n", status);
908
909	return status;
910}
911
912static int dataflash_remove(struct spi_device *spi)
913{
914	struct dataflash	*flash = spi_get_drvdata(spi);
915	int			status;
916
917	dev_dbg(&spi->dev, "remove\n");
918
919	status = mtd_device_unregister(&flash->mtd);
920	if (status == 0)
921		kfree(flash);
922	return status;
923}
924
925static struct spi_driver dataflash_driver = {
926	.driver = {
927		.name		= "mtd_dataflash",
928		.of_match_table = of_match_ptr(dataflash_dt_ids),
929	},
930
931	.probe		= dataflash_probe,
932	.remove		= dataflash_remove,
933
934	/* FIXME:  investigate suspend and resume... */
935};
936
937module_spi_driver(dataflash_driver);
938
939MODULE_LICENSE("GPL");
940MODULE_AUTHOR("Andrew Victor, David Brownell");
941MODULE_DESCRIPTION("MTD DataFlash driver");
942MODULE_ALIAS("spi:mtd_dataflash");