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v5.9
 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *
 4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
 5 */
 6
 7#ifndef __FSL_PAMU_DOMAIN_H
 8#define __FSL_PAMU_DOMAIN_H
 9
10#include "fsl_pamu.h"
11
12struct dma_window {
13	phys_addr_t paddr;
14	u64 size;
15	int valid;
16	int prot;
17};
18
19struct fsl_dma_domain {
20	/*
21	 * Indicates the geometry size for the domain.
22	 * This would be set when the geometry is
23	 * configured for the domain.
24	 */
25	dma_addr_t			geom_size;
26	/*
27	 * Number of windows assocaited with this domain.
28	 * During domain initialization, it is set to the
29	 * the maximum number of subwindows allowed for a LIODN.
30	 * Minimum value for this is 1 indicating a single PAMU
31	 * window, without any sub windows. Value can be set/
32	 * queried by set_attr/get_attr API for DOMAIN_ATTR_WINDOWS.
33	 * Value can only be set once the geometry has been configured.
34	 */
35	u32				win_cnt;
36	/*
37	 * win_arr contains information of the configured
38	 * windows for a domain. This is allocated only
39	 * when the number of windows for the domain are
40	 * set.
41	 */
42	struct dma_window		*win_arr;
43	/* list of devices associated with the domain */
44	struct list_head		devices;
45	/* dma_domain states:
46	 * mapped - A particular mapping has been created
47	 * within the configured geometry.
48	 * enabled - DMA has been enabled for the given
49	 * domain. This translates to setting of the
50	 * valid bit for the primary PAACE in the PAMU
51	 * PAACT table. Domain geometry should be set and
52	 * it must have a valid mapping before DMA can be
53	 * enabled for it.
54	 *
55	 */
56	int				mapped;
57	int				enabled;
58	/* stash_id obtained from the stash attribute details */
59	u32				stash_id;
60	struct pamu_stash_attribute	dma_stash;
61	u32				snoop_id;
62	struct iommu_domain		iommu_domain;
63	spinlock_t			domain_lock;
64};
65
66/* domain-device relationship */
67struct device_domain_info {
68	struct list_head link;	/* link to domain siblings */
69	struct device *dev;
70	u32 liodn;
71	struct fsl_dma_domain *domain; /* pointer to domain */
72};
73#endif  /* __FSL_PAMU_DOMAIN_H */
v5.4
 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 *
 4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
 5 */
 6
 7#ifndef __FSL_PAMU_DOMAIN_H
 8#define __FSL_PAMU_DOMAIN_H
 9
10#include "fsl_pamu.h"
11
12struct dma_window {
13	phys_addr_t paddr;
14	u64 size;
15	int valid;
16	int prot;
17};
18
19struct fsl_dma_domain {
20	/*
21	 * Indicates the geometry size for the domain.
22	 * This would be set when the geometry is
23	 * configured for the domain.
24	 */
25	dma_addr_t			geom_size;
26	/*
27	 * Number of windows assocaited with this domain.
28	 * During domain initialization, it is set to the
29	 * the maximum number of subwindows allowed for a LIODN.
30	 * Minimum value for this is 1 indicating a single PAMU
31	 * window, without any sub windows. Value can be set/
32	 * queried by set_attr/get_attr API for DOMAIN_ATTR_WINDOWS.
33	 * Value can only be set once the geometry has been configured.
34	 */
35	u32				win_cnt;
36	/*
37	 * win_arr contains information of the configured
38	 * windows for a domain. This is allocated only
39	 * when the number of windows for the domain are
40	 * set.
41	 */
42	struct dma_window		*win_arr;
43	/* list of devices associated with the domain */
44	struct list_head		devices;
45	/* dma_domain states:
46	 * mapped - A particular mapping has been created
47	 * within the configured geometry.
48	 * enabled - DMA has been enabled for the given
49	 * domain. This translates to setting of the
50	 * valid bit for the primary PAACE in the PAMU
51	 * PAACT table. Domain geometry should be set and
52	 * it must have a valid mapping before DMA can be
53	 * enabled for it.
54	 *
55	 */
56	int				mapped;
57	int				enabled;
58	/* stash_id obtained from the stash attribute details */
59	u32				stash_id;
60	struct pamu_stash_attribute	dma_stash;
61	u32				snoop_id;
62	struct iommu_domain		iommu_domain;
63	spinlock_t			domain_lock;
64};
65
66/* domain-device relationship */
67struct device_domain_info {
68	struct list_head link;	/* link to domain siblings */
69	struct device *dev;
70	u32 liodn;
71	struct fsl_dma_domain *domain; /* pointer to domain */
72};
73#endif  /* __FSL_PAMU_DOMAIN_H */