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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Bestcomm FEC RX task microcode
4 *
5 * Copyright (c) 2004 Freescale Semiconductor, Inc.
6 *
7 * Automatically created based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
8 * on Tue Mar 22 11:19:38 2005 GMT
9 */
10
11#include <asm/types.h>
12
13/*
14 * The header consists of the following fields:
15 * u32 magic;
16 * u8 desc_size;
17 * u8 var_size;
18 * u8 inc_size;
19 * u8 first_var;
20 * u8 reserved[8];
21 *
22 * The size fields contain the number of 32-bit words.
23 */
24
25u32 bcom_fec_rx_task[] = {
26 /* header */
27 0x4243544b,
28 0x18060709,
29 0x00000000,
30 0x00000000,
31
32 /* Task descriptors */
33 0x808220e3, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc4, idx1 += inc3 */
34 0x10601010, /* DRD1A: var4 = var2; FN=0 MORE init=3 WS=0 RS=0 */
35 0xb8800264, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc4, idx3 += inc4 */
36 0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
37 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
38 0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */
39 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
40 0xb8c58029, /* LCD: idx3 = *(idx1 + var00000015); idx3 once var0; idx3 += inc5 */
41 0x60000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=0 RS=0 */
42 0x088cf8cc, /* DRD2B1: idx2 = EU3(); EU3(idx3,var12) */
43 0x991982f2, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var11; idx2 += inc6, idx3 += inc2 */
44 0x006acf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=1 RS=1 */
45 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
46 0x9999802d, /* LCD: idx3 = idx3; idx3 once var0; idx3 += inc5 */
47 0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
48 0x034cfc4e, /* DRD2B1: var13 = EU3(); EU3(*idx1,var14) */
49 0x00008868, /* DRD1A: idx2 = var13; FN=0 init=0 WS=0 RS=0 */
50 0x99198341, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var13; idx2 += inc0, idx3 += inc1 */
51 0x007ecf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=3 RS=3 */
52 0x99198272, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var9; idx2 += inc6, idx3 += inc2 */
53 0x046acf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=3 WS=1 RS=1 */
54 0x9819002d, /* LCD: idx2 = idx0; idx2 once var0; idx2 += inc5 */
55 0x0060c790, /* DRD1A: *idx1 = *idx2; FN=0 init=3 WS=0 RS=0 */
56 0x000001f8, /* NOP */
57
58 /* VAR[9]-VAR[14] */
59 0x40000000,
60 0x7fff7fff,
61 0x00000000,
62 0x00000003,
63 0x40000008,
64 0x43ffffff,
65
66 /* INC[0]-INC[6] */
67 0x40000000,
68 0xe0000000,
69 0xe0000000,
70 0xa0000008,
71 0x20000000,
72 0x00000000,
73 0x4000ffff,
74};
75
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Bestcomm FEC RX task microcode
4 *
5 * Copyright (c) 2004 Freescale Semiconductor, Inc.
6 *
7 * Automatically created based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
8 * on Tue Mar 22 11:19:38 2005 GMT
9 */
10
11#include <asm/types.h>
12
13/*
14 * The header consists of the following fields:
15 * u32 magic;
16 * u8 desc_size;
17 * u8 var_size;
18 * u8 inc_size;
19 * u8 first_var;
20 * u8 reserved[8];
21 *
22 * The size fields contain the number of 32-bit words.
23 */
24
25u32 bcom_fec_rx_task[] = {
26 /* header */
27 0x4243544b,
28 0x18060709,
29 0x00000000,
30 0x00000000,
31
32 /* Task descriptors */
33 0x808220e3, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc4, idx1 += inc3 */
34 0x10601010, /* DRD1A: var4 = var2; FN=0 MORE init=3 WS=0 RS=0 */
35 0xb8800264, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc4, idx3 += inc4 */
36 0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
37 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
38 0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */
39 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
40 0xb8c58029, /* LCD: idx3 = *(idx1 + var00000015); idx3 once var0; idx3 += inc5 */
41 0x60000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=0 RS=0 */
42 0x088cf8cc, /* DRD2B1: idx2 = EU3(); EU3(idx3,var12) */
43 0x991982f2, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var11; idx2 += inc6, idx3 += inc2 */
44 0x006acf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=1 RS=1 */
45 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
46 0x9999802d, /* LCD: idx3 = idx3; idx3 once var0; idx3 += inc5 */
47 0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
48 0x034cfc4e, /* DRD2B1: var13 = EU3(); EU3(*idx1,var14) */
49 0x00008868, /* DRD1A: idx2 = var13; FN=0 init=0 WS=0 RS=0 */
50 0x99198341, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var13; idx2 += inc0, idx3 += inc1 */
51 0x007ecf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=3 RS=3 */
52 0x99198272, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var9; idx2 += inc6, idx3 += inc2 */
53 0x046acf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=3 WS=1 RS=1 */
54 0x9819002d, /* LCD: idx2 = idx0; idx2 once var0; idx2 += inc5 */
55 0x0060c790, /* DRD1A: *idx1 = *idx2; FN=0 init=3 WS=0 RS=0 */
56 0x000001f8, /* NOP */
57
58 /* VAR[9]-VAR[14] */
59 0x40000000,
60 0x7fff7fff,
61 0x00000000,
62 0x00000003,
63 0x40000008,
64 0x43ffffff,
65
66 /* INC[0]-INC[6] */
67 0x40000000,
68 0xe0000000,
69 0xe0000000,
70 0xa0000008,
71 0x20000000,
72 0x00000000,
73 0x4000ffff,
74};
75