Loading...
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Public definitions for the CAAM/QI (Queue Interface) backend.
4 *
5 * Copyright 2013-2016 Freescale Semiconductor, Inc.
6 * Copyright 2016-2017, 2020 NXP
7 */
8
9#ifndef __QI_H__
10#define __QI_H__
11
12#include <soc/fsl/qman.h>
13#include "compat.h"
14#include "desc.h"
15#include "desc_constr.h"
16
17/* Length of a single buffer in the QI driver memory cache */
18#define CAAM_QI_MEMCACHE_SIZE 768
19
20extern bool caam_congested __read_mostly;
21
22/*
23 * This is the request structure the driver application should fill while
24 * submitting a job to driver.
25 */
26struct caam_drv_req;
27
28/*
29 * caam_qi_cbk - application's callback function invoked by the driver when the
30 * request has been successfully processed.
31 * @drv_req: original request that was submitted
32 * @status: completion status of request (0 - success, non-zero - error code)
33 */
34typedef void (*caam_qi_cbk)(struct caam_drv_req *drv_req, u32 status);
35
36enum optype {
37 ENCRYPT,
38 DECRYPT,
39 NUM_OP
40};
41
42/**
43 * caam_drv_ctx - CAAM/QI backend driver context
44 *
45 * The jobs are processed by the driver against a driver context.
46 * With every cryptographic context, a driver context is attached.
47 * The driver context contains data for private use by driver.
48 * For the applications, this is an opaque structure.
49 *
50 * @prehdr: preheader placed before shrd desc
51 * @sh_desc: shared descriptor
52 * @context_a: shared descriptor dma address
53 * @req_fq: to-CAAM request frame queue
54 * @rsp_fq: from-CAAM response frame queue
55 * @refcnt: reference counter incremented for each frame enqueued in to-CAAM FQ
56 * @cpu: cpu on which to receive CAAM response
57 * @op_type: operation type
58 * @qidev: device pointer for CAAM/QI backend
59 */
60struct caam_drv_ctx {
61 u32 prehdr[2];
62 u32 sh_desc[MAX_SDLEN];
63 dma_addr_t context_a;
64 struct qman_fq *req_fq;
65 struct qman_fq *rsp_fq;
66 refcount_t refcnt;
67 int cpu;
68 enum optype op_type;
69 struct device *qidev;
70} ____cacheline_aligned;
71
72/**
73 * caam_drv_req - The request structure the driver application should fill while
74 * submitting a job to driver.
75 * @fd_sgt: QMan S/G pointing to output (fd_sgt[0]) and input (fd_sgt[1])
76 * buffers.
77 * @cbk: callback function to invoke when job is completed
78 * @app_ctx: arbitrary context attached with request by the application
79 *
80 * The fields mentioned below should not be used by application.
81 * These are for private use by driver.
82 *
83 * @hdr__: linked list header to maintain list of outstanding requests to CAAM
84 * @hwaddr: DMA address for the S/G table.
85 */
86struct caam_drv_req {
87 struct qm_sg_entry fd_sgt[2];
88 struct caam_drv_ctx *drv_ctx;
89 caam_qi_cbk cbk;
90 void *app_ctx;
91} ____cacheline_aligned;
92
93/**
94 * caam_drv_ctx_init - Initialise a CAAM/QI driver context
95 *
96 * A CAAM/QI driver context must be attached with each cryptographic context.
97 * This function allocates memory for CAAM/QI context and returns a handle to
98 * the application. This handle must be submitted along with each enqueue
99 * request to the driver by the application.
100 *
101 * @cpu: CPU where the application prefers to the driver to receive CAAM
102 * responses. The request completion callback would be issued from this
103 * CPU.
104 * @sh_desc: shared descriptor pointer to be attached with CAAM/QI driver
105 * context.
106 *
107 * Returns a driver context on success or negative error code on failure.
108 */
109struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev, int *cpu,
110 u32 *sh_desc);
111
112/**
113 * caam_qi_enqueue - Submit a request to QI backend driver.
114 *
115 * The request structure must be properly filled as described above.
116 *
117 * @qidev: device pointer for QI backend
118 * @req: CAAM QI request structure
119 *
120 * Returns 0 on success or negative error code on failure.
121 */
122int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req);
123
124/**
125 * caam_drv_ctx_busy - Check if there are too many jobs pending with CAAM
126 * or too many CAAM responses are pending to be processed.
127 * @drv_ctx: driver context for which job is to be submitted
128 *
129 * Returns caam congestion status 'true/false'
130 */
131bool caam_drv_ctx_busy(struct caam_drv_ctx *drv_ctx);
132
133/**
134 * caam_drv_ctx_update - Update QI driver context
135 *
136 * Invoked when shared descriptor is required to be change in driver context.
137 *
138 * @drv_ctx: driver context to be updated
139 * @sh_desc: new shared descriptor pointer to be updated in QI driver context
140 *
141 * Returns 0 on success or negative error code on failure.
142 */
143int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc);
144
145/**
146 * caam_drv_ctx_rel - Release a QI driver context
147 * @drv_ctx: context to be released
148 */
149void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx);
150
151int caam_qi_init(struct platform_device *pdev);
152
153/**
154 * qi_cache_alloc - Allocate buffers from CAAM-QI cache
155 *
156 * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) needs data which has
157 * to be allocated on the hotpath. Instead of using malloc, one can use the
158 * services of the CAAM QI memory cache (backed by kmem_cache). The buffers
159 * will have a size of 256B, which is sufficient for hosting 16 SG entries.
160 *
161 * @flags: flags that would be used for the equivalent malloc(..) call
162 *
163 * Returns a pointer to a retrieved buffer on success or NULL on failure.
164 */
165void *qi_cache_alloc(gfp_t flags);
166
167/**
168 * qi_cache_free - Frees buffers allocated from CAAM-QI cache
169 *
170 * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) no longer needs
171 * the buffer previously allocated by a qi_cache_alloc call.
172 * No checking is being done, the call is a passthrough call to
173 * kmem_cache_free(...)
174 *
175 * @obj: object previously allocated using qi_cache_alloc()
176 */
177void qi_cache_free(void *obj);
178
179#endif /* __QI_H__ */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Public definitions for the CAAM/QI (Queue Interface) backend.
4 *
5 * Copyright 2013-2016 Freescale Semiconductor, Inc.
6 * Copyright 2016-2017 NXP
7 */
8
9#ifndef __QI_H__
10#define __QI_H__
11
12#include <soc/fsl/qman.h>
13#include "compat.h"
14#include "desc.h"
15#include "desc_constr.h"
16
17/* Length of a single buffer in the QI driver memory cache */
18#define CAAM_QI_MEMCACHE_SIZE 768
19
20extern bool caam_congested __read_mostly;
21
22/*
23 * This is the request structure the driver application should fill while
24 * submitting a job to driver.
25 */
26struct caam_drv_req;
27
28/*
29 * caam_qi_cbk - application's callback function invoked by the driver when the
30 * request has been successfully processed.
31 * @drv_req: original request that was submitted
32 * @status: completion status of request (0 - success, non-zero - error code)
33 */
34typedef void (*caam_qi_cbk)(struct caam_drv_req *drv_req, u32 status);
35
36enum optype {
37 ENCRYPT,
38 DECRYPT,
39 NUM_OP
40};
41
42/**
43 * caam_drv_ctx - CAAM/QI backend driver context
44 *
45 * The jobs are processed by the driver against a driver context.
46 * With every cryptographic context, a driver context is attached.
47 * The driver context contains data for private use by driver.
48 * For the applications, this is an opaque structure.
49 *
50 * @prehdr: preheader placed before shrd desc
51 * @sh_desc: shared descriptor
52 * @context_a: shared descriptor dma address
53 * @req_fq: to-CAAM request frame queue
54 * @rsp_fq: from-CAAM response frame queue
55 * @cpu: cpu on which to receive CAAM response
56 * @op_type: operation type
57 * @qidev: device pointer for CAAM/QI backend
58 */
59struct caam_drv_ctx {
60 u32 prehdr[2];
61 u32 sh_desc[MAX_SDLEN];
62 dma_addr_t context_a;
63 struct qman_fq *req_fq;
64 struct qman_fq *rsp_fq;
65 int cpu;
66 enum optype op_type;
67 struct device *qidev;
68} ____cacheline_aligned;
69
70/**
71 * caam_drv_req - The request structure the driver application should fill while
72 * submitting a job to driver.
73 * @fd_sgt: QMan S/G pointing to output (fd_sgt[0]) and input (fd_sgt[1])
74 * buffers.
75 * @cbk: callback function to invoke when job is completed
76 * @app_ctx: arbitrary context attached with request by the application
77 *
78 * The fields mentioned below should not be used by application.
79 * These are for private use by driver.
80 *
81 * @hdr__: linked list header to maintain list of outstanding requests to CAAM
82 * @hwaddr: DMA address for the S/G table.
83 */
84struct caam_drv_req {
85 struct qm_sg_entry fd_sgt[2];
86 struct caam_drv_ctx *drv_ctx;
87 caam_qi_cbk cbk;
88 void *app_ctx;
89} ____cacheline_aligned;
90
91/**
92 * caam_drv_ctx_init - Initialise a CAAM/QI driver context
93 *
94 * A CAAM/QI driver context must be attached with each cryptographic context.
95 * This function allocates memory for CAAM/QI context and returns a handle to
96 * the application. This handle must be submitted along with each enqueue
97 * request to the driver by the application.
98 *
99 * @cpu: CPU where the application prefers to the driver to receive CAAM
100 * responses. The request completion callback would be issued from this
101 * CPU.
102 * @sh_desc: shared descriptor pointer to be attached with CAAM/QI driver
103 * context.
104 *
105 * Returns a driver context on success or negative error code on failure.
106 */
107struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev, int *cpu,
108 u32 *sh_desc);
109
110/**
111 * caam_qi_enqueue - Submit a request to QI backend driver.
112 *
113 * The request structure must be properly filled as described above.
114 *
115 * @qidev: device pointer for QI backend
116 * @req: CAAM QI request structure
117 *
118 * Returns 0 on success or negative error code on failure.
119 */
120int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req);
121
122/**
123 * caam_drv_ctx_busy - Check if there are too many jobs pending with CAAM
124 * or too many CAAM responses are pending to be processed.
125 * @drv_ctx: driver context for which job is to be submitted
126 *
127 * Returns caam congestion status 'true/false'
128 */
129bool caam_drv_ctx_busy(struct caam_drv_ctx *drv_ctx);
130
131/**
132 * caam_drv_ctx_update - Update QI driver context
133 *
134 * Invoked when shared descriptor is required to be change in driver context.
135 *
136 * @drv_ctx: driver context to be updated
137 * @sh_desc: new shared descriptor pointer to be updated in QI driver context
138 *
139 * Returns 0 on success or negative error code on failure.
140 */
141int caam_drv_ctx_update(struct caam_drv_ctx *drv_ctx, u32 *sh_desc);
142
143/**
144 * caam_drv_ctx_rel - Release a QI driver context
145 * @drv_ctx: context to be released
146 */
147void caam_drv_ctx_rel(struct caam_drv_ctx *drv_ctx);
148
149int caam_qi_init(struct platform_device *pdev);
150void caam_qi_shutdown(struct device *dev);
151
152/**
153 * qi_cache_alloc - Allocate buffers from CAAM-QI cache
154 *
155 * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) needs data which has
156 * to be allocated on the hotpath. Instead of using malloc, one can use the
157 * services of the CAAM QI memory cache (backed by kmem_cache). The buffers
158 * will have a size of 256B, which is sufficient for hosting 16 SG entries.
159 *
160 * @flags: flags that would be used for the equivalent malloc(..) call
161 *
162 * Returns a pointer to a retrieved buffer on success or NULL on failure.
163 */
164void *qi_cache_alloc(gfp_t flags);
165
166/**
167 * qi_cache_free - Frees buffers allocated from CAAM-QI cache
168 *
169 * Invoked when a user of the CAAM-QI (i.e. caamalg-qi) no longer needs
170 * the buffer previously allocated by a qi_cache_alloc call.
171 * No checking is being done, the call is a passthrough call to
172 * kmem_cache_free(...)
173 *
174 * @obj: object previously allocated using qi_cache_alloc()
175 */
176void qi_cache_free(void *obj);
177
178#endif /* __QI_H__ */