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v5.9
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 1995-2003 Russell King
  4 *               2001-2002 Keith Owens
  5 *     
  6 * Generate definitions needed by assembly language modules.
  7 * This code generates raw asm output which is post-processed to extract
  8 * and format the required data.
  9 */
 10#include <linux/compiler.h>
 11#include <linux/sched.h>
 12#include <linux/mm.h>
 13#include <linux/dma-mapping.h>
 
 
 
 14#include <asm/cacheflush.h>
 15#include <asm/glue-df.h>
 16#include <asm/glue-pf.h>
 17#include <asm/mach/arch.h>
 18#include <asm/thread_info.h>
 19#include <asm/memory.h>
 20#include <asm/mpu.h>
 21#include <asm/procinfo.h>
 22#include <asm/suspend.h>
 23#include <asm/vdso_datapage.h>
 24#include <asm/hardware/cache-l2x0.h>
 25#include <linux/kbuild.h>
 26#include "signal.h"
 27
 28/*
 29 * Make sure that the compiler and target are compatible.
 30 */
 31#if defined(__APCS_26__)
 32#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
 33#endif
 
 
 
 
 
 
 
 
 
 34
 35int main(void)
 36{
 37  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
 38#ifdef CONFIG_STACKPROTECTOR
 39  DEFINE(TSK_STACK_CANARY,	offsetof(struct task_struct, stack_canary));
 40#endif
 41  BLANK();
 42  DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
 43  DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
 44  DEFINE(TI_ADDR_LIMIT,		offsetof(struct thread_info, addr_limit));
 45  DEFINE(TI_TASK,		offsetof(struct thread_info, task));
 46  DEFINE(TI_CPU,		offsetof(struct thread_info, cpu));
 47  DEFINE(TI_CPU_DOMAIN,		offsetof(struct thread_info, cpu_domain));
 48  DEFINE(TI_CPU_SAVE,		offsetof(struct thread_info, cpu_context));
 49  DEFINE(TI_USED_CP,		offsetof(struct thread_info, used_cp));
 50  DEFINE(TI_TP_VALUE,		offsetof(struct thread_info, tp_value));
 51  DEFINE(TI_FPSTATE,		offsetof(struct thread_info, fpstate));
 52#ifdef CONFIG_VFP
 53  DEFINE(TI_VFPSTATE,		offsetof(struct thread_info, vfpstate));
 54#ifdef CONFIG_SMP
 55  DEFINE(VFP_CPU,		offsetof(union vfp_state, hard.cpu));
 56#endif
 57#endif
 58#ifdef CONFIG_ARM_THUMBEE
 59  DEFINE(TI_THUMBEE_STATE,	offsetof(struct thread_info, thumbee_state));
 60#endif
 61#ifdef CONFIG_IWMMXT
 62  DEFINE(TI_IWMMXT_STATE,	offsetof(struct thread_info, fpstate.iwmmxt));
 63#endif
 64#ifdef CONFIG_CRUNCH
 65  DEFINE(TI_CRUNCH_STATE,	offsetof(struct thread_info, crunchstate));
 66#endif
 67#ifdef CONFIG_STACKPROTECTOR_PER_TASK
 68  DEFINE(TI_STACK_CANARY,	offsetof(struct thread_info, stack_canary));
 69#endif
 70  DEFINE(THREAD_SZ_ORDER,	THREAD_SIZE_ORDER);
 71  BLANK();
 72  DEFINE(S_R0,			offsetof(struct pt_regs, ARM_r0));
 73  DEFINE(S_R1,			offsetof(struct pt_regs, ARM_r1));
 74  DEFINE(S_R2,			offsetof(struct pt_regs, ARM_r2));
 75  DEFINE(S_R3,			offsetof(struct pt_regs, ARM_r3));
 76  DEFINE(S_R4,			offsetof(struct pt_regs, ARM_r4));
 77  DEFINE(S_R5,			offsetof(struct pt_regs, ARM_r5));
 78  DEFINE(S_R6,			offsetof(struct pt_regs, ARM_r6));
 79  DEFINE(S_R7,			offsetof(struct pt_regs, ARM_r7));
 80  DEFINE(S_R8,			offsetof(struct pt_regs, ARM_r8));
 81  DEFINE(S_R9,			offsetof(struct pt_regs, ARM_r9));
 82  DEFINE(S_R10,			offsetof(struct pt_regs, ARM_r10));
 83  DEFINE(S_FP,			offsetof(struct pt_regs, ARM_fp));
 84  DEFINE(S_IP,			offsetof(struct pt_regs, ARM_ip));
 85  DEFINE(S_SP,			offsetof(struct pt_regs, ARM_sp));
 86  DEFINE(S_LR,			offsetof(struct pt_regs, ARM_lr));
 87  DEFINE(S_PC,			offsetof(struct pt_regs, ARM_pc));
 88  DEFINE(S_PSR,			offsetof(struct pt_regs, ARM_cpsr));
 89  DEFINE(S_OLD_R0,		offsetof(struct pt_regs, ARM_ORIG_r0));
 90  DEFINE(PT_REGS_SIZE,		sizeof(struct pt_regs));
 91  DEFINE(SVC_DACR,		offsetof(struct svc_pt_regs, dacr));
 92  DEFINE(SVC_ADDR_LIMIT,	offsetof(struct svc_pt_regs, addr_limit));
 93  DEFINE(SVC_REGS_SIZE,		sizeof(struct svc_pt_regs));
 94  BLANK();
 95  DEFINE(SIGFRAME_RC3_OFFSET,	offsetof(struct sigframe, retcode[3]));
 96  DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
 97  BLANK();
 98#ifdef CONFIG_CACHE_L2X0
 99  DEFINE(L2X0_R_PHY_BASE,	offsetof(struct l2x0_regs, phy_base));
100  DEFINE(L2X0_R_AUX_CTRL,	offsetof(struct l2x0_regs, aux_ctrl));
101  DEFINE(L2X0_R_TAG_LATENCY,	offsetof(struct l2x0_regs, tag_latency));
102  DEFINE(L2X0_R_DATA_LATENCY,	offsetof(struct l2x0_regs, data_latency));
103  DEFINE(L2X0_R_FILTER_START,	offsetof(struct l2x0_regs, filter_start));
104  DEFINE(L2X0_R_FILTER_END,	offsetof(struct l2x0_regs, filter_end));
105  DEFINE(L2X0_R_PREFETCH_CTRL,	offsetof(struct l2x0_regs, prefetch_ctrl));
106  DEFINE(L2X0_R_PWR_CTRL,	offsetof(struct l2x0_regs, pwr_ctrl));
107  BLANK();
108#endif
109#ifdef CONFIG_CPU_HAS_ASID
110  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));
111  BLANK();
112#endif
113  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
114  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
115  BLANK();
116  DEFINE(VM_EXEC,	       	VM_EXEC);
117  BLANK();
118  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
119  BLANK();
120  DEFINE(SYS_ERROR0,		0x9f0000);
121  BLANK();
122  DEFINE(SIZEOF_MACHINE_DESC,	sizeof(struct machine_desc));
123  DEFINE(MACHINFO_TYPE,		offsetof(struct machine_desc, nr));
124  DEFINE(MACHINFO_NAME,		offsetof(struct machine_desc, name));
125  BLANK();
126  DEFINE(PROC_INFO_SZ,		sizeof(struct proc_info_list));
127  DEFINE(PROCINFO_INITFUNC,	offsetof(struct proc_info_list, __cpu_flush));
128  DEFINE(PROCINFO_MM_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
129  DEFINE(PROCINFO_IO_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_io_mmu_flags));
130  BLANK();
131#ifdef MULTI_DABORT
132  DEFINE(PROCESSOR_DABT_FUNC,	offsetof(struct processor, _data_abort));
133#endif
134#ifdef MULTI_PABORT
135  DEFINE(PROCESSOR_PABT_FUNC,	offsetof(struct processor, _prefetch_abort));
136#endif
137#ifdef MULTI_CPU
138  DEFINE(CPU_SLEEP_SIZE,	offsetof(struct processor, suspend_size));
139  DEFINE(CPU_DO_SUSPEND,	offsetof(struct processor, do_suspend));
140  DEFINE(CPU_DO_RESUME,		offsetof(struct processor, do_resume));
141#endif
142#ifdef MULTI_CACHE
143  DEFINE(CACHE_FLUSH_KERN_ALL,	offsetof(struct cpu_cache_fns, flush_kern_all));
144#endif
145#ifdef CONFIG_ARM_CPU_SUSPEND
146  DEFINE(SLEEP_SAVE_SP_SZ,	sizeof(struct sleep_save_sp));
147  DEFINE(SLEEP_SAVE_SP_PHYS,	offsetof(struct sleep_save_sp, save_ptr_stash_phys));
148  DEFINE(SLEEP_SAVE_SP_VIRT,	offsetof(struct sleep_save_sp, save_ptr_stash));
149#endif
150  BLANK();
151  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
152  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
153  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
154  BLANK();
155  DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
156  DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
 
 
 
 
 
 
 
 
157  BLANK();
158#ifdef CONFIG_VDSO
159  DEFINE(VDSO_DATA_SIZE,	sizeof(union vdso_data_store));
160#endif
161  BLANK();
162#ifdef CONFIG_ARM_MPU
163  DEFINE(MPU_RNG_INFO_RNGS,	offsetof(struct mpu_rgn_info, rgns));
164  DEFINE(MPU_RNG_INFO_USED,	offsetof(struct mpu_rgn_info, used));
165
166  DEFINE(MPU_RNG_SIZE,		sizeof(struct mpu_rgn));
167  DEFINE(MPU_RGN_DRBAR,	offsetof(struct mpu_rgn, drbar));
168  DEFINE(MPU_RGN_DRSR,	offsetof(struct mpu_rgn, drsr));
169  DEFINE(MPU_RGN_DRACR,	offsetof(struct mpu_rgn, dracr));
170  DEFINE(MPU_RGN_PRBAR,	offsetof(struct mpu_rgn, prbar));
171  DEFINE(MPU_RGN_PRLAR,	offsetof(struct mpu_rgn, prlar));
172#endif
173  return 0; 
174}
v5.4
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 1995-2003 Russell King
  4 *               2001-2002 Keith Owens
  5 *     
  6 * Generate definitions needed by assembly language modules.
  7 * This code generates raw asm output which is post-processed to extract
  8 * and format the required data.
  9 */
 10#include <linux/compiler.h>
 11#include <linux/sched.h>
 12#include <linux/mm.h>
 13#include <linux/dma-mapping.h>
 14#ifdef CONFIG_KVM_ARM_HOST
 15#include <linux/kvm_host.h>
 16#endif
 17#include <asm/cacheflush.h>
 18#include <asm/glue-df.h>
 19#include <asm/glue-pf.h>
 20#include <asm/mach/arch.h>
 21#include <asm/thread_info.h>
 22#include <asm/memory.h>
 23#include <asm/mpu.h>
 24#include <asm/procinfo.h>
 25#include <asm/suspend.h>
 26#include <asm/vdso_datapage.h>
 27#include <asm/hardware/cache-l2x0.h>
 28#include <linux/kbuild.h>
 29#include "signal.h"
 30
 31/*
 32 * Make sure that the compiler and target are compatible.
 33 */
 34#if defined(__APCS_26__)
 35#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
 36#endif
 37/*
 38 * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
 39 *	      miscompiles find_get_entry(), and can result in EXT3 and EXT4
 40 *	      filesystem corruption (possibly other FS too).
 41 */
 42#if defined(GCC_VERSION) && GCC_VERSION >= 40800 && GCC_VERSION < 40803
 43#error Your compiler is too buggy; it is known to miscompile kernels
 44#error and result in filesystem corruption and oopses.
 45#endif
 46
 47int main(void)
 48{
 49  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
 50#ifdef CONFIG_STACKPROTECTOR
 51  DEFINE(TSK_STACK_CANARY,	offsetof(struct task_struct, stack_canary));
 52#endif
 53  BLANK();
 54  DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
 55  DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
 56  DEFINE(TI_ADDR_LIMIT,		offsetof(struct thread_info, addr_limit));
 57  DEFINE(TI_TASK,		offsetof(struct thread_info, task));
 58  DEFINE(TI_CPU,		offsetof(struct thread_info, cpu));
 59  DEFINE(TI_CPU_DOMAIN,		offsetof(struct thread_info, cpu_domain));
 60  DEFINE(TI_CPU_SAVE,		offsetof(struct thread_info, cpu_context));
 61  DEFINE(TI_USED_CP,		offsetof(struct thread_info, used_cp));
 62  DEFINE(TI_TP_VALUE,		offsetof(struct thread_info, tp_value));
 63  DEFINE(TI_FPSTATE,		offsetof(struct thread_info, fpstate));
 64#ifdef CONFIG_VFP
 65  DEFINE(TI_VFPSTATE,		offsetof(struct thread_info, vfpstate));
 66#ifdef CONFIG_SMP
 67  DEFINE(VFP_CPU,		offsetof(union vfp_state, hard.cpu));
 68#endif
 69#endif
 70#ifdef CONFIG_ARM_THUMBEE
 71  DEFINE(TI_THUMBEE_STATE,	offsetof(struct thread_info, thumbee_state));
 72#endif
 73#ifdef CONFIG_IWMMXT
 74  DEFINE(TI_IWMMXT_STATE,	offsetof(struct thread_info, fpstate.iwmmxt));
 75#endif
 76#ifdef CONFIG_CRUNCH
 77  DEFINE(TI_CRUNCH_STATE,	offsetof(struct thread_info, crunchstate));
 78#endif
 79#ifdef CONFIG_STACKPROTECTOR_PER_TASK
 80  DEFINE(TI_STACK_CANARY,	offsetof(struct thread_info, stack_canary));
 81#endif
 82  DEFINE(THREAD_SZ_ORDER,	THREAD_SIZE_ORDER);
 83  BLANK();
 84  DEFINE(S_R0,			offsetof(struct pt_regs, ARM_r0));
 85  DEFINE(S_R1,			offsetof(struct pt_regs, ARM_r1));
 86  DEFINE(S_R2,			offsetof(struct pt_regs, ARM_r2));
 87  DEFINE(S_R3,			offsetof(struct pt_regs, ARM_r3));
 88  DEFINE(S_R4,			offsetof(struct pt_regs, ARM_r4));
 89  DEFINE(S_R5,			offsetof(struct pt_regs, ARM_r5));
 90  DEFINE(S_R6,			offsetof(struct pt_regs, ARM_r6));
 91  DEFINE(S_R7,			offsetof(struct pt_regs, ARM_r7));
 92  DEFINE(S_R8,			offsetof(struct pt_regs, ARM_r8));
 93  DEFINE(S_R9,			offsetof(struct pt_regs, ARM_r9));
 94  DEFINE(S_R10,			offsetof(struct pt_regs, ARM_r10));
 95  DEFINE(S_FP,			offsetof(struct pt_regs, ARM_fp));
 96  DEFINE(S_IP,			offsetof(struct pt_regs, ARM_ip));
 97  DEFINE(S_SP,			offsetof(struct pt_regs, ARM_sp));
 98  DEFINE(S_LR,			offsetof(struct pt_regs, ARM_lr));
 99  DEFINE(S_PC,			offsetof(struct pt_regs, ARM_pc));
100  DEFINE(S_PSR,			offsetof(struct pt_regs, ARM_cpsr));
101  DEFINE(S_OLD_R0,		offsetof(struct pt_regs, ARM_ORIG_r0));
102  DEFINE(PT_REGS_SIZE,		sizeof(struct pt_regs));
103  DEFINE(SVC_DACR,		offsetof(struct svc_pt_regs, dacr));
104  DEFINE(SVC_ADDR_LIMIT,	offsetof(struct svc_pt_regs, addr_limit));
105  DEFINE(SVC_REGS_SIZE,		sizeof(struct svc_pt_regs));
106  BLANK();
107  DEFINE(SIGFRAME_RC3_OFFSET,	offsetof(struct sigframe, retcode[3]));
108  DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
109  BLANK();
110#ifdef CONFIG_CACHE_L2X0
111  DEFINE(L2X0_R_PHY_BASE,	offsetof(struct l2x0_regs, phy_base));
112  DEFINE(L2X0_R_AUX_CTRL,	offsetof(struct l2x0_regs, aux_ctrl));
113  DEFINE(L2X0_R_TAG_LATENCY,	offsetof(struct l2x0_regs, tag_latency));
114  DEFINE(L2X0_R_DATA_LATENCY,	offsetof(struct l2x0_regs, data_latency));
115  DEFINE(L2X0_R_FILTER_START,	offsetof(struct l2x0_regs, filter_start));
116  DEFINE(L2X0_R_FILTER_END,	offsetof(struct l2x0_regs, filter_end));
117  DEFINE(L2X0_R_PREFETCH_CTRL,	offsetof(struct l2x0_regs, prefetch_ctrl));
118  DEFINE(L2X0_R_PWR_CTRL,	offsetof(struct l2x0_regs, pwr_ctrl));
119  BLANK();
120#endif
121#ifdef CONFIG_CPU_HAS_ASID
122  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));
123  BLANK();
124#endif
125  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
126  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
127  BLANK();
128  DEFINE(VM_EXEC,	       	VM_EXEC);
129  BLANK();
130  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
131  BLANK();
132  DEFINE(SYS_ERROR0,		0x9f0000);
133  BLANK();
134  DEFINE(SIZEOF_MACHINE_DESC,	sizeof(struct machine_desc));
135  DEFINE(MACHINFO_TYPE,		offsetof(struct machine_desc, nr));
136  DEFINE(MACHINFO_NAME,		offsetof(struct machine_desc, name));
137  BLANK();
138  DEFINE(PROC_INFO_SZ,		sizeof(struct proc_info_list));
139  DEFINE(PROCINFO_INITFUNC,	offsetof(struct proc_info_list, __cpu_flush));
140  DEFINE(PROCINFO_MM_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
141  DEFINE(PROCINFO_IO_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_io_mmu_flags));
142  BLANK();
143#ifdef MULTI_DABORT
144  DEFINE(PROCESSOR_DABT_FUNC,	offsetof(struct processor, _data_abort));
145#endif
146#ifdef MULTI_PABORT
147  DEFINE(PROCESSOR_PABT_FUNC,	offsetof(struct processor, _prefetch_abort));
148#endif
149#ifdef MULTI_CPU
150  DEFINE(CPU_SLEEP_SIZE,	offsetof(struct processor, suspend_size));
151  DEFINE(CPU_DO_SUSPEND,	offsetof(struct processor, do_suspend));
152  DEFINE(CPU_DO_RESUME,		offsetof(struct processor, do_resume));
153#endif
154#ifdef MULTI_CACHE
155  DEFINE(CACHE_FLUSH_KERN_ALL,	offsetof(struct cpu_cache_fns, flush_kern_all));
156#endif
157#ifdef CONFIG_ARM_CPU_SUSPEND
158  DEFINE(SLEEP_SAVE_SP_SZ,	sizeof(struct sleep_save_sp));
159  DEFINE(SLEEP_SAVE_SP_PHYS,	offsetof(struct sleep_save_sp, save_ptr_stash_phys));
160  DEFINE(SLEEP_SAVE_SP_VIRT,	offsetof(struct sleep_save_sp, save_ptr_stash));
161#endif
162  BLANK();
163  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
164  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
165  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
166  BLANK();
167  DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
168  DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
169  BLANK();
170#ifdef CONFIG_KVM_ARM_HOST
171  DEFINE(VCPU_GUEST_CTXT,	offsetof(struct kvm_vcpu, arch.ctxt));
172  DEFINE(VCPU_HOST_CTXT,	offsetof(struct kvm_vcpu, arch.host_cpu_context));
173  DEFINE(CPU_CTXT_VFP,		offsetof(struct kvm_cpu_context, vfp));
174  DEFINE(CPU_CTXT_GP_REGS,	offsetof(struct kvm_cpu_context, gp_regs));
175  DEFINE(GP_REGS_USR,		offsetof(struct kvm_regs, usr_regs));
176#endif
177  BLANK();
178#ifdef CONFIG_VDSO
179  DEFINE(VDSO_DATA_SIZE,	sizeof(union vdso_data_store));
180#endif
181  BLANK();
182#ifdef CONFIG_ARM_MPU
183  DEFINE(MPU_RNG_INFO_RNGS,	offsetof(struct mpu_rgn_info, rgns));
184  DEFINE(MPU_RNG_INFO_USED,	offsetof(struct mpu_rgn_info, used));
185
186  DEFINE(MPU_RNG_SIZE,		sizeof(struct mpu_rgn));
187  DEFINE(MPU_RGN_DRBAR,	offsetof(struct mpu_rgn, drbar));
188  DEFINE(MPU_RGN_DRSR,	offsetof(struct mpu_rgn, drsr));
189  DEFINE(MPU_RGN_DRACR,	offsetof(struct mpu_rgn, dracr));
190  DEFINE(MPU_RGN_PRBAR,	offsetof(struct mpu_rgn, prbar));
191  DEFINE(MPU_RGN_PRLAR,	offsetof(struct mpu_rgn, prlar));
192#endif
193  return 0; 
194}