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1/*
2 * Linux driver attachment glue for PCI based U320 controllers.
3 *
4 * Copyright (c) 2000-2001 Adaptec Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
25 *
26 * NO WARRANTY
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
38 *
39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
40 */
41
42#include "aic79xx_osm.h"
43#include "aic79xx_inline.h"
44#include "aic79xx_pci.h"
45
46/* Define the macro locally since it's different for different class of chips.
47 */
48#define ID(x) \
49 ID2C(x), \
50 ID2C(IDIROC(x))
51
52static const struct pci_device_id ahd_linux_pci_id_table[] = {
53 /* aic7901 based controllers */
54 ID(ID_AHA_29320A),
55 ID(ID_AHA_29320ALP),
56 ID(ID_AHA_29320LPE),
57 /* aic7902 based controllers */
58 ID(ID_AHA_29320),
59 ID(ID_AHA_29320B),
60 ID(ID_AHA_29320LP),
61 ID(ID_AHA_39320),
62 ID(ID_AHA_39320_B),
63 ID(ID_AHA_39320A),
64 ID(ID_AHA_39320D),
65 ID(ID_AHA_39320D_HP),
66 ID(ID_AHA_39320D_B),
67 ID(ID_AHA_39320D_B_HP),
68 /* Generic chip probes for devices we don't know exactly. */
69 ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
70 ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
71 ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
72 { 0 }
73};
74
75MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
76
77#ifdef CONFIG_PM
78static int
79ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
80{
81 struct ahd_softc *ahd = pci_get_drvdata(pdev);
82 int rc;
83
84 if ((rc = ahd_suspend(ahd)))
85 return rc;
86
87 ahd_pci_suspend(ahd);
88
89 pci_save_state(pdev);
90 pci_disable_device(pdev);
91
92 if (mesg.event & PM_EVENT_SLEEP)
93 pci_set_power_state(pdev, PCI_D3hot);
94
95 return rc;
96}
97
98static int
99ahd_linux_pci_dev_resume(struct pci_dev *pdev)
100{
101 struct ahd_softc *ahd = pci_get_drvdata(pdev);
102 int rc;
103
104 pci_set_power_state(pdev, PCI_D0);
105 pci_restore_state(pdev);
106
107 if ((rc = pci_enable_device(pdev))) {
108 dev_printk(KERN_ERR, &pdev->dev,
109 "failed to enable device after resume (%d)\n", rc);
110 return rc;
111 }
112
113 pci_set_master(pdev);
114
115 ahd_pci_resume(ahd);
116
117 ahd_resume(ahd);
118
119 return rc;
120}
121#endif
122
123static void
124ahd_linux_pci_dev_remove(struct pci_dev *pdev)
125{
126 struct ahd_softc *ahd = pci_get_drvdata(pdev);
127 u_long s;
128
129 if (ahd->platform_data && ahd->platform_data->host)
130 scsi_remove_host(ahd->platform_data->host);
131
132 ahd_lock(ahd, &s);
133 ahd_intr_enable(ahd, FALSE);
134 ahd_unlock(ahd, &s);
135 ahd_free(ahd);
136}
137
138static void
139ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
140{
141 struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
142 unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
143
144 master_pdev = pci_get_slot(pdev->bus, master_devfn);
145 if (master_pdev) {
146 struct ahd_softc *master = pci_get_drvdata(master_pdev);
147 if (master) {
148 ahd->flags &= ~AHD_BIOS_ENABLED;
149 ahd->flags |= master->flags & AHD_BIOS_ENABLED;
150 } else
151 printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
152 pci_dev_put(master_pdev);
153 }
154}
155
156static int
157ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
158{
159 char buf[80];
160 struct ahd_softc *ahd;
161 ahd_dev_softc_t pci;
162 const struct ahd_pci_identity *entry;
163 char *name;
164 int error;
165 struct device *dev = &pdev->dev;
166
167 pci = pdev;
168 entry = ahd_find_pci_device(pci);
169 if (entry == NULL)
170 return (-ENODEV);
171
172 /*
173 * Allocate a softc for this card and
174 * set it up for attachment by our
175 * common detect routine.
176 */
177 sprintf(buf, "ahd_pci:%d:%d:%d",
178 ahd_get_pci_bus(pci),
179 ahd_get_pci_slot(pci),
180 ahd_get_pci_function(pci));
181 name = kstrdup(buf, GFP_ATOMIC);
182 if (name == NULL)
183 return (-ENOMEM);
184 ahd = ahd_alloc(NULL, name);
185 if (ahd == NULL)
186 return (-ENOMEM);
187 if (pci_enable_device(pdev)) {
188 ahd_free(ahd);
189 return (-ENODEV);
190 }
191 pci_set_master(pdev);
192
193 if (sizeof(dma_addr_t) > 4) {
194 const u64 required_mask = dma_get_required_mask(dev);
195
196 if (required_mask > DMA_BIT_MASK(39) &&
197 dma_set_mask(dev, DMA_BIT_MASK(64)) == 0)
198 ahd->flags |= AHD_64BIT_ADDRESSING;
199 else if (required_mask > DMA_BIT_MASK(32) &&
200 dma_set_mask(dev, DMA_BIT_MASK(39)) == 0)
201 ahd->flags |= AHD_39BIT_ADDRESSING;
202 else
203 dma_set_mask(dev, DMA_BIT_MASK(32));
204 } else {
205 dma_set_mask(dev, DMA_BIT_MASK(32));
206 }
207 ahd->dev_softc = pci;
208 error = ahd_pci_config(ahd, entry);
209 if (error != 0) {
210 ahd_free(ahd);
211 return (-error);
212 }
213
214 /*
215 * Second Function PCI devices need to inherit some
216 * * settings from function 0.
217 */
218 if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
219 ahd_linux_pci_inherit_flags(ahd);
220
221 pci_set_drvdata(pdev, ahd);
222
223 ahd_linux_register_host(ahd, &aic79xx_driver_template);
224 return (0);
225}
226
227static struct pci_driver aic79xx_pci_driver = {
228 .name = "aic79xx",
229 .probe = ahd_linux_pci_dev_probe,
230#ifdef CONFIG_PM
231 .suspend = ahd_linux_pci_dev_suspend,
232 .resume = ahd_linux_pci_dev_resume,
233#endif
234 .remove = ahd_linux_pci_dev_remove,
235 .id_table = ahd_linux_pci_id_table
236};
237
238int
239ahd_linux_pci_init(void)
240{
241 return pci_register_driver(&aic79xx_pci_driver);
242}
243
244void
245ahd_linux_pci_exit(void)
246{
247 pci_unregister_driver(&aic79xx_pci_driver);
248}
249
250static int
251ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base,
252 resource_size_t *base2)
253{
254 *base = pci_resource_start(ahd->dev_softc, 0);
255 /*
256 * This is really the 3rd bar and should be at index 2,
257 * but the Linux PCI code doesn't know how to "count" 64bit
258 * bars.
259 */
260 *base2 = pci_resource_start(ahd->dev_softc, 3);
261 if (*base == 0 || *base2 == 0)
262 return (ENOMEM);
263 if (!request_region(*base, 256, "aic79xx"))
264 return (ENOMEM);
265 if (!request_region(*base2, 256, "aic79xx")) {
266 release_region(*base, 256);
267 return (ENOMEM);
268 }
269 return (0);
270}
271
272static int
273ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
274 resource_size_t *bus_addr,
275 uint8_t __iomem **maddr)
276{
277 resource_size_t start;
278 resource_size_t base_page;
279 u_long base_offset;
280 int error = 0;
281
282 if (aic79xx_allow_memio == 0)
283 return (ENOMEM);
284
285 if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
286 return (ENOMEM);
287
288 start = pci_resource_start(ahd->dev_softc, 1);
289 base_page = start & PAGE_MASK;
290 base_offset = start - base_page;
291 if (start != 0) {
292 *bus_addr = start;
293 if (!request_mem_region(start, 0x1000, "aic79xx"))
294 error = ENOMEM;
295 if (!error) {
296 *maddr = ioremap(base_page, base_offset + 512);
297 if (*maddr == NULL) {
298 error = ENOMEM;
299 release_mem_region(start, 0x1000);
300 } else
301 *maddr += base_offset;
302 }
303 } else
304 error = ENOMEM;
305 return (error);
306}
307
308int
309ahd_pci_map_registers(struct ahd_softc *ahd)
310{
311 uint32_t command;
312 resource_size_t base;
313 uint8_t __iomem *maddr;
314 int error;
315
316 /*
317 * If its allowed, we prefer memory mapped access.
318 */
319 command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
320 command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
321 base = 0;
322 maddr = NULL;
323 error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
324 if (error == 0) {
325 ahd->platform_data->mem_busaddr = base;
326 ahd->tags[0] = BUS_SPACE_MEMIO;
327 ahd->bshs[0].maddr = maddr;
328 ahd->tags[1] = BUS_SPACE_MEMIO;
329 ahd->bshs[1].maddr = maddr + 0x100;
330 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
331 command | PCIM_CMD_MEMEN, 4);
332
333 if (ahd_pci_test_register_access(ahd) != 0) {
334
335 printk("aic79xx: PCI Device %d:%d:%d "
336 "failed memory mapped test. Using PIO.\n",
337 ahd_get_pci_bus(ahd->dev_softc),
338 ahd_get_pci_slot(ahd->dev_softc),
339 ahd_get_pci_function(ahd->dev_softc));
340 iounmap(maddr);
341 release_mem_region(ahd->platform_data->mem_busaddr,
342 0x1000);
343 ahd->bshs[0].maddr = NULL;
344 maddr = NULL;
345 } else
346 command |= PCIM_CMD_MEMEN;
347 } else if (bootverbose) {
348 printk("aic79xx: PCI%d:%d:%d MEM region 0x%llx "
349 "unavailable. Cannot memory map device.\n",
350 ahd_get_pci_bus(ahd->dev_softc),
351 ahd_get_pci_slot(ahd->dev_softc),
352 ahd_get_pci_function(ahd->dev_softc),
353 (unsigned long long)base);
354 }
355
356 if (maddr == NULL) {
357 resource_size_t base2;
358
359 error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
360 if (error == 0) {
361 ahd->tags[0] = BUS_SPACE_PIO;
362 ahd->tags[1] = BUS_SPACE_PIO;
363 ahd->bshs[0].ioport = (u_long)base;
364 ahd->bshs[1].ioport = (u_long)base2;
365 command |= PCIM_CMD_PORTEN;
366 } else {
367 printk("aic79xx: PCI%d:%d:%d IO regions 0x%llx and "
368 "0x%llx unavailable. Cannot map device.\n",
369 ahd_get_pci_bus(ahd->dev_softc),
370 ahd_get_pci_slot(ahd->dev_softc),
371 ahd_get_pci_function(ahd->dev_softc),
372 (unsigned long long)base,
373 (unsigned long long)base2);
374 }
375 }
376 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
377 return (error);
378}
379
380int
381ahd_pci_map_int(struct ahd_softc *ahd)
382{
383 int error;
384
385 error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
386 IRQF_SHARED, "aic79xx", ahd);
387 if (!error)
388 ahd->platform_data->irq = ahd->dev_softc->irq;
389
390 return (-error);
391}
392
393void
394ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
395{
396 pci_set_power_state(ahd->dev_softc, new_state);
397}
1/*
2 * Linux driver attachment glue for PCI based U320 controllers.
3 *
4 * Copyright (c) 2000-2001 Adaptec Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
25 *
26 * NO WARRANTY
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
38 *
39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic79xx_osm_pci.c#25 $
40 */
41
42#include "aic79xx_osm.h"
43#include "aic79xx_inline.h"
44#include "aic79xx_pci.h"
45
46/* Define the macro locally since it's different for different class of chips.
47 */
48#define ID(x) \
49 ID2C(x), \
50 ID2C(IDIROC(x))
51
52static const struct pci_device_id ahd_linux_pci_id_table[] = {
53 /* aic7901 based controllers */
54 ID(ID_AHA_29320A),
55 ID(ID_AHA_29320ALP),
56 ID(ID_AHA_29320LPE),
57 /* aic7902 based controllers */
58 ID(ID_AHA_29320),
59 ID(ID_AHA_29320B),
60 ID(ID_AHA_29320LP),
61 ID(ID_AHA_39320),
62 ID(ID_AHA_39320_B),
63 ID(ID_AHA_39320A),
64 ID(ID_AHA_39320D),
65 ID(ID_AHA_39320D_HP),
66 ID(ID_AHA_39320D_B),
67 ID(ID_AHA_39320D_B_HP),
68 /* Generic chip probes for devices we don't know exactly. */
69 ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
70 ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
71 ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
72 { 0 }
73};
74
75MODULE_DEVICE_TABLE(pci, ahd_linux_pci_id_table);
76
77#ifdef CONFIG_PM
78static int
79ahd_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
80{
81 struct ahd_softc *ahd = pci_get_drvdata(pdev);
82 int rc;
83
84 if ((rc = ahd_suspend(ahd)))
85 return rc;
86
87 ahd_pci_suspend(ahd);
88
89 pci_save_state(pdev);
90 pci_disable_device(pdev);
91
92 if (mesg.event & PM_EVENT_SLEEP)
93 pci_set_power_state(pdev, PCI_D3hot);
94
95 return rc;
96}
97
98static int
99ahd_linux_pci_dev_resume(struct pci_dev *pdev)
100{
101 struct ahd_softc *ahd = pci_get_drvdata(pdev);
102 int rc;
103
104 pci_set_power_state(pdev, PCI_D0);
105 pci_restore_state(pdev);
106
107 if ((rc = pci_enable_device(pdev))) {
108 dev_printk(KERN_ERR, &pdev->dev,
109 "failed to enable device after resume (%d)\n", rc);
110 return rc;
111 }
112
113 pci_set_master(pdev);
114
115 ahd_pci_resume(ahd);
116
117 ahd_resume(ahd);
118
119 return rc;
120}
121#endif
122
123static void
124ahd_linux_pci_dev_remove(struct pci_dev *pdev)
125{
126 struct ahd_softc *ahd = pci_get_drvdata(pdev);
127 u_long s;
128
129 if (ahd->platform_data && ahd->platform_data->host)
130 scsi_remove_host(ahd->platform_data->host);
131
132 ahd_lock(ahd, &s);
133 ahd_intr_enable(ahd, FALSE);
134 ahd_unlock(ahd, &s);
135 ahd_free(ahd);
136}
137
138static void
139ahd_linux_pci_inherit_flags(struct ahd_softc *ahd)
140{
141 struct pci_dev *pdev = ahd->dev_softc, *master_pdev;
142 unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
143
144 master_pdev = pci_get_slot(pdev->bus, master_devfn);
145 if (master_pdev) {
146 struct ahd_softc *master = pci_get_drvdata(master_pdev);
147 if (master) {
148 ahd->flags &= ~AHD_BIOS_ENABLED;
149 ahd->flags |= master->flags & AHD_BIOS_ENABLED;
150 } else
151 printk(KERN_ERR "aic79xx: no multichannel peer found!\n");
152 pci_dev_put(master_pdev);
153 }
154}
155
156static int
157ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
158{
159 char buf[80];
160 struct ahd_softc *ahd;
161 ahd_dev_softc_t pci;
162 const struct ahd_pci_identity *entry;
163 char *name;
164 int error;
165 struct device *dev = &pdev->dev;
166
167 pci = pdev;
168 entry = ahd_find_pci_device(pci);
169 if (entry == NULL)
170 return (-ENODEV);
171
172 /*
173 * Allocate a softc for this card and
174 * set it up for attachment by our
175 * common detect routine.
176 */
177 sprintf(buf, "ahd_pci:%d:%d:%d",
178 ahd_get_pci_bus(pci),
179 ahd_get_pci_slot(pci),
180 ahd_get_pci_function(pci));
181 name = kstrdup(buf, GFP_ATOMIC);
182 if (name == NULL)
183 return (-ENOMEM);
184 ahd = ahd_alloc(NULL, name);
185 if (ahd == NULL)
186 return (-ENOMEM);
187 if (pci_enable_device(pdev)) {
188 ahd_free(ahd);
189 return (-ENODEV);
190 }
191 pci_set_master(pdev);
192
193 if (sizeof(dma_addr_t) > 4) {
194 const u64 required_mask = dma_get_required_mask(dev);
195
196 if (required_mask > DMA_BIT_MASK(39) &&
197 dma_set_mask(dev, DMA_BIT_MASK(64)) == 0)
198 ahd->flags |= AHD_64BIT_ADDRESSING;
199 else if (required_mask > DMA_BIT_MASK(32) &&
200 dma_set_mask(dev, DMA_BIT_MASK(39)) == 0)
201 ahd->flags |= AHD_39BIT_ADDRESSING;
202 else
203 dma_set_mask(dev, DMA_BIT_MASK(32));
204 } else {
205 dma_set_mask(dev, DMA_BIT_MASK(32));
206 }
207 ahd->dev_softc = pci;
208 error = ahd_pci_config(ahd, entry);
209 if (error != 0) {
210 ahd_free(ahd);
211 return (-error);
212 }
213
214 /*
215 * Second Function PCI devices need to inherit some
216 * * settings from function 0.
217 */
218 if ((ahd->features & AHD_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
219 ahd_linux_pci_inherit_flags(ahd);
220
221 pci_set_drvdata(pdev, ahd);
222
223 ahd_linux_register_host(ahd, &aic79xx_driver_template);
224 return (0);
225}
226
227static struct pci_driver aic79xx_pci_driver = {
228 .name = "aic79xx",
229 .probe = ahd_linux_pci_dev_probe,
230#ifdef CONFIG_PM
231 .suspend = ahd_linux_pci_dev_suspend,
232 .resume = ahd_linux_pci_dev_resume,
233#endif
234 .remove = ahd_linux_pci_dev_remove,
235 .id_table = ahd_linux_pci_id_table
236};
237
238int
239ahd_linux_pci_init(void)
240{
241 return pci_register_driver(&aic79xx_pci_driver);
242}
243
244void
245ahd_linux_pci_exit(void)
246{
247 pci_unregister_driver(&aic79xx_pci_driver);
248}
249
250static int
251ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, resource_size_t *base,
252 resource_size_t *base2)
253{
254 *base = pci_resource_start(ahd->dev_softc, 0);
255 /*
256 * This is really the 3rd bar and should be at index 2,
257 * but the Linux PCI code doesn't know how to "count" 64bit
258 * bars.
259 */
260 *base2 = pci_resource_start(ahd->dev_softc, 3);
261 if (*base == 0 || *base2 == 0)
262 return (ENOMEM);
263 if (!request_region(*base, 256, "aic79xx"))
264 return (ENOMEM);
265 if (!request_region(*base2, 256, "aic79xx")) {
266 release_region(*base, 256);
267 return (ENOMEM);
268 }
269 return (0);
270}
271
272static int
273ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
274 resource_size_t *bus_addr,
275 uint8_t __iomem **maddr)
276{
277 resource_size_t start;
278 resource_size_t base_page;
279 u_long base_offset;
280 int error = 0;
281
282 if (aic79xx_allow_memio == 0)
283 return (ENOMEM);
284
285 if ((ahd->bugs & AHD_PCIX_MMAPIO_BUG) != 0)
286 return (ENOMEM);
287
288 start = pci_resource_start(ahd->dev_softc, 1);
289 base_page = start & PAGE_MASK;
290 base_offset = start - base_page;
291 if (start != 0) {
292 *bus_addr = start;
293 if (!request_mem_region(start, 0x1000, "aic79xx"))
294 error = ENOMEM;
295 if (!error) {
296 *maddr = ioremap_nocache(base_page, base_offset + 512);
297 if (*maddr == NULL) {
298 error = ENOMEM;
299 release_mem_region(start, 0x1000);
300 } else
301 *maddr += base_offset;
302 }
303 } else
304 error = ENOMEM;
305 return (error);
306}
307
308int
309ahd_pci_map_registers(struct ahd_softc *ahd)
310{
311 uint32_t command;
312 resource_size_t base;
313 uint8_t __iomem *maddr;
314 int error;
315
316 /*
317 * If its allowed, we prefer memory mapped access.
318 */
319 command = ahd_pci_read_config(ahd->dev_softc, PCIR_COMMAND, 4);
320 command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
321 base = 0;
322 maddr = NULL;
323 error = ahd_linux_pci_reserve_mem_region(ahd, &base, &maddr);
324 if (error == 0) {
325 ahd->platform_data->mem_busaddr = base;
326 ahd->tags[0] = BUS_SPACE_MEMIO;
327 ahd->bshs[0].maddr = maddr;
328 ahd->tags[1] = BUS_SPACE_MEMIO;
329 ahd->bshs[1].maddr = maddr + 0x100;
330 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND,
331 command | PCIM_CMD_MEMEN, 4);
332
333 if (ahd_pci_test_register_access(ahd) != 0) {
334
335 printk("aic79xx: PCI Device %d:%d:%d "
336 "failed memory mapped test. Using PIO.\n",
337 ahd_get_pci_bus(ahd->dev_softc),
338 ahd_get_pci_slot(ahd->dev_softc),
339 ahd_get_pci_function(ahd->dev_softc));
340 iounmap(maddr);
341 release_mem_region(ahd->platform_data->mem_busaddr,
342 0x1000);
343 ahd->bshs[0].maddr = NULL;
344 maddr = NULL;
345 } else
346 command |= PCIM_CMD_MEMEN;
347 } else if (bootverbose) {
348 printk("aic79xx: PCI%d:%d:%d MEM region 0x%llx "
349 "unavailable. Cannot memory map device.\n",
350 ahd_get_pci_bus(ahd->dev_softc),
351 ahd_get_pci_slot(ahd->dev_softc),
352 ahd_get_pci_function(ahd->dev_softc),
353 (unsigned long long)base);
354 }
355
356 if (maddr == NULL) {
357 resource_size_t base2;
358
359 error = ahd_linux_pci_reserve_io_regions(ahd, &base, &base2);
360 if (error == 0) {
361 ahd->tags[0] = BUS_SPACE_PIO;
362 ahd->tags[1] = BUS_SPACE_PIO;
363 ahd->bshs[0].ioport = (u_long)base;
364 ahd->bshs[1].ioport = (u_long)base2;
365 command |= PCIM_CMD_PORTEN;
366 } else {
367 printk("aic79xx: PCI%d:%d:%d IO regions 0x%llx and "
368 "0x%llx unavailable. Cannot map device.\n",
369 ahd_get_pci_bus(ahd->dev_softc),
370 ahd_get_pci_slot(ahd->dev_softc),
371 ahd_get_pci_function(ahd->dev_softc),
372 (unsigned long long)base,
373 (unsigned long long)base2);
374 }
375 }
376 ahd_pci_write_config(ahd->dev_softc, PCIR_COMMAND, command, 4);
377 return (error);
378}
379
380int
381ahd_pci_map_int(struct ahd_softc *ahd)
382{
383 int error;
384
385 error = request_irq(ahd->dev_softc->irq, ahd_linux_isr,
386 IRQF_SHARED, "aic79xx", ahd);
387 if (!error)
388 ahd->platform_data->irq = ahd->dev_softc->irq;
389
390 return (-error);
391}
392
393void
394ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
395{
396 pci_set_power_state(ahd->dev_softc, new_state);
397}