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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) Microsoft Corporation.
4 *
5 * Author:
6 * Jake Oshins <jakeo@microsoft.com>
7 *
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
10 * Virtual Function) is being passed through to the VM, this driver exposes
11 * a new bus to the guest VM. This is modeled as a root PCI bus because
12 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14 * until a device as been exposed using this driver.
15 *
16 * Each root PCI bus has its own PCI domain, which is called "Segment" in
17 * the PCI Firmware Specifications. Thus while each device passed through
18 * to the VM using this front-end will appear at "device 0", the domain will
19 * be unique. Typically, each bus will have one PCI function on it, though
20 * this driver does support more than one.
21 *
22 * In order to map the interrupts from the device through to the guest VM,
23 * this driver also implements an IRQ Domain, which handles interrupts (either
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
25 * set up, torn down, or reaffined, this driver communicates with the
26 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27 * interrupt will be delivered to the correct virtual processor at the right
28 * vector. This driver does not support level-triggered (line-based)
29 * interrupts, and will report that the Interrupt Line register in the
30 * function's configuration space is zero.
31 *
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33 * facilities. For instance, the configuration space of a function exposed
34 * by Hyper-V is mapped into a single page of memory space, and the
35 * read and write handlers for config space must be aware of this mechanism.
36 * Similarly, device setup and teardown involves messages sent to and from
37 * the PCI back-end driver in Hyper-V.
38 */
39
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/pci.h>
43#include <linux/delay.h>
44#include <linux/semaphore.h>
45#include <linux/irqdomain.h>
46#include <asm/irqdomain.h>
47#include <asm/apic.h>
48#include <linux/irq.h>
49#include <linux/msi.h>
50#include <linux/hyperv.h>
51#include <linux/refcount.h>
52#include <asm/mshyperv.h>
53
54/*
55 * Protocol versions. The low word is the minor version, the high word the
56 * major version.
57 */
58
59#define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
60#define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61#define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
62
63enum pci_protocol_version_t {
64 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
65 PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
66 PCI_PROTOCOL_VERSION_1_3 = PCI_MAKE_VERSION(1, 3), /* Vibranium */
67};
68
69#define CPU_AFFINITY_ALL -1ULL
70
71/*
72 * Supported protocol versions in the order of probing - highest go
73 * first.
74 */
75static enum pci_protocol_version_t pci_protocol_versions[] = {
76 PCI_PROTOCOL_VERSION_1_3,
77 PCI_PROTOCOL_VERSION_1_2,
78 PCI_PROTOCOL_VERSION_1_1,
79};
80
81#define PCI_CONFIG_MMIO_LENGTH 0x2000
82#define CFG_PAGE_OFFSET 0x1000
83#define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
84
85#define MAX_SUPPORTED_MSI_MESSAGES 0x400
86
87#define STATUS_REVISION_MISMATCH 0xC0000059
88
89/* space for 32bit serial number as string */
90#define SLOT_NAME_SIZE 11
91
92/*
93 * Message Types
94 */
95
96enum pci_message_type {
97 /*
98 * Version 1.1
99 */
100 PCI_MESSAGE_BASE = 0x42490000,
101 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
102 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
103 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
104 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
105 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
106 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
107 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
108 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
109 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
110 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
111 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
112 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
113 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
114 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
115 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
116 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
117 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
118 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
119 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
120 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
121 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
122 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
123 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
124 PCI_BUS_RELATIONS2 = PCI_MESSAGE_BASE + 0x19,
125 PCI_MESSAGE_MAXIMUM
126};
127
128/*
129 * Structures defining the virtual PCI Express protocol.
130 */
131
132union pci_version {
133 struct {
134 u16 minor_version;
135 u16 major_version;
136 } parts;
137 u32 version;
138} __packed;
139
140/*
141 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
142 * which is all this driver does. This representation is the one used in
143 * Windows, which is what is expected when sending this back and forth with
144 * the Hyper-V parent partition.
145 */
146union win_slot_encoding {
147 struct {
148 u32 dev:5;
149 u32 func:3;
150 u32 reserved:24;
151 } bits;
152 u32 slot;
153} __packed;
154
155/*
156 * Pretty much as defined in the PCI Specifications.
157 */
158struct pci_function_description {
159 u16 v_id; /* vendor ID */
160 u16 d_id; /* device ID */
161 u8 rev;
162 u8 prog_intf;
163 u8 subclass;
164 u8 base_class;
165 u32 subsystem_id;
166 union win_slot_encoding win_slot;
167 u32 ser; /* serial number */
168} __packed;
169
170enum pci_device_description_flags {
171 HV_PCI_DEVICE_FLAG_NONE = 0x0,
172 HV_PCI_DEVICE_FLAG_NUMA_AFFINITY = 0x1,
173};
174
175struct pci_function_description2 {
176 u16 v_id; /* vendor ID */
177 u16 d_id; /* device ID */
178 u8 rev;
179 u8 prog_intf;
180 u8 subclass;
181 u8 base_class;
182 u32 subsystem_id;
183 union win_slot_encoding win_slot;
184 u32 ser; /* serial number */
185 u32 flags;
186 u16 virtual_numa_node;
187 u16 reserved;
188} __packed;
189
190/**
191 * struct hv_msi_desc
192 * @vector: IDT entry
193 * @delivery_mode: As defined in Intel's Programmer's
194 * Reference Manual, Volume 3, Chapter 8.
195 * @vector_count: Number of contiguous entries in the
196 * Interrupt Descriptor Table that are
197 * occupied by this Message-Signaled
198 * Interrupt. For "MSI", as first defined
199 * in PCI 2.2, this can be between 1 and
200 * 32. For "MSI-X," as first defined in PCI
201 * 3.0, this must be 1, as each MSI-X table
202 * entry would have its own descriptor.
203 * @reserved: Empty space
204 * @cpu_mask: All the target virtual processors.
205 */
206struct hv_msi_desc {
207 u8 vector;
208 u8 delivery_mode;
209 u16 vector_count;
210 u32 reserved;
211 u64 cpu_mask;
212} __packed;
213
214/**
215 * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
216 * @vector: IDT entry
217 * @delivery_mode: As defined in Intel's Programmer's
218 * Reference Manual, Volume 3, Chapter 8.
219 * @vector_count: Number of contiguous entries in the
220 * Interrupt Descriptor Table that are
221 * occupied by this Message-Signaled
222 * Interrupt. For "MSI", as first defined
223 * in PCI 2.2, this can be between 1 and
224 * 32. For "MSI-X," as first defined in PCI
225 * 3.0, this must be 1, as each MSI-X table
226 * entry would have its own descriptor.
227 * @processor_count: number of bits enabled in array.
228 * @processor_array: All the target virtual processors.
229 */
230struct hv_msi_desc2 {
231 u8 vector;
232 u8 delivery_mode;
233 u16 vector_count;
234 u16 processor_count;
235 u16 processor_array[32];
236} __packed;
237
238/**
239 * struct tran_int_desc
240 * @reserved: unused, padding
241 * @vector_count: same as in hv_msi_desc
242 * @data: This is the "data payload" value that is
243 * written by the device when it generates
244 * a message-signaled interrupt, either MSI
245 * or MSI-X.
246 * @address: This is the address to which the data
247 * payload is written on interrupt
248 * generation.
249 */
250struct tran_int_desc {
251 u16 reserved;
252 u16 vector_count;
253 u32 data;
254 u64 address;
255} __packed;
256
257/*
258 * A generic message format for virtual PCI.
259 * Specific message formats are defined later in the file.
260 */
261
262struct pci_message {
263 u32 type;
264} __packed;
265
266struct pci_child_message {
267 struct pci_message message_type;
268 union win_slot_encoding wslot;
269} __packed;
270
271struct pci_incoming_message {
272 struct vmpacket_descriptor hdr;
273 struct pci_message message_type;
274} __packed;
275
276struct pci_response {
277 struct vmpacket_descriptor hdr;
278 s32 status; /* negative values are failures */
279} __packed;
280
281struct pci_packet {
282 void (*completion_func)(void *context, struct pci_response *resp,
283 int resp_packet_size);
284 void *compl_ctxt;
285
286 struct pci_message message[];
287};
288
289/*
290 * Specific message types supporting the PCI protocol.
291 */
292
293/*
294 * Version negotiation message. Sent from the guest to the host.
295 * The guest is free to try different versions until the host
296 * accepts the version.
297 *
298 * pci_version: The protocol version requested.
299 * is_last_attempt: If TRUE, this is the last version guest will request.
300 * reservedz: Reserved field, set to zero.
301 */
302
303struct pci_version_request {
304 struct pci_message message_type;
305 u32 protocol_version;
306} __packed;
307
308/*
309 * Bus D0 Entry. This is sent from the guest to the host when the virtual
310 * bus (PCI Express port) is ready for action.
311 */
312
313struct pci_bus_d0_entry {
314 struct pci_message message_type;
315 u32 reserved;
316 u64 mmio_base;
317} __packed;
318
319struct pci_bus_relations {
320 struct pci_incoming_message incoming;
321 u32 device_count;
322 struct pci_function_description func[];
323} __packed;
324
325struct pci_bus_relations2 {
326 struct pci_incoming_message incoming;
327 u32 device_count;
328 struct pci_function_description2 func[];
329} __packed;
330
331struct pci_q_res_req_response {
332 struct vmpacket_descriptor hdr;
333 s32 status; /* negative values are failures */
334 u32 probed_bar[PCI_STD_NUM_BARS];
335} __packed;
336
337struct pci_set_power {
338 struct pci_message message_type;
339 union win_slot_encoding wslot;
340 u32 power_state; /* In Windows terms */
341 u32 reserved;
342} __packed;
343
344struct pci_set_power_response {
345 struct vmpacket_descriptor hdr;
346 s32 status; /* negative values are failures */
347 union win_slot_encoding wslot;
348 u32 resultant_state; /* In Windows terms */
349 u32 reserved;
350} __packed;
351
352struct pci_resources_assigned {
353 struct pci_message message_type;
354 union win_slot_encoding wslot;
355 u8 memory_range[0x14][6]; /* not used here */
356 u32 msi_descriptors;
357 u32 reserved[4];
358} __packed;
359
360struct pci_resources_assigned2 {
361 struct pci_message message_type;
362 union win_slot_encoding wslot;
363 u8 memory_range[0x14][6]; /* not used here */
364 u32 msi_descriptor_count;
365 u8 reserved[70];
366} __packed;
367
368struct pci_create_interrupt {
369 struct pci_message message_type;
370 union win_slot_encoding wslot;
371 struct hv_msi_desc int_desc;
372} __packed;
373
374struct pci_create_int_response {
375 struct pci_response response;
376 u32 reserved;
377 struct tran_int_desc int_desc;
378} __packed;
379
380struct pci_create_interrupt2 {
381 struct pci_message message_type;
382 union win_slot_encoding wslot;
383 struct hv_msi_desc2 int_desc;
384} __packed;
385
386struct pci_delete_interrupt {
387 struct pci_message message_type;
388 union win_slot_encoding wslot;
389 struct tran_int_desc int_desc;
390} __packed;
391
392/*
393 * Note: the VM must pass a valid block id, wslot and bytes_requested.
394 */
395struct pci_read_block {
396 struct pci_message message_type;
397 u32 block_id;
398 union win_slot_encoding wslot;
399 u32 bytes_requested;
400} __packed;
401
402struct pci_read_block_response {
403 struct vmpacket_descriptor hdr;
404 u32 status;
405 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
406} __packed;
407
408/*
409 * Note: the VM must pass a valid block id, wslot and byte_count.
410 */
411struct pci_write_block {
412 struct pci_message message_type;
413 u32 block_id;
414 union win_slot_encoding wslot;
415 u32 byte_count;
416 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
417} __packed;
418
419struct pci_dev_inval_block {
420 struct pci_incoming_message incoming;
421 union win_slot_encoding wslot;
422 u64 block_mask;
423} __packed;
424
425struct pci_dev_incoming {
426 struct pci_incoming_message incoming;
427 union win_slot_encoding wslot;
428} __packed;
429
430struct pci_eject_response {
431 struct pci_message message_type;
432 union win_slot_encoding wslot;
433 u32 status;
434} __packed;
435
436static int pci_ring_size = (4 * PAGE_SIZE);
437
438/*
439 * Driver specific state.
440 */
441
442enum hv_pcibus_state {
443 hv_pcibus_init = 0,
444 hv_pcibus_probed,
445 hv_pcibus_installed,
446 hv_pcibus_removing,
447 hv_pcibus_removed,
448 hv_pcibus_maximum
449};
450
451struct hv_pcibus_device {
452 struct pci_sysdata sysdata;
453 /* Protocol version negotiated with the host */
454 enum pci_protocol_version_t protocol_version;
455 enum hv_pcibus_state state;
456 refcount_t remove_lock;
457 struct hv_device *hdev;
458 resource_size_t low_mmio_space;
459 resource_size_t high_mmio_space;
460 struct resource *mem_config;
461 struct resource *low_mmio_res;
462 struct resource *high_mmio_res;
463 struct completion *survey_event;
464 struct completion remove_event;
465 struct pci_bus *pci_bus;
466 spinlock_t config_lock; /* Avoid two threads writing index page */
467 spinlock_t device_list_lock; /* Protect lists below */
468 void __iomem *cfg_addr;
469
470 struct list_head resources_for_children;
471
472 struct list_head children;
473 struct list_head dr_list;
474
475 struct msi_domain_info msi_info;
476 struct msi_controller msi_chip;
477 struct irq_domain *irq_domain;
478
479 spinlock_t retarget_msi_interrupt_lock;
480
481 struct workqueue_struct *wq;
482
483 /* Highest slot of child device with resources allocated */
484 int wslot_res_allocated;
485
486 /* hypercall arg, must not cross page boundary */
487 struct hv_retarget_device_interrupt retarget_msi_interrupt_params;
488
489 /*
490 * Don't put anything here: retarget_msi_interrupt_params must be last
491 */
492};
493
494/*
495 * Tracks "Device Relations" messages from the host, which must be both
496 * processed in order and deferred so that they don't run in the context
497 * of the incoming packet callback.
498 */
499struct hv_dr_work {
500 struct work_struct wrk;
501 struct hv_pcibus_device *bus;
502};
503
504struct hv_pcidev_description {
505 u16 v_id; /* vendor ID */
506 u16 d_id; /* device ID */
507 u8 rev;
508 u8 prog_intf;
509 u8 subclass;
510 u8 base_class;
511 u32 subsystem_id;
512 union win_slot_encoding win_slot;
513 u32 ser; /* serial number */
514 u32 flags;
515 u16 virtual_numa_node;
516};
517
518struct hv_dr_state {
519 struct list_head list_entry;
520 u32 device_count;
521 struct hv_pcidev_description func[];
522};
523
524enum hv_pcichild_state {
525 hv_pcichild_init = 0,
526 hv_pcichild_requirements,
527 hv_pcichild_resourced,
528 hv_pcichild_ejecting,
529 hv_pcichild_maximum
530};
531
532struct hv_pci_dev {
533 /* List protected by pci_rescan_remove_lock */
534 struct list_head list_entry;
535 refcount_t refs;
536 enum hv_pcichild_state state;
537 struct pci_slot *pci_slot;
538 struct hv_pcidev_description desc;
539 bool reported_missing;
540 struct hv_pcibus_device *hbus;
541 struct work_struct wrk;
542
543 void (*block_invalidate)(void *context, u64 block_mask);
544 void *invalidate_context;
545
546 /*
547 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
548 * read it back, for each of the BAR offsets within config space.
549 */
550 u32 probed_bar[PCI_STD_NUM_BARS];
551};
552
553struct hv_pci_compl {
554 struct completion host_event;
555 s32 completion_status;
556};
557
558static void hv_pci_onchannelcallback(void *context);
559
560/**
561 * hv_pci_generic_compl() - Invoked for a completion packet
562 * @context: Set up by the sender of the packet.
563 * @resp: The response packet
564 * @resp_packet_size: Size in bytes of the packet
565 *
566 * This function is used to trigger an event and report status
567 * for any message for which the completion packet contains a
568 * status and nothing else.
569 */
570static void hv_pci_generic_compl(void *context, struct pci_response *resp,
571 int resp_packet_size)
572{
573 struct hv_pci_compl *comp_pkt = context;
574
575 if (resp_packet_size >= offsetofend(struct pci_response, status))
576 comp_pkt->completion_status = resp->status;
577 else
578 comp_pkt->completion_status = -1;
579
580 complete(&comp_pkt->host_event);
581}
582
583static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
584 u32 wslot);
585
586static void get_pcichild(struct hv_pci_dev *hpdev)
587{
588 refcount_inc(&hpdev->refs);
589}
590
591static void put_pcichild(struct hv_pci_dev *hpdev)
592{
593 if (refcount_dec_and_test(&hpdev->refs))
594 kfree(hpdev);
595}
596
597static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
598static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
599
600/*
601 * There is no good way to get notified from vmbus_onoffer_rescind(),
602 * so let's use polling here, since this is not a hot path.
603 */
604static int wait_for_response(struct hv_device *hdev,
605 struct completion *comp)
606{
607 while (true) {
608 if (hdev->channel->rescind) {
609 dev_warn_once(&hdev->device, "The device is gone.\n");
610 return -ENODEV;
611 }
612
613 if (wait_for_completion_timeout(comp, HZ / 10))
614 break;
615 }
616
617 return 0;
618}
619
620/**
621 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
622 * @devfn: The Linux representation of PCI slot
623 *
624 * Windows uses a slightly different representation of PCI slot.
625 *
626 * Return: The Windows representation
627 */
628static u32 devfn_to_wslot(int devfn)
629{
630 union win_slot_encoding wslot;
631
632 wslot.slot = 0;
633 wslot.bits.dev = PCI_SLOT(devfn);
634 wslot.bits.func = PCI_FUNC(devfn);
635
636 return wslot.slot;
637}
638
639/**
640 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
641 * @wslot: The Windows representation of PCI slot
642 *
643 * Windows uses a slightly different representation of PCI slot.
644 *
645 * Return: The Linux representation
646 */
647static int wslot_to_devfn(u32 wslot)
648{
649 union win_slot_encoding slot_no;
650
651 slot_no.slot = wslot;
652 return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
653}
654
655/*
656 * PCI Configuration Space for these root PCI buses is implemented as a pair
657 * of pages in memory-mapped I/O space. Writing to the first page chooses
658 * the PCI function being written or read. Once the first page has been
659 * written to, the following page maps in the entire configuration space of
660 * the function.
661 */
662
663/**
664 * _hv_pcifront_read_config() - Internal PCI config read
665 * @hpdev: The PCI driver's representation of the device
666 * @where: Offset within config space
667 * @size: Size of the transfer
668 * @val: Pointer to the buffer receiving the data
669 */
670static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
671 int size, u32 *val)
672{
673 unsigned long flags;
674 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
675
676 /*
677 * If the attempt is to read the IDs or the ROM BAR, simulate that.
678 */
679 if (where + size <= PCI_COMMAND) {
680 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
681 } else if (where >= PCI_CLASS_REVISION && where + size <=
682 PCI_CACHE_LINE_SIZE) {
683 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
684 PCI_CLASS_REVISION, size);
685 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
686 PCI_ROM_ADDRESS) {
687 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
688 PCI_SUBSYSTEM_VENDOR_ID, size);
689 } else if (where >= PCI_ROM_ADDRESS && where + size <=
690 PCI_CAPABILITY_LIST) {
691 /* ROM BARs are unimplemented */
692 *val = 0;
693 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
694 PCI_INTERRUPT_PIN) {
695 /*
696 * Interrupt Line and Interrupt PIN are hard-wired to zero
697 * because this front-end only supports message-signaled
698 * interrupts.
699 */
700 *val = 0;
701 } else if (where + size <= CFG_PAGE_SIZE) {
702 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
703 /* Choose the function to be read. (See comment above) */
704 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
705 /* Make sure the function was chosen before we start reading. */
706 mb();
707 /* Read from that function's config space. */
708 switch (size) {
709 case 1:
710 *val = readb(addr);
711 break;
712 case 2:
713 *val = readw(addr);
714 break;
715 default:
716 *val = readl(addr);
717 break;
718 }
719 /*
720 * Make sure the read was done before we release the spinlock
721 * allowing consecutive reads/writes.
722 */
723 mb();
724 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
725 } else {
726 dev_err(&hpdev->hbus->hdev->device,
727 "Attempt to read beyond a function's config space.\n");
728 }
729}
730
731static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
732{
733 u16 ret;
734 unsigned long flags;
735 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
736 PCI_VENDOR_ID;
737
738 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
739
740 /* Choose the function to be read. (See comment above) */
741 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
742 /* Make sure the function was chosen before we start reading. */
743 mb();
744 /* Read from that function's config space. */
745 ret = readw(addr);
746 /*
747 * mb() is not required here, because the spin_unlock_irqrestore()
748 * is a barrier.
749 */
750
751 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
752
753 return ret;
754}
755
756/**
757 * _hv_pcifront_write_config() - Internal PCI config write
758 * @hpdev: The PCI driver's representation of the device
759 * @where: Offset within config space
760 * @size: Size of the transfer
761 * @val: The data being transferred
762 */
763static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
764 int size, u32 val)
765{
766 unsigned long flags;
767 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
768
769 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
770 where + size <= PCI_CAPABILITY_LIST) {
771 /* SSIDs and ROM BARs are read-only */
772 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
773 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
774 /* Choose the function to be written. (See comment above) */
775 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
776 /* Make sure the function was chosen before we start writing. */
777 wmb();
778 /* Write to that function's config space. */
779 switch (size) {
780 case 1:
781 writeb(val, addr);
782 break;
783 case 2:
784 writew(val, addr);
785 break;
786 default:
787 writel(val, addr);
788 break;
789 }
790 /*
791 * Make sure the write was done before we release the spinlock
792 * allowing consecutive reads/writes.
793 */
794 mb();
795 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
796 } else {
797 dev_err(&hpdev->hbus->hdev->device,
798 "Attempt to write beyond a function's config space.\n");
799 }
800}
801
802/**
803 * hv_pcifront_read_config() - Read configuration space
804 * @bus: PCI Bus structure
805 * @devfn: Device/function
806 * @where: Offset from base
807 * @size: Byte/word/dword
808 * @val: Value to be read
809 *
810 * Return: PCIBIOS_SUCCESSFUL on success
811 * PCIBIOS_DEVICE_NOT_FOUND on failure
812 */
813static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
814 int where, int size, u32 *val)
815{
816 struct hv_pcibus_device *hbus =
817 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
818 struct hv_pci_dev *hpdev;
819
820 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
821 if (!hpdev)
822 return PCIBIOS_DEVICE_NOT_FOUND;
823
824 _hv_pcifront_read_config(hpdev, where, size, val);
825
826 put_pcichild(hpdev);
827 return PCIBIOS_SUCCESSFUL;
828}
829
830/**
831 * hv_pcifront_write_config() - Write configuration space
832 * @bus: PCI Bus structure
833 * @devfn: Device/function
834 * @where: Offset from base
835 * @size: Byte/word/dword
836 * @val: Value to be written to device
837 *
838 * Return: PCIBIOS_SUCCESSFUL on success
839 * PCIBIOS_DEVICE_NOT_FOUND on failure
840 */
841static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
842 int where, int size, u32 val)
843{
844 struct hv_pcibus_device *hbus =
845 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
846 struct hv_pci_dev *hpdev;
847
848 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
849 if (!hpdev)
850 return PCIBIOS_DEVICE_NOT_FOUND;
851
852 _hv_pcifront_write_config(hpdev, where, size, val);
853
854 put_pcichild(hpdev);
855 return PCIBIOS_SUCCESSFUL;
856}
857
858/* PCIe operations */
859static struct pci_ops hv_pcifront_ops = {
860 .read = hv_pcifront_read_config,
861 .write = hv_pcifront_write_config,
862};
863
864/*
865 * Paravirtual backchannel
866 *
867 * Hyper-V SR-IOV provides a backchannel mechanism in software for
868 * communication between a VF driver and a PF driver. These
869 * "configuration blocks" are similar in concept to PCI configuration space,
870 * but instead of doing reads and writes in 32-bit chunks through a very slow
871 * path, packets of up to 128 bytes can be sent or received asynchronously.
872 *
873 * Nearly every SR-IOV device contains just such a communications channel in
874 * hardware, so using this one in software is usually optional. Using the
875 * software channel, however, allows driver implementers to leverage software
876 * tools that fuzz the communications channel looking for vulnerabilities.
877 *
878 * The usage model for these packets puts the responsibility for reading or
879 * writing on the VF driver. The VF driver sends a read or a write packet,
880 * indicating which "block" is being referred to by number.
881 *
882 * If the PF driver wishes to initiate communication, it can "invalidate" one or
883 * more of the first 64 blocks. This invalidation is delivered via a callback
884 * supplied by the VF driver by this driver.
885 *
886 * No protocol is implied, except that supplied by the PF and VF drivers.
887 */
888
889struct hv_read_config_compl {
890 struct hv_pci_compl comp_pkt;
891 void *buf;
892 unsigned int len;
893 unsigned int bytes_returned;
894};
895
896/**
897 * hv_pci_read_config_compl() - Invoked when a response packet
898 * for a read config block operation arrives.
899 * @context: Identifies the read config operation
900 * @resp: The response packet itself
901 * @resp_packet_size: Size in bytes of the response packet
902 */
903static void hv_pci_read_config_compl(void *context, struct pci_response *resp,
904 int resp_packet_size)
905{
906 struct hv_read_config_compl *comp = context;
907 struct pci_read_block_response *read_resp =
908 (struct pci_read_block_response *)resp;
909 unsigned int data_len, hdr_len;
910
911 hdr_len = offsetof(struct pci_read_block_response, bytes);
912 if (resp_packet_size < hdr_len) {
913 comp->comp_pkt.completion_status = -1;
914 goto out;
915 }
916
917 data_len = resp_packet_size - hdr_len;
918 if (data_len > 0 && read_resp->status == 0) {
919 comp->bytes_returned = min(comp->len, data_len);
920 memcpy(comp->buf, read_resp->bytes, comp->bytes_returned);
921 } else {
922 comp->bytes_returned = 0;
923 }
924
925 comp->comp_pkt.completion_status = read_resp->status;
926out:
927 complete(&comp->comp_pkt.host_event);
928}
929
930/**
931 * hv_read_config_block() - Sends a read config block request to
932 * the back-end driver running in the Hyper-V parent partition.
933 * @pdev: The PCI driver's representation for this device.
934 * @buf: Buffer into which the config block will be copied.
935 * @len: Size in bytes of buf.
936 * @block_id: Identifies the config block which has been requested.
937 * @bytes_returned: Size which came back from the back-end driver.
938 *
939 * Return: 0 on success, -errno on failure
940 */
941static int hv_read_config_block(struct pci_dev *pdev, void *buf,
942 unsigned int len, unsigned int block_id,
943 unsigned int *bytes_returned)
944{
945 struct hv_pcibus_device *hbus =
946 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
947 sysdata);
948 struct {
949 struct pci_packet pkt;
950 char buf[sizeof(struct pci_read_block)];
951 } pkt;
952 struct hv_read_config_compl comp_pkt;
953 struct pci_read_block *read_blk;
954 int ret;
955
956 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
957 return -EINVAL;
958
959 init_completion(&comp_pkt.comp_pkt.host_event);
960 comp_pkt.buf = buf;
961 comp_pkt.len = len;
962
963 memset(&pkt, 0, sizeof(pkt));
964 pkt.pkt.completion_func = hv_pci_read_config_compl;
965 pkt.pkt.compl_ctxt = &comp_pkt;
966 read_blk = (struct pci_read_block *)&pkt.pkt.message;
967 read_blk->message_type.type = PCI_READ_BLOCK;
968 read_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
969 read_blk->block_id = block_id;
970 read_blk->bytes_requested = len;
971
972 ret = vmbus_sendpacket(hbus->hdev->channel, read_blk,
973 sizeof(*read_blk), (unsigned long)&pkt.pkt,
974 VM_PKT_DATA_INBAND,
975 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
976 if (ret)
977 return ret;
978
979 ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event);
980 if (ret)
981 return ret;
982
983 if (comp_pkt.comp_pkt.completion_status != 0 ||
984 comp_pkt.bytes_returned == 0) {
985 dev_err(&hbus->hdev->device,
986 "Read Config Block failed: 0x%x, bytes_returned=%d\n",
987 comp_pkt.comp_pkt.completion_status,
988 comp_pkt.bytes_returned);
989 return -EIO;
990 }
991
992 *bytes_returned = comp_pkt.bytes_returned;
993 return 0;
994}
995
996/**
997 * hv_pci_write_config_compl() - Invoked when a response packet for a write
998 * config block operation arrives.
999 * @context: Identifies the write config operation
1000 * @resp: The response packet itself
1001 * @resp_packet_size: Size in bytes of the response packet
1002 */
1003static void hv_pci_write_config_compl(void *context, struct pci_response *resp,
1004 int resp_packet_size)
1005{
1006 struct hv_pci_compl *comp_pkt = context;
1007
1008 comp_pkt->completion_status = resp->status;
1009 complete(&comp_pkt->host_event);
1010}
1011
1012/**
1013 * hv_write_config_block() - Sends a write config block request to the
1014 * back-end driver running in the Hyper-V parent partition.
1015 * @pdev: The PCI driver's representation for this device.
1016 * @buf: Buffer from which the config block will be copied.
1017 * @len: Size in bytes of buf.
1018 * @block_id: Identifies the config block which is being written.
1019 *
1020 * Return: 0 on success, -errno on failure
1021 */
1022static int hv_write_config_block(struct pci_dev *pdev, void *buf,
1023 unsigned int len, unsigned int block_id)
1024{
1025 struct hv_pcibus_device *hbus =
1026 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1027 sysdata);
1028 struct {
1029 struct pci_packet pkt;
1030 char buf[sizeof(struct pci_write_block)];
1031 u32 reserved;
1032 } pkt;
1033 struct hv_pci_compl comp_pkt;
1034 struct pci_write_block *write_blk;
1035 u32 pkt_size;
1036 int ret;
1037
1038 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
1039 return -EINVAL;
1040
1041 init_completion(&comp_pkt.host_event);
1042
1043 memset(&pkt, 0, sizeof(pkt));
1044 pkt.pkt.completion_func = hv_pci_write_config_compl;
1045 pkt.pkt.compl_ctxt = &comp_pkt;
1046 write_blk = (struct pci_write_block *)&pkt.pkt.message;
1047 write_blk->message_type.type = PCI_WRITE_BLOCK;
1048 write_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
1049 write_blk->block_id = block_id;
1050 write_blk->byte_count = len;
1051 memcpy(write_blk->bytes, buf, len);
1052 pkt_size = offsetof(struct pci_write_block, bytes) + len;
1053 /*
1054 * This quirk is required on some hosts shipped around 2018, because
1055 * these hosts don't check the pkt_size correctly (new hosts have been
1056 * fixed since early 2019). The quirk is also safe on very old hosts
1057 * and new hosts, because, on them, what really matters is the length
1058 * specified in write_blk->byte_count.
1059 */
1060 pkt_size += sizeof(pkt.reserved);
1061
1062 ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size,
1063 (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND,
1064 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1065 if (ret)
1066 return ret;
1067
1068 ret = wait_for_response(hbus->hdev, &comp_pkt.host_event);
1069 if (ret)
1070 return ret;
1071
1072 if (comp_pkt.completion_status != 0) {
1073 dev_err(&hbus->hdev->device,
1074 "Write Config Block failed: 0x%x\n",
1075 comp_pkt.completion_status);
1076 return -EIO;
1077 }
1078
1079 return 0;
1080}
1081
1082/**
1083 * hv_register_block_invalidate() - Invoked when a config block invalidation
1084 * arrives from the back-end driver.
1085 * @pdev: The PCI driver's representation for this device.
1086 * @context: Identifies the device.
1087 * @block_invalidate: Identifies all of the blocks being invalidated.
1088 *
1089 * Return: 0 on success, -errno on failure
1090 */
1091static int hv_register_block_invalidate(struct pci_dev *pdev, void *context,
1092 void (*block_invalidate)(void *context,
1093 u64 block_mask))
1094{
1095 struct hv_pcibus_device *hbus =
1096 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1097 sysdata);
1098 struct hv_pci_dev *hpdev;
1099
1100 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1101 if (!hpdev)
1102 return -ENODEV;
1103
1104 hpdev->block_invalidate = block_invalidate;
1105 hpdev->invalidate_context = context;
1106
1107 put_pcichild(hpdev);
1108 return 0;
1109
1110}
1111
1112/* Interrupt management hooks */
1113static void hv_int_desc_free(struct hv_pci_dev *hpdev,
1114 struct tran_int_desc *int_desc)
1115{
1116 struct pci_delete_interrupt *int_pkt;
1117 struct {
1118 struct pci_packet pkt;
1119 u8 buffer[sizeof(struct pci_delete_interrupt)];
1120 } ctxt;
1121
1122 memset(&ctxt, 0, sizeof(ctxt));
1123 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
1124 int_pkt->message_type.type =
1125 PCI_DELETE_INTERRUPT_MESSAGE;
1126 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1127 int_pkt->int_desc = *int_desc;
1128 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
1129 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
1130 kfree(int_desc);
1131}
1132
1133/**
1134 * hv_msi_free() - Free the MSI.
1135 * @domain: The interrupt domain pointer
1136 * @info: Extra MSI-related context
1137 * @irq: Identifies the IRQ.
1138 *
1139 * The Hyper-V parent partition and hypervisor are tracking the
1140 * messages that are in use, keeping the interrupt redirection
1141 * table up to date. This callback sends a message that frees
1142 * the IRT entry and related tracking nonsense.
1143 */
1144static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
1145 unsigned int irq)
1146{
1147 struct hv_pcibus_device *hbus;
1148 struct hv_pci_dev *hpdev;
1149 struct pci_dev *pdev;
1150 struct tran_int_desc *int_desc;
1151 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
1152 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
1153
1154 pdev = msi_desc_to_pci_dev(msi);
1155 hbus = info->data;
1156 int_desc = irq_data_get_irq_chip_data(irq_data);
1157 if (!int_desc)
1158 return;
1159
1160 irq_data->chip_data = NULL;
1161 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1162 if (!hpdev) {
1163 kfree(int_desc);
1164 return;
1165 }
1166
1167 hv_int_desc_free(hpdev, int_desc);
1168 put_pcichild(hpdev);
1169}
1170
1171static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1172 bool force)
1173{
1174 struct irq_data *parent = data->parent_data;
1175
1176 return parent->chip->irq_set_affinity(parent, dest, force);
1177}
1178
1179static void hv_irq_mask(struct irq_data *data)
1180{
1181 pci_msi_mask_irq(data);
1182}
1183
1184/**
1185 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
1186 * affinity.
1187 * @data: Describes the IRQ
1188 *
1189 * Build new a destination for the MSI and make a hypercall to
1190 * update the Interrupt Redirection Table. "Device Logical ID"
1191 * is built out of this PCI bus's instance GUID and the function
1192 * number of the device.
1193 */
1194static void hv_irq_unmask(struct irq_data *data)
1195{
1196 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1197 struct irq_cfg *cfg = irqd_cfg(data);
1198 struct hv_retarget_device_interrupt *params;
1199 struct hv_pcibus_device *hbus;
1200 struct cpumask *dest;
1201 cpumask_var_t tmp;
1202 struct pci_bus *pbus;
1203 struct pci_dev *pdev;
1204 unsigned long flags;
1205 u32 var_size = 0;
1206 int cpu, nr_bank;
1207 u64 res;
1208
1209 dest = irq_data_get_effective_affinity_mask(data);
1210 pdev = msi_desc_to_pci_dev(msi_desc);
1211 pbus = pdev->bus;
1212 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1213
1214 spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
1215
1216 params = &hbus->retarget_msi_interrupt_params;
1217 memset(params, 0, sizeof(*params));
1218 params->partition_id = HV_PARTITION_ID_SELF;
1219 params->int_entry.source = 1; /* MSI(-X) */
1220 hv_set_msi_entry_from_desc(¶ms->int_entry.msi_entry, msi_desc);
1221 params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
1222 (hbus->hdev->dev_instance.b[4] << 16) |
1223 (hbus->hdev->dev_instance.b[7] << 8) |
1224 (hbus->hdev->dev_instance.b[6] & 0xf8) |
1225 PCI_FUNC(pdev->devfn);
1226 params->int_target.vector = cfg->vector;
1227
1228 /*
1229 * Honoring apic->irq_delivery_mode set to dest_Fixed by
1230 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
1231 * spurious interrupt storm. Not doing so does not seem to have a
1232 * negative effect (yet?).
1233 */
1234
1235 if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
1236 /*
1237 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
1238 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
1239 * with >64 VP support.
1240 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
1241 * is not sufficient for this hypercall.
1242 */
1243 params->int_target.flags |=
1244 HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
1245
1246 if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
1247 res = 1;
1248 goto exit_unlock;
1249 }
1250
1251 cpumask_and(tmp, dest, cpu_online_mask);
1252 nr_bank = cpumask_to_vpset(¶ms->int_target.vp_set, tmp);
1253 free_cpumask_var(tmp);
1254
1255 if (nr_bank <= 0) {
1256 res = 1;
1257 goto exit_unlock;
1258 }
1259
1260 /*
1261 * var-sized hypercall, var-size starts after vp_mask (thus
1262 * vp_set.format does not count, but vp_set.valid_bank_mask
1263 * does).
1264 */
1265 var_size = 1 + nr_bank;
1266 } else {
1267 for_each_cpu_and(cpu, dest, cpu_online_mask) {
1268 params->int_target.vp_mask |=
1269 (1ULL << hv_cpu_number_to_vp_number(cpu));
1270 }
1271 }
1272
1273 res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1274 params, NULL);
1275
1276exit_unlock:
1277 spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
1278
1279 if (res) {
1280 dev_err(&hbus->hdev->device,
1281 "%s() failed: %#llx", __func__, res);
1282 return;
1283 }
1284
1285 pci_msi_unmask_irq(data);
1286}
1287
1288struct compose_comp_ctxt {
1289 struct hv_pci_compl comp_pkt;
1290 struct tran_int_desc int_desc;
1291};
1292
1293static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1294 int resp_packet_size)
1295{
1296 struct compose_comp_ctxt *comp_pkt = context;
1297 struct pci_create_int_response *int_resp =
1298 (struct pci_create_int_response *)resp;
1299
1300 comp_pkt->comp_pkt.completion_status = resp->status;
1301 comp_pkt->int_desc = int_resp->int_desc;
1302 complete(&comp_pkt->comp_pkt.host_event);
1303}
1304
1305static u32 hv_compose_msi_req_v1(
1306 struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1307 u32 slot, u8 vector)
1308{
1309 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1310 int_pkt->wslot.slot = slot;
1311 int_pkt->int_desc.vector = vector;
1312 int_pkt->int_desc.vector_count = 1;
1313 int_pkt->int_desc.delivery_mode = dest_Fixed;
1314
1315 /*
1316 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1317 * hv_irq_unmask().
1318 */
1319 int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1320
1321 return sizeof(*int_pkt);
1322}
1323
1324static u32 hv_compose_msi_req_v2(
1325 struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1326 u32 slot, u8 vector)
1327{
1328 int cpu;
1329
1330 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1331 int_pkt->wslot.slot = slot;
1332 int_pkt->int_desc.vector = vector;
1333 int_pkt->int_desc.vector_count = 1;
1334 int_pkt->int_desc.delivery_mode = dest_Fixed;
1335
1336 /*
1337 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1338 * by subsequent retarget in hv_irq_unmask().
1339 */
1340 cpu = cpumask_first_and(affinity, cpu_online_mask);
1341 int_pkt->int_desc.processor_array[0] =
1342 hv_cpu_number_to_vp_number(cpu);
1343 int_pkt->int_desc.processor_count = 1;
1344
1345 return sizeof(*int_pkt);
1346}
1347
1348/**
1349 * hv_compose_msi_msg() - Supplies a valid MSI address/data
1350 * @data: Everything about this MSI
1351 * @msg: Buffer that is filled in by this function
1352 *
1353 * This function unpacks the IRQ looking for target CPU set, IDT
1354 * vector and mode and sends a message to the parent partition
1355 * asking for a mapping for that tuple in this partition. The
1356 * response supplies a data value and address to which that data
1357 * should be written to trigger that interrupt.
1358 */
1359static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1360{
1361 struct irq_cfg *cfg = irqd_cfg(data);
1362 struct hv_pcibus_device *hbus;
1363 struct vmbus_channel *channel;
1364 struct hv_pci_dev *hpdev;
1365 struct pci_bus *pbus;
1366 struct pci_dev *pdev;
1367 struct cpumask *dest;
1368 struct compose_comp_ctxt comp;
1369 struct tran_int_desc *int_desc;
1370 struct {
1371 struct pci_packet pci_pkt;
1372 union {
1373 struct pci_create_interrupt v1;
1374 struct pci_create_interrupt2 v2;
1375 } int_pkts;
1376 } __packed ctxt;
1377
1378 u32 size;
1379 int ret;
1380
1381 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1382 dest = irq_data_get_effective_affinity_mask(data);
1383 pbus = pdev->bus;
1384 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1385 channel = hbus->hdev->channel;
1386 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1387 if (!hpdev)
1388 goto return_null_message;
1389
1390 /* Free any previous message that might have already been composed. */
1391 if (data->chip_data) {
1392 int_desc = data->chip_data;
1393 data->chip_data = NULL;
1394 hv_int_desc_free(hpdev, int_desc);
1395 }
1396
1397 int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1398 if (!int_desc)
1399 goto drop_reference;
1400
1401 memset(&ctxt, 0, sizeof(ctxt));
1402 init_completion(&comp.comp_pkt.host_event);
1403 ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1404 ctxt.pci_pkt.compl_ctxt = ∁
1405
1406 switch (hbus->protocol_version) {
1407 case PCI_PROTOCOL_VERSION_1_1:
1408 size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1409 dest,
1410 hpdev->desc.win_slot.slot,
1411 cfg->vector);
1412 break;
1413
1414 case PCI_PROTOCOL_VERSION_1_2:
1415 case PCI_PROTOCOL_VERSION_1_3:
1416 size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1417 dest,
1418 hpdev->desc.win_slot.slot,
1419 cfg->vector);
1420 break;
1421
1422 default:
1423 /* As we only negotiate protocol versions known to this driver,
1424 * this path should never hit. However, this is it not a hot
1425 * path so we print a message to aid future updates.
1426 */
1427 dev_err(&hbus->hdev->device,
1428 "Unexpected vPCI protocol, update driver.");
1429 goto free_int_desc;
1430 }
1431
1432 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1433 size, (unsigned long)&ctxt.pci_pkt,
1434 VM_PKT_DATA_INBAND,
1435 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1436 if (ret) {
1437 dev_err(&hbus->hdev->device,
1438 "Sending request for interrupt failed: 0x%x",
1439 comp.comp_pkt.completion_status);
1440 goto free_int_desc;
1441 }
1442
1443 /*
1444 * Prevents hv_pci_onchannelcallback() from running concurrently
1445 * in the tasklet.
1446 */
1447 tasklet_disable(&channel->callback_event);
1448
1449 /*
1450 * Since this function is called with IRQ locks held, can't
1451 * do normal wait for completion; instead poll.
1452 */
1453 while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1454 unsigned long flags;
1455
1456 /* 0xFFFF means an invalid PCI VENDOR ID. */
1457 if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1458 dev_err_once(&hbus->hdev->device,
1459 "the device has gone\n");
1460 goto enable_tasklet;
1461 }
1462
1463 /*
1464 * Make sure that the ring buffer data structure doesn't get
1465 * freed while we dereference the ring buffer pointer. Test
1466 * for the channel's onchannel_callback being NULL within a
1467 * sched_lock critical section. See also the inline comments
1468 * in vmbus_reset_channel_cb().
1469 */
1470 spin_lock_irqsave(&channel->sched_lock, flags);
1471 if (unlikely(channel->onchannel_callback == NULL)) {
1472 spin_unlock_irqrestore(&channel->sched_lock, flags);
1473 goto enable_tasklet;
1474 }
1475 hv_pci_onchannelcallback(hbus);
1476 spin_unlock_irqrestore(&channel->sched_lock, flags);
1477
1478 if (hpdev->state == hv_pcichild_ejecting) {
1479 dev_err_once(&hbus->hdev->device,
1480 "the device is being ejected\n");
1481 goto enable_tasklet;
1482 }
1483
1484 udelay(100);
1485 }
1486
1487 tasklet_enable(&channel->callback_event);
1488
1489 if (comp.comp_pkt.completion_status < 0) {
1490 dev_err(&hbus->hdev->device,
1491 "Request for interrupt failed: 0x%x",
1492 comp.comp_pkt.completion_status);
1493 goto free_int_desc;
1494 }
1495
1496 /*
1497 * Record the assignment so that this can be unwound later. Using
1498 * irq_set_chip_data() here would be appropriate, but the lock it takes
1499 * is already held.
1500 */
1501 *int_desc = comp.int_desc;
1502 data->chip_data = int_desc;
1503
1504 /* Pass up the result. */
1505 msg->address_hi = comp.int_desc.address >> 32;
1506 msg->address_lo = comp.int_desc.address & 0xffffffff;
1507 msg->data = comp.int_desc.data;
1508
1509 put_pcichild(hpdev);
1510 return;
1511
1512enable_tasklet:
1513 tasklet_enable(&channel->callback_event);
1514free_int_desc:
1515 kfree(int_desc);
1516drop_reference:
1517 put_pcichild(hpdev);
1518return_null_message:
1519 msg->address_hi = 0;
1520 msg->address_lo = 0;
1521 msg->data = 0;
1522}
1523
1524/* HW Interrupt Chip Descriptor */
1525static struct irq_chip hv_msi_irq_chip = {
1526 .name = "Hyper-V PCIe MSI",
1527 .irq_compose_msi_msg = hv_compose_msi_msg,
1528 .irq_set_affinity = hv_set_affinity,
1529 .irq_ack = irq_chip_ack_parent,
1530 .irq_mask = hv_irq_mask,
1531 .irq_unmask = hv_irq_unmask,
1532};
1533
1534static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1535 msi_alloc_info_t *arg)
1536{
1537 return arg->msi_hwirq;
1538}
1539
1540static struct msi_domain_ops hv_msi_ops = {
1541 .get_hwirq = hv_msi_domain_ops_get_hwirq,
1542 .msi_prepare = pci_msi_prepare,
1543 .set_desc = pci_msi_set_desc,
1544 .msi_free = hv_msi_free,
1545};
1546
1547/**
1548 * hv_pcie_init_irq_domain() - Initialize IRQ domain
1549 * @hbus: The root PCI bus
1550 *
1551 * This function creates an IRQ domain which will be used for
1552 * interrupts from devices that have been passed through. These
1553 * devices only support MSI and MSI-X, not line-based interrupts
1554 * or simulations of line-based interrupts through PCIe's
1555 * fabric-layer messages. Because interrupts are remapped, we
1556 * can support multi-message MSI here.
1557 *
1558 * Return: '0' on success and error value on failure
1559 */
1560static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1561{
1562 hbus->msi_info.chip = &hv_msi_irq_chip;
1563 hbus->msi_info.ops = &hv_msi_ops;
1564 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1565 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1566 MSI_FLAG_PCI_MSIX);
1567 hbus->msi_info.handler = handle_edge_irq;
1568 hbus->msi_info.handler_name = "edge";
1569 hbus->msi_info.data = hbus;
1570 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1571 &hbus->msi_info,
1572 x86_vector_domain);
1573 if (!hbus->irq_domain) {
1574 dev_err(&hbus->hdev->device,
1575 "Failed to build an MSI IRQ domain\n");
1576 return -ENODEV;
1577 }
1578
1579 return 0;
1580}
1581
1582/**
1583 * get_bar_size() - Get the address space consumed by a BAR
1584 * @bar_val: Value that a BAR returned after -1 was written
1585 * to it.
1586 *
1587 * This function returns the size of the BAR, rounded up to 1
1588 * page. It has to be rounded up because the hypervisor's page
1589 * table entry that maps the BAR into the VM can't specify an
1590 * offset within a page. The invariant is that the hypervisor
1591 * must place any BARs of smaller than page length at the
1592 * beginning of a page.
1593 *
1594 * Return: Size in bytes of the consumed MMIO space.
1595 */
1596static u64 get_bar_size(u64 bar_val)
1597{
1598 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1599 PAGE_SIZE);
1600}
1601
1602/**
1603 * survey_child_resources() - Total all MMIO requirements
1604 * @hbus: Root PCI bus, as understood by this driver
1605 */
1606static void survey_child_resources(struct hv_pcibus_device *hbus)
1607{
1608 struct hv_pci_dev *hpdev;
1609 resource_size_t bar_size = 0;
1610 unsigned long flags;
1611 struct completion *event;
1612 u64 bar_val;
1613 int i;
1614
1615 /* If nobody is waiting on the answer, don't compute it. */
1616 event = xchg(&hbus->survey_event, NULL);
1617 if (!event)
1618 return;
1619
1620 /* If the answer has already been computed, go with it. */
1621 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1622 complete(event);
1623 return;
1624 }
1625
1626 spin_lock_irqsave(&hbus->device_list_lock, flags);
1627
1628 /*
1629 * Due to an interesting quirk of the PCI spec, all memory regions
1630 * for a child device are a power of 2 in size and aligned in memory,
1631 * so it's sufficient to just add them up without tracking alignment.
1632 */
1633 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1634 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1635 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1636 dev_err(&hbus->hdev->device,
1637 "There's an I/O BAR in this list!\n");
1638
1639 if (hpdev->probed_bar[i] != 0) {
1640 /*
1641 * A probed BAR has all the upper bits set that
1642 * can be changed.
1643 */
1644
1645 bar_val = hpdev->probed_bar[i];
1646 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1647 bar_val |=
1648 ((u64)hpdev->probed_bar[++i] << 32);
1649 else
1650 bar_val |= 0xffffffff00000000ULL;
1651
1652 bar_size = get_bar_size(bar_val);
1653
1654 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1655 hbus->high_mmio_space += bar_size;
1656 else
1657 hbus->low_mmio_space += bar_size;
1658 }
1659 }
1660 }
1661
1662 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1663 complete(event);
1664}
1665
1666/**
1667 * prepopulate_bars() - Fill in BARs with defaults
1668 * @hbus: Root PCI bus, as understood by this driver
1669 *
1670 * The core PCI driver code seems much, much happier if the BARs
1671 * for a device have values upon first scan. So fill them in.
1672 * The algorithm below works down from large sizes to small,
1673 * attempting to pack the assignments optimally. The assumption,
1674 * enforced in other parts of the code, is that the beginning of
1675 * the memory-mapped I/O space will be aligned on the largest
1676 * BAR size.
1677 */
1678static void prepopulate_bars(struct hv_pcibus_device *hbus)
1679{
1680 resource_size_t high_size = 0;
1681 resource_size_t low_size = 0;
1682 resource_size_t high_base = 0;
1683 resource_size_t low_base = 0;
1684 resource_size_t bar_size;
1685 struct hv_pci_dev *hpdev;
1686 unsigned long flags;
1687 u64 bar_val;
1688 u32 command;
1689 bool high;
1690 int i;
1691
1692 if (hbus->low_mmio_space) {
1693 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1694 low_base = hbus->low_mmio_res->start;
1695 }
1696
1697 if (hbus->high_mmio_space) {
1698 high_size = 1ULL <<
1699 (63 - __builtin_clzll(hbus->high_mmio_space));
1700 high_base = hbus->high_mmio_res->start;
1701 }
1702
1703 spin_lock_irqsave(&hbus->device_list_lock, flags);
1704
1705 /*
1706 * Clear the memory enable bit, in case it's already set. This occurs
1707 * in the suspend path of hibernation, where the device is suspended,
1708 * resumed and suspended again: see hibernation_snapshot() and
1709 * hibernation_platform_enter().
1710 *
1711 * If the memory enable bit is already set, Hyper-V sliently ignores
1712 * the below BAR updates, and the related PCI device driver can not
1713 * work, because reading from the device register(s) always returns
1714 * 0xFFFFFFFF.
1715 */
1716 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1717 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
1718 command &= ~PCI_COMMAND_MEMORY;
1719 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, command);
1720 }
1721
1722 /* Pick addresses for the BARs. */
1723 do {
1724 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1725 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1726 bar_val = hpdev->probed_bar[i];
1727 if (bar_val == 0)
1728 continue;
1729 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1730 if (high) {
1731 bar_val |=
1732 ((u64)hpdev->probed_bar[i + 1]
1733 << 32);
1734 } else {
1735 bar_val |= 0xffffffffULL << 32;
1736 }
1737 bar_size = get_bar_size(bar_val);
1738 if (high) {
1739 if (high_size != bar_size) {
1740 i++;
1741 continue;
1742 }
1743 _hv_pcifront_write_config(hpdev,
1744 PCI_BASE_ADDRESS_0 + (4 * i),
1745 4,
1746 (u32)(high_base & 0xffffff00));
1747 i++;
1748 _hv_pcifront_write_config(hpdev,
1749 PCI_BASE_ADDRESS_0 + (4 * i),
1750 4, (u32)(high_base >> 32));
1751 high_base += bar_size;
1752 } else {
1753 if (low_size != bar_size)
1754 continue;
1755 _hv_pcifront_write_config(hpdev,
1756 PCI_BASE_ADDRESS_0 + (4 * i),
1757 4,
1758 (u32)(low_base & 0xffffff00));
1759 low_base += bar_size;
1760 }
1761 }
1762 if (high_size <= 1 && low_size <= 1) {
1763 /* Set the memory enable bit. */
1764 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1765 &command);
1766 command |= PCI_COMMAND_MEMORY;
1767 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1768 command);
1769 break;
1770 }
1771 }
1772
1773 high_size >>= 1;
1774 low_size >>= 1;
1775 } while (high_size || low_size);
1776
1777 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1778}
1779
1780/*
1781 * Assign entries in sysfs pci slot directory.
1782 *
1783 * Note that this function does not need to lock the children list
1784 * because it is called from pci_devices_present_work which
1785 * is serialized with hv_eject_device_work because they are on the
1786 * same ordered workqueue. Therefore hbus->children list will not change
1787 * even when pci_create_slot sleeps.
1788 */
1789static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1790{
1791 struct hv_pci_dev *hpdev;
1792 char name[SLOT_NAME_SIZE];
1793 int slot_nr;
1794
1795 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1796 if (hpdev->pci_slot)
1797 continue;
1798
1799 slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1800 snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1801 hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1802 name, NULL);
1803 if (IS_ERR(hpdev->pci_slot)) {
1804 pr_warn("pci_create slot %s failed\n", name);
1805 hpdev->pci_slot = NULL;
1806 }
1807 }
1808}
1809
1810/*
1811 * Remove entries in sysfs pci slot directory.
1812 */
1813static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1814{
1815 struct hv_pci_dev *hpdev;
1816
1817 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1818 if (!hpdev->pci_slot)
1819 continue;
1820 pci_destroy_slot(hpdev->pci_slot);
1821 hpdev->pci_slot = NULL;
1822 }
1823}
1824
1825/*
1826 * Set NUMA node for the devices on the bus
1827 */
1828static void hv_pci_assign_numa_node(struct hv_pcibus_device *hbus)
1829{
1830 struct pci_dev *dev;
1831 struct pci_bus *bus = hbus->pci_bus;
1832 struct hv_pci_dev *hv_dev;
1833
1834 list_for_each_entry(dev, &bus->devices, bus_list) {
1835 hv_dev = get_pcichild_wslot(hbus, devfn_to_wslot(dev->devfn));
1836 if (!hv_dev)
1837 continue;
1838
1839 if (hv_dev->desc.flags & HV_PCI_DEVICE_FLAG_NUMA_AFFINITY)
1840 set_dev_node(&dev->dev, hv_dev->desc.virtual_numa_node);
1841
1842 put_pcichild(hv_dev);
1843 }
1844}
1845
1846/**
1847 * create_root_hv_pci_bus() - Expose a new root PCI bus
1848 * @hbus: Root PCI bus, as understood by this driver
1849 *
1850 * Return: 0 on success, -errno on failure
1851 */
1852static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1853{
1854 /* Register the device */
1855 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1856 0, /* bus number is always zero */
1857 &hv_pcifront_ops,
1858 &hbus->sysdata,
1859 &hbus->resources_for_children);
1860 if (!hbus->pci_bus)
1861 return -ENODEV;
1862
1863 hbus->pci_bus->msi = &hbus->msi_chip;
1864 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1865
1866 pci_lock_rescan_remove();
1867 pci_scan_child_bus(hbus->pci_bus);
1868 hv_pci_assign_numa_node(hbus);
1869 pci_bus_assign_resources(hbus->pci_bus);
1870 hv_pci_assign_slots(hbus);
1871 pci_bus_add_devices(hbus->pci_bus);
1872 pci_unlock_rescan_remove();
1873 hbus->state = hv_pcibus_installed;
1874 return 0;
1875}
1876
1877struct q_res_req_compl {
1878 struct completion host_event;
1879 struct hv_pci_dev *hpdev;
1880};
1881
1882/**
1883 * q_resource_requirements() - Query Resource Requirements
1884 * @context: The completion context.
1885 * @resp: The response that came from the host.
1886 * @resp_packet_size: The size in bytes of resp.
1887 *
1888 * This function is invoked on completion of a Query Resource
1889 * Requirements packet.
1890 */
1891static void q_resource_requirements(void *context, struct pci_response *resp,
1892 int resp_packet_size)
1893{
1894 struct q_res_req_compl *completion = context;
1895 struct pci_q_res_req_response *q_res_req =
1896 (struct pci_q_res_req_response *)resp;
1897 int i;
1898
1899 if (resp->status < 0) {
1900 dev_err(&completion->hpdev->hbus->hdev->device,
1901 "query resource requirements failed: %x\n",
1902 resp->status);
1903 } else {
1904 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1905 completion->hpdev->probed_bar[i] =
1906 q_res_req->probed_bar[i];
1907 }
1908 }
1909
1910 complete(&completion->host_event);
1911}
1912
1913/**
1914 * new_pcichild_device() - Create a new child device
1915 * @hbus: The internal struct tracking this root PCI bus.
1916 * @desc: The information supplied so far from the host
1917 * about the device.
1918 *
1919 * This function creates the tracking structure for a new child
1920 * device and kicks off the process of figuring out what it is.
1921 *
1922 * Return: Pointer to the new tracking struct
1923 */
1924static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1925 struct hv_pcidev_description *desc)
1926{
1927 struct hv_pci_dev *hpdev;
1928 struct pci_child_message *res_req;
1929 struct q_res_req_compl comp_pkt;
1930 struct {
1931 struct pci_packet init_packet;
1932 u8 buffer[sizeof(struct pci_child_message)];
1933 } pkt;
1934 unsigned long flags;
1935 int ret;
1936
1937 hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
1938 if (!hpdev)
1939 return NULL;
1940
1941 hpdev->hbus = hbus;
1942
1943 memset(&pkt, 0, sizeof(pkt));
1944 init_completion(&comp_pkt.host_event);
1945 comp_pkt.hpdev = hpdev;
1946 pkt.init_packet.compl_ctxt = &comp_pkt;
1947 pkt.init_packet.completion_func = q_resource_requirements;
1948 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1949 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1950 res_req->wslot.slot = desc->win_slot.slot;
1951
1952 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1953 sizeof(struct pci_child_message),
1954 (unsigned long)&pkt.init_packet,
1955 VM_PKT_DATA_INBAND,
1956 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1957 if (ret)
1958 goto error;
1959
1960 if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1961 goto error;
1962
1963 hpdev->desc = *desc;
1964 refcount_set(&hpdev->refs, 1);
1965 get_pcichild(hpdev);
1966 spin_lock_irqsave(&hbus->device_list_lock, flags);
1967
1968 list_add_tail(&hpdev->list_entry, &hbus->children);
1969 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1970 return hpdev;
1971
1972error:
1973 kfree(hpdev);
1974 return NULL;
1975}
1976
1977/**
1978 * get_pcichild_wslot() - Find device from slot
1979 * @hbus: Root PCI bus, as understood by this driver
1980 * @wslot: Location on the bus
1981 *
1982 * This function looks up a PCI device and returns the internal
1983 * representation of it. It acquires a reference on it, so that
1984 * the device won't be deleted while somebody is using it. The
1985 * caller is responsible for calling put_pcichild() to release
1986 * this reference.
1987 *
1988 * Return: Internal representation of a PCI device
1989 */
1990static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1991 u32 wslot)
1992{
1993 unsigned long flags;
1994 struct hv_pci_dev *iter, *hpdev = NULL;
1995
1996 spin_lock_irqsave(&hbus->device_list_lock, flags);
1997 list_for_each_entry(iter, &hbus->children, list_entry) {
1998 if (iter->desc.win_slot.slot == wslot) {
1999 hpdev = iter;
2000 get_pcichild(hpdev);
2001 break;
2002 }
2003 }
2004 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2005
2006 return hpdev;
2007}
2008
2009/**
2010 * pci_devices_present_work() - Handle new list of child devices
2011 * @work: Work struct embedded in struct hv_dr_work
2012 *
2013 * "Bus Relations" is the Windows term for "children of this
2014 * bus." The terminology is preserved here for people trying to
2015 * debug the interaction between Hyper-V and Linux. This
2016 * function is called when the parent partition reports a list
2017 * of functions that should be observed under this PCI Express
2018 * port (bus).
2019 *
2020 * This function updates the list, and must tolerate being
2021 * called multiple times with the same information. The typical
2022 * number of child devices is one, with very atypical cases
2023 * involving three or four, so the algorithms used here can be
2024 * simple and inefficient.
2025 *
2026 * It must also treat the omission of a previously observed device as
2027 * notification that the device no longer exists.
2028 *
2029 * Note that this function is serialized with hv_eject_device_work(),
2030 * because both are pushed to the ordered workqueue hbus->wq.
2031 */
2032static void pci_devices_present_work(struct work_struct *work)
2033{
2034 u32 child_no;
2035 bool found;
2036 struct hv_pcidev_description *new_desc;
2037 struct hv_pci_dev *hpdev;
2038 struct hv_pcibus_device *hbus;
2039 struct list_head removed;
2040 struct hv_dr_work *dr_wrk;
2041 struct hv_dr_state *dr = NULL;
2042 unsigned long flags;
2043
2044 dr_wrk = container_of(work, struct hv_dr_work, wrk);
2045 hbus = dr_wrk->bus;
2046 kfree(dr_wrk);
2047
2048 INIT_LIST_HEAD(&removed);
2049
2050 /* Pull this off the queue and process it if it was the last one. */
2051 spin_lock_irqsave(&hbus->device_list_lock, flags);
2052 while (!list_empty(&hbus->dr_list)) {
2053 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
2054 list_entry);
2055 list_del(&dr->list_entry);
2056
2057 /* Throw this away if the list still has stuff in it. */
2058 if (!list_empty(&hbus->dr_list)) {
2059 kfree(dr);
2060 continue;
2061 }
2062 }
2063 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2064
2065 if (!dr) {
2066 put_hvpcibus(hbus);
2067 return;
2068 }
2069
2070 /* First, mark all existing children as reported missing. */
2071 spin_lock_irqsave(&hbus->device_list_lock, flags);
2072 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2073 hpdev->reported_missing = true;
2074 }
2075 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2076
2077 /* Next, add back any reported devices. */
2078 for (child_no = 0; child_no < dr->device_count; child_no++) {
2079 found = false;
2080 new_desc = &dr->func[child_no];
2081
2082 spin_lock_irqsave(&hbus->device_list_lock, flags);
2083 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2084 if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
2085 (hpdev->desc.v_id == new_desc->v_id) &&
2086 (hpdev->desc.d_id == new_desc->d_id) &&
2087 (hpdev->desc.ser == new_desc->ser)) {
2088 hpdev->reported_missing = false;
2089 found = true;
2090 }
2091 }
2092 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2093
2094 if (!found) {
2095 hpdev = new_pcichild_device(hbus, new_desc);
2096 if (!hpdev)
2097 dev_err(&hbus->hdev->device,
2098 "couldn't record a child device.\n");
2099 }
2100 }
2101
2102 /* Move missing children to a list on the stack. */
2103 spin_lock_irqsave(&hbus->device_list_lock, flags);
2104 do {
2105 found = false;
2106 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2107 if (hpdev->reported_missing) {
2108 found = true;
2109 put_pcichild(hpdev);
2110 list_move_tail(&hpdev->list_entry, &removed);
2111 break;
2112 }
2113 }
2114 } while (found);
2115 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2116
2117 /* Delete everything that should no longer exist. */
2118 while (!list_empty(&removed)) {
2119 hpdev = list_first_entry(&removed, struct hv_pci_dev,
2120 list_entry);
2121 list_del(&hpdev->list_entry);
2122
2123 if (hpdev->pci_slot)
2124 pci_destroy_slot(hpdev->pci_slot);
2125
2126 put_pcichild(hpdev);
2127 }
2128
2129 switch (hbus->state) {
2130 case hv_pcibus_installed:
2131 /*
2132 * Tell the core to rescan bus
2133 * because there may have been changes.
2134 */
2135 pci_lock_rescan_remove();
2136 pci_scan_child_bus(hbus->pci_bus);
2137 hv_pci_assign_numa_node(hbus);
2138 hv_pci_assign_slots(hbus);
2139 pci_unlock_rescan_remove();
2140 break;
2141
2142 case hv_pcibus_init:
2143 case hv_pcibus_probed:
2144 survey_child_resources(hbus);
2145 break;
2146
2147 default:
2148 break;
2149 }
2150
2151 put_hvpcibus(hbus);
2152 kfree(dr);
2153}
2154
2155/**
2156 * hv_pci_start_relations_work() - Queue work to start device discovery
2157 * @hbus: Root PCI bus, as understood by this driver
2158 * @dr: The list of children returned from host
2159 *
2160 * Return: 0 on success, -errno on failure
2161 */
2162static int hv_pci_start_relations_work(struct hv_pcibus_device *hbus,
2163 struct hv_dr_state *dr)
2164{
2165 struct hv_dr_work *dr_wrk;
2166 unsigned long flags;
2167 bool pending_dr;
2168
2169 if (hbus->state == hv_pcibus_removing) {
2170 dev_info(&hbus->hdev->device,
2171 "PCI VMBus BUS_RELATIONS: ignored\n");
2172 return -ENOENT;
2173 }
2174
2175 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
2176 if (!dr_wrk)
2177 return -ENOMEM;
2178
2179 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
2180 dr_wrk->bus = hbus;
2181
2182 spin_lock_irqsave(&hbus->device_list_lock, flags);
2183 /*
2184 * If pending_dr is true, we have already queued a work,
2185 * which will see the new dr. Otherwise, we need to
2186 * queue a new work.
2187 */
2188 pending_dr = !list_empty(&hbus->dr_list);
2189 list_add_tail(&dr->list_entry, &hbus->dr_list);
2190 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2191
2192 if (pending_dr) {
2193 kfree(dr_wrk);
2194 } else {
2195 get_hvpcibus(hbus);
2196 queue_work(hbus->wq, &dr_wrk->wrk);
2197 }
2198
2199 return 0;
2200}
2201
2202/**
2203 * hv_pci_devices_present() - Handle list of new children
2204 * @hbus: Root PCI bus, as understood by this driver
2205 * @relations: Packet from host listing children
2206 *
2207 * Process a new list of devices on the bus. The list of devices is
2208 * discovered by VSP and sent to us via VSP message PCI_BUS_RELATIONS,
2209 * whenever a new list of devices for this bus appears.
2210 */
2211static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
2212 struct pci_bus_relations *relations)
2213{
2214 struct hv_dr_state *dr;
2215 int i;
2216
2217 dr = kzalloc(struct_size(dr, func, relations->device_count),
2218 GFP_NOWAIT);
2219 if (!dr)
2220 return;
2221
2222 dr->device_count = relations->device_count;
2223 for (i = 0; i < dr->device_count; i++) {
2224 dr->func[i].v_id = relations->func[i].v_id;
2225 dr->func[i].d_id = relations->func[i].d_id;
2226 dr->func[i].rev = relations->func[i].rev;
2227 dr->func[i].prog_intf = relations->func[i].prog_intf;
2228 dr->func[i].subclass = relations->func[i].subclass;
2229 dr->func[i].base_class = relations->func[i].base_class;
2230 dr->func[i].subsystem_id = relations->func[i].subsystem_id;
2231 dr->func[i].win_slot = relations->func[i].win_slot;
2232 dr->func[i].ser = relations->func[i].ser;
2233 }
2234
2235 if (hv_pci_start_relations_work(hbus, dr))
2236 kfree(dr);
2237}
2238
2239/**
2240 * hv_pci_devices_present2() - Handle list of new children
2241 * @hbus: Root PCI bus, as understood by this driver
2242 * @relations: Packet from host listing children
2243 *
2244 * This function is the v2 version of hv_pci_devices_present()
2245 */
2246static void hv_pci_devices_present2(struct hv_pcibus_device *hbus,
2247 struct pci_bus_relations2 *relations)
2248{
2249 struct hv_dr_state *dr;
2250 int i;
2251
2252 dr = kzalloc(struct_size(dr, func, relations->device_count),
2253 GFP_NOWAIT);
2254 if (!dr)
2255 return;
2256
2257 dr->device_count = relations->device_count;
2258 for (i = 0; i < dr->device_count; i++) {
2259 dr->func[i].v_id = relations->func[i].v_id;
2260 dr->func[i].d_id = relations->func[i].d_id;
2261 dr->func[i].rev = relations->func[i].rev;
2262 dr->func[i].prog_intf = relations->func[i].prog_intf;
2263 dr->func[i].subclass = relations->func[i].subclass;
2264 dr->func[i].base_class = relations->func[i].base_class;
2265 dr->func[i].subsystem_id = relations->func[i].subsystem_id;
2266 dr->func[i].win_slot = relations->func[i].win_slot;
2267 dr->func[i].ser = relations->func[i].ser;
2268 dr->func[i].flags = relations->func[i].flags;
2269 dr->func[i].virtual_numa_node =
2270 relations->func[i].virtual_numa_node;
2271 }
2272
2273 if (hv_pci_start_relations_work(hbus, dr))
2274 kfree(dr);
2275}
2276
2277/**
2278 * hv_eject_device_work() - Asynchronously handles ejection
2279 * @work: Work struct embedded in internal device struct
2280 *
2281 * This function handles ejecting a device. Windows will
2282 * attempt to gracefully eject a device, waiting 60 seconds to
2283 * hear back from the guest OS that this completed successfully.
2284 * If this timer expires, the device will be forcibly removed.
2285 */
2286static void hv_eject_device_work(struct work_struct *work)
2287{
2288 struct pci_eject_response *ejct_pkt;
2289 struct hv_pcibus_device *hbus;
2290 struct hv_pci_dev *hpdev;
2291 struct pci_dev *pdev;
2292 unsigned long flags;
2293 int wslot;
2294 struct {
2295 struct pci_packet pkt;
2296 u8 buffer[sizeof(struct pci_eject_response)];
2297 } ctxt;
2298
2299 hpdev = container_of(work, struct hv_pci_dev, wrk);
2300 hbus = hpdev->hbus;
2301
2302 WARN_ON(hpdev->state != hv_pcichild_ejecting);
2303
2304 /*
2305 * Ejection can come before or after the PCI bus has been set up, so
2306 * attempt to find it and tear down the bus state, if it exists. This
2307 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
2308 * because hbus->pci_bus may not exist yet.
2309 */
2310 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
2311 pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
2312 if (pdev) {
2313 pci_lock_rescan_remove();
2314 pci_stop_and_remove_bus_device(pdev);
2315 pci_dev_put(pdev);
2316 pci_unlock_rescan_remove();
2317 }
2318
2319 spin_lock_irqsave(&hbus->device_list_lock, flags);
2320 list_del(&hpdev->list_entry);
2321 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2322
2323 if (hpdev->pci_slot)
2324 pci_destroy_slot(hpdev->pci_slot);
2325
2326 memset(&ctxt, 0, sizeof(ctxt));
2327 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
2328 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
2329 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
2330 vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
2331 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
2332 VM_PKT_DATA_INBAND, 0);
2333
2334 /* For the get_pcichild() in hv_pci_eject_device() */
2335 put_pcichild(hpdev);
2336 /* For the two refs got in new_pcichild_device() */
2337 put_pcichild(hpdev);
2338 put_pcichild(hpdev);
2339 /* hpdev has been freed. Do not use it any more. */
2340
2341 put_hvpcibus(hbus);
2342}
2343
2344/**
2345 * hv_pci_eject_device() - Handles device ejection
2346 * @hpdev: Internal device tracking struct
2347 *
2348 * This function is invoked when an ejection packet arrives. It
2349 * just schedules work so that we don't re-enter the packet
2350 * delivery code handling the ejection.
2351 */
2352static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
2353{
2354 struct hv_pcibus_device *hbus = hpdev->hbus;
2355 struct hv_device *hdev = hbus->hdev;
2356
2357 if (hbus->state == hv_pcibus_removing) {
2358 dev_info(&hdev->device, "PCI VMBus EJECT: ignored\n");
2359 return;
2360 }
2361
2362 hpdev->state = hv_pcichild_ejecting;
2363 get_pcichild(hpdev);
2364 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
2365 get_hvpcibus(hbus);
2366 queue_work(hbus->wq, &hpdev->wrk);
2367}
2368
2369/**
2370 * hv_pci_onchannelcallback() - Handles incoming packets
2371 * @context: Internal bus tracking struct
2372 *
2373 * This function is invoked whenever the host sends a packet to
2374 * this channel (which is private to this root PCI bus).
2375 */
2376static void hv_pci_onchannelcallback(void *context)
2377{
2378 const int packet_size = 0x100;
2379 int ret;
2380 struct hv_pcibus_device *hbus = context;
2381 u32 bytes_recvd;
2382 u64 req_id;
2383 struct vmpacket_descriptor *desc;
2384 unsigned char *buffer;
2385 int bufferlen = packet_size;
2386 struct pci_packet *comp_packet;
2387 struct pci_response *response;
2388 struct pci_incoming_message *new_message;
2389 struct pci_bus_relations *bus_rel;
2390 struct pci_bus_relations2 *bus_rel2;
2391 struct pci_dev_inval_block *inval;
2392 struct pci_dev_incoming *dev_message;
2393 struct hv_pci_dev *hpdev;
2394
2395 buffer = kmalloc(bufferlen, GFP_ATOMIC);
2396 if (!buffer)
2397 return;
2398
2399 while (1) {
2400 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
2401 bufferlen, &bytes_recvd, &req_id);
2402
2403 if (ret == -ENOBUFS) {
2404 kfree(buffer);
2405 /* Handle large packet */
2406 bufferlen = bytes_recvd;
2407 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2408 if (!buffer)
2409 return;
2410 continue;
2411 }
2412
2413 /* Zero length indicates there are no more packets. */
2414 if (ret || !bytes_recvd)
2415 break;
2416
2417 /*
2418 * All incoming packets must be at least as large as a
2419 * response.
2420 */
2421 if (bytes_recvd <= sizeof(struct pci_response))
2422 continue;
2423 desc = (struct vmpacket_descriptor *)buffer;
2424
2425 switch (desc->type) {
2426 case VM_PKT_COMP:
2427
2428 /*
2429 * The host is trusted, and thus it's safe to interpret
2430 * this transaction ID as a pointer.
2431 */
2432 comp_packet = (struct pci_packet *)req_id;
2433 response = (struct pci_response *)buffer;
2434 comp_packet->completion_func(comp_packet->compl_ctxt,
2435 response,
2436 bytes_recvd);
2437 break;
2438
2439 case VM_PKT_DATA_INBAND:
2440
2441 new_message = (struct pci_incoming_message *)buffer;
2442 switch (new_message->message_type.type) {
2443 case PCI_BUS_RELATIONS:
2444
2445 bus_rel = (struct pci_bus_relations *)buffer;
2446 if (bytes_recvd <
2447 struct_size(bus_rel, func,
2448 bus_rel->device_count)) {
2449 dev_err(&hbus->hdev->device,
2450 "bus relations too small\n");
2451 break;
2452 }
2453
2454 hv_pci_devices_present(hbus, bus_rel);
2455 break;
2456
2457 case PCI_BUS_RELATIONS2:
2458
2459 bus_rel2 = (struct pci_bus_relations2 *)buffer;
2460 if (bytes_recvd <
2461 struct_size(bus_rel2, func,
2462 bus_rel2->device_count)) {
2463 dev_err(&hbus->hdev->device,
2464 "bus relations v2 too small\n");
2465 break;
2466 }
2467
2468 hv_pci_devices_present2(hbus, bus_rel2);
2469 break;
2470
2471 case PCI_EJECT:
2472
2473 dev_message = (struct pci_dev_incoming *)buffer;
2474 hpdev = get_pcichild_wslot(hbus,
2475 dev_message->wslot.slot);
2476 if (hpdev) {
2477 hv_pci_eject_device(hpdev);
2478 put_pcichild(hpdev);
2479 }
2480 break;
2481
2482 case PCI_INVALIDATE_BLOCK:
2483
2484 inval = (struct pci_dev_inval_block *)buffer;
2485 hpdev = get_pcichild_wslot(hbus,
2486 inval->wslot.slot);
2487 if (hpdev) {
2488 if (hpdev->block_invalidate) {
2489 hpdev->block_invalidate(
2490 hpdev->invalidate_context,
2491 inval->block_mask);
2492 }
2493 put_pcichild(hpdev);
2494 }
2495 break;
2496
2497 default:
2498 dev_warn(&hbus->hdev->device,
2499 "Unimplemented protocol message %x\n",
2500 new_message->message_type.type);
2501 break;
2502 }
2503 break;
2504
2505 default:
2506 dev_err(&hbus->hdev->device,
2507 "unhandled packet type %d, tid %llx len %d\n",
2508 desc->type, req_id, bytes_recvd);
2509 break;
2510 }
2511 }
2512
2513 kfree(buffer);
2514}
2515
2516/**
2517 * hv_pci_protocol_negotiation() - Set up protocol
2518 * @hdev: VMBus's tracking struct for this root PCI bus
2519 *
2520 * This driver is intended to support running on Windows 10
2521 * (server) and later versions. It will not run on earlier
2522 * versions, as they assume that many of the operations which
2523 * Linux needs accomplished with a spinlock held were done via
2524 * asynchronous messaging via VMBus. Windows 10 increases the
2525 * surface area of PCI emulation so that these actions can take
2526 * place by suspending a virtual processor for their duration.
2527 *
2528 * This function negotiates the channel protocol version,
2529 * failing if the host doesn't support the necessary protocol
2530 * level.
2531 */
2532static int hv_pci_protocol_negotiation(struct hv_device *hdev,
2533 enum pci_protocol_version_t version[],
2534 int num_version)
2535{
2536 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2537 struct pci_version_request *version_req;
2538 struct hv_pci_compl comp_pkt;
2539 struct pci_packet *pkt;
2540 int ret;
2541 int i;
2542
2543 /*
2544 * Initiate the handshake with the host and negotiate
2545 * a version that the host can support. We start with the
2546 * highest version number and go down if the host cannot
2547 * support it.
2548 */
2549 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2550 if (!pkt)
2551 return -ENOMEM;
2552
2553 init_completion(&comp_pkt.host_event);
2554 pkt->completion_func = hv_pci_generic_compl;
2555 pkt->compl_ctxt = &comp_pkt;
2556 version_req = (struct pci_version_request *)&pkt->message;
2557 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2558
2559 for (i = 0; i < num_version; i++) {
2560 version_req->protocol_version = version[i];
2561 ret = vmbus_sendpacket(hdev->channel, version_req,
2562 sizeof(struct pci_version_request),
2563 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2564 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2565 if (!ret)
2566 ret = wait_for_response(hdev, &comp_pkt.host_event);
2567
2568 if (ret) {
2569 dev_err(&hdev->device,
2570 "PCI Pass-through VSP failed to request version: %d",
2571 ret);
2572 goto exit;
2573 }
2574
2575 if (comp_pkt.completion_status >= 0) {
2576 hbus->protocol_version = version[i];
2577 dev_info(&hdev->device,
2578 "PCI VMBus probing: Using version %#x\n",
2579 hbus->protocol_version);
2580 goto exit;
2581 }
2582
2583 if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2584 dev_err(&hdev->device,
2585 "PCI Pass-through VSP failed version request: %#x",
2586 comp_pkt.completion_status);
2587 ret = -EPROTO;
2588 goto exit;
2589 }
2590
2591 reinit_completion(&comp_pkt.host_event);
2592 }
2593
2594 dev_err(&hdev->device,
2595 "PCI pass-through VSP failed to find supported version");
2596 ret = -EPROTO;
2597
2598exit:
2599 kfree(pkt);
2600 return ret;
2601}
2602
2603/**
2604 * hv_pci_free_bridge_windows() - Release memory regions for the
2605 * bus
2606 * @hbus: Root PCI bus, as understood by this driver
2607 */
2608static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2609{
2610 /*
2611 * Set the resources back to the way they looked when they
2612 * were allocated by setting IORESOURCE_BUSY again.
2613 */
2614
2615 if (hbus->low_mmio_space && hbus->low_mmio_res) {
2616 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2617 vmbus_free_mmio(hbus->low_mmio_res->start,
2618 resource_size(hbus->low_mmio_res));
2619 }
2620
2621 if (hbus->high_mmio_space && hbus->high_mmio_res) {
2622 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2623 vmbus_free_mmio(hbus->high_mmio_res->start,
2624 resource_size(hbus->high_mmio_res));
2625 }
2626}
2627
2628/**
2629 * hv_pci_allocate_bridge_windows() - Allocate memory regions
2630 * for the bus
2631 * @hbus: Root PCI bus, as understood by this driver
2632 *
2633 * This function calls vmbus_allocate_mmio(), which is itself a
2634 * bit of a compromise. Ideally, we might change the pnp layer
2635 * in the kernel such that it comprehends either PCI devices
2636 * which are "grandchildren of ACPI," with some intermediate bus
2637 * node (in this case, VMBus) or change it such that it
2638 * understands VMBus. The pnp layer, however, has been declared
2639 * deprecated, and not subject to change.
2640 *
2641 * The workaround, implemented here, is to ask VMBus to allocate
2642 * MMIO space for this bus. VMBus itself knows which ranges are
2643 * appropriate by looking at its own ACPI objects. Then, after
2644 * these ranges are claimed, they're modified to look like they
2645 * would have looked if the ACPI and pnp code had allocated
2646 * bridge windows. These descriptors have to exist in this form
2647 * in order to satisfy the code which will get invoked when the
2648 * endpoint PCI function driver calls request_mem_region() or
2649 * request_mem_region_exclusive().
2650 *
2651 * Return: 0 on success, -errno on failure
2652 */
2653static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2654{
2655 resource_size_t align;
2656 int ret;
2657
2658 if (hbus->low_mmio_space) {
2659 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2660 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2661 (u64)(u32)0xffffffff,
2662 hbus->low_mmio_space,
2663 align, false);
2664 if (ret) {
2665 dev_err(&hbus->hdev->device,
2666 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2667 hbus->low_mmio_space);
2668 return ret;
2669 }
2670
2671 /* Modify this resource to become a bridge window. */
2672 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2673 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2674 pci_add_resource(&hbus->resources_for_children,
2675 hbus->low_mmio_res);
2676 }
2677
2678 if (hbus->high_mmio_space) {
2679 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2680 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2681 0x100000000, -1,
2682 hbus->high_mmio_space, align,
2683 false);
2684 if (ret) {
2685 dev_err(&hbus->hdev->device,
2686 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2687 hbus->high_mmio_space);
2688 goto release_low_mmio;
2689 }
2690
2691 /* Modify this resource to become a bridge window. */
2692 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2693 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2694 pci_add_resource(&hbus->resources_for_children,
2695 hbus->high_mmio_res);
2696 }
2697
2698 return 0;
2699
2700release_low_mmio:
2701 if (hbus->low_mmio_res) {
2702 vmbus_free_mmio(hbus->low_mmio_res->start,
2703 resource_size(hbus->low_mmio_res));
2704 }
2705
2706 return ret;
2707}
2708
2709/**
2710 * hv_allocate_config_window() - Find MMIO space for PCI Config
2711 * @hbus: Root PCI bus, as understood by this driver
2712 *
2713 * This function claims memory-mapped I/O space for accessing
2714 * configuration space for the functions on this bus.
2715 *
2716 * Return: 0 on success, -errno on failure
2717 */
2718static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2719{
2720 int ret;
2721
2722 /*
2723 * Set up a region of MMIO space to use for accessing configuration
2724 * space.
2725 */
2726 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2727 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2728 if (ret)
2729 return ret;
2730
2731 /*
2732 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2733 * resource claims (those which cannot be overlapped) and the ranges
2734 * which are valid for the children of this bus, which are intended
2735 * to be overlapped by those children. Set the flag on this claim
2736 * meaning that this region can't be overlapped.
2737 */
2738
2739 hbus->mem_config->flags |= IORESOURCE_BUSY;
2740
2741 return 0;
2742}
2743
2744static void hv_free_config_window(struct hv_pcibus_device *hbus)
2745{
2746 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2747}
2748
2749static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs);
2750
2751/**
2752 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2753 * @hdev: VMBus's tracking struct for this root PCI bus
2754 *
2755 * Return: 0 on success, -errno on failure
2756 */
2757static int hv_pci_enter_d0(struct hv_device *hdev)
2758{
2759 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2760 struct pci_bus_d0_entry *d0_entry;
2761 struct hv_pci_compl comp_pkt;
2762 struct pci_packet *pkt;
2763 int ret;
2764
2765 /*
2766 * Tell the host that the bus is ready to use, and moved into the
2767 * powered-on state. This includes telling the host which region
2768 * of memory-mapped I/O space has been chosen for configuration space
2769 * access.
2770 */
2771 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2772 if (!pkt)
2773 return -ENOMEM;
2774
2775 init_completion(&comp_pkt.host_event);
2776 pkt->completion_func = hv_pci_generic_compl;
2777 pkt->compl_ctxt = &comp_pkt;
2778 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2779 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2780 d0_entry->mmio_base = hbus->mem_config->start;
2781
2782 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2783 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2784 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2785 if (!ret)
2786 ret = wait_for_response(hdev, &comp_pkt.host_event);
2787
2788 if (ret)
2789 goto exit;
2790
2791 if (comp_pkt.completion_status < 0) {
2792 dev_err(&hdev->device,
2793 "PCI Pass-through VSP failed D0 Entry with status %x\n",
2794 comp_pkt.completion_status);
2795 ret = -EPROTO;
2796 goto exit;
2797 }
2798
2799 ret = 0;
2800
2801exit:
2802 kfree(pkt);
2803 return ret;
2804}
2805
2806/**
2807 * hv_pci_query_relations() - Ask host to send list of child
2808 * devices
2809 * @hdev: VMBus's tracking struct for this root PCI bus
2810 *
2811 * Return: 0 on success, -errno on failure
2812 */
2813static int hv_pci_query_relations(struct hv_device *hdev)
2814{
2815 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2816 struct pci_message message;
2817 struct completion comp;
2818 int ret;
2819
2820 /* Ask the host to send along the list of child devices */
2821 init_completion(&comp);
2822 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2823 return -ENOTEMPTY;
2824
2825 memset(&message, 0, sizeof(message));
2826 message.type = PCI_QUERY_BUS_RELATIONS;
2827
2828 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2829 0, VM_PKT_DATA_INBAND, 0);
2830 if (!ret)
2831 ret = wait_for_response(hdev, &comp);
2832
2833 return ret;
2834}
2835
2836/**
2837 * hv_send_resources_allocated() - Report local resource choices
2838 * @hdev: VMBus's tracking struct for this root PCI bus
2839 *
2840 * The host OS is expecting to be sent a request as a message
2841 * which contains all the resources that the device will use.
2842 * The response contains those same resources, "translated"
2843 * which is to say, the values which should be used by the
2844 * hardware, when it delivers an interrupt. (MMIO resources are
2845 * used in local terms.) This is nice for Windows, and lines up
2846 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2847 * is deeply expecting to scan an emulated PCI configuration
2848 * space. So this message is sent here only to drive the state
2849 * machine on the host forward.
2850 *
2851 * Return: 0 on success, -errno on failure
2852 */
2853static int hv_send_resources_allocated(struct hv_device *hdev)
2854{
2855 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2856 struct pci_resources_assigned *res_assigned;
2857 struct pci_resources_assigned2 *res_assigned2;
2858 struct hv_pci_compl comp_pkt;
2859 struct hv_pci_dev *hpdev;
2860 struct pci_packet *pkt;
2861 size_t size_res;
2862 int wslot;
2863 int ret;
2864
2865 size_res = (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2)
2866 ? sizeof(*res_assigned) : sizeof(*res_assigned2);
2867
2868 pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2869 if (!pkt)
2870 return -ENOMEM;
2871
2872 ret = 0;
2873
2874 for (wslot = 0; wslot < 256; wslot++) {
2875 hpdev = get_pcichild_wslot(hbus, wslot);
2876 if (!hpdev)
2877 continue;
2878
2879 memset(pkt, 0, sizeof(*pkt) + size_res);
2880 init_completion(&comp_pkt.host_event);
2881 pkt->completion_func = hv_pci_generic_compl;
2882 pkt->compl_ctxt = &comp_pkt;
2883
2884 if (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2885 res_assigned =
2886 (struct pci_resources_assigned *)&pkt->message;
2887 res_assigned->message_type.type =
2888 PCI_RESOURCES_ASSIGNED;
2889 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2890 } else {
2891 res_assigned2 =
2892 (struct pci_resources_assigned2 *)&pkt->message;
2893 res_assigned2->message_type.type =
2894 PCI_RESOURCES_ASSIGNED2;
2895 res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2896 }
2897 put_pcichild(hpdev);
2898
2899 ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2900 size_res, (unsigned long)pkt,
2901 VM_PKT_DATA_INBAND,
2902 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2903 if (!ret)
2904 ret = wait_for_response(hdev, &comp_pkt.host_event);
2905 if (ret)
2906 break;
2907
2908 if (comp_pkt.completion_status < 0) {
2909 ret = -EPROTO;
2910 dev_err(&hdev->device,
2911 "resource allocated returned 0x%x",
2912 comp_pkt.completion_status);
2913 break;
2914 }
2915
2916 hbus->wslot_res_allocated = wslot;
2917 }
2918
2919 kfree(pkt);
2920 return ret;
2921}
2922
2923/**
2924 * hv_send_resources_released() - Report local resources
2925 * released
2926 * @hdev: VMBus's tracking struct for this root PCI bus
2927 *
2928 * Return: 0 on success, -errno on failure
2929 */
2930static int hv_send_resources_released(struct hv_device *hdev)
2931{
2932 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2933 struct pci_child_message pkt;
2934 struct hv_pci_dev *hpdev;
2935 int wslot;
2936 int ret;
2937
2938 for (wslot = hbus->wslot_res_allocated; wslot >= 0; wslot--) {
2939 hpdev = get_pcichild_wslot(hbus, wslot);
2940 if (!hpdev)
2941 continue;
2942
2943 memset(&pkt, 0, sizeof(pkt));
2944 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2945 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2946
2947 put_pcichild(hpdev);
2948
2949 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2950 VM_PKT_DATA_INBAND, 0);
2951 if (ret)
2952 return ret;
2953
2954 hbus->wslot_res_allocated = wslot - 1;
2955 }
2956
2957 hbus->wslot_res_allocated = -1;
2958
2959 return 0;
2960}
2961
2962static void get_hvpcibus(struct hv_pcibus_device *hbus)
2963{
2964 refcount_inc(&hbus->remove_lock);
2965}
2966
2967static void put_hvpcibus(struct hv_pcibus_device *hbus)
2968{
2969 if (refcount_dec_and_test(&hbus->remove_lock))
2970 complete(&hbus->remove_event);
2971}
2972
2973#define HVPCI_DOM_MAP_SIZE (64 * 1024)
2974static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
2975
2976/*
2977 * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
2978 * as invalid for passthrough PCI devices of this driver.
2979 */
2980#define HVPCI_DOM_INVALID 0
2981
2982/**
2983 * hv_get_dom_num() - Get a valid PCI domain number
2984 * Check if the PCI domain number is in use, and return another number if
2985 * it is in use.
2986 *
2987 * @dom: Requested domain number
2988 *
2989 * return: domain number on success, HVPCI_DOM_INVALID on failure
2990 */
2991static u16 hv_get_dom_num(u16 dom)
2992{
2993 unsigned int i;
2994
2995 if (test_and_set_bit(dom, hvpci_dom_map) == 0)
2996 return dom;
2997
2998 for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
2999 if (test_and_set_bit(i, hvpci_dom_map) == 0)
3000 return i;
3001 }
3002
3003 return HVPCI_DOM_INVALID;
3004}
3005
3006/**
3007 * hv_put_dom_num() - Mark the PCI domain number as free
3008 * @dom: Domain number to be freed
3009 */
3010static void hv_put_dom_num(u16 dom)
3011{
3012 clear_bit(dom, hvpci_dom_map);
3013}
3014
3015/**
3016 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
3017 * @hdev: VMBus's tracking struct for this root PCI bus
3018 * @dev_id: Identifies the device itself
3019 *
3020 * Return: 0 on success, -errno on failure
3021 */
3022static int hv_pci_probe(struct hv_device *hdev,
3023 const struct hv_vmbus_device_id *dev_id)
3024{
3025 struct hv_pcibus_device *hbus;
3026 u16 dom_req, dom;
3027 char *name;
3028 bool enter_d0_retry = true;
3029 int ret;
3030
3031 /*
3032 * hv_pcibus_device contains the hypercall arguments for retargeting in
3033 * hv_irq_unmask(). Those must not cross a page boundary.
3034 */
3035 BUILD_BUG_ON(sizeof(*hbus) > HV_HYP_PAGE_SIZE);
3036
3037 /*
3038 * With the recent 59bb47985c1d ("mm, sl[aou]b: guarantee natural
3039 * alignment for kmalloc(power-of-two)"), kzalloc() is able to allocate
3040 * a 4KB buffer that is guaranteed to be 4KB-aligned. Here the size and
3041 * alignment of hbus is important because hbus's field
3042 * retarget_msi_interrupt_params must not cross a 4KB page boundary.
3043 *
3044 * Here we prefer kzalloc to get_zeroed_page(), because a buffer
3045 * allocated by the latter is not tracked and scanned by kmemleak, and
3046 * hence kmemleak reports the pointer contained in the hbus buffer
3047 * (i.e. the hpdev struct, which is created in new_pcichild_device() and
3048 * is tracked by hbus->children) as memory leak (false positive).
3049 *
3050 * If the kernel doesn't have 59bb47985c1d, get_zeroed_page() *must* be
3051 * used to allocate the hbus buffer and we can avoid the kmemleak false
3052 * positive by using kmemleak_alloc() and kmemleak_free() to ask
3053 * kmemleak to track and scan the hbus buffer.
3054 */
3055 hbus = kzalloc(HV_HYP_PAGE_SIZE, GFP_KERNEL);
3056 if (!hbus)
3057 return -ENOMEM;
3058 hbus->state = hv_pcibus_init;
3059 hbus->wslot_res_allocated = -1;
3060
3061 /*
3062 * The PCI bus "domain" is what is called "segment" in ACPI and other
3063 * specs. Pull it from the instance ID, to get something usually
3064 * unique. In rare cases of collision, we will find out another number
3065 * not in use.
3066 *
3067 * Note that, since this code only runs in a Hyper-V VM, Hyper-V
3068 * together with this guest driver can guarantee that (1) The only
3069 * domain used by Gen1 VMs for something that looks like a physical
3070 * PCI bus (which is actually emulated by the hypervisor) is domain 0.
3071 * (2) There will be no overlap between domains (after fixing possible
3072 * collisions) in the same VM.
3073 */
3074 dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
3075 dom = hv_get_dom_num(dom_req);
3076
3077 if (dom == HVPCI_DOM_INVALID) {
3078 dev_err(&hdev->device,
3079 "Unable to use dom# 0x%hx or other numbers", dom_req);
3080 ret = -EINVAL;
3081 goto free_bus;
3082 }
3083
3084 if (dom != dom_req)
3085 dev_info(&hdev->device,
3086 "PCI dom# 0x%hx has collision, using 0x%hx",
3087 dom_req, dom);
3088
3089 hbus->sysdata.domain = dom;
3090
3091 hbus->hdev = hdev;
3092 refcount_set(&hbus->remove_lock, 1);
3093 INIT_LIST_HEAD(&hbus->children);
3094 INIT_LIST_HEAD(&hbus->dr_list);
3095 INIT_LIST_HEAD(&hbus->resources_for_children);
3096 spin_lock_init(&hbus->config_lock);
3097 spin_lock_init(&hbus->device_list_lock);
3098 spin_lock_init(&hbus->retarget_msi_interrupt_lock);
3099 init_completion(&hbus->remove_event);
3100 hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
3101 hbus->sysdata.domain);
3102 if (!hbus->wq) {
3103 ret = -ENOMEM;
3104 goto free_dom;
3105 }
3106
3107 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3108 hv_pci_onchannelcallback, hbus);
3109 if (ret)
3110 goto destroy_wq;
3111
3112 hv_set_drvdata(hdev, hbus);
3113
3114 ret = hv_pci_protocol_negotiation(hdev, pci_protocol_versions,
3115 ARRAY_SIZE(pci_protocol_versions));
3116 if (ret)
3117 goto close;
3118
3119 ret = hv_allocate_config_window(hbus);
3120 if (ret)
3121 goto close;
3122
3123 hbus->cfg_addr = ioremap(hbus->mem_config->start,
3124 PCI_CONFIG_MMIO_LENGTH);
3125 if (!hbus->cfg_addr) {
3126 dev_err(&hdev->device,
3127 "Unable to map a virtual address for config space\n");
3128 ret = -ENOMEM;
3129 goto free_config;
3130 }
3131
3132 name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance);
3133 if (!name) {
3134 ret = -ENOMEM;
3135 goto unmap;
3136 }
3137
3138 hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name);
3139 kfree(name);
3140 if (!hbus->sysdata.fwnode) {
3141 ret = -ENOMEM;
3142 goto unmap;
3143 }
3144
3145 ret = hv_pcie_init_irq_domain(hbus);
3146 if (ret)
3147 goto free_fwnode;
3148
3149retry:
3150 ret = hv_pci_query_relations(hdev);
3151 if (ret)
3152 goto free_irq_domain;
3153
3154 ret = hv_pci_enter_d0(hdev);
3155 /*
3156 * In certain case (Kdump) the pci device of interest was
3157 * not cleanly shut down and resource is still held on host
3158 * side, the host could return invalid device status.
3159 * We need to explicitly request host to release the resource
3160 * and try to enter D0 again.
3161 * Since the hv_pci_bus_exit() call releases structures
3162 * of all its child devices, we need to start the retry from
3163 * hv_pci_query_relations() call, requesting host to send
3164 * the synchronous child device relations message before this
3165 * information is needed in hv_send_resources_allocated()
3166 * call later.
3167 */
3168 if (ret == -EPROTO && enter_d0_retry) {
3169 enter_d0_retry = false;
3170
3171 dev_err(&hdev->device, "Retrying D0 Entry\n");
3172
3173 /*
3174 * Hv_pci_bus_exit() calls hv_send_resources_released()
3175 * to free up resources of its child devices.
3176 * In the kdump kernel we need to set the
3177 * wslot_res_allocated to 255 so it scans all child
3178 * devices to release resources allocated in the
3179 * normal kernel before panic happened.
3180 */
3181 hbus->wslot_res_allocated = 255;
3182 ret = hv_pci_bus_exit(hdev, true);
3183
3184 if (ret == 0)
3185 goto retry;
3186
3187 dev_err(&hdev->device,
3188 "Retrying D0 failed with ret %d\n", ret);
3189 }
3190 if (ret)
3191 goto free_irq_domain;
3192
3193 ret = hv_pci_allocate_bridge_windows(hbus);
3194 if (ret)
3195 goto exit_d0;
3196
3197 ret = hv_send_resources_allocated(hdev);
3198 if (ret)
3199 goto free_windows;
3200
3201 prepopulate_bars(hbus);
3202
3203 hbus->state = hv_pcibus_probed;
3204
3205 ret = create_root_hv_pci_bus(hbus);
3206 if (ret)
3207 goto free_windows;
3208
3209 return 0;
3210
3211free_windows:
3212 hv_pci_free_bridge_windows(hbus);
3213exit_d0:
3214 (void) hv_pci_bus_exit(hdev, true);
3215free_irq_domain:
3216 irq_domain_remove(hbus->irq_domain);
3217free_fwnode:
3218 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3219unmap:
3220 iounmap(hbus->cfg_addr);
3221free_config:
3222 hv_free_config_window(hbus);
3223close:
3224 vmbus_close(hdev->channel);
3225destroy_wq:
3226 destroy_workqueue(hbus->wq);
3227free_dom:
3228 hv_put_dom_num(hbus->sysdata.domain);
3229free_bus:
3230 kfree(hbus);
3231 return ret;
3232}
3233
3234static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs)
3235{
3236 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3237 struct {
3238 struct pci_packet teardown_packet;
3239 u8 buffer[sizeof(struct pci_message)];
3240 } pkt;
3241 struct hv_dr_state *dr;
3242 struct hv_pci_compl comp_pkt;
3243 int ret;
3244
3245 /*
3246 * After the host sends the RESCIND_CHANNEL message, it doesn't
3247 * access the per-channel ringbuffer any longer.
3248 */
3249 if (hdev->channel->rescind)
3250 return 0;
3251
3252 if (!keep_devs) {
3253 /* Delete any children which might still exist. */
3254 dr = kzalloc(sizeof(*dr), GFP_KERNEL);
3255 if (dr && hv_pci_start_relations_work(hbus, dr))
3256 kfree(dr);
3257 }
3258
3259 ret = hv_send_resources_released(hdev);
3260 if (ret) {
3261 dev_err(&hdev->device,
3262 "Couldn't send resources released packet(s)\n");
3263 return ret;
3264 }
3265
3266 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
3267 init_completion(&comp_pkt.host_event);
3268 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
3269 pkt.teardown_packet.compl_ctxt = &comp_pkt;
3270 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
3271
3272 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
3273 sizeof(struct pci_message),
3274 (unsigned long)&pkt.teardown_packet,
3275 VM_PKT_DATA_INBAND,
3276 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
3277 if (ret)
3278 return ret;
3279
3280 if (wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ) == 0)
3281 return -ETIMEDOUT;
3282
3283 return 0;
3284}
3285
3286/**
3287 * hv_pci_remove() - Remove routine for this VMBus channel
3288 * @hdev: VMBus's tracking struct for this root PCI bus
3289 *
3290 * Return: 0 on success, -errno on failure
3291 */
3292static int hv_pci_remove(struct hv_device *hdev)
3293{
3294 struct hv_pcibus_device *hbus;
3295 int ret;
3296
3297 hbus = hv_get_drvdata(hdev);
3298 if (hbus->state == hv_pcibus_installed) {
3299 /* Remove the bus from PCI's point of view. */
3300 pci_lock_rescan_remove();
3301 pci_stop_root_bus(hbus->pci_bus);
3302 hv_pci_remove_slots(hbus);
3303 pci_remove_root_bus(hbus->pci_bus);
3304 pci_unlock_rescan_remove();
3305 hbus->state = hv_pcibus_removed;
3306 }
3307
3308 ret = hv_pci_bus_exit(hdev, false);
3309
3310 vmbus_close(hdev->channel);
3311
3312 iounmap(hbus->cfg_addr);
3313 hv_free_config_window(hbus);
3314 pci_free_resource_list(&hbus->resources_for_children);
3315 hv_pci_free_bridge_windows(hbus);
3316 irq_domain_remove(hbus->irq_domain);
3317 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3318 put_hvpcibus(hbus);
3319 wait_for_completion(&hbus->remove_event);
3320 destroy_workqueue(hbus->wq);
3321
3322 hv_put_dom_num(hbus->sysdata.domain);
3323
3324 kfree(hbus);
3325 return ret;
3326}
3327
3328static int hv_pci_suspend(struct hv_device *hdev)
3329{
3330 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3331 enum hv_pcibus_state old_state;
3332 int ret;
3333
3334 /*
3335 * hv_pci_suspend() must make sure there are no pending work items
3336 * before calling vmbus_close(), since it runs in a process context
3337 * as a callback in dpm_suspend(). When it starts to run, the channel
3338 * callback hv_pci_onchannelcallback(), which runs in a tasklet
3339 * context, can be still running concurrently and scheduling new work
3340 * items onto hbus->wq in hv_pci_devices_present() and
3341 * hv_pci_eject_device(), and the work item handlers can access the
3342 * vmbus channel, which can be being closed by hv_pci_suspend(), e.g.
3343 * the work item handler pci_devices_present_work() ->
3344 * new_pcichild_device() writes to the vmbus channel.
3345 *
3346 * To eliminate the race, hv_pci_suspend() disables the channel
3347 * callback tasklet, sets hbus->state to hv_pcibus_removing, and
3348 * re-enables the tasklet. This way, when hv_pci_suspend() proceeds,
3349 * it knows that no new work item can be scheduled, and then it flushes
3350 * hbus->wq and safely closes the vmbus channel.
3351 */
3352 tasklet_disable(&hdev->channel->callback_event);
3353
3354 /* Change the hbus state to prevent new work items. */
3355 old_state = hbus->state;
3356 if (hbus->state == hv_pcibus_installed)
3357 hbus->state = hv_pcibus_removing;
3358
3359 tasklet_enable(&hdev->channel->callback_event);
3360
3361 if (old_state != hv_pcibus_installed)
3362 return -EINVAL;
3363
3364 flush_workqueue(hbus->wq);
3365
3366 ret = hv_pci_bus_exit(hdev, true);
3367 if (ret)
3368 return ret;
3369
3370 vmbus_close(hdev->channel);
3371
3372 return 0;
3373}
3374
3375static int hv_pci_resume(struct hv_device *hdev)
3376{
3377 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3378 enum pci_protocol_version_t version[1];
3379 int ret;
3380
3381 hbus->state = hv_pcibus_init;
3382
3383 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3384 hv_pci_onchannelcallback, hbus);
3385 if (ret)
3386 return ret;
3387
3388 /* Only use the version that was in use before hibernation. */
3389 version[0] = hbus->protocol_version;
3390 ret = hv_pci_protocol_negotiation(hdev, version, 1);
3391 if (ret)
3392 goto out;
3393
3394 ret = hv_pci_query_relations(hdev);
3395 if (ret)
3396 goto out;
3397
3398 ret = hv_pci_enter_d0(hdev);
3399 if (ret)
3400 goto out;
3401
3402 ret = hv_send_resources_allocated(hdev);
3403 if (ret)
3404 goto out;
3405
3406 prepopulate_bars(hbus);
3407
3408 hbus->state = hv_pcibus_installed;
3409 return 0;
3410out:
3411 vmbus_close(hdev->channel);
3412 return ret;
3413}
3414
3415static const struct hv_vmbus_device_id hv_pci_id_table[] = {
3416 /* PCI Pass-through Class ID */
3417 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
3418 { HV_PCIE_GUID, },
3419 { },
3420};
3421
3422MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
3423
3424static struct hv_driver hv_pci_drv = {
3425 .name = "hv_pci",
3426 .id_table = hv_pci_id_table,
3427 .probe = hv_pci_probe,
3428 .remove = hv_pci_remove,
3429 .suspend = hv_pci_suspend,
3430 .resume = hv_pci_resume,
3431};
3432
3433static void __exit exit_hv_pci_drv(void)
3434{
3435 vmbus_driver_unregister(&hv_pci_drv);
3436
3437 hvpci_block_ops.read_block = NULL;
3438 hvpci_block_ops.write_block = NULL;
3439 hvpci_block_ops.reg_blk_invalidate = NULL;
3440}
3441
3442static int __init init_hv_pci_drv(void)
3443{
3444 /* Set the invalid domain number's bit, so it will not be used */
3445 set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
3446
3447 /* Initialize PCI block r/w interface */
3448 hvpci_block_ops.read_block = hv_read_config_block;
3449 hvpci_block_ops.write_block = hv_write_config_block;
3450 hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate;
3451
3452 return vmbus_driver_register(&hv_pci_drv);
3453}
3454
3455module_init(init_hv_pci_drv);
3456module_exit(exit_hv_pci_drv);
3457
3458MODULE_DESCRIPTION("Hyper-V PCI");
3459MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) Microsoft Corporation.
4 *
5 * Author:
6 * Jake Oshins <jakeo@microsoft.com>
7 *
8 * This driver acts as a paravirtual front-end for PCI Express root buses.
9 * When a PCI Express function (either an entire device or an SR-IOV
10 * Virtual Function) is being passed through to the VM, this driver exposes
11 * a new bus to the guest VM. This is modeled as a root PCI bus because
12 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
13 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14 * until a device as been exposed using this driver.
15 *
16 * Each root PCI bus has its own PCI domain, which is called "Segment" in
17 * the PCI Firmware Specifications. Thus while each device passed through
18 * to the VM using this front-end will appear at "device 0", the domain will
19 * be unique. Typically, each bus will have one PCI function on it, though
20 * this driver does support more than one.
21 *
22 * In order to map the interrupts from the device through to the guest VM,
23 * this driver also implements an IRQ Domain, which handles interrupts (either
24 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
25 * set up, torn down, or reaffined, this driver communicates with the
26 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27 * interrupt will be delivered to the correct virtual processor at the right
28 * vector. This driver does not support level-triggered (line-based)
29 * interrupts, and will report that the Interrupt Line register in the
30 * function's configuration space is zero.
31 *
32 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33 * facilities. For instance, the configuration space of a function exposed
34 * by Hyper-V is mapped into a single page of memory space, and the
35 * read and write handlers for config space must be aware of this mechanism.
36 * Similarly, device setup and teardown involves messages sent to and from
37 * the PCI back-end driver in Hyper-V.
38 */
39
40#include <linux/kernel.h>
41#include <linux/module.h>
42#include <linux/pci.h>
43#include <linux/delay.h>
44#include <linux/semaphore.h>
45#include <linux/irqdomain.h>
46#include <asm/irqdomain.h>
47#include <asm/apic.h>
48#include <linux/irq.h>
49#include <linux/msi.h>
50#include <linux/hyperv.h>
51#include <linux/refcount.h>
52#include <asm/mshyperv.h>
53
54/*
55 * Protocol versions. The low word is the minor version, the high word the
56 * major version.
57 */
58
59#define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
60#define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61#define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
62
63enum pci_protocol_version_t {
64 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1), /* Win10 */
65 PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2), /* RS1 */
66};
67
68#define CPU_AFFINITY_ALL -1ULL
69
70/*
71 * Supported protocol versions in the order of probing - highest go
72 * first.
73 */
74static enum pci_protocol_version_t pci_protocol_versions[] = {
75 PCI_PROTOCOL_VERSION_1_2,
76 PCI_PROTOCOL_VERSION_1_1,
77};
78
79/*
80 * Protocol version negotiated by hv_pci_protocol_negotiation().
81 */
82static enum pci_protocol_version_t pci_protocol_version;
83
84#define PCI_CONFIG_MMIO_LENGTH 0x2000
85#define CFG_PAGE_OFFSET 0x1000
86#define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
87
88#define MAX_SUPPORTED_MSI_MESSAGES 0x400
89
90#define STATUS_REVISION_MISMATCH 0xC0000059
91
92/* space for 32bit serial number as string */
93#define SLOT_NAME_SIZE 11
94
95/*
96 * Message Types
97 */
98
99enum pci_message_type {
100 /*
101 * Version 1.1
102 */
103 PCI_MESSAGE_BASE = 0x42490000,
104 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
105 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
106 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
107 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
108 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
109 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
110 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
111 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
112 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
113 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
114 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
115 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
116 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
117 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
118 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
119 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
120 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
121 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
122 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
123 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
124 PCI_RESOURCES_ASSIGNED2 = PCI_MESSAGE_BASE + 0x16,
125 PCI_CREATE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x17,
126 PCI_DELETE_INTERRUPT_MESSAGE2 = PCI_MESSAGE_BASE + 0x18, /* unused */
127 PCI_MESSAGE_MAXIMUM
128};
129
130/*
131 * Structures defining the virtual PCI Express protocol.
132 */
133
134union pci_version {
135 struct {
136 u16 minor_version;
137 u16 major_version;
138 } parts;
139 u32 version;
140} __packed;
141
142/*
143 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
144 * which is all this driver does. This representation is the one used in
145 * Windows, which is what is expected when sending this back and forth with
146 * the Hyper-V parent partition.
147 */
148union win_slot_encoding {
149 struct {
150 u32 dev:5;
151 u32 func:3;
152 u32 reserved:24;
153 } bits;
154 u32 slot;
155} __packed;
156
157/*
158 * Pretty much as defined in the PCI Specifications.
159 */
160struct pci_function_description {
161 u16 v_id; /* vendor ID */
162 u16 d_id; /* device ID */
163 u8 rev;
164 u8 prog_intf;
165 u8 subclass;
166 u8 base_class;
167 u32 subsystem_id;
168 union win_slot_encoding win_slot;
169 u32 ser; /* serial number */
170} __packed;
171
172/**
173 * struct hv_msi_desc
174 * @vector: IDT entry
175 * @delivery_mode: As defined in Intel's Programmer's
176 * Reference Manual, Volume 3, Chapter 8.
177 * @vector_count: Number of contiguous entries in the
178 * Interrupt Descriptor Table that are
179 * occupied by this Message-Signaled
180 * Interrupt. For "MSI", as first defined
181 * in PCI 2.2, this can be between 1 and
182 * 32. For "MSI-X," as first defined in PCI
183 * 3.0, this must be 1, as each MSI-X table
184 * entry would have its own descriptor.
185 * @reserved: Empty space
186 * @cpu_mask: All the target virtual processors.
187 */
188struct hv_msi_desc {
189 u8 vector;
190 u8 delivery_mode;
191 u16 vector_count;
192 u32 reserved;
193 u64 cpu_mask;
194} __packed;
195
196/**
197 * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
198 * @vector: IDT entry
199 * @delivery_mode: As defined in Intel's Programmer's
200 * Reference Manual, Volume 3, Chapter 8.
201 * @vector_count: Number of contiguous entries in the
202 * Interrupt Descriptor Table that are
203 * occupied by this Message-Signaled
204 * Interrupt. For "MSI", as first defined
205 * in PCI 2.2, this can be between 1 and
206 * 32. For "MSI-X," as first defined in PCI
207 * 3.0, this must be 1, as each MSI-X table
208 * entry would have its own descriptor.
209 * @processor_count: number of bits enabled in array.
210 * @processor_array: All the target virtual processors.
211 */
212struct hv_msi_desc2 {
213 u8 vector;
214 u8 delivery_mode;
215 u16 vector_count;
216 u16 processor_count;
217 u16 processor_array[32];
218} __packed;
219
220/**
221 * struct tran_int_desc
222 * @reserved: unused, padding
223 * @vector_count: same as in hv_msi_desc
224 * @data: This is the "data payload" value that is
225 * written by the device when it generates
226 * a message-signaled interrupt, either MSI
227 * or MSI-X.
228 * @address: This is the address to which the data
229 * payload is written on interrupt
230 * generation.
231 */
232struct tran_int_desc {
233 u16 reserved;
234 u16 vector_count;
235 u32 data;
236 u64 address;
237} __packed;
238
239/*
240 * A generic message format for virtual PCI.
241 * Specific message formats are defined later in the file.
242 */
243
244struct pci_message {
245 u32 type;
246} __packed;
247
248struct pci_child_message {
249 struct pci_message message_type;
250 union win_slot_encoding wslot;
251} __packed;
252
253struct pci_incoming_message {
254 struct vmpacket_descriptor hdr;
255 struct pci_message message_type;
256} __packed;
257
258struct pci_response {
259 struct vmpacket_descriptor hdr;
260 s32 status; /* negative values are failures */
261} __packed;
262
263struct pci_packet {
264 void (*completion_func)(void *context, struct pci_response *resp,
265 int resp_packet_size);
266 void *compl_ctxt;
267
268 struct pci_message message[0];
269};
270
271/*
272 * Specific message types supporting the PCI protocol.
273 */
274
275/*
276 * Version negotiation message. Sent from the guest to the host.
277 * The guest is free to try different versions until the host
278 * accepts the version.
279 *
280 * pci_version: The protocol version requested.
281 * is_last_attempt: If TRUE, this is the last version guest will request.
282 * reservedz: Reserved field, set to zero.
283 */
284
285struct pci_version_request {
286 struct pci_message message_type;
287 u32 protocol_version;
288} __packed;
289
290/*
291 * Bus D0 Entry. This is sent from the guest to the host when the virtual
292 * bus (PCI Express port) is ready for action.
293 */
294
295struct pci_bus_d0_entry {
296 struct pci_message message_type;
297 u32 reserved;
298 u64 mmio_base;
299} __packed;
300
301struct pci_bus_relations {
302 struct pci_incoming_message incoming;
303 u32 device_count;
304 struct pci_function_description func[0];
305} __packed;
306
307struct pci_q_res_req_response {
308 struct vmpacket_descriptor hdr;
309 s32 status; /* negative values are failures */
310 u32 probed_bar[6];
311} __packed;
312
313struct pci_set_power {
314 struct pci_message message_type;
315 union win_slot_encoding wslot;
316 u32 power_state; /* In Windows terms */
317 u32 reserved;
318} __packed;
319
320struct pci_set_power_response {
321 struct vmpacket_descriptor hdr;
322 s32 status; /* negative values are failures */
323 union win_slot_encoding wslot;
324 u32 resultant_state; /* In Windows terms */
325 u32 reserved;
326} __packed;
327
328struct pci_resources_assigned {
329 struct pci_message message_type;
330 union win_slot_encoding wslot;
331 u8 memory_range[0x14][6]; /* not used here */
332 u32 msi_descriptors;
333 u32 reserved[4];
334} __packed;
335
336struct pci_resources_assigned2 {
337 struct pci_message message_type;
338 union win_slot_encoding wslot;
339 u8 memory_range[0x14][6]; /* not used here */
340 u32 msi_descriptor_count;
341 u8 reserved[70];
342} __packed;
343
344struct pci_create_interrupt {
345 struct pci_message message_type;
346 union win_slot_encoding wslot;
347 struct hv_msi_desc int_desc;
348} __packed;
349
350struct pci_create_int_response {
351 struct pci_response response;
352 u32 reserved;
353 struct tran_int_desc int_desc;
354} __packed;
355
356struct pci_create_interrupt2 {
357 struct pci_message message_type;
358 union win_slot_encoding wslot;
359 struct hv_msi_desc2 int_desc;
360} __packed;
361
362struct pci_delete_interrupt {
363 struct pci_message message_type;
364 union win_slot_encoding wslot;
365 struct tran_int_desc int_desc;
366} __packed;
367
368/*
369 * Note: the VM must pass a valid block id, wslot and bytes_requested.
370 */
371struct pci_read_block {
372 struct pci_message message_type;
373 u32 block_id;
374 union win_slot_encoding wslot;
375 u32 bytes_requested;
376} __packed;
377
378struct pci_read_block_response {
379 struct vmpacket_descriptor hdr;
380 u32 status;
381 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
382} __packed;
383
384/*
385 * Note: the VM must pass a valid block id, wslot and byte_count.
386 */
387struct pci_write_block {
388 struct pci_message message_type;
389 u32 block_id;
390 union win_slot_encoding wslot;
391 u32 byte_count;
392 u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
393} __packed;
394
395struct pci_dev_inval_block {
396 struct pci_incoming_message incoming;
397 union win_slot_encoding wslot;
398 u64 block_mask;
399} __packed;
400
401struct pci_dev_incoming {
402 struct pci_incoming_message incoming;
403 union win_slot_encoding wslot;
404} __packed;
405
406struct pci_eject_response {
407 struct pci_message message_type;
408 union win_slot_encoding wslot;
409 u32 status;
410} __packed;
411
412static int pci_ring_size = (4 * PAGE_SIZE);
413
414/*
415 * Definitions or interrupt steering hypercall.
416 */
417#define HV_PARTITION_ID_SELF ((u64)-1)
418#define HVCALL_RETARGET_INTERRUPT 0x7e
419
420struct hv_interrupt_entry {
421 u32 source; /* 1 for MSI(-X) */
422 u32 reserved1;
423 u32 address;
424 u32 data;
425};
426
427/*
428 * flags for hv_device_interrupt_target.flags
429 */
430#define HV_DEVICE_INTERRUPT_TARGET_MULTICAST 1
431#define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET 2
432
433struct hv_device_interrupt_target {
434 u32 vector;
435 u32 flags;
436 union {
437 u64 vp_mask;
438 struct hv_vpset vp_set;
439 };
440};
441
442struct retarget_msi_interrupt {
443 u64 partition_id; /* use "self" */
444 u64 device_id;
445 struct hv_interrupt_entry int_entry;
446 u64 reserved2;
447 struct hv_device_interrupt_target int_target;
448} __packed __aligned(8);
449
450/*
451 * Driver specific state.
452 */
453
454enum hv_pcibus_state {
455 hv_pcibus_init = 0,
456 hv_pcibus_probed,
457 hv_pcibus_installed,
458 hv_pcibus_removed,
459 hv_pcibus_maximum
460};
461
462struct hv_pcibus_device {
463 struct pci_sysdata sysdata;
464 enum hv_pcibus_state state;
465 refcount_t remove_lock;
466 struct hv_device *hdev;
467 resource_size_t low_mmio_space;
468 resource_size_t high_mmio_space;
469 struct resource *mem_config;
470 struct resource *low_mmio_res;
471 struct resource *high_mmio_res;
472 struct completion *survey_event;
473 struct completion remove_event;
474 struct pci_bus *pci_bus;
475 spinlock_t config_lock; /* Avoid two threads writing index page */
476 spinlock_t device_list_lock; /* Protect lists below */
477 void __iomem *cfg_addr;
478
479 struct list_head resources_for_children;
480
481 struct list_head children;
482 struct list_head dr_list;
483
484 struct msi_domain_info msi_info;
485 struct msi_controller msi_chip;
486 struct irq_domain *irq_domain;
487
488 spinlock_t retarget_msi_interrupt_lock;
489
490 struct workqueue_struct *wq;
491
492 /* hypercall arg, must not cross page boundary */
493 struct retarget_msi_interrupt retarget_msi_interrupt_params;
494
495 /*
496 * Don't put anything here: retarget_msi_interrupt_params must be last
497 */
498};
499
500/*
501 * Tracks "Device Relations" messages from the host, which must be both
502 * processed in order and deferred so that they don't run in the context
503 * of the incoming packet callback.
504 */
505struct hv_dr_work {
506 struct work_struct wrk;
507 struct hv_pcibus_device *bus;
508};
509
510struct hv_dr_state {
511 struct list_head list_entry;
512 u32 device_count;
513 struct pci_function_description func[0];
514};
515
516enum hv_pcichild_state {
517 hv_pcichild_init = 0,
518 hv_pcichild_requirements,
519 hv_pcichild_resourced,
520 hv_pcichild_ejecting,
521 hv_pcichild_maximum
522};
523
524struct hv_pci_dev {
525 /* List protected by pci_rescan_remove_lock */
526 struct list_head list_entry;
527 refcount_t refs;
528 enum hv_pcichild_state state;
529 struct pci_slot *pci_slot;
530 struct pci_function_description desc;
531 bool reported_missing;
532 struct hv_pcibus_device *hbus;
533 struct work_struct wrk;
534
535 void (*block_invalidate)(void *context, u64 block_mask);
536 void *invalidate_context;
537
538 /*
539 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
540 * read it back, for each of the BAR offsets within config space.
541 */
542 u32 probed_bar[6];
543};
544
545struct hv_pci_compl {
546 struct completion host_event;
547 s32 completion_status;
548};
549
550static void hv_pci_onchannelcallback(void *context);
551
552/**
553 * hv_pci_generic_compl() - Invoked for a completion packet
554 * @context: Set up by the sender of the packet.
555 * @resp: The response packet
556 * @resp_packet_size: Size in bytes of the packet
557 *
558 * This function is used to trigger an event and report status
559 * for any message for which the completion packet contains a
560 * status and nothing else.
561 */
562static void hv_pci_generic_compl(void *context, struct pci_response *resp,
563 int resp_packet_size)
564{
565 struct hv_pci_compl *comp_pkt = context;
566
567 if (resp_packet_size >= offsetofend(struct pci_response, status))
568 comp_pkt->completion_status = resp->status;
569 else
570 comp_pkt->completion_status = -1;
571
572 complete(&comp_pkt->host_event);
573}
574
575static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
576 u32 wslot);
577
578static void get_pcichild(struct hv_pci_dev *hpdev)
579{
580 refcount_inc(&hpdev->refs);
581}
582
583static void put_pcichild(struct hv_pci_dev *hpdev)
584{
585 if (refcount_dec_and_test(&hpdev->refs))
586 kfree(hpdev);
587}
588
589static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
590static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
591
592/*
593 * There is no good way to get notified from vmbus_onoffer_rescind(),
594 * so let's use polling here, since this is not a hot path.
595 */
596static int wait_for_response(struct hv_device *hdev,
597 struct completion *comp)
598{
599 while (true) {
600 if (hdev->channel->rescind) {
601 dev_warn_once(&hdev->device, "The device is gone.\n");
602 return -ENODEV;
603 }
604
605 if (wait_for_completion_timeout(comp, HZ / 10))
606 break;
607 }
608
609 return 0;
610}
611
612/**
613 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
614 * @devfn: The Linux representation of PCI slot
615 *
616 * Windows uses a slightly different representation of PCI slot.
617 *
618 * Return: The Windows representation
619 */
620static u32 devfn_to_wslot(int devfn)
621{
622 union win_slot_encoding wslot;
623
624 wslot.slot = 0;
625 wslot.bits.dev = PCI_SLOT(devfn);
626 wslot.bits.func = PCI_FUNC(devfn);
627
628 return wslot.slot;
629}
630
631/**
632 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
633 * @wslot: The Windows representation of PCI slot
634 *
635 * Windows uses a slightly different representation of PCI slot.
636 *
637 * Return: The Linux representation
638 */
639static int wslot_to_devfn(u32 wslot)
640{
641 union win_slot_encoding slot_no;
642
643 slot_no.slot = wslot;
644 return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
645}
646
647/*
648 * PCI Configuration Space for these root PCI buses is implemented as a pair
649 * of pages in memory-mapped I/O space. Writing to the first page chooses
650 * the PCI function being written or read. Once the first page has been
651 * written to, the following page maps in the entire configuration space of
652 * the function.
653 */
654
655/**
656 * _hv_pcifront_read_config() - Internal PCI config read
657 * @hpdev: The PCI driver's representation of the device
658 * @where: Offset within config space
659 * @size: Size of the transfer
660 * @val: Pointer to the buffer receiving the data
661 */
662static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
663 int size, u32 *val)
664{
665 unsigned long flags;
666 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
667
668 /*
669 * If the attempt is to read the IDs or the ROM BAR, simulate that.
670 */
671 if (where + size <= PCI_COMMAND) {
672 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
673 } else if (where >= PCI_CLASS_REVISION && where + size <=
674 PCI_CACHE_LINE_SIZE) {
675 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
676 PCI_CLASS_REVISION, size);
677 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
678 PCI_ROM_ADDRESS) {
679 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
680 PCI_SUBSYSTEM_VENDOR_ID, size);
681 } else if (where >= PCI_ROM_ADDRESS && where + size <=
682 PCI_CAPABILITY_LIST) {
683 /* ROM BARs are unimplemented */
684 *val = 0;
685 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
686 PCI_INTERRUPT_PIN) {
687 /*
688 * Interrupt Line and Interrupt PIN are hard-wired to zero
689 * because this front-end only supports message-signaled
690 * interrupts.
691 */
692 *val = 0;
693 } else if (where + size <= CFG_PAGE_SIZE) {
694 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
695 /* Choose the function to be read. (See comment above) */
696 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
697 /* Make sure the function was chosen before we start reading. */
698 mb();
699 /* Read from that function's config space. */
700 switch (size) {
701 case 1:
702 *val = readb(addr);
703 break;
704 case 2:
705 *val = readw(addr);
706 break;
707 default:
708 *val = readl(addr);
709 break;
710 }
711 /*
712 * Make sure the read was done before we release the spinlock
713 * allowing consecutive reads/writes.
714 */
715 mb();
716 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
717 } else {
718 dev_err(&hpdev->hbus->hdev->device,
719 "Attempt to read beyond a function's config space.\n");
720 }
721}
722
723static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
724{
725 u16 ret;
726 unsigned long flags;
727 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
728 PCI_VENDOR_ID;
729
730 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
731
732 /* Choose the function to be read. (See comment above) */
733 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
734 /* Make sure the function was chosen before we start reading. */
735 mb();
736 /* Read from that function's config space. */
737 ret = readw(addr);
738 /*
739 * mb() is not required here, because the spin_unlock_irqrestore()
740 * is a barrier.
741 */
742
743 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
744
745 return ret;
746}
747
748/**
749 * _hv_pcifront_write_config() - Internal PCI config write
750 * @hpdev: The PCI driver's representation of the device
751 * @where: Offset within config space
752 * @size: Size of the transfer
753 * @val: The data being transferred
754 */
755static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
756 int size, u32 val)
757{
758 unsigned long flags;
759 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
760
761 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
762 where + size <= PCI_CAPABILITY_LIST) {
763 /* SSIDs and ROM BARs are read-only */
764 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
765 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
766 /* Choose the function to be written. (See comment above) */
767 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
768 /* Make sure the function was chosen before we start writing. */
769 wmb();
770 /* Write to that function's config space. */
771 switch (size) {
772 case 1:
773 writeb(val, addr);
774 break;
775 case 2:
776 writew(val, addr);
777 break;
778 default:
779 writel(val, addr);
780 break;
781 }
782 /*
783 * Make sure the write was done before we release the spinlock
784 * allowing consecutive reads/writes.
785 */
786 mb();
787 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
788 } else {
789 dev_err(&hpdev->hbus->hdev->device,
790 "Attempt to write beyond a function's config space.\n");
791 }
792}
793
794/**
795 * hv_pcifront_read_config() - Read configuration space
796 * @bus: PCI Bus structure
797 * @devfn: Device/function
798 * @where: Offset from base
799 * @size: Byte/word/dword
800 * @val: Value to be read
801 *
802 * Return: PCIBIOS_SUCCESSFUL on success
803 * PCIBIOS_DEVICE_NOT_FOUND on failure
804 */
805static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
806 int where, int size, u32 *val)
807{
808 struct hv_pcibus_device *hbus =
809 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
810 struct hv_pci_dev *hpdev;
811
812 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
813 if (!hpdev)
814 return PCIBIOS_DEVICE_NOT_FOUND;
815
816 _hv_pcifront_read_config(hpdev, where, size, val);
817
818 put_pcichild(hpdev);
819 return PCIBIOS_SUCCESSFUL;
820}
821
822/**
823 * hv_pcifront_write_config() - Write configuration space
824 * @bus: PCI Bus structure
825 * @devfn: Device/function
826 * @where: Offset from base
827 * @size: Byte/word/dword
828 * @val: Value to be written to device
829 *
830 * Return: PCIBIOS_SUCCESSFUL on success
831 * PCIBIOS_DEVICE_NOT_FOUND on failure
832 */
833static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
834 int where, int size, u32 val)
835{
836 struct hv_pcibus_device *hbus =
837 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
838 struct hv_pci_dev *hpdev;
839
840 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
841 if (!hpdev)
842 return PCIBIOS_DEVICE_NOT_FOUND;
843
844 _hv_pcifront_write_config(hpdev, where, size, val);
845
846 put_pcichild(hpdev);
847 return PCIBIOS_SUCCESSFUL;
848}
849
850/* PCIe operations */
851static struct pci_ops hv_pcifront_ops = {
852 .read = hv_pcifront_read_config,
853 .write = hv_pcifront_write_config,
854};
855
856/*
857 * Paravirtual backchannel
858 *
859 * Hyper-V SR-IOV provides a backchannel mechanism in software for
860 * communication between a VF driver and a PF driver. These
861 * "configuration blocks" are similar in concept to PCI configuration space,
862 * but instead of doing reads and writes in 32-bit chunks through a very slow
863 * path, packets of up to 128 bytes can be sent or received asynchronously.
864 *
865 * Nearly every SR-IOV device contains just such a communications channel in
866 * hardware, so using this one in software is usually optional. Using the
867 * software channel, however, allows driver implementers to leverage software
868 * tools that fuzz the communications channel looking for vulnerabilities.
869 *
870 * The usage model for these packets puts the responsibility for reading or
871 * writing on the VF driver. The VF driver sends a read or a write packet,
872 * indicating which "block" is being referred to by number.
873 *
874 * If the PF driver wishes to initiate communication, it can "invalidate" one or
875 * more of the first 64 blocks. This invalidation is delivered via a callback
876 * supplied by the VF driver by this driver.
877 *
878 * No protocol is implied, except that supplied by the PF and VF drivers.
879 */
880
881struct hv_read_config_compl {
882 struct hv_pci_compl comp_pkt;
883 void *buf;
884 unsigned int len;
885 unsigned int bytes_returned;
886};
887
888/**
889 * hv_pci_read_config_compl() - Invoked when a response packet
890 * for a read config block operation arrives.
891 * @context: Identifies the read config operation
892 * @resp: The response packet itself
893 * @resp_packet_size: Size in bytes of the response packet
894 */
895static void hv_pci_read_config_compl(void *context, struct pci_response *resp,
896 int resp_packet_size)
897{
898 struct hv_read_config_compl *comp = context;
899 struct pci_read_block_response *read_resp =
900 (struct pci_read_block_response *)resp;
901 unsigned int data_len, hdr_len;
902
903 hdr_len = offsetof(struct pci_read_block_response, bytes);
904 if (resp_packet_size < hdr_len) {
905 comp->comp_pkt.completion_status = -1;
906 goto out;
907 }
908
909 data_len = resp_packet_size - hdr_len;
910 if (data_len > 0 && read_resp->status == 0) {
911 comp->bytes_returned = min(comp->len, data_len);
912 memcpy(comp->buf, read_resp->bytes, comp->bytes_returned);
913 } else {
914 comp->bytes_returned = 0;
915 }
916
917 comp->comp_pkt.completion_status = read_resp->status;
918out:
919 complete(&comp->comp_pkt.host_event);
920}
921
922/**
923 * hv_read_config_block() - Sends a read config block request to
924 * the back-end driver running in the Hyper-V parent partition.
925 * @pdev: The PCI driver's representation for this device.
926 * @buf: Buffer into which the config block will be copied.
927 * @len: Size in bytes of buf.
928 * @block_id: Identifies the config block which has been requested.
929 * @bytes_returned: Size which came back from the back-end driver.
930 *
931 * Return: 0 on success, -errno on failure
932 */
933int hv_read_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
934 unsigned int block_id, unsigned int *bytes_returned)
935{
936 struct hv_pcibus_device *hbus =
937 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
938 sysdata);
939 struct {
940 struct pci_packet pkt;
941 char buf[sizeof(struct pci_read_block)];
942 } pkt;
943 struct hv_read_config_compl comp_pkt;
944 struct pci_read_block *read_blk;
945 int ret;
946
947 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
948 return -EINVAL;
949
950 init_completion(&comp_pkt.comp_pkt.host_event);
951 comp_pkt.buf = buf;
952 comp_pkt.len = len;
953
954 memset(&pkt, 0, sizeof(pkt));
955 pkt.pkt.completion_func = hv_pci_read_config_compl;
956 pkt.pkt.compl_ctxt = &comp_pkt;
957 read_blk = (struct pci_read_block *)&pkt.pkt.message;
958 read_blk->message_type.type = PCI_READ_BLOCK;
959 read_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
960 read_blk->block_id = block_id;
961 read_blk->bytes_requested = len;
962
963 ret = vmbus_sendpacket(hbus->hdev->channel, read_blk,
964 sizeof(*read_blk), (unsigned long)&pkt.pkt,
965 VM_PKT_DATA_INBAND,
966 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
967 if (ret)
968 return ret;
969
970 ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event);
971 if (ret)
972 return ret;
973
974 if (comp_pkt.comp_pkt.completion_status != 0 ||
975 comp_pkt.bytes_returned == 0) {
976 dev_err(&hbus->hdev->device,
977 "Read Config Block failed: 0x%x, bytes_returned=%d\n",
978 comp_pkt.comp_pkt.completion_status,
979 comp_pkt.bytes_returned);
980 return -EIO;
981 }
982
983 *bytes_returned = comp_pkt.bytes_returned;
984 return 0;
985}
986
987/**
988 * hv_pci_write_config_compl() - Invoked when a response packet for a write
989 * config block operation arrives.
990 * @context: Identifies the write config operation
991 * @resp: The response packet itself
992 * @resp_packet_size: Size in bytes of the response packet
993 */
994static void hv_pci_write_config_compl(void *context, struct pci_response *resp,
995 int resp_packet_size)
996{
997 struct hv_pci_compl *comp_pkt = context;
998
999 comp_pkt->completion_status = resp->status;
1000 complete(&comp_pkt->host_event);
1001}
1002
1003/**
1004 * hv_write_config_block() - Sends a write config block request to the
1005 * back-end driver running in the Hyper-V parent partition.
1006 * @pdev: The PCI driver's representation for this device.
1007 * @buf: Buffer from which the config block will be copied.
1008 * @len: Size in bytes of buf.
1009 * @block_id: Identifies the config block which is being written.
1010 *
1011 * Return: 0 on success, -errno on failure
1012 */
1013int hv_write_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
1014 unsigned int block_id)
1015{
1016 struct hv_pcibus_device *hbus =
1017 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1018 sysdata);
1019 struct {
1020 struct pci_packet pkt;
1021 char buf[sizeof(struct pci_write_block)];
1022 u32 reserved;
1023 } pkt;
1024 struct hv_pci_compl comp_pkt;
1025 struct pci_write_block *write_blk;
1026 u32 pkt_size;
1027 int ret;
1028
1029 if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
1030 return -EINVAL;
1031
1032 init_completion(&comp_pkt.host_event);
1033
1034 memset(&pkt, 0, sizeof(pkt));
1035 pkt.pkt.completion_func = hv_pci_write_config_compl;
1036 pkt.pkt.compl_ctxt = &comp_pkt;
1037 write_blk = (struct pci_write_block *)&pkt.pkt.message;
1038 write_blk->message_type.type = PCI_WRITE_BLOCK;
1039 write_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
1040 write_blk->block_id = block_id;
1041 write_blk->byte_count = len;
1042 memcpy(write_blk->bytes, buf, len);
1043 pkt_size = offsetof(struct pci_write_block, bytes) + len;
1044 /*
1045 * This quirk is required on some hosts shipped around 2018, because
1046 * these hosts don't check the pkt_size correctly (new hosts have been
1047 * fixed since early 2019). The quirk is also safe on very old hosts
1048 * and new hosts, because, on them, what really matters is the length
1049 * specified in write_blk->byte_count.
1050 */
1051 pkt_size += sizeof(pkt.reserved);
1052
1053 ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size,
1054 (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND,
1055 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1056 if (ret)
1057 return ret;
1058
1059 ret = wait_for_response(hbus->hdev, &comp_pkt.host_event);
1060 if (ret)
1061 return ret;
1062
1063 if (comp_pkt.completion_status != 0) {
1064 dev_err(&hbus->hdev->device,
1065 "Write Config Block failed: 0x%x\n",
1066 comp_pkt.completion_status);
1067 return -EIO;
1068 }
1069
1070 return 0;
1071}
1072
1073/**
1074 * hv_register_block_invalidate() - Invoked when a config block invalidation
1075 * arrives from the back-end driver.
1076 * @pdev: The PCI driver's representation for this device.
1077 * @context: Identifies the device.
1078 * @block_invalidate: Identifies all of the blocks being invalidated.
1079 *
1080 * Return: 0 on success, -errno on failure
1081 */
1082int hv_register_block_invalidate(struct pci_dev *pdev, void *context,
1083 void (*block_invalidate)(void *context,
1084 u64 block_mask))
1085{
1086 struct hv_pcibus_device *hbus =
1087 container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1088 sysdata);
1089 struct hv_pci_dev *hpdev;
1090
1091 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1092 if (!hpdev)
1093 return -ENODEV;
1094
1095 hpdev->block_invalidate = block_invalidate;
1096 hpdev->invalidate_context = context;
1097
1098 put_pcichild(hpdev);
1099 return 0;
1100
1101}
1102
1103/* Interrupt management hooks */
1104static void hv_int_desc_free(struct hv_pci_dev *hpdev,
1105 struct tran_int_desc *int_desc)
1106{
1107 struct pci_delete_interrupt *int_pkt;
1108 struct {
1109 struct pci_packet pkt;
1110 u8 buffer[sizeof(struct pci_delete_interrupt)];
1111 } ctxt;
1112
1113 memset(&ctxt, 0, sizeof(ctxt));
1114 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
1115 int_pkt->message_type.type =
1116 PCI_DELETE_INTERRUPT_MESSAGE;
1117 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1118 int_pkt->int_desc = *int_desc;
1119 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
1120 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
1121 kfree(int_desc);
1122}
1123
1124/**
1125 * hv_msi_free() - Free the MSI.
1126 * @domain: The interrupt domain pointer
1127 * @info: Extra MSI-related context
1128 * @irq: Identifies the IRQ.
1129 *
1130 * The Hyper-V parent partition and hypervisor are tracking the
1131 * messages that are in use, keeping the interrupt redirection
1132 * table up to date. This callback sends a message that frees
1133 * the IRT entry and related tracking nonsense.
1134 */
1135static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
1136 unsigned int irq)
1137{
1138 struct hv_pcibus_device *hbus;
1139 struct hv_pci_dev *hpdev;
1140 struct pci_dev *pdev;
1141 struct tran_int_desc *int_desc;
1142 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
1143 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
1144
1145 pdev = msi_desc_to_pci_dev(msi);
1146 hbus = info->data;
1147 int_desc = irq_data_get_irq_chip_data(irq_data);
1148 if (!int_desc)
1149 return;
1150
1151 irq_data->chip_data = NULL;
1152 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1153 if (!hpdev) {
1154 kfree(int_desc);
1155 return;
1156 }
1157
1158 hv_int_desc_free(hpdev, int_desc);
1159 put_pcichild(hpdev);
1160}
1161
1162static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1163 bool force)
1164{
1165 struct irq_data *parent = data->parent_data;
1166
1167 return parent->chip->irq_set_affinity(parent, dest, force);
1168}
1169
1170static void hv_irq_mask(struct irq_data *data)
1171{
1172 pci_msi_mask_irq(data);
1173}
1174
1175/**
1176 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
1177 * affinity.
1178 * @data: Describes the IRQ
1179 *
1180 * Build new a destination for the MSI and make a hypercall to
1181 * update the Interrupt Redirection Table. "Device Logical ID"
1182 * is built out of this PCI bus's instance GUID and the function
1183 * number of the device.
1184 */
1185static void hv_irq_unmask(struct irq_data *data)
1186{
1187 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1188 struct irq_cfg *cfg = irqd_cfg(data);
1189 struct retarget_msi_interrupt *params;
1190 struct hv_pcibus_device *hbus;
1191 struct cpumask *dest;
1192 cpumask_var_t tmp;
1193 struct pci_bus *pbus;
1194 struct pci_dev *pdev;
1195 unsigned long flags;
1196 u32 var_size = 0;
1197 int cpu, nr_bank;
1198 u64 res;
1199
1200 dest = irq_data_get_effective_affinity_mask(data);
1201 pdev = msi_desc_to_pci_dev(msi_desc);
1202 pbus = pdev->bus;
1203 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1204
1205 spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
1206
1207 params = &hbus->retarget_msi_interrupt_params;
1208 memset(params, 0, sizeof(*params));
1209 params->partition_id = HV_PARTITION_ID_SELF;
1210 params->int_entry.source = 1; /* MSI(-X) */
1211 params->int_entry.address = msi_desc->msg.address_lo;
1212 params->int_entry.data = msi_desc->msg.data;
1213 params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
1214 (hbus->hdev->dev_instance.b[4] << 16) |
1215 (hbus->hdev->dev_instance.b[7] << 8) |
1216 (hbus->hdev->dev_instance.b[6] & 0xf8) |
1217 PCI_FUNC(pdev->devfn);
1218 params->int_target.vector = cfg->vector;
1219
1220 /*
1221 * Honoring apic->irq_delivery_mode set to dest_Fixed by
1222 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
1223 * spurious interrupt storm. Not doing so does not seem to have a
1224 * negative effect (yet?).
1225 */
1226
1227 if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
1228 /*
1229 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
1230 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
1231 * with >64 VP support.
1232 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
1233 * is not sufficient for this hypercall.
1234 */
1235 params->int_target.flags |=
1236 HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
1237
1238 if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
1239 res = 1;
1240 goto exit_unlock;
1241 }
1242
1243 cpumask_and(tmp, dest, cpu_online_mask);
1244 nr_bank = cpumask_to_vpset(¶ms->int_target.vp_set, tmp);
1245 free_cpumask_var(tmp);
1246
1247 if (nr_bank <= 0) {
1248 res = 1;
1249 goto exit_unlock;
1250 }
1251
1252 /*
1253 * var-sized hypercall, var-size starts after vp_mask (thus
1254 * vp_set.format does not count, but vp_set.valid_bank_mask
1255 * does).
1256 */
1257 var_size = 1 + nr_bank;
1258 } else {
1259 for_each_cpu_and(cpu, dest, cpu_online_mask) {
1260 params->int_target.vp_mask |=
1261 (1ULL << hv_cpu_number_to_vp_number(cpu));
1262 }
1263 }
1264
1265 res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1266 params, NULL);
1267
1268exit_unlock:
1269 spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
1270
1271 if (res) {
1272 dev_err(&hbus->hdev->device,
1273 "%s() failed: %#llx", __func__, res);
1274 return;
1275 }
1276
1277 pci_msi_unmask_irq(data);
1278}
1279
1280struct compose_comp_ctxt {
1281 struct hv_pci_compl comp_pkt;
1282 struct tran_int_desc int_desc;
1283};
1284
1285static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1286 int resp_packet_size)
1287{
1288 struct compose_comp_ctxt *comp_pkt = context;
1289 struct pci_create_int_response *int_resp =
1290 (struct pci_create_int_response *)resp;
1291
1292 comp_pkt->comp_pkt.completion_status = resp->status;
1293 comp_pkt->int_desc = int_resp->int_desc;
1294 complete(&comp_pkt->comp_pkt.host_event);
1295}
1296
1297static u32 hv_compose_msi_req_v1(
1298 struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1299 u32 slot, u8 vector)
1300{
1301 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1302 int_pkt->wslot.slot = slot;
1303 int_pkt->int_desc.vector = vector;
1304 int_pkt->int_desc.vector_count = 1;
1305 int_pkt->int_desc.delivery_mode = dest_Fixed;
1306
1307 /*
1308 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1309 * hv_irq_unmask().
1310 */
1311 int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1312
1313 return sizeof(*int_pkt);
1314}
1315
1316static u32 hv_compose_msi_req_v2(
1317 struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1318 u32 slot, u8 vector)
1319{
1320 int cpu;
1321
1322 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1323 int_pkt->wslot.slot = slot;
1324 int_pkt->int_desc.vector = vector;
1325 int_pkt->int_desc.vector_count = 1;
1326 int_pkt->int_desc.delivery_mode = dest_Fixed;
1327
1328 /*
1329 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1330 * by subsequent retarget in hv_irq_unmask().
1331 */
1332 cpu = cpumask_first_and(affinity, cpu_online_mask);
1333 int_pkt->int_desc.processor_array[0] =
1334 hv_cpu_number_to_vp_number(cpu);
1335 int_pkt->int_desc.processor_count = 1;
1336
1337 return sizeof(*int_pkt);
1338}
1339
1340/**
1341 * hv_compose_msi_msg() - Supplies a valid MSI address/data
1342 * @data: Everything about this MSI
1343 * @msg: Buffer that is filled in by this function
1344 *
1345 * This function unpacks the IRQ looking for target CPU set, IDT
1346 * vector and mode and sends a message to the parent partition
1347 * asking for a mapping for that tuple in this partition. The
1348 * response supplies a data value and address to which that data
1349 * should be written to trigger that interrupt.
1350 */
1351static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1352{
1353 struct irq_cfg *cfg = irqd_cfg(data);
1354 struct hv_pcibus_device *hbus;
1355 struct hv_pci_dev *hpdev;
1356 struct pci_bus *pbus;
1357 struct pci_dev *pdev;
1358 struct cpumask *dest;
1359 unsigned long flags;
1360 struct compose_comp_ctxt comp;
1361 struct tran_int_desc *int_desc;
1362 struct {
1363 struct pci_packet pci_pkt;
1364 union {
1365 struct pci_create_interrupt v1;
1366 struct pci_create_interrupt2 v2;
1367 } int_pkts;
1368 } __packed ctxt;
1369
1370 u32 size;
1371 int ret;
1372
1373 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1374 dest = irq_data_get_effective_affinity_mask(data);
1375 pbus = pdev->bus;
1376 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1377 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1378 if (!hpdev)
1379 goto return_null_message;
1380
1381 /* Free any previous message that might have already been composed. */
1382 if (data->chip_data) {
1383 int_desc = data->chip_data;
1384 data->chip_data = NULL;
1385 hv_int_desc_free(hpdev, int_desc);
1386 }
1387
1388 int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1389 if (!int_desc)
1390 goto drop_reference;
1391
1392 memset(&ctxt, 0, sizeof(ctxt));
1393 init_completion(&comp.comp_pkt.host_event);
1394 ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1395 ctxt.pci_pkt.compl_ctxt = ∁
1396
1397 switch (pci_protocol_version) {
1398 case PCI_PROTOCOL_VERSION_1_1:
1399 size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1400 dest,
1401 hpdev->desc.win_slot.slot,
1402 cfg->vector);
1403 break;
1404
1405 case PCI_PROTOCOL_VERSION_1_2:
1406 size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1407 dest,
1408 hpdev->desc.win_slot.slot,
1409 cfg->vector);
1410 break;
1411
1412 default:
1413 /* As we only negotiate protocol versions known to this driver,
1414 * this path should never hit. However, this is it not a hot
1415 * path so we print a message to aid future updates.
1416 */
1417 dev_err(&hbus->hdev->device,
1418 "Unexpected vPCI protocol, update driver.");
1419 goto free_int_desc;
1420 }
1421
1422 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1423 size, (unsigned long)&ctxt.pci_pkt,
1424 VM_PKT_DATA_INBAND,
1425 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1426 if (ret) {
1427 dev_err(&hbus->hdev->device,
1428 "Sending request for interrupt failed: 0x%x",
1429 comp.comp_pkt.completion_status);
1430 goto free_int_desc;
1431 }
1432
1433 /*
1434 * Since this function is called with IRQ locks held, can't
1435 * do normal wait for completion; instead poll.
1436 */
1437 while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1438 /* 0xFFFF means an invalid PCI VENDOR ID. */
1439 if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1440 dev_err_once(&hbus->hdev->device,
1441 "the device has gone\n");
1442 goto free_int_desc;
1443 }
1444
1445 /*
1446 * When the higher level interrupt code calls us with
1447 * interrupt disabled, we must poll the channel by calling
1448 * the channel callback directly when channel->target_cpu is
1449 * the current CPU. When the higher level interrupt code
1450 * calls us with interrupt enabled, let's add the
1451 * local_irq_save()/restore() to avoid race:
1452 * hv_pci_onchannelcallback() can also run in tasklet.
1453 */
1454 local_irq_save(flags);
1455
1456 if (hbus->hdev->channel->target_cpu == smp_processor_id())
1457 hv_pci_onchannelcallback(hbus);
1458
1459 local_irq_restore(flags);
1460
1461 if (hpdev->state == hv_pcichild_ejecting) {
1462 dev_err_once(&hbus->hdev->device,
1463 "the device is being ejected\n");
1464 goto free_int_desc;
1465 }
1466
1467 udelay(100);
1468 }
1469
1470 if (comp.comp_pkt.completion_status < 0) {
1471 dev_err(&hbus->hdev->device,
1472 "Request for interrupt failed: 0x%x",
1473 comp.comp_pkt.completion_status);
1474 goto free_int_desc;
1475 }
1476
1477 /*
1478 * Record the assignment so that this can be unwound later. Using
1479 * irq_set_chip_data() here would be appropriate, but the lock it takes
1480 * is already held.
1481 */
1482 *int_desc = comp.int_desc;
1483 data->chip_data = int_desc;
1484
1485 /* Pass up the result. */
1486 msg->address_hi = comp.int_desc.address >> 32;
1487 msg->address_lo = comp.int_desc.address & 0xffffffff;
1488 msg->data = comp.int_desc.data;
1489
1490 put_pcichild(hpdev);
1491 return;
1492
1493free_int_desc:
1494 kfree(int_desc);
1495drop_reference:
1496 put_pcichild(hpdev);
1497return_null_message:
1498 msg->address_hi = 0;
1499 msg->address_lo = 0;
1500 msg->data = 0;
1501}
1502
1503/* HW Interrupt Chip Descriptor */
1504static struct irq_chip hv_msi_irq_chip = {
1505 .name = "Hyper-V PCIe MSI",
1506 .irq_compose_msi_msg = hv_compose_msi_msg,
1507 .irq_set_affinity = hv_set_affinity,
1508 .irq_ack = irq_chip_ack_parent,
1509 .irq_mask = hv_irq_mask,
1510 .irq_unmask = hv_irq_unmask,
1511};
1512
1513static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1514 msi_alloc_info_t *arg)
1515{
1516 return arg->msi_hwirq;
1517}
1518
1519static struct msi_domain_ops hv_msi_ops = {
1520 .get_hwirq = hv_msi_domain_ops_get_hwirq,
1521 .msi_prepare = pci_msi_prepare,
1522 .set_desc = pci_msi_set_desc,
1523 .msi_free = hv_msi_free,
1524};
1525
1526/**
1527 * hv_pcie_init_irq_domain() - Initialize IRQ domain
1528 * @hbus: The root PCI bus
1529 *
1530 * This function creates an IRQ domain which will be used for
1531 * interrupts from devices that have been passed through. These
1532 * devices only support MSI and MSI-X, not line-based interrupts
1533 * or simulations of line-based interrupts through PCIe's
1534 * fabric-layer messages. Because interrupts are remapped, we
1535 * can support multi-message MSI here.
1536 *
1537 * Return: '0' on success and error value on failure
1538 */
1539static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1540{
1541 hbus->msi_info.chip = &hv_msi_irq_chip;
1542 hbus->msi_info.ops = &hv_msi_ops;
1543 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1544 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1545 MSI_FLAG_PCI_MSIX);
1546 hbus->msi_info.handler = handle_edge_irq;
1547 hbus->msi_info.handler_name = "edge";
1548 hbus->msi_info.data = hbus;
1549 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1550 &hbus->msi_info,
1551 x86_vector_domain);
1552 if (!hbus->irq_domain) {
1553 dev_err(&hbus->hdev->device,
1554 "Failed to build an MSI IRQ domain\n");
1555 return -ENODEV;
1556 }
1557
1558 return 0;
1559}
1560
1561/**
1562 * get_bar_size() - Get the address space consumed by a BAR
1563 * @bar_val: Value that a BAR returned after -1 was written
1564 * to it.
1565 *
1566 * This function returns the size of the BAR, rounded up to 1
1567 * page. It has to be rounded up because the hypervisor's page
1568 * table entry that maps the BAR into the VM can't specify an
1569 * offset within a page. The invariant is that the hypervisor
1570 * must place any BARs of smaller than page length at the
1571 * beginning of a page.
1572 *
1573 * Return: Size in bytes of the consumed MMIO space.
1574 */
1575static u64 get_bar_size(u64 bar_val)
1576{
1577 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1578 PAGE_SIZE);
1579}
1580
1581/**
1582 * survey_child_resources() - Total all MMIO requirements
1583 * @hbus: Root PCI bus, as understood by this driver
1584 */
1585static void survey_child_resources(struct hv_pcibus_device *hbus)
1586{
1587 struct hv_pci_dev *hpdev;
1588 resource_size_t bar_size = 0;
1589 unsigned long flags;
1590 struct completion *event;
1591 u64 bar_val;
1592 int i;
1593
1594 /* If nobody is waiting on the answer, don't compute it. */
1595 event = xchg(&hbus->survey_event, NULL);
1596 if (!event)
1597 return;
1598
1599 /* If the answer has already been computed, go with it. */
1600 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1601 complete(event);
1602 return;
1603 }
1604
1605 spin_lock_irqsave(&hbus->device_list_lock, flags);
1606
1607 /*
1608 * Due to an interesting quirk of the PCI spec, all memory regions
1609 * for a child device are a power of 2 in size and aligned in memory,
1610 * so it's sufficient to just add them up without tracking alignment.
1611 */
1612 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1613 for (i = 0; i < 6; i++) {
1614 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1615 dev_err(&hbus->hdev->device,
1616 "There's an I/O BAR in this list!\n");
1617
1618 if (hpdev->probed_bar[i] != 0) {
1619 /*
1620 * A probed BAR has all the upper bits set that
1621 * can be changed.
1622 */
1623
1624 bar_val = hpdev->probed_bar[i];
1625 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1626 bar_val |=
1627 ((u64)hpdev->probed_bar[++i] << 32);
1628 else
1629 bar_val |= 0xffffffff00000000ULL;
1630
1631 bar_size = get_bar_size(bar_val);
1632
1633 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1634 hbus->high_mmio_space += bar_size;
1635 else
1636 hbus->low_mmio_space += bar_size;
1637 }
1638 }
1639 }
1640
1641 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1642 complete(event);
1643}
1644
1645/**
1646 * prepopulate_bars() - Fill in BARs with defaults
1647 * @hbus: Root PCI bus, as understood by this driver
1648 *
1649 * The core PCI driver code seems much, much happier if the BARs
1650 * for a device have values upon first scan. So fill them in.
1651 * The algorithm below works down from large sizes to small,
1652 * attempting to pack the assignments optimally. The assumption,
1653 * enforced in other parts of the code, is that the beginning of
1654 * the memory-mapped I/O space will be aligned on the largest
1655 * BAR size.
1656 */
1657static void prepopulate_bars(struct hv_pcibus_device *hbus)
1658{
1659 resource_size_t high_size = 0;
1660 resource_size_t low_size = 0;
1661 resource_size_t high_base = 0;
1662 resource_size_t low_base = 0;
1663 resource_size_t bar_size;
1664 struct hv_pci_dev *hpdev;
1665 unsigned long flags;
1666 u64 bar_val;
1667 u32 command;
1668 bool high;
1669 int i;
1670
1671 if (hbus->low_mmio_space) {
1672 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1673 low_base = hbus->low_mmio_res->start;
1674 }
1675
1676 if (hbus->high_mmio_space) {
1677 high_size = 1ULL <<
1678 (63 - __builtin_clzll(hbus->high_mmio_space));
1679 high_base = hbus->high_mmio_res->start;
1680 }
1681
1682 spin_lock_irqsave(&hbus->device_list_lock, flags);
1683
1684 /* Pick addresses for the BARs. */
1685 do {
1686 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1687 for (i = 0; i < 6; i++) {
1688 bar_val = hpdev->probed_bar[i];
1689 if (bar_val == 0)
1690 continue;
1691 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1692 if (high) {
1693 bar_val |=
1694 ((u64)hpdev->probed_bar[i + 1]
1695 << 32);
1696 } else {
1697 bar_val |= 0xffffffffULL << 32;
1698 }
1699 bar_size = get_bar_size(bar_val);
1700 if (high) {
1701 if (high_size != bar_size) {
1702 i++;
1703 continue;
1704 }
1705 _hv_pcifront_write_config(hpdev,
1706 PCI_BASE_ADDRESS_0 + (4 * i),
1707 4,
1708 (u32)(high_base & 0xffffff00));
1709 i++;
1710 _hv_pcifront_write_config(hpdev,
1711 PCI_BASE_ADDRESS_0 + (4 * i),
1712 4, (u32)(high_base >> 32));
1713 high_base += bar_size;
1714 } else {
1715 if (low_size != bar_size)
1716 continue;
1717 _hv_pcifront_write_config(hpdev,
1718 PCI_BASE_ADDRESS_0 + (4 * i),
1719 4,
1720 (u32)(low_base & 0xffffff00));
1721 low_base += bar_size;
1722 }
1723 }
1724 if (high_size <= 1 && low_size <= 1) {
1725 /* Set the memory enable bit. */
1726 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1727 &command);
1728 command |= PCI_COMMAND_MEMORY;
1729 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1730 command);
1731 break;
1732 }
1733 }
1734
1735 high_size >>= 1;
1736 low_size >>= 1;
1737 } while (high_size || low_size);
1738
1739 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1740}
1741
1742/*
1743 * Assign entries in sysfs pci slot directory.
1744 *
1745 * Note that this function does not need to lock the children list
1746 * because it is called from pci_devices_present_work which
1747 * is serialized with hv_eject_device_work because they are on the
1748 * same ordered workqueue. Therefore hbus->children list will not change
1749 * even when pci_create_slot sleeps.
1750 */
1751static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1752{
1753 struct hv_pci_dev *hpdev;
1754 char name[SLOT_NAME_SIZE];
1755 int slot_nr;
1756
1757 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1758 if (hpdev->pci_slot)
1759 continue;
1760
1761 slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1762 snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1763 hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1764 name, NULL);
1765 if (IS_ERR(hpdev->pci_slot)) {
1766 pr_warn("pci_create slot %s failed\n", name);
1767 hpdev->pci_slot = NULL;
1768 }
1769 }
1770}
1771
1772/*
1773 * Remove entries in sysfs pci slot directory.
1774 */
1775static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1776{
1777 struct hv_pci_dev *hpdev;
1778
1779 list_for_each_entry(hpdev, &hbus->children, list_entry) {
1780 if (!hpdev->pci_slot)
1781 continue;
1782 pci_destroy_slot(hpdev->pci_slot);
1783 hpdev->pci_slot = NULL;
1784 }
1785}
1786
1787/**
1788 * create_root_hv_pci_bus() - Expose a new root PCI bus
1789 * @hbus: Root PCI bus, as understood by this driver
1790 *
1791 * Return: 0 on success, -errno on failure
1792 */
1793static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1794{
1795 /* Register the device */
1796 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1797 0, /* bus number is always zero */
1798 &hv_pcifront_ops,
1799 &hbus->sysdata,
1800 &hbus->resources_for_children);
1801 if (!hbus->pci_bus)
1802 return -ENODEV;
1803
1804 hbus->pci_bus->msi = &hbus->msi_chip;
1805 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1806
1807 pci_lock_rescan_remove();
1808 pci_scan_child_bus(hbus->pci_bus);
1809 pci_bus_assign_resources(hbus->pci_bus);
1810 hv_pci_assign_slots(hbus);
1811 pci_bus_add_devices(hbus->pci_bus);
1812 pci_unlock_rescan_remove();
1813 hbus->state = hv_pcibus_installed;
1814 return 0;
1815}
1816
1817struct q_res_req_compl {
1818 struct completion host_event;
1819 struct hv_pci_dev *hpdev;
1820};
1821
1822/**
1823 * q_resource_requirements() - Query Resource Requirements
1824 * @context: The completion context.
1825 * @resp: The response that came from the host.
1826 * @resp_packet_size: The size in bytes of resp.
1827 *
1828 * This function is invoked on completion of a Query Resource
1829 * Requirements packet.
1830 */
1831static void q_resource_requirements(void *context, struct pci_response *resp,
1832 int resp_packet_size)
1833{
1834 struct q_res_req_compl *completion = context;
1835 struct pci_q_res_req_response *q_res_req =
1836 (struct pci_q_res_req_response *)resp;
1837 int i;
1838
1839 if (resp->status < 0) {
1840 dev_err(&completion->hpdev->hbus->hdev->device,
1841 "query resource requirements failed: %x\n",
1842 resp->status);
1843 } else {
1844 for (i = 0; i < 6; i++) {
1845 completion->hpdev->probed_bar[i] =
1846 q_res_req->probed_bar[i];
1847 }
1848 }
1849
1850 complete(&completion->host_event);
1851}
1852
1853/**
1854 * new_pcichild_device() - Create a new child device
1855 * @hbus: The internal struct tracking this root PCI bus.
1856 * @desc: The information supplied so far from the host
1857 * about the device.
1858 *
1859 * This function creates the tracking structure for a new child
1860 * device and kicks off the process of figuring out what it is.
1861 *
1862 * Return: Pointer to the new tracking struct
1863 */
1864static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1865 struct pci_function_description *desc)
1866{
1867 struct hv_pci_dev *hpdev;
1868 struct pci_child_message *res_req;
1869 struct q_res_req_compl comp_pkt;
1870 struct {
1871 struct pci_packet init_packet;
1872 u8 buffer[sizeof(struct pci_child_message)];
1873 } pkt;
1874 unsigned long flags;
1875 int ret;
1876
1877 hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
1878 if (!hpdev)
1879 return NULL;
1880
1881 hpdev->hbus = hbus;
1882
1883 memset(&pkt, 0, sizeof(pkt));
1884 init_completion(&comp_pkt.host_event);
1885 comp_pkt.hpdev = hpdev;
1886 pkt.init_packet.compl_ctxt = &comp_pkt;
1887 pkt.init_packet.completion_func = q_resource_requirements;
1888 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1889 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1890 res_req->wslot.slot = desc->win_slot.slot;
1891
1892 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1893 sizeof(struct pci_child_message),
1894 (unsigned long)&pkt.init_packet,
1895 VM_PKT_DATA_INBAND,
1896 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1897 if (ret)
1898 goto error;
1899
1900 if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1901 goto error;
1902
1903 hpdev->desc = *desc;
1904 refcount_set(&hpdev->refs, 1);
1905 get_pcichild(hpdev);
1906 spin_lock_irqsave(&hbus->device_list_lock, flags);
1907
1908 list_add_tail(&hpdev->list_entry, &hbus->children);
1909 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1910 return hpdev;
1911
1912error:
1913 kfree(hpdev);
1914 return NULL;
1915}
1916
1917/**
1918 * get_pcichild_wslot() - Find device from slot
1919 * @hbus: Root PCI bus, as understood by this driver
1920 * @wslot: Location on the bus
1921 *
1922 * This function looks up a PCI device and returns the internal
1923 * representation of it. It acquires a reference on it, so that
1924 * the device won't be deleted while somebody is using it. The
1925 * caller is responsible for calling put_pcichild() to release
1926 * this reference.
1927 *
1928 * Return: Internal representation of a PCI device
1929 */
1930static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1931 u32 wslot)
1932{
1933 unsigned long flags;
1934 struct hv_pci_dev *iter, *hpdev = NULL;
1935
1936 spin_lock_irqsave(&hbus->device_list_lock, flags);
1937 list_for_each_entry(iter, &hbus->children, list_entry) {
1938 if (iter->desc.win_slot.slot == wslot) {
1939 hpdev = iter;
1940 get_pcichild(hpdev);
1941 break;
1942 }
1943 }
1944 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1945
1946 return hpdev;
1947}
1948
1949/**
1950 * pci_devices_present_work() - Handle new list of child devices
1951 * @work: Work struct embedded in struct hv_dr_work
1952 *
1953 * "Bus Relations" is the Windows term for "children of this
1954 * bus." The terminology is preserved here for people trying to
1955 * debug the interaction between Hyper-V and Linux. This
1956 * function is called when the parent partition reports a list
1957 * of functions that should be observed under this PCI Express
1958 * port (bus).
1959 *
1960 * This function updates the list, and must tolerate being
1961 * called multiple times with the same information. The typical
1962 * number of child devices is one, with very atypical cases
1963 * involving three or four, so the algorithms used here can be
1964 * simple and inefficient.
1965 *
1966 * It must also treat the omission of a previously observed device as
1967 * notification that the device no longer exists.
1968 *
1969 * Note that this function is serialized with hv_eject_device_work(),
1970 * because both are pushed to the ordered workqueue hbus->wq.
1971 */
1972static void pci_devices_present_work(struct work_struct *work)
1973{
1974 u32 child_no;
1975 bool found;
1976 struct pci_function_description *new_desc;
1977 struct hv_pci_dev *hpdev;
1978 struct hv_pcibus_device *hbus;
1979 struct list_head removed;
1980 struct hv_dr_work *dr_wrk;
1981 struct hv_dr_state *dr = NULL;
1982 unsigned long flags;
1983
1984 dr_wrk = container_of(work, struct hv_dr_work, wrk);
1985 hbus = dr_wrk->bus;
1986 kfree(dr_wrk);
1987
1988 INIT_LIST_HEAD(&removed);
1989
1990 /* Pull this off the queue and process it if it was the last one. */
1991 spin_lock_irqsave(&hbus->device_list_lock, flags);
1992 while (!list_empty(&hbus->dr_list)) {
1993 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1994 list_entry);
1995 list_del(&dr->list_entry);
1996
1997 /* Throw this away if the list still has stuff in it. */
1998 if (!list_empty(&hbus->dr_list)) {
1999 kfree(dr);
2000 continue;
2001 }
2002 }
2003 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2004
2005 if (!dr) {
2006 put_hvpcibus(hbus);
2007 return;
2008 }
2009
2010 /* First, mark all existing children as reported missing. */
2011 spin_lock_irqsave(&hbus->device_list_lock, flags);
2012 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2013 hpdev->reported_missing = true;
2014 }
2015 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2016
2017 /* Next, add back any reported devices. */
2018 for (child_no = 0; child_no < dr->device_count; child_no++) {
2019 found = false;
2020 new_desc = &dr->func[child_no];
2021
2022 spin_lock_irqsave(&hbus->device_list_lock, flags);
2023 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2024 if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
2025 (hpdev->desc.v_id == new_desc->v_id) &&
2026 (hpdev->desc.d_id == new_desc->d_id) &&
2027 (hpdev->desc.ser == new_desc->ser)) {
2028 hpdev->reported_missing = false;
2029 found = true;
2030 }
2031 }
2032 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2033
2034 if (!found) {
2035 hpdev = new_pcichild_device(hbus, new_desc);
2036 if (!hpdev)
2037 dev_err(&hbus->hdev->device,
2038 "couldn't record a child device.\n");
2039 }
2040 }
2041
2042 /* Move missing children to a list on the stack. */
2043 spin_lock_irqsave(&hbus->device_list_lock, flags);
2044 do {
2045 found = false;
2046 list_for_each_entry(hpdev, &hbus->children, list_entry) {
2047 if (hpdev->reported_missing) {
2048 found = true;
2049 put_pcichild(hpdev);
2050 list_move_tail(&hpdev->list_entry, &removed);
2051 break;
2052 }
2053 }
2054 } while (found);
2055 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2056
2057 /* Delete everything that should no longer exist. */
2058 while (!list_empty(&removed)) {
2059 hpdev = list_first_entry(&removed, struct hv_pci_dev,
2060 list_entry);
2061 list_del(&hpdev->list_entry);
2062
2063 if (hpdev->pci_slot)
2064 pci_destroy_slot(hpdev->pci_slot);
2065
2066 put_pcichild(hpdev);
2067 }
2068
2069 switch (hbus->state) {
2070 case hv_pcibus_installed:
2071 /*
2072 * Tell the core to rescan bus
2073 * because there may have been changes.
2074 */
2075 pci_lock_rescan_remove();
2076 pci_scan_child_bus(hbus->pci_bus);
2077 hv_pci_assign_slots(hbus);
2078 pci_unlock_rescan_remove();
2079 break;
2080
2081 case hv_pcibus_init:
2082 case hv_pcibus_probed:
2083 survey_child_resources(hbus);
2084 break;
2085
2086 default:
2087 break;
2088 }
2089
2090 put_hvpcibus(hbus);
2091 kfree(dr);
2092}
2093
2094/**
2095 * hv_pci_devices_present() - Handles list of new children
2096 * @hbus: Root PCI bus, as understood by this driver
2097 * @relations: Packet from host listing children
2098 *
2099 * This function is invoked whenever a new list of devices for
2100 * this bus appears.
2101 */
2102static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
2103 struct pci_bus_relations *relations)
2104{
2105 struct hv_dr_state *dr;
2106 struct hv_dr_work *dr_wrk;
2107 unsigned long flags;
2108 bool pending_dr;
2109
2110 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
2111 if (!dr_wrk)
2112 return;
2113
2114 dr = kzalloc(offsetof(struct hv_dr_state, func) +
2115 (sizeof(struct pci_function_description) *
2116 (relations->device_count)), GFP_NOWAIT);
2117 if (!dr) {
2118 kfree(dr_wrk);
2119 return;
2120 }
2121
2122 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
2123 dr_wrk->bus = hbus;
2124 dr->device_count = relations->device_count;
2125 if (dr->device_count != 0) {
2126 memcpy(dr->func, relations->func,
2127 sizeof(struct pci_function_description) *
2128 dr->device_count);
2129 }
2130
2131 spin_lock_irqsave(&hbus->device_list_lock, flags);
2132 /*
2133 * If pending_dr is true, we have already queued a work,
2134 * which will see the new dr. Otherwise, we need to
2135 * queue a new work.
2136 */
2137 pending_dr = !list_empty(&hbus->dr_list);
2138 list_add_tail(&dr->list_entry, &hbus->dr_list);
2139 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2140
2141 if (pending_dr) {
2142 kfree(dr_wrk);
2143 } else {
2144 get_hvpcibus(hbus);
2145 queue_work(hbus->wq, &dr_wrk->wrk);
2146 }
2147}
2148
2149/**
2150 * hv_eject_device_work() - Asynchronously handles ejection
2151 * @work: Work struct embedded in internal device struct
2152 *
2153 * This function handles ejecting a device. Windows will
2154 * attempt to gracefully eject a device, waiting 60 seconds to
2155 * hear back from the guest OS that this completed successfully.
2156 * If this timer expires, the device will be forcibly removed.
2157 */
2158static void hv_eject_device_work(struct work_struct *work)
2159{
2160 struct pci_eject_response *ejct_pkt;
2161 struct hv_pcibus_device *hbus;
2162 struct hv_pci_dev *hpdev;
2163 struct pci_dev *pdev;
2164 unsigned long flags;
2165 int wslot;
2166 struct {
2167 struct pci_packet pkt;
2168 u8 buffer[sizeof(struct pci_eject_response)];
2169 } ctxt;
2170
2171 hpdev = container_of(work, struct hv_pci_dev, wrk);
2172 hbus = hpdev->hbus;
2173
2174 WARN_ON(hpdev->state != hv_pcichild_ejecting);
2175
2176 /*
2177 * Ejection can come before or after the PCI bus has been set up, so
2178 * attempt to find it and tear down the bus state, if it exists. This
2179 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
2180 * because hbus->pci_bus may not exist yet.
2181 */
2182 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
2183 pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
2184 if (pdev) {
2185 pci_lock_rescan_remove();
2186 pci_stop_and_remove_bus_device(pdev);
2187 pci_dev_put(pdev);
2188 pci_unlock_rescan_remove();
2189 }
2190
2191 spin_lock_irqsave(&hbus->device_list_lock, flags);
2192 list_del(&hpdev->list_entry);
2193 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2194
2195 if (hpdev->pci_slot)
2196 pci_destroy_slot(hpdev->pci_slot);
2197
2198 memset(&ctxt, 0, sizeof(ctxt));
2199 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
2200 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
2201 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
2202 vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
2203 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
2204 VM_PKT_DATA_INBAND, 0);
2205
2206 /* For the get_pcichild() in hv_pci_eject_device() */
2207 put_pcichild(hpdev);
2208 /* For the two refs got in new_pcichild_device() */
2209 put_pcichild(hpdev);
2210 put_pcichild(hpdev);
2211 /* hpdev has been freed. Do not use it any more. */
2212
2213 put_hvpcibus(hbus);
2214}
2215
2216/**
2217 * hv_pci_eject_device() - Handles device ejection
2218 * @hpdev: Internal device tracking struct
2219 *
2220 * This function is invoked when an ejection packet arrives. It
2221 * just schedules work so that we don't re-enter the packet
2222 * delivery code handling the ejection.
2223 */
2224static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
2225{
2226 hpdev->state = hv_pcichild_ejecting;
2227 get_pcichild(hpdev);
2228 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
2229 get_hvpcibus(hpdev->hbus);
2230 queue_work(hpdev->hbus->wq, &hpdev->wrk);
2231}
2232
2233/**
2234 * hv_pci_onchannelcallback() - Handles incoming packets
2235 * @context: Internal bus tracking struct
2236 *
2237 * This function is invoked whenever the host sends a packet to
2238 * this channel (which is private to this root PCI bus).
2239 */
2240static void hv_pci_onchannelcallback(void *context)
2241{
2242 const int packet_size = 0x100;
2243 int ret;
2244 struct hv_pcibus_device *hbus = context;
2245 u32 bytes_recvd;
2246 u64 req_id;
2247 struct vmpacket_descriptor *desc;
2248 unsigned char *buffer;
2249 int bufferlen = packet_size;
2250 struct pci_packet *comp_packet;
2251 struct pci_response *response;
2252 struct pci_incoming_message *new_message;
2253 struct pci_bus_relations *bus_rel;
2254 struct pci_dev_inval_block *inval;
2255 struct pci_dev_incoming *dev_message;
2256 struct hv_pci_dev *hpdev;
2257
2258 buffer = kmalloc(bufferlen, GFP_ATOMIC);
2259 if (!buffer)
2260 return;
2261
2262 while (1) {
2263 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
2264 bufferlen, &bytes_recvd, &req_id);
2265
2266 if (ret == -ENOBUFS) {
2267 kfree(buffer);
2268 /* Handle large packet */
2269 bufferlen = bytes_recvd;
2270 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2271 if (!buffer)
2272 return;
2273 continue;
2274 }
2275
2276 /* Zero length indicates there are no more packets. */
2277 if (ret || !bytes_recvd)
2278 break;
2279
2280 /*
2281 * All incoming packets must be at least as large as a
2282 * response.
2283 */
2284 if (bytes_recvd <= sizeof(struct pci_response))
2285 continue;
2286 desc = (struct vmpacket_descriptor *)buffer;
2287
2288 switch (desc->type) {
2289 case VM_PKT_COMP:
2290
2291 /*
2292 * The host is trusted, and thus it's safe to interpret
2293 * this transaction ID as a pointer.
2294 */
2295 comp_packet = (struct pci_packet *)req_id;
2296 response = (struct pci_response *)buffer;
2297 comp_packet->completion_func(comp_packet->compl_ctxt,
2298 response,
2299 bytes_recvd);
2300 break;
2301
2302 case VM_PKT_DATA_INBAND:
2303
2304 new_message = (struct pci_incoming_message *)buffer;
2305 switch (new_message->message_type.type) {
2306 case PCI_BUS_RELATIONS:
2307
2308 bus_rel = (struct pci_bus_relations *)buffer;
2309 if (bytes_recvd <
2310 offsetof(struct pci_bus_relations, func) +
2311 (sizeof(struct pci_function_description) *
2312 (bus_rel->device_count))) {
2313 dev_err(&hbus->hdev->device,
2314 "bus relations too small\n");
2315 break;
2316 }
2317
2318 hv_pci_devices_present(hbus, bus_rel);
2319 break;
2320
2321 case PCI_EJECT:
2322
2323 dev_message = (struct pci_dev_incoming *)buffer;
2324 hpdev = get_pcichild_wslot(hbus,
2325 dev_message->wslot.slot);
2326 if (hpdev) {
2327 hv_pci_eject_device(hpdev);
2328 put_pcichild(hpdev);
2329 }
2330 break;
2331
2332 case PCI_INVALIDATE_BLOCK:
2333
2334 inval = (struct pci_dev_inval_block *)buffer;
2335 hpdev = get_pcichild_wslot(hbus,
2336 inval->wslot.slot);
2337 if (hpdev) {
2338 if (hpdev->block_invalidate) {
2339 hpdev->block_invalidate(
2340 hpdev->invalidate_context,
2341 inval->block_mask);
2342 }
2343 put_pcichild(hpdev);
2344 }
2345 break;
2346
2347 default:
2348 dev_warn(&hbus->hdev->device,
2349 "Unimplemented protocol message %x\n",
2350 new_message->message_type.type);
2351 break;
2352 }
2353 break;
2354
2355 default:
2356 dev_err(&hbus->hdev->device,
2357 "unhandled packet type %d, tid %llx len %d\n",
2358 desc->type, req_id, bytes_recvd);
2359 break;
2360 }
2361 }
2362
2363 kfree(buffer);
2364}
2365
2366/**
2367 * hv_pci_protocol_negotiation() - Set up protocol
2368 * @hdev: VMBus's tracking struct for this root PCI bus
2369 *
2370 * This driver is intended to support running on Windows 10
2371 * (server) and later versions. It will not run on earlier
2372 * versions, as they assume that many of the operations which
2373 * Linux needs accomplished with a spinlock held were done via
2374 * asynchronous messaging via VMBus. Windows 10 increases the
2375 * surface area of PCI emulation so that these actions can take
2376 * place by suspending a virtual processor for their duration.
2377 *
2378 * This function negotiates the channel protocol version,
2379 * failing if the host doesn't support the necessary protocol
2380 * level.
2381 */
2382static int hv_pci_protocol_negotiation(struct hv_device *hdev)
2383{
2384 struct pci_version_request *version_req;
2385 struct hv_pci_compl comp_pkt;
2386 struct pci_packet *pkt;
2387 int ret;
2388 int i;
2389
2390 /*
2391 * Initiate the handshake with the host and negotiate
2392 * a version that the host can support. We start with the
2393 * highest version number and go down if the host cannot
2394 * support it.
2395 */
2396 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2397 if (!pkt)
2398 return -ENOMEM;
2399
2400 init_completion(&comp_pkt.host_event);
2401 pkt->completion_func = hv_pci_generic_compl;
2402 pkt->compl_ctxt = &comp_pkt;
2403 version_req = (struct pci_version_request *)&pkt->message;
2404 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2405
2406 for (i = 0; i < ARRAY_SIZE(pci_protocol_versions); i++) {
2407 version_req->protocol_version = pci_protocol_versions[i];
2408 ret = vmbus_sendpacket(hdev->channel, version_req,
2409 sizeof(struct pci_version_request),
2410 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2411 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2412 if (!ret)
2413 ret = wait_for_response(hdev, &comp_pkt.host_event);
2414
2415 if (ret) {
2416 dev_err(&hdev->device,
2417 "PCI Pass-through VSP failed to request version: %d",
2418 ret);
2419 goto exit;
2420 }
2421
2422 if (comp_pkt.completion_status >= 0) {
2423 pci_protocol_version = pci_protocol_versions[i];
2424 dev_info(&hdev->device,
2425 "PCI VMBus probing: Using version %#x\n",
2426 pci_protocol_version);
2427 goto exit;
2428 }
2429
2430 if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2431 dev_err(&hdev->device,
2432 "PCI Pass-through VSP failed version request: %#x",
2433 comp_pkt.completion_status);
2434 ret = -EPROTO;
2435 goto exit;
2436 }
2437
2438 reinit_completion(&comp_pkt.host_event);
2439 }
2440
2441 dev_err(&hdev->device,
2442 "PCI pass-through VSP failed to find supported version");
2443 ret = -EPROTO;
2444
2445exit:
2446 kfree(pkt);
2447 return ret;
2448}
2449
2450/**
2451 * hv_pci_free_bridge_windows() - Release memory regions for the
2452 * bus
2453 * @hbus: Root PCI bus, as understood by this driver
2454 */
2455static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2456{
2457 /*
2458 * Set the resources back to the way they looked when they
2459 * were allocated by setting IORESOURCE_BUSY again.
2460 */
2461
2462 if (hbus->low_mmio_space && hbus->low_mmio_res) {
2463 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2464 vmbus_free_mmio(hbus->low_mmio_res->start,
2465 resource_size(hbus->low_mmio_res));
2466 }
2467
2468 if (hbus->high_mmio_space && hbus->high_mmio_res) {
2469 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2470 vmbus_free_mmio(hbus->high_mmio_res->start,
2471 resource_size(hbus->high_mmio_res));
2472 }
2473}
2474
2475/**
2476 * hv_pci_allocate_bridge_windows() - Allocate memory regions
2477 * for the bus
2478 * @hbus: Root PCI bus, as understood by this driver
2479 *
2480 * This function calls vmbus_allocate_mmio(), which is itself a
2481 * bit of a compromise. Ideally, we might change the pnp layer
2482 * in the kernel such that it comprehends either PCI devices
2483 * which are "grandchildren of ACPI," with some intermediate bus
2484 * node (in this case, VMBus) or change it such that it
2485 * understands VMBus. The pnp layer, however, has been declared
2486 * deprecated, and not subject to change.
2487 *
2488 * The workaround, implemented here, is to ask VMBus to allocate
2489 * MMIO space for this bus. VMBus itself knows which ranges are
2490 * appropriate by looking at its own ACPI objects. Then, after
2491 * these ranges are claimed, they're modified to look like they
2492 * would have looked if the ACPI and pnp code had allocated
2493 * bridge windows. These descriptors have to exist in this form
2494 * in order to satisfy the code which will get invoked when the
2495 * endpoint PCI function driver calls request_mem_region() or
2496 * request_mem_region_exclusive().
2497 *
2498 * Return: 0 on success, -errno on failure
2499 */
2500static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2501{
2502 resource_size_t align;
2503 int ret;
2504
2505 if (hbus->low_mmio_space) {
2506 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2507 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2508 (u64)(u32)0xffffffff,
2509 hbus->low_mmio_space,
2510 align, false);
2511 if (ret) {
2512 dev_err(&hbus->hdev->device,
2513 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2514 hbus->low_mmio_space);
2515 return ret;
2516 }
2517
2518 /* Modify this resource to become a bridge window. */
2519 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2520 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2521 pci_add_resource(&hbus->resources_for_children,
2522 hbus->low_mmio_res);
2523 }
2524
2525 if (hbus->high_mmio_space) {
2526 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2527 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2528 0x100000000, -1,
2529 hbus->high_mmio_space, align,
2530 false);
2531 if (ret) {
2532 dev_err(&hbus->hdev->device,
2533 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2534 hbus->high_mmio_space);
2535 goto release_low_mmio;
2536 }
2537
2538 /* Modify this resource to become a bridge window. */
2539 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2540 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2541 pci_add_resource(&hbus->resources_for_children,
2542 hbus->high_mmio_res);
2543 }
2544
2545 return 0;
2546
2547release_low_mmio:
2548 if (hbus->low_mmio_res) {
2549 vmbus_free_mmio(hbus->low_mmio_res->start,
2550 resource_size(hbus->low_mmio_res));
2551 }
2552
2553 return ret;
2554}
2555
2556/**
2557 * hv_allocate_config_window() - Find MMIO space for PCI Config
2558 * @hbus: Root PCI bus, as understood by this driver
2559 *
2560 * This function claims memory-mapped I/O space for accessing
2561 * configuration space for the functions on this bus.
2562 *
2563 * Return: 0 on success, -errno on failure
2564 */
2565static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2566{
2567 int ret;
2568
2569 /*
2570 * Set up a region of MMIO space to use for accessing configuration
2571 * space.
2572 */
2573 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2574 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2575 if (ret)
2576 return ret;
2577
2578 /*
2579 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2580 * resource claims (those which cannot be overlapped) and the ranges
2581 * which are valid for the children of this bus, which are intended
2582 * to be overlapped by those children. Set the flag on this claim
2583 * meaning that this region can't be overlapped.
2584 */
2585
2586 hbus->mem_config->flags |= IORESOURCE_BUSY;
2587
2588 return 0;
2589}
2590
2591static void hv_free_config_window(struct hv_pcibus_device *hbus)
2592{
2593 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2594}
2595
2596/**
2597 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2598 * @hdev: VMBus's tracking struct for this root PCI bus
2599 *
2600 * Return: 0 on success, -errno on failure
2601 */
2602static int hv_pci_enter_d0(struct hv_device *hdev)
2603{
2604 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2605 struct pci_bus_d0_entry *d0_entry;
2606 struct hv_pci_compl comp_pkt;
2607 struct pci_packet *pkt;
2608 int ret;
2609
2610 /*
2611 * Tell the host that the bus is ready to use, and moved into the
2612 * powered-on state. This includes telling the host which region
2613 * of memory-mapped I/O space has been chosen for configuration space
2614 * access.
2615 */
2616 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2617 if (!pkt)
2618 return -ENOMEM;
2619
2620 init_completion(&comp_pkt.host_event);
2621 pkt->completion_func = hv_pci_generic_compl;
2622 pkt->compl_ctxt = &comp_pkt;
2623 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2624 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2625 d0_entry->mmio_base = hbus->mem_config->start;
2626
2627 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2628 (unsigned long)pkt, VM_PKT_DATA_INBAND,
2629 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2630 if (!ret)
2631 ret = wait_for_response(hdev, &comp_pkt.host_event);
2632
2633 if (ret)
2634 goto exit;
2635
2636 if (comp_pkt.completion_status < 0) {
2637 dev_err(&hdev->device,
2638 "PCI Pass-through VSP failed D0 Entry with status %x\n",
2639 comp_pkt.completion_status);
2640 ret = -EPROTO;
2641 goto exit;
2642 }
2643
2644 ret = 0;
2645
2646exit:
2647 kfree(pkt);
2648 return ret;
2649}
2650
2651/**
2652 * hv_pci_query_relations() - Ask host to send list of child
2653 * devices
2654 * @hdev: VMBus's tracking struct for this root PCI bus
2655 *
2656 * Return: 0 on success, -errno on failure
2657 */
2658static int hv_pci_query_relations(struct hv_device *hdev)
2659{
2660 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2661 struct pci_message message;
2662 struct completion comp;
2663 int ret;
2664
2665 /* Ask the host to send along the list of child devices */
2666 init_completion(&comp);
2667 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2668 return -ENOTEMPTY;
2669
2670 memset(&message, 0, sizeof(message));
2671 message.type = PCI_QUERY_BUS_RELATIONS;
2672
2673 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2674 0, VM_PKT_DATA_INBAND, 0);
2675 if (!ret)
2676 ret = wait_for_response(hdev, &comp);
2677
2678 return ret;
2679}
2680
2681/**
2682 * hv_send_resources_allocated() - Report local resource choices
2683 * @hdev: VMBus's tracking struct for this root PCI bus
2684 *
2685 * The host OS is expecting to be sent a request as a message
2686 * which contains all the resources that the device will use.
2687 * The response contains those same resources, "translated"
2688 * which is to say, the values which should be used by the
2689 * hardware, when it delivers an interrupt. (MMIO resources are
2690 * used in local terms.) This is nice for Windows, and lines up
2691 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2692 * is deeply expecting to scan an emulated PCI configuration
2693 * space. So this message is sent here only to drive the state
2694 * machine on the host forward.
2695 *
2696 * Return: 0 on success, -errno on failure
2697 */
2698static int hv_send_resources_allocated(struct hv_device *hdev)
2699{
2700 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2701 struct pci_resources_assigned *res_assigned;
2702 struct pci_resources_assigned2 *res_assigned2;
2703 struct hv_pci_compl comp_pkt;
2704 struct hv_pci_dev *hpdev;
2705 struct pci_packet *pkt;
2706 size_t size_res;
2707 u32 wslot;
2708 int ret;
2709
2710 size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2)
2711 ? sizeof(*res_assigned) : sizeof(*res_assigned2);
2712
2713 pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2714 if (!pkt)
2715 return -ENOMEM;
2716
2717 ret = 0;
2718
2719 for (wslot = 0; wslot < 256; wslot++) {
2720 hpdev = get_pcichild_wslot(hbus, wslot);
2721 if (!hpdev)
2722 continue;
2723
2724 memset(pkt, 0, sizeof(*pkt) + size_res);
2725 init_completion(&comp_pkt.host_event);
2726 pkt->completion_func = hv_pci_generic_compl;
2727 pkt->compl_ctxt = &comp_pkt;
2728
2729 if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2730 res_assigned =
2731 (struct pci_resources_assigned *)&pkt->message;
2732 res_assigned->message_type.type =
2733 PCI_RESOURCES_ASSIGNED;
2734 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2735 } else {
2736 res_assigned2 =
2737 (struct pci_resources_assigned2 *)&pkt->message;
2738 res_assigned2->message_type.type =
2739 PCI_RESOURCES_ASSIGNED2;
2740 res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2741 }
2742 put_pcichild(hpdev);
2743
2744 ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2745 size_res, (unsigned long)pkt,
2746 VM_PKT_DATA_INBAND,
2747 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2748 if (!ret)
2749 ret = wait_for_response(hdev, &comp_pkt.host_event);
2750 if (ret)
2751 break;
2752
2753 if (comp_pkt.completion_status < 0) {
2754 ret = -EPROTO;
2755 dev_err(&hdev->device,
2756 "resource allocated returned 0x%x",
2757 comp_pkt.completion_status);
2758 break;
2759 }
2760 }
2761
2762 kfree(pkt);
2763 return ret;
2764}
2765
2766/**
2767 * hv_send_resources_released() - Report local resources
2768 * released
2769 * @hdev: VMBus's tracking struct for this root PCI bus
2770 *
2771 * Return: 0 on success, -errno on failure
2772 */
2773static int hv_send_resources_released(struct hv_device *hdev)
2774{
2775 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2776 struct pci_child_message pkt;
2777 struct hv_pci_dev *hpdev;
2778 u32 wslot;
2779 int ret;
2780
2781 for (wslot = 0; wslot < 256; wslot++) {
2782 hpdev = get_pcichild_wslot(hbus, wslot);
2783 if (!hpdev)
2784 continue;
2785
2786 memset(&pkt, 0, sizeof(pkt));
2787 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2788 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2789
2790 put_pcichild(hpdev);
2791
2792 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2793 VM_PKT_DATA_INBAND, 0);
2794 if (ret)
2795 return ret;
2796 }
2797
2798 return 0;
2799}
2800
2801static void get_hvpcibus(struct hv_pcibus_device *hbus)
2802{
2803 refcount_inc(&hbus->remove_lock);
2804}
2805
2806static void put_hvpcibus(struct hv_pcibus_device *hbus)
2807{
2808 if (refcount_dec_and_test(&hbus->remove_lock))
2809 complete(&hbus->remove_event);
2810}
2811
2812#define HVPCI_DOM_MAP_SIZE (64 * 1024)
2813static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
2814
2815/*
2816 * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
2817 * as invalid for passthrough PCI devices of this driver.
2818 */
2819#define HVPCI_DOM_INVALID 0
2820
2821/**
2822 * hv_get_dom_num() - Get a valid PCI domain number
2823 * Check if the PCI domain number is in use, and return another number if
2824 * it is in use.
2825 *
2826 * @dom: Requested domain number
2827 *
2828 * return: domain number on success, HVPCI_DOM_INVALID on failure
2829 */
2830static u16 hv_get_dom_num(u16 dom)
2831{
2832 unsigned int i;
2833
2834 if (test_and_set_bit(dom, hvpci_dom_map) == 0)
2835 return dom;
2836
2837 for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
2838 if (test_and_set_bit(i, hvpci_dom_map) == 0)
2839 return i;
2840 }
2841
2842 return HVPCI_DOM_INVALID;
2843}
2844
2845/**
2846 * hv_put_dom_num() - Mark the PCI domain number as free
2847 * @dom: Domain number to be freed
2848 */
2849static void hv_put_dom_num(u16 dom)
2850{
2851 clear_bit(dom, hvpci_dom_map);
2852}
2853
2854/**
2855 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2856 * @hdev: VMBus's tracking struct for this root PCI bus
2857 * @dev_id: Identifies the device itself
2858 *
2859 * Return: 0 on success, -errno on failure
2860 */
2861static int hv_pci_probe(struct hv_device *hdev,
2862 const struct hv_vmbus_device_id *dev_id)
2863{
2864 struct hv_pcibus_device *hbus;
2865 u16 dom_req, dom;
2866 char *name;
2867 int ret;
2868
2869 /*
2870 * hv_pcibus_device contains the hypercall arguments for retargeting in
2871 * hv_irq_unmask(). Those must not cross a page boundary.
2872 */
2873 BUILD_BUG_ON(sizeof(*hbus) > PAGE_SIZE);
2874
2875 hbus = (struct hv_pcibus_device *)get_zeroed_page(GFP_KERNEL);
2876 if (!hbus)
2877 return -ENOMEM;
2878 hbus->state = hv_pcibus_init;
2879
2880 /*
2881 * The PCI bus "domain" is what is called "segment" in ACPI and other
2882 * specs. Pull it from the instance ID, to get something usually
2883 * unique. In rare cases of collision, we will find out another number
2884 * not in use.
2885 *
2886 * Note that, since this code only runs in a Hyper-V VM, Hyper-V
2887 * together with this guest driver can guarantee that (1) The only
2888 * domain used by Gen1 VMs for something that looks like a physical
2889 * PCI bus (which is actually emulated by the hypervisor) is domain 0.
2890 * (2) There will be no overlap between domains (after fixing possible
2891 * collisions) in the same VM.
2892 */
2893 dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
2894 dom = hv_get_dom_num(dom_req);
2895
2896 if (dom == HVPCI_DOM_INVALID) {
2897 dev_err(&hdev->device,
2898 "Unable to use dom# 0x%hx or other numbers", dom_req);
2899 ret = -EINVAL;
2900 goto free_bus;
2901 }
2902
2903 if (dom != dom_req)
2904 dev_info(&hdev->device,
2905 "PCI dom# 0x%hx has collision, using 0x%hx",
2906 dom_req, dom);
2907
2908 hbus->sysdata.domain = dom;
2909
2910 hbus->hdev = hdev;
2911 refcount_set(&hbus->remove_lock, 1);
2912 INIT_LIST_HEAD(&hbus->children);
2913 INIT_LIST_HEAD(&hbus->dr_list);
2914 INIT_LIST_HEAD(&hbus->resources_for_children);
2915 spin_lock_init(&hbus->config_lock);
2916 spin_lock_init(&hbus->device_list_lock);
2917 spin_lock_init(&hbus->retarget_msi_interrupt_lock);
2918 init_completion(&hbus->remove_event);
2919 hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
2920 hbus->sysdata.domain);
2921 if (!hbus->wq) {
2922 ret = -ENOMEM;
2923 goto free_dom;
2924 }
2925
2926 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2927 hv_pci_onchannelcallback, hbus);
2928 if (ret)
2929 goto destroy_wq;
2930
2931 hv_set_drvdata(hdev, hbus);
2932
2933 ret = hv_pci_protocol_negotiation(hdev);
2934 if (ret)
2935 goto close;
2936
2937 ret = hv_allocate_config_window(hbus);
2938 if (ret)
2939 goto close;
2940
2941 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2942 PCI_CONFIG_MMIO_LENGTH);
2943 if (!hbus->cfg_addr) {
2944 dev_err(&hdev->device,
2945 "Unable to map a virtual address for config space\n");
2946 ret = -ENOMEM;
2947 goto free_config;
2948 }
2949
2950 name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance);
2951 if (!name) {
2952 ret = -ENOMEM;
2953 goto unmap;
2954 }
2955
2956 hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name);
2957 kfree(name);
2958 if (!hbus->sysdata.fwnode) {
2959 ret = -ENOMEM;
2960 goto unmap;
2961 }
2962
2963 ret = hv_pcie_init_irq_domain(hbus);
2964 if (ret)
2965 goto free_fwnode;
2966
2967 ret = hv_pci_query_relations(hdev);
2968 if (ret)
2969 goto free_irq_domain;
2970
2971 ret = hv_pci_enter_d0(hdev);
2972 if (ret)
2973 goto free_irq_domain;
2974
2975 ret = hv_pci_allocate_bridge_windows(hbus);
2976 if (ret)
2977 goto free_irq_domain;
2978
2979 ret = hv_send_resources_allocated(hdev);
2980 if (ret)
2981 goto free_windows;
2982
2983 prepopulate_bars(hbus);
2984
2985 hbus->state = hv_pcibus_probed;
2986
2987 ret = create_root_hv_pci_bus(hbus);
2988 if (ret)
2989 goto free_windows;
2990
2991 return 0;
2992
2993free_windows:
2994 hv_pci_free_bridge_windows(hbus);
2995free_irq_domain:
2996 irq_domain_remove(hbus->irq_domain);
2997free_fwnode:
2998 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2999unmap:
3000 iounmap(hbus->cfg_addr);
3001free_config:
3002 hv_free_config_window(hbus);
3003close:
3004 vmbus_close(hdev->channel);
3005destroy_wq:
3006 destroy_workqueue(hbus->wq);
3007free_dom:
3008 hv_put_dom_num(hbus->sysdata.domain);
3009free_bus:
3010 free_page((unsigned long)hbus);
3011 return ret;
3012}
3013
3014static void hv_pci_bus_exit(struct hv_device *hdev)
3015{
3016 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3017 struct {
3018 struct pci_packet teardown_packet;
3019 u8 buffer[sizeof(struct pci_message)];
3020 } pkt;
3021 struct pci_bus_relations relations;
3022 struct hv_pci_compl comp_pkt;
3023 int ret;
3024
3025 /*
3026 * After the host sends the RESCIND_CHANNEL message, it doesn't
3027 * access the per-channel ringbuffer any longer.
3028 */
3029 if (hdev->channel->rescind)
3030 return;
3031
3032 /* Delete any children which might still exist. */
3033 memset(&relations, 0, sizeof(relations));
3034 hv_pci_devices_present(hbus, &relations);
3035
3036 ret = hv_send_resources_released(hdev);
3037 if (ret)
3038 dev_err(&hdev->device,
3039 "Couldn't send resources released packet(s)\n");
3040
3041 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
3042 init_completion(&comp_pkt.host_event);
3043 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
3044 pkt.teardown_packet.compl_ctxt = &comp_pkt;
3045 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
3046
3047 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
3048 sizeof(struct pci_message),
3049 (unsigned long)&pkt.teardown_packet,
3050 VM_PKT_DATA_INBAND,
3051 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
3052 if (!ret)
3053 wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
3054}
3055
3056/**
3057 * hv_pci_remove() - Remove routine for this VMBus channel
3058 * @hdev: VMBus's tracking struct for this root PCI bus
3059 *
3060 * Return: 0 on success, -errno on failure
3061 */
3062static int hv_pci_remove(struct hv_device *hdev)
3063{
3064 struct hv_pcibus_device *hbus;
3065
3066 hbus = hv_get_drvdata(hdev);
3067 if (hbus->state == hv_pcibus_installed) {
3068 /* Remove the bus from PCI's point of view. */
3069 pci_lock_rescan_remove();
3070 pci_stop_root_bus(hbus->pci_bus);
3071 hv_pci_remove_slots(hbus);
3072 pci_remove_root_bus(hbus->pci_bus);
3073 pci_unlock_rescan_remove();
3074 hbus->state = hv_pcibus_removed;
3075 }
3076
3077 hv_pci_bus_exit(hdev);
3078
3079 vmbus_close(hdev->channel);
3080
3081 iounmap(hbus->cfg_addr);
3082 hv_free_config_window(hbus);
3083 pci_free_resource_list(&hbus->resources_for_children);
3084 hv_pci_free_bridge_windows(hbus);
3085 irq_domain_remove(hbus->irq_domain);
3086 irq_domain_free_fwnode(hbus->sysdata.fwnode);
3087 put_hvpcibus(hbus);
3088 wait_for_completion(&hbus->remove_event);
3089 destroy_workqueue(hbus->wq);
3090
3091 hv_put_dom_num(hbus->sysdata.domain);
3092
3093 free_page((unsigned long)hbus);
3094 return 0;
3095}
3096
3097static const struct hv_vmbus_device_id hv_pci_id_table[] = {
3098 /* PCI Pass-through Class ID */
3099 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
3100 { HV_PCIE_GUID, },
3101 { },
3102};
3103
3104MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
3105
3106static struct hv_driver hv_pci_drv = {
3107 .name = "hv_pci",
3108 .id_table = hv_pci_id_table,
3109 .probe = hv_pci_probe,
3110 .remove = hv_pci_remove,
3111};
3112
3113static void __exit exit_hv_pci_drv(void)
3114{
3115 vmbus_driver_unregister(&hv_pci_drv);
3116
3117 hvpci_block_ops.read_block = NULL;
3118 hvpci_block_ops.write_block = NULL;
3119 hvpci_block_ops.reg_blk_invalidate = NULL;
3120}
3121
3122static int __init init_hv_pci_drv(void)
3123{
3124 /* Set the invalid domain number's bit, so it will not be used */
3125 set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
3126
3127 /* Initialize PCI block r/w interface */
3128 hvpci_block_ops.read_block = hv_read_config_block;
3129 hvpci_block_ops.write_block = hv_write_config_block;
3130 hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate;
3131
3132 return vmbus_driver_register(&hv_pci_drv);
3133}
3134
3135module_init(init_hv_pci_drv);
3136module_exit(exit_hv_pci_drv);
3137
3138MODULE_DESCRIPTION("Hyper-V PCI");
3139MODULE_LICENSE("GPL v2");