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v5.9
 1// SPDX-License-Identifier: GPL-2.0
 2/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
 3
 4#include "cc_driver.h"
 5#include "cc_sram_mgr.h"
 6
 7/**
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 8 * cc_sram_mgr_init() - Initializes SRAM pool.
 9 *      The pool starts right at the beginning of SRAM.
10 *      Returns zero for success, negative value otherwise.
11 *
12 * @drvdata: Associated device driver context
13 *
14 * Return:
15 * 0 for success, negative error code for failure.
16 */
17int cc_sram_mgr_init(struct cc_drvdata *drvdata)
18{
19	u32 start = 0;
 
20	struct device *dev = drvdata_to_dev(drvdata);
21
22	if (drvdata->hw_rev < CC_HW_REV_712) {
23		/* Pool starts after ROM bytes */
24		start = cc_ioread(drvdata, CC_REG(HOST_SEP_SRAM_THRESHOLD));
 
 
25		if ((start & 0x3) != 0) {
26			dev_err(dev, "Invalid SRAM offset 0x%x\n", start);
27			return -EINVAL;
28		}
29	}
30
31	drvdata->sram_free_offset = start;
 
 
 
 
 
 
 
 
32	return 0;
33}
34
35/**
36 * cc_sram_alloc() - Allocate buffer from SRAM pool.
37 *
38 * @drvdata: Associated device driver context
39 * @size: The requested numer of bytes to allocate
40 *
41 * Return:
42 * Address offset in SRAM or NULL_SRAM_ADDR for failure.
43 */
44u32 cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
45{
 
46	struct device *dev = drvdata_to_dev(drvdata);
47	u32 p;
48
49	if ((size & 0x3)) {
50		dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
51			size);
52		return NULL_SRAM_ADDR;
53	}
54	if (size > (CC_CC_SRAM_SIZE - drvdata->sram_free_offset)) {
55		dev_err(dev, "Not enough space to allocate %u B (at offset %u)\n",
56			size, drvdata->sram_free_offset);
57		return NULL_SRAM_ADDR;
58	}
59
60	p = drvdata->sram_free_offset;
61	drvdata->sram_free_offset += size;
62	dev_dbg(dev, "Allocated %u B @ %u\n", size, p);
63	return p;
64}
65
66/**
67 * cc_set_sram_desc() - Create const descriptors sequence to
68 *	set values in given array into SRAM.
69 * Note: each const value can't exceed word size.
70 *
71 * @src:	  A pointer to array of words to set as consts.
72 * @dst:	  The target SRAM buffer to set into
73 * @nelement:	  The number of words in "src" array
74 * @seq:	  A pointer to the given IN/OUT descriptor sequence
75 * @seq_len:	  A pointer to the given IN/OUT sequence length
76 */
77void cc_set_sram_desc(const u32 *src, u32 dst, unsigned int nelement,
78		      struct cc_hw_desc *seq, unsigned int *seq_len)
 
79{
80	u32 i;
81	unsigned int idx = *seq_len;
82
83	for (i = 0; i < nelement; i++, idx++) {
84		hw_desc_init(&seq[idx]);
85		set_din_const(&seq[idx], src[i], sizeof(u32));
86		set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
87		set_flow_mode(&seq[idx], BYPASS);
88	}
89
90	*seq_len = idx;
91}
v5.4
  1// SPDX-License-Identifier: GPL-2.0
  2/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
  3
  4#include "cc_driver.h"
  5#include "cc_sram_mgr.h"
  6
  7/**
  8 * struct cc_sram_ctx -Internal RAM context manager
  9 * @sram_free_offset:   the offset to the non-allocated area
 10 */
 11struct cc_sram_ctx {
 12	cc_sram_addr_t sram_free_offset;
 13};
 14
 15/**
 16 * cc_sram_mgr_fini() - Cleanup SRAM pool.
 17 *
 18 * @drvdata: Associated device driver context
 19 */
 20void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
 21{
 22	/* Nothing needed */
 23}
 24
 25/**
 26 * cc_sram_mgr_init() - Initializes SRAM pool.
 27 *      The pool starts right at the beginning of SRAM.
 28 *      Returns zero for success, negative value otherwise.
 29 *
 30 * @drvdata: Associated device driver context
 
 
 
 31 */
 32int cc_sram_mgr_init(struct cc_drvdata *drvdata)
 33{
 34	struct cc_sram_ctx *ctx;
 35	dma_addr_t start = 0;
 36	struct device *dev = drvdata_to_dev(drvdata);
 37
 38	if (drvdata->hw_rev < CC_HW_REV_712) {
 39		/* Pool starts after ROM bytes */
 40		start = (dma_addr_t)cc_ioread(drvdata,
 41					      CC_REG(HOST_SEP_SRAM_THRESHOLD));
 42
 43		if ((start & 0x3) != 0) {
 44			dev_err(dev, "Invalid SRAM offset %pad\n", &start);
 45			return -EINVAL;
 46		}
 47	}
 48
 49	/* Allocate "this" context */
 50	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
 51
 52	if (!ctx)
 53		return -ENOMEM;
 54
 55	ctx->sram_free_offset = start;
 56	drvdata->sram_mgr_handle = ctx;
 57
 58	return 0;
 59}
 60
 61/*!
 62 * Allocated buffer from SRAM pool.
 63 * Note: Caller is responsible to free the LAST allocated buffer.
 64 * This function does not taking care of any fragmentation may occur
 65 * by the order of calls to alloc/free.
 66 *
 67 * \param drvdata
 68 * \param size The requested bytes to allocate
 69 */
 70cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
 71{
 72	struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle;
 73	struct device *dev = drvdata_to_dev(drvdata);
 74	cc_sram_addr_t p;
 75
 76	if ((size & 0x3)) {
 77		dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
 78			size);
 79		return NULL_SRAM_ADDR;
 80	}
 81	if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) {
 82		dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n",
 83			size, smgr_ctx->sram_free_offset);
 84		return NULL_SRAM_ADDR;
 85	}
 86
 87	p = smgr_ctx->sram_free_offset;
 88	smgr_ctx->sram_free_offset += size;
 89	dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p);
 90	return p;
 91}
 92
 93/**
 94 * cc_set_sram_desc() - Create const descriptors sequence to
 95 *	set values in given array into SRAM.
 96 * Note: each const value can't exceed word size.
 97 *
 98 * @src:	  A pointer to array of words to set as consts.
 99 * @dst:	  The target SRAM buffer to set into
100 * @nelements:	  The number of words in "src" array
101 * @seq:	  A pointer to the given IN/OUT descriptor sequence
102 * @seq_len:	  A pointer to the given IN/OUT sequence length
103 */
104void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst,
105		      unsigned int nelement, struct cc_hw_desc *seq,
106		      unsigned int *seq_len)
107{
108	u32 i;
109	unsigned int idx = *seq_len;
110
111	for (i = 0; i < nelement; i++, idx++) {
112		hw_desc_init(&seq[idx]);
113		set_din_const(&seq[idx], src[i], sizeof(u32));
114		set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
115		set_flow_mode(&seq[idx], BYPASS);
116	}
117
118	*seq_len = idx;
119}