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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * include/asm-sh/processor.h
4 *
5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 * Copyright (C) 2002, 2003 Paul Mundt
7 */
8
9#ifndef __ASM_SH_PROCESSOR_32_H
10#define __ASM_SH_PROCESSOR_32_H
11
12#include <linux/compiler.h>
13#include <linux/linkage.h>
14#include <asm/page.h>
15#include <asm/types.h>
16#include <asm/hw_breakpoint.h>
17
18/* Core Processor Version Register */
19#define CCN_PVR 0xff000030
20#define CCN_CVR 0xff000040
21#define CCN_PRR 0xff000044
22
23/*
24 * User space process size: 2GB.
25 *
26 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
27 */
28#define TASK_SIZE 0x7c000000UL
29
30#define STACK_TOP TASK_SIZE
31#define STACK_TOP_MAX STACK_TOP
32
33/* This decides where the kernel will search for a free chunk of vm
34 * space during mmap's.
35 */
36#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
37
38/*
39 * Bit of SR register
40 *
41 * FD-bit:
42 * When it's set, it means the processor doesn't have right to use FPU,
43 * and it results exception when the floating operation is executed.
44 *
45 * IMASK-bit:
46 * Interrupt level mask
47 */
48#define SR_DSP 0x00001000
49#define SR_IMASK 0x000000f0
50#define SR_FD 0x00008000
51#define SR_MD 0x40000000
52
53/*
54 * DSP structure and data
55 */
56struct sh_dsp_struct {
57 unsigned long dsp_regs[14];
58 long status;
59};
60
61/*
62 * FPU structure and data
63 */
64
65struct sh_fpu_hard_struct {
66 unsigned long fp_regs[16];
67 unsigned long xfp_regs[16];
68 unsigned long fpscr;
69 unsigned long fpul;
70
71 long status; /* software status information */
72};
73
74/* Dummy fpu emulator */
75struct sh_fpu_soft_struct {
76 unsigned long fp_regs[16];
77 unsigned long xfp_regs[16];
78 unsigned long fpscr;
79 unsigned long fpul;
80
81 unsigned char lookahead;
82 unsigned long entry_pc;
83};
84
85union thread_xstate {
86 struct sh_fpu_hard_struct hardfpu;
87 struct sh_fpu_soft_struct softfpu;
88};
89
90struct thread_struct {
91 /* Saved registers when thread is descheduled */
92 unsigned long sp;
93 unsigned long pc;
94
95 /* Various thread flags, see SH_THREAD_xxx */
96 unsigned long flags;
97
98 /* Save middle states of ptrace breakpoints */
99 struct perf_event *ptrace_bps[HBP_NUM];
100
101#ifdef CONFIG_SH_DSP
102 /* Dsp status information */
103 struct sh_dsp_struct dsp_status;
104#endif
105
106 /* Extended processor state */
107 union thread_xstate *xstate;
108
109 /*
110 * fpu_counter contains the number of consecutive context switches
111 * that the FPU is used. If this is over a threshold, the lazy fpu
112 * saving becomes unlazy to save the trap. This is an unsigned char
113 * so that after 256 times the counter wraps and the behavior turns
114 * lazy again; this to deal with bursty apps that only use FPU for
115 * a short time
116 */
117 unsigned char fpu_counter;
118};
119
120#define INIT_THREAD { \
121 .sp = sizeof(init_stack) + (long) &init_stack, \
122 .flags = 0, \
123}
124
125/* Forward declaration, a strange C thing */
126struct task_struct;
127
128extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
129
130/* Free all resources held by a thread. */
131extern void release_thread(struct task_struct *);
132
133/*
134 * FPU lazy state save handling.
135 */
136
137static __inline__ void disable_fpu(void)
138{
139 unsigned long __dummy;
140
141 /* Set FD flag in SR */
142 __asm__ __volatile__("stc sr, %0\n\t"
143 "or %1, %0\n\t"
144 "ldc %0, sr"
145 : "=&r" (__dummy)
146 : "r" (SR_FD));
147}
148
149static __inline__ void enable_fpu(void)
150{
151 unsigned long __dummy;
152
153 /* Clear out FD flag in SR */
154 __asm__ __volatile__("stc sr, %0\n\t"
155 "and %1, %0\n\t"
156 "ldc %0, sr"
157 : "=&r" (__dummy)
158 : "r" (~SR_FD));
159}
160
161/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
162#define FPSCR_INIT 0x00080000
163
164#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
165#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
166
167/*
168 * Return saved PC of a blocked thread.
169 */
170#define thread_saved_pc(tsk) (tsk->thread.pc)
171
172void show_trace(struct task_struct *tsk, unsigned long *sp,
173 struct pt_regs *regs, const char *loglvl);
174
175#ifdef CONFIG_DUMP_CODE
176void show_code(struct pt_regs *regs);
177#else
178static inline void show_code(struct pt_regs *regs)
179{
180}
181#endif
182
183extern unsigned long get_wchan(struct task_struct *p);
184
185#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
186#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
187
188#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
189
190#define PREFETCH_STRIDE L1_CACHE_BYTES
191#define ARCH_HAS_PREFETCH
192#define ARCH_HAS_PREFETCHW
193
194static inline void prefetch(const void *x)
195{
196 __builtin_prefetch(x, 0, 3);
197}
198
199static inline void prefetchw(const void *x)
200{
201 __builtin_prefetch(x, 1, 3);
202}
203#endif
204
205#endif /* __ASM_SH_PROCESSOR_32_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * include/asm-sh/processor.h
4 *
5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 * Copyright (C) 2002, 2003 Paul Mundt
7 */
8
9#ifndef __ASM_SH_PROCESSOR_32_H
10#define __ASM_SH_PROCESSOR_32_H
11#ifdef __KERNEL__
12
13#include <linux/compiler.h>
14#include <linux/linkage.h>
15#include <asm/page.h>
16#include <asm/types.h>
17#include <asm/hw_breakpoint.h>
18
19/* Core Processor Version Register */
20#define CCN_PVR 0xff000030
21#define CCN_CVR 0xff000040
22#define CCN_PRR 0xff000044
23
24/*
25 * User space process size: 2GB.
26 *
27 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
28 */
29#define TASK_SIZE 0x7c000000UL
30
31#define STACK_TOP TASK_SIZE
32#define STACK_TOP_MAX STACK_TOP
33
34/* This decides where the kernel will search for a free chunk of vm
35 * space during mmap's.
36 */
37#define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3)
38
39/*
40 * Bit of SR register
41 *
42 * FD-bit:
43 * When it's set, it means the processor doesn't have right to use FPU,
44 * and it results exception when the floating operation is executed.
45 *
46 * IMASK-bit:
47 * Interrupt level mask
48 */
49#define SR_DSP 0x00001000
50#define SR_IMASK 0x000000f0
51#define SR_FD 0x00008000
52#define SR_MD 0x40000000
53
54/*
55 * DSP structure and data
56 */
57struct sh_dsp_struct {
58 unsigned long dsp_regs[14];
59 long status;
60};
61
62/*
63 * FPU structure and data
64 */
65
66struct sh_fpu_hard_struct {
67 unsigned long fp_regs[16];
68 unsigned long xfp_regs[16];
69 unsigned long fpscr;
70 unsigned long fpul;
71
72 long status; /* software status information */
73};
74
75/* Dummy fpu emulator */
76struct sh_fpu_soft_struct {
77 unsigned long fp_regs[16];
78 unsigned long xfp_regs[16];
79 unsigned long fpscr;
80 unsigned long fpul;
81
82 unsigned char lookahead;
83 unsigned long entry_pc;
84};
85
86union thread_xstate {
87 struct sh_fpu_hard_struct hardfpu;
88 struct sh_fpu_soft_struct softfpu;
89};
90
91struct thread_struct {
92 /* Saved registers when thread is descheduled */
93 unsigned long sp;
94 unsigned long pc;
95
96 /* Various thread flags, see SH_THREAD_xxx */
97 unsigned long flags;
98
99 /* Save middle states of ptrace breakpoints */
100 struct perf_event *ptrace_bps[HBP_NUM];
101
102#ifdef CONFIG_SH_DSP
103 /* Dsp status information */
104 struct sh_dsp_struct dsp_status;
105#endif
106
107 /* Extended processor state */
108 union thread_xstate *xstate;
109
110 /*
111 * fpu_counter contains the number of consecutive context switches
112 * that the FPU is used. If this is over a threshold, the lazy fpu
113 * saving becomes unlazy to save the trap. This is an unsigned char
114 * so that after 256 times the counter wraps and the behavior turns
115 * lazy again; this to deal with bursty apps that only use FPU for
116 * a short time
117 */
118 unsigned char fpu_counter;
119};
120
121#define INIT_THREAD { \
122 .sp = sizeof(init_stack) + (long) &init_stack, \
123 .flags = 0, \
124}
125
126/* Forward declaration, a strange C thing */
127struct task_struct;
128
129extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
130
131/* Free all resources held by a thread. */
132extern void release_thread(struct task_struct *);
133
134/*
135 * FPU lazy state save handling.
136 */
137
138static __inline__ void disable_fpu(void)
139{
140 unsigned long __dummy;
141
142 /* Set FD flag in SR */
143 __asm__ __volatile__("stc sr, %0\n\t"
144 "or %1, %0\n\t"
145 "ldc %0, sr"
146 : "=&r" (__dummy)
147 : "r" (SR_FD));
148}
149
150static __inline__ void enable_fpu(void)
151{
152 unsigned long __dummy;
153
154 /* Clear out FD flag in SR */
155 __asm__ __volatile__("stc sr, %0\n\t"
156 "and %1, %0\n\t"
157 "ldc %0, sr"
158 : "=&r" (__dummy)
159 : "r" (~SR_FD));
160}
161
162/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
163#define FPSCR_INIT 0x00080000
164
165#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
166#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
167
168/*
169 * Return saved PC of a blocked thread.
170 */
171#define thread_saved_pc(tsk) (tsk->thread.pc)
172
173void show_trace(struct task_struct *tsk, unsigned long *sp,
174 struct pt_regs *regs);
175
176#ifdef CONFIG_DUMP_CODE
177void show_code(struct pt_regs *regs);
178#else
179static inline void show_code(struct pt_regs *regs)
180{
181}
182#endif
183
184extern unsigned long get_wchan(struct task_struct *p);
185
186#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
187#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
188
189#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
190
191#define PREFETCH_STRIDE L1_CACHE_BYTES
192#define ARCH_HAS_PREFETCH
193#define ARCH_HAS_PREFETCHW
194
195static inline void prefetch(const void *x)
196{
197 __builtin_prefetch(x, 0, 3);
198}
199
200static inline void prefetchw(const void *x)
201{
202 __builtin_prefetch(x, 1, 3);
203}
204#endif
205
206#endif /* __KERNEL__ */
207#endif /* __ASM_SH_PROCESSOR_32_H */