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1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 * m5307.c -- platform support for ColdFire 5307 based boards
6 *
7 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
8 * Copyright (C) 2000, Lineo (www.lineo.com)
9 */
10
11/***************************************************************************/
12
13#include <linux/kernel.h>
14#include <linux/param.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <asm/machdep.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20#include <asm/mcfwdebug.h>
21#include <asm/mcfclk.h>
22
23/***************************************************************************/
24
25/*
26 * Some platforms need software versions of the GPIO data registers.
27 */
28unsigned short ppdata;
29unsigned char ledbank = 0xff;
30
31/***************************************************************************/
32
33DEFINE_CLK(pll, "pll.0", MCF_CLK);
34DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
35DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
36DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
37DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
38DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
39DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
40
41struct clk *mcf_clks[] = {
42 &clk_pll,
43 &clk_sys,
44 &clk_mcftmr0,
45 &clk_mcftmr1,
46 &clk_mcfuart0,
47 &clk_mcfuart1,
48 &clk_mcfi2c0,
49 NULL
50};
51
52/***************************************************************************/
53
54static void __init m5307_i2c_init(void)
55{
56#if IS_ENABLED(CONFIG_I2C_IMX)
57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
58 MCFSIM_I2CICR);
59 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
60#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
61}
62
63/***************************************************************************/
64
65void __init config_BSP(char *commandp, int size)
66{
67#if defined(CONFIG_NETtel) || \
68 defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
69 /* Copy command line from FLASH to local buffer... */
70 memcpy(commandp, (char *) 0xf0004000, size);
71 commandp[size-1] = 0;
72#endif
73
74 mach_sched_init = hw_timer_init;
75
76 /* Only support the external interrupts on their primary level */
77 mcf_mapirq2imr(25, MCFINTC_EINT1);
78 mcf_mapirq2imr(27, MCFINTC_EINT3);
79 mcf_mapirq2imr(29, MCFINTC_EINT5);
80 mcf_mapirq2imr(31, MCFINTC_EINT7);
81
82#ifdef CONFIG_BDM_DISABLE
83 /*
84 * Disable the BDM clocking. This also turns off most of the rest of
85 * the BDM device. This is good for EMC reasons. This option is not
86 * incompatible with the memory protection option.
87 */
88 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
89#endif
90 m5307_i2c_init();
91}
92
93/***************************************************************************/
1// SPDX-License-Identifier: GPL-2.0
2/***************************************************************************/
3
4/*
5 * m5307.c -- platform support for ColdFire 5307 based boards
6 *
7 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
8 * Copyright (C) 2000, Lineo (www.lineo.com)
9 */
10
11/***************************************************************************/
12
13#include <linux/kernel.h>
14#include <linux/param.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <asm/machdep.h>
18#include <asm/coldfire.h>
19#include <asm/mcfsim.h>
20#include <asm/mcfwdebug.h>
21#include <asm/mcfclk.h>
22
23/***************************************************************************/
24
25/*
26 * Some platforms need software versions of the GPIO data registers.
27 */
28unsigned short ppdata;
29unsigned char ledbank = 0xff;
30
31/***************************************************************************/
32
33DEFINE_CLK(pll, "pll.0", MCF_CLK);
34DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
35DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
36DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
37DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
38DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
39DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
40
41struct clk *mcf_clks[] = {
42 &clk_pll,
43 &clk_sys,
44 &clk_mcftmr0,
45 &clk_mcftmr1,
46 &clk_mcfuart0,
47 &clk_mcfuart1,
48 &clk_mcfi2c0,
49 NULL
50};
51
52/***************************************************************************/
53
54static void __init m5307_i2c_init(void)
55{
56#if IS_ENABLED(CONFIG_I2C_IMX)
57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
58 MCFSIM_I2CICR);
59 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
60#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
61}
62
63/***************************************************************************/
64
65void __init config_BSP(char *commandp, int size)
66{
67#if defined(CONFIG_NETtel) || \
68 defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
69 /* Copy command line from FLASH to local buffer... */
70 memcpy(commandp, (char *) 0xf0004000, size);
71 commandp[size-1] = 0;
72#endif
73
74 mach_sched_init = hw_timer_init;
75
76 /* Only support the external interrupts on their primary level */
77 mcf_mapirq2imr(25, MCFINTC_EINT1);
78 mcf_mapirq2imr(27, MCFINTC_EINT3);
79 mcf_mapirq2imr(29, MCFINTC_EINT5);
80 mcf_mapirq2imr(31, MCFINTC_EINT7);
81
82#ifdef CONFIG_BDM_DISABLE
83 /*
84 * Disable the BDM clocking. This also turns off most of the rest of
85 * the BDM device. This is good for EMC reasons. This option is not
86 * incompatible with the memory protection option.
87 */
88 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
89#endif
90 m5307_i2c_init();
91}
92
93/***************************************************************************/