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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
3 *
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
5 */
6
7#include <linux/component.h>
8#include <linux/mfd/syscon.h>
9#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/regmap.h>
13
14#include <video/imx-ipu-v3.h>
15
16#include <drm/bridge/dw_hdmi.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_encoder.h>
20#include <drm/drm_of.h>
21#include <drm/drm_simple_kms_helper.h>
22
23#include "imx-drm.h"
24
25struct imx_hdmi {
26 struct device *dev;
27 struct drm_encoder encoder;
28 struct dw_hdmi *hdmi;
29 struct regmap *regmap;
30};
31
32static inline struct imx_hdmi *enc_to_imx_hdmi(struct drm_encoder *e)
33{
34 return container_of(e, struct imx_hdmi, encoder);
35}
36
37static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
38 {
39 45250000, {
40 { 0x01e0, 0x0000 },
41 { 0x21e1, 0x0000 },
42 { 0x41e2, 0x0000 }
43 },
44 }, {
45 92500000, {
46 { 0x0140, 0x0005 },
47 { 0x2141, 0x0005 },
48 { 0x4142, 0x0005 },
49 },
50 }, {
51 148500000, {
52 { 0x00a0, 0x000a },
53 { 0x20a1, 0x000a },
54 { 0x40a2, 0x000a },
55 },
56 }, {
57 216000000, {
58 { 0x00a0, 0x000a },
59 { 0x2001, 0x000f },
60 { 0x4002, 0x000f },
61 },
62 }, {
63 ~0UL, {
64 { 0x0000, 0x0000 },
65 { 0x0000, 0x0000 },
66 { 0x0000, 0x0000 },
67 },
68 }
69};
70
71static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
72 /* pixelclk bpp8 bpp10 bpp12 */
73 {
74 54000000, { 0x091c, 0x091c, 0x06dc },
75 }, {
76 58400000, { 0x091c, 0x06dc, 0x06dc },
77 }, {
78 72000000, { 0x06dc, 0x06dc, 0x091c },
79 }, {
80 74250000, { 0x06dc, 0x0b5c, 0x091c },
81 }, {
82 118800000, { 0x091c, 0x091c, 0x06dc },
83 }, {
84 216000000, { 0x06dc, 0x0b5c, 0x091c },
85 }, {
86 ~0UL, { 0x0000, 0x0000, 0x0000 },
87 },
88};
89
90/*
91 * Resistance term 133Ohm Cfg
92 * PREEMP config 0.00
93 * TX/CK level 10
94 */
95static const struct dw_hdmi_phy_config imx_phy_config[] = {
96 /*pixelclk symbol term vlev */
97 { 216000000, 0x800d, 0x0005, 0x01ad},
98 { ~0UL, 0x0000, 0x0000, 0x0000}
99};
100
101static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
102{
103 struct device_node *np = hdmi->dev->of_node;
104
105 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
106 if (IS_ERR(hdmi->regmap)) {
107 dev_err(hdmi->dev, "Unable to get gpr\n");
108 return PTR_ERR(hdmi->regmap);
109 }
110
111 return 0;
112}
113
114static void dw_hdmi_imx_encoder_disable(struct drm_encoder *encoder)
115{
116}
117
118static void dw_hdmi_imx_encoder_enable(struct drm_encoder *encoder)
119{
120 struct imx_hdmi *hdmi = enc_to_imx_hdmi(encoder);
121 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
122
123 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
124 IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
125 mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
126}
127
128static int dw_hdmi_imx_atomic_check(struct drm_encoder *encoder,
129 struct drm_crtc_state *crtc_state,
130 struct drm_connector_state *conn_state)
131{
132 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
133
134 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
135 imx_crtc_state->di_hsync_pin = 2;
136 imx_crtc_state->di_vsync_pin = 3;
137
138 return 0;
139}
140
141static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
142 .enable = dw_hdmi_imx_encoder_enable,
143 .disable = dw_hdmi_imx_encoder_disable,
144 .atomic_check = dw_hdmi_imx_atomic_check,
145};
146
147static enum drm_mode_status
148imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
149 const struct drm_display_info *info,
150 const struct drm_display_mode *mode)
151{
152 if (mode->clock < 13500)
153 return MODE_CLOCK_LOW;
154 /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
155 if (mode->clock > 216000)
156 return MODE_CLOCK_HIGH;
157
158 return MODE_OK;
159}
160
161static enum drm_mode_status
162imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
163 const struct drm_display_info *info,
164 const struct drm_display_mode *mode)
165{
166 if (mode->clock < 13500)
167 return MODE_CLOCK_LOW;
168 /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
169 if (mode->clock > 216000)
170 return MODE_CLOCK_HIGH;
171
172 return MODE_OK;
173}
174
175static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
176 .mpll_cfg = imx_mpll_cfg,
177 .cur_ctr = imx_cur_ctr,
178 .phy_config = imx_phy_config,
179 .mode_valid = imx6q_hdmi_mode_valid,
180};
181
182static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
183 .mpll_cfg = imx_mpll_cfg,
184 .cur_ctr = imx_cur_ctr,
185 .phy_config = imx_phy_config,
186 .mode_valid = imx6dl_hdmi_mode_valid,
187};
188
189static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
190 { .compatible = "fsl,imx6q-hdmi",
191 .data = &imx6q_hdmi_drv_data
192 }, {
193 .compatible = "fsl,imx6dl-hdmi",
194 .data = &imx6dl_hdmi_drv_data
195 },
196 {},
197};
198MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
199
200static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
201 void *data)
202{
203 struct platform_device *pdev = to_platform_device(dev);
204 const struct dw_hdmi_plat_data *plat_data;
205 const struct of_device_id *match;
206 struct drm_device *drm = data;
207 struct drm_encoder *encoder;
208 struct imx_hdmi *hdmi;
209 int ret;
210
211 if (!pdev->dev.of_node)
212 return -ENODEV;
213
214 hdmi = dev_get_drvdata(dev);
215 memset(hdmi, 0, sizeof(*hdmi));
216
217 match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
218 plat_data = match->data;
219 hdmi->dev = &pdev->dev;
220 encoder = &hdmi->encoder;
221
222 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
223 /*
224 * If we failed to find the CRTC(s) which this encoder is
225 * supposed to be connected to, it's because the CRTC has
226 * not been registered yet. Defer probing, and hope that
227 * the required CRTC is added later.
228 */
229 if (encoder->possible_crtcs == 0)
230 return -EPROBE_DEFER;
231
232 ret = dw_hdmi_imx_parse_dt(hdmi);
233 if (ret < 0)
234 return ret;
235
236 drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
237 drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
238
239 hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
240
241 /*
242 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
243 * which would have called the encoder cleanup. Do it manually.
244 */
245 if (IS_ERR(hdmi->hdmi)) {
246 ret = PTR_ERR(hdmi->hdmi);
247 drm_encoder_cleanup(encoder);
248 }
249
250 return ret;
251}
252
253static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
254 void *data)
255{
256 struct imx_hdmi *hdmi = dev_get_drvdata(dev);
257
258 dw_hdmi_unbind(hdmi->hdmi);
259}
260
261static const struct component_ops dw_hdmi_imx_ops = {
262 .bind = dw_hdmi_imx_bind,
263 .unbind = dw_hdmi_imx_unbind,
264};
265
266static int dw_hdmi_imx_probe(struct platform_device *pdev)
267{
268 struct imx_hdmi *hdmi;
269
270 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
271 if (!hdmi)
272 return -ENOMEM;
273
274 platform_set_drvdata(pdev, hdmi);
275
276 return component_add(&pdev->dev, &dw_hdmi_imx_ops);
277}
278
279static int dw_hdmi_imx_remove(struct platform_device *pdev)
280{
281 component_del(&pdev->dev, &dw_hdmi_imx_ops);
282
283 return 0;
284}
285
286static struct platform_driver dw_hdmi_imx_platform_driver = {
287 .probe = dw_hdmi_imx_probe,
288 .remove = dw_hdmi_imx_remove,
289 .driver = {
290 .name = "dwhdmi-imx",
291 .of_match_table = dw_hdmi_imx_dt_ids,
292 },
293};
294
295module_platform_driver(dw_hdmi_imx_platform_driver);
296
297MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
298MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
299MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
300MODULE_LICENSE("GPL");
301MODULE_ALIAS("platform:dwhdmi-imx");
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
3 *
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
5 */
6
7#include <linux/component.h>
8#include <linux/mfd/syscon.h>
9#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/regmap.h>
13
14#include <video/imx-ipu-v3.h>
15
16#include <drm/bridge/dw_hdmi.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_bridge.h>
19#include <drm/drm_edid.h>
20#include <drm/drm_encoder.h>
21#include <drm/drm_managed.h>
22#include <drm/drm_of.h>
23#include <drm/drm_simple_kms_helper.h>
24
25#include "imx-drm.h"
26
27struct imx_hdmi;
28
29struct imx_hdmi_encoder {
30 struct drm_encoder encoder;
31 struct imx_hdmi *hdmi;
32};
33
34struct imx_hdmi {
35 struct device *dev;
36 struct drm_bridge *bridge;
37 struct dw_hdmi *hdmi;
38 struct regmap *regmap;
39};
40
41static inline struct imx_hdmi *enc_to_imx_hdmi(struct drm_encoder *e)
42{
43 return container_of(e, struct imx_hdmi_encoder, encoder)->hdmi;
44}
45
46static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
47 {
48 45250000, {
49 { 0x01e0, 0x0000 },
50 { 0x21e1, 0x0000 },
51 { 0x41e2, 0x0000 }
52 },
53 }, {
54 92500000, {
55 { 0x0140, 0x0005 },
56 { 0x2141, 0x0005 },
57 { 0x4142, 0x0005 },
58 },
59 }, {
60 148500000, {
61 { 0x00a0, 0x000a },
62 { 0x20a1, 0x000a },
63 { 0x40a2, 0x000a },
64 },
65 }, {
66 216000000, {
67 { 0x00a0, 0x000a },
68 { 0x2001, 0x000f },
69 { 0x4002, 0x000f },
70 },
71 }, {
72 ~0UL, {
73 { 0x0000, 0x0000 },
74 { 0x0000, 0x0000 },
75 { 0x0000, 0x0000 },
76 },
77 }
78};
79
80static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
81 /* pixelclk bpp8 bpp10 bpp12 */
82 {
83 54000000, { 0x091c, 0x091c, 0x06dc },
84 }, {
85 58400000, { 0x091c, 0x06dc, 0x06dc },
86 }, {
87 72000000, { 0x06dc, 0x06dc, 0x091c },
88 }, {
89 74250000, { 0x06dc, 0x0b5c, 0x091c },
90 }, {
91 118800000, { 0x091c, 0x091c, 0x06dc },
92 }, {
93 216000000, { 0x06dc, 0x0b5c, 0x091c },
94 }, {
95 ~0UL, { 0x0000, 0x0000, 0x0000 },
96 },
97};
98
99/*
100 * Resistance term 133Ohm Cfg
101 * PREEMP config 0.00
102 * TX/CK level 10
103 */
104static const struct dw_hdmi_phy_config imx_phy_config[] = {
105 /*pixelclk symbol term vlev */
106 { 216000000, 0x800d, 0x0005, 0x01ad},
107 { ~0UL, 0x0000, 0x0000, 0x0000}
108};
109
110static void dw_hdmi_imx_encoder_enable(struct drm_encoder *encoder)
111{
112 struct imx_hdmi *hdmi = enc_to_imx_hdmi(encoder);
113 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
114
115 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
116 IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
117 mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
118}
119
120static int dw_hdmi_imx_atomic_check(struct drm_encoder *encoder,
121 struct drm_crtc_state *crtc_state,
122 struct drm_connector_state *conn_state)
123{
124 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
125
126 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
127 imx_crtc_state->di_hsync_pin = 2;
128 imx_crtc_state->di_vsync_pin = 3;
129
130 return 0;
131}
132
133static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
134 .enable = dw_hdmi_imx_encoder_enable,
135 .atomic_check = dw_hdmi_imx_atomic_check,
136};
137
138static enum drm_mode_status
139imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
140 const struct drm_display_info *info,
141 const struct drm_display_mode *mode)
142{
143 if (mode->clock < 13500)
144 return MODE_CLOCK_LOW;
145 /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
146 if (mode->clock > 216000)
147 return MODE_CLOCK_HIGH;
148
149 return MODE_OK;
150}
151
152static enum drm_mode_status
153imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
154 const struct drm_display_info *info,
155 const struct drm_display_mode *mode)
156{
157 if (mode->clock < 13500)
158 return MODE_CLOCK_LOW;
159 /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
160 if (mode->clock > 216000)
161 return MODE_CLOCK_HIGH;
162
163 return MODE_OK;
164}
165
166static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
167 .mpll_cfg = imx_mpll_cfg,
168 .cur_ctr = imx_cur_ctr,
169 .phy_config = imx_phy_config,
170 .mode_valid = imx6q_hdmi_mode_valid,
171};
172
173static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
174 .mpll_cfg = imx_mpll_cfg,
175 .cur_ctr = imx_cur_ctr,
176 .phy_config = imx_phy_config,
177 .mode_valid = imx6dl_hdmi_mode_valid,
178};
179
180static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
181 { .compatible = "fsl,imx6q-hdmi",
182 .data = &imx6q_hdmi_drv_data
183 }, {
184 .compatible = "fsl,imx6dl-hdmi",
185 .data = &imx6dl_hdmi_drv_data
186 },
187 {},
188};
189MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
190
191static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
192 void *data)
193{
194 struct drm_device *drm = data;
195 struct imx_hdmi_encoder *hdmi_encoder;
196 struct drm_encoder *encoder;
197 int ret;
198
199 hdmi_encoder = drmm_simple_encoder_alloc(drm, struct imx_hdmi_encoder,
200 encoder, DRM_MODE_ENCODER_TMDS);
201 if (IS_ERR(hdmi_encoder))
202 return PTR_ERR(hdmi_encoder);
203
204 hdmi_encoder->hdmi = dev_get_drvdata(dev);
205 encoder = &hdmi_encoder->encoder;
206
207 ret = imx_drm_encoder_parse_of(drm, encoder, dev->of_node);
208 if (ret)
209 return ret;
210
211 drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
212
213 return drm_bridge_attach(encoder, hdmi_encoder->hdmi->bridge, NULL, 0);
214}
215
216static const struct component_ops dw_hdmi_imx_ops = {
217 .bind = dw_hdmi_imx_bind,
218};
219
220static int dw_hdmi_imx_probe(struct platform_device *pdev)
221{
222 struct device_node *np = pdev->dev.of_node;
223 const struct of_device_id *match = of_match_node(dw_hdmi_imx_dt_ids, np);
224 struct imx_hdmi *hdmi;
225
226 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
227 if (!hdmi)
228 return -ENOMEM;
229
230 platform_set_drvdata(pdev, hdmi);
231 hdmi->dev = &pdev->dev;
232
233 hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
234 if (IS_ERR(hdmi->regmap)) {
235 dev_err(hdmi->dev, "Unable to get gpr\n");
236 return PTR_ERR(hdmi->regmap);
237 }
238
239 hdmi->hdmi = dw_hdmi_probe(pdev, match->data);
240 if (IS_ERR(hdmi->hdmi))
241 return PTR_ERR(hdmi->hdmi);
242
243 hdmi->bridge = of_drm_find_bridge(np);
244 if (!hdmi->bridge) {
245 dev_err(hdmi->dev, "Unable to find bridge\n");
246 return -ENODEV;
247 }
248
249 return component_add(&pdev->dev, &dw_hdmi_imx_ops);
250}
251
252static int dw_hdmi_imx_remove(struct platform_device *pdev)
253{
254 struct imx_hdmi *hdmi = platform_get_drvdata(pdev);
255
256 component_del(&pdev->dev, &dw_hdmi_imx_ops);
257 dw_hdmi_remove(hdmi->hdmi);
258
259 return 0;
260}
261
262static struct platform_driver dw_hdmi_imx_platform_driver = {
263 .probe = dw_hdmi_imx_probe,
264 .remove = dw_hdmi_imx_remove,
265 .driver = {
266 .name = "dwhdmi-imx",
267 .of_match_table = dw_hdmi_imx_dt_ids,
268 },
269};
270
271module_platform_driver(dw_hdmi_imx_platform_driver);
272
273MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
274MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
275MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
276MODULE_LICENSE("GPL");
277MODULE_ALIAS("platform:dwhdmi-imx");