1# SPDX-License-Identifier: GPL-2.0-only
 2
 3config MTK_HSDMA
 4	tristate "MediaTek High-Speed DMA controller support"
 5	depends on ARCH_MEDIATEK || COMPILE_TEST
 6	select DMA_ENGINE
 7	select DMA_VIRTUAL_CHANNELS
 8	help
 9	  Enable support for High-Speed DMA controller on MediaTek
10	  SoCs.
11
12	  This controller provides the channels which is dedicated to
13	  memory-to-memory transfer to offload from CPU through ring-
14	  based descriptor management.
15
16config MTK_CQDMA
17	tristate "MediaTek Command-Queue DMA controller support"
18	depends on ARCH_MEDIATEK || COMPILE_TEST
19	select DMA_ENGINE
20	select DMA_VIRTUAL_CHANNELS
21	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
22	help
23	  Enable support for Command-Queue DMA controller on MediaTek
24	  SoCs.
25
26	  This controller provides the channels which is dedicated to
27	  memory-to-memory transfer to offload from CPU.
28
29config MTK_UART_APDMA
30	tristate "MediaTek SoCs APDMA support for UART"
31	depends on OF && SERIAL_8250_MT6577
32	select DMA_ENGINE
33	select DMA_VIRTUAL_CHANNELS
34	help
35	  Support for the UART DMA engine found on MediaTek MTK SoCs.
36	  When SERIAL_8250_MT6577 is enabled, and if you want to use DMA,
37	  you can enable the config. The DMA engine can only be used
38	  with MediaTek SoCs.

 1# SPDX-License-Identifier: GPL-2.0-only
 2
 3config MTK_HSDMA
 4	tristate "MediaTek High-Speed DMA controller support"
 5	depends on ARCH_MEDIATEK || COMPILE_TEST
 6	select DMA_ENGINE
 7	select DMA_VIRTUAL_CHANNELS
 8	help
 9	  Enable support for High-Speed DMA controller on MediaTek
10	  SoCs.
11
12	  This controller provides the channels which is dedicated to
13	  memory-to-memory transfer to offload from CPU through ring-
14	  based descriptor management.
15
16config MTK_CQDMA
17	tristate "MediaTek Command-Queue DMA controller support"
18	depends on ARCH_MEDIATEK || COMPILE_TEST
19	select DMA_ENGINE
20	select DMA_VIRTUAL_CHANNELS
21	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
22	help
23	  Enable support for Command-Queue DMA controller on MediaTek
24	  SoCs.
25
26	  This controller provides the channels which is dedicated to
27	  memory-to-memory transfer to offload from CPU.
28
29config MTK_UART_APDMA
30	tristate "MediaTek SoCs APDMA support for UART"
31	depends on OF && SERIAL_8250_MT6577
32	select DMA_ENGINE
33	select DMA_VIRTUAL_CHANNELS
34	help
35	  Support for the UART DMA engine found on MediaTek MTK SoCs.
36	  When SERIAL_8250_MT6577 is enabled, and if you want to use DMA,
37	  you can enable the config. The DMA engine can only be used
38	  with MediaTek SoCs.