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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * File: mca.h
4 * Purpose: Machine check handling specific defines
5 *
6 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
7 * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
8 * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
9 * Copyright (C) Russ Anderson <rja@sgi.com>
10 */
11
12#ifndef _ASM_IA64_MCA_H
13#define _ASM_IA64_MCA_H
14
15#if !defined(__ASSEMBLY__)
16
17#include <linux/interrupt.h>
18#include <linux/types.h>
19
20#include <asm/param.h>
21#include <asm/sal.h>
22#include <asm/processor.h>
23#include <asm/mca_asm.h>
24
25#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
26
27typedef struct ia64_fptr {
28 unsigned long fp;
29 unsigned long gp;
30} ia64_fptr_t;
31
32typedef union cmcv_reg_u {
33 u64 cmcv_regval;
34 struct {
35 u64 cmcr_vector : 8;
36 u64 cmcr_reserved1 : 4;
37 u64 cmcr_ignored1 : 1;
38 u64 cmcr_reserved2 : 3;
39 u64 cmcr_mask : 1;
40 u64 cmcr_ignored2 : 47;
41 } cmcv_reg_s;
42
43} cmcv_reg_t;
44
45#define cmcv_mask cmcv_reg_s.cmcr_mask
46#define cmcv_vector cmcv_reg_s.cmcr_vector
47
48enum {
49 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
50 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
51 IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
52 IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
53};
54
55/* Information maintained by the MC infrastructure */
56typedef struct ia64_mc_info_s {
57 u64 imi_mca_handler;
58 size_t imi_mca_handler_size;
59 u64 imi_monarch_init_handler;
60 size_t imi_monarch_init_handler_size;
61 u64 imi_slave_init_handler;
62 size_t imi_slave_init_handler_size;
63 u8 imi_rendez_checkin[NR_CPUS];
64
65} ia64_mc_info_t;
66
67/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
68 * Besides the handover state, it also contains some saved registers from the
69 * time of the event.
70 * Note: mca_asm.S depends on the precise layout of this structure.
71 */
72
73struct ia64_sal_os_state {
74
75 /* SAL to OS */
76 unsigned long os_gp; /* GP of the os registered with the SAL, physical */
77 unsigned long pal_proc; /* PAL_PROC entry point, physical */
78 unsigned long sal_proc; /* SAL_PROC entry point, physical */
79 unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
80 unsigned long proc_state_param; /* from R18 */
81 unsigned long monarch; /* 1 for a monarch event, 0 for a slave */
82
83 /* common */
84 unsigned long sal_ra; /* Return address in SAL, physical */
85 unsigned long sal_gp; /* GP of the SAL - physical */
86 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
87 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
88 * Note: if the MCA/INIT recovery code wants to resume to a new context
89 * then it must change these values to reflect the new kernel stack.
90 */
91 unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
92 unsigned long prev_IA64_KR_CURRENT_STACK;
93 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
94 /* Some interrupt registers are not saved in minstate, pt_regs or
95 * switch_stack. Because MCA/INIT can occur when interrupts are
96 * disabled, we need to save the additional interrupt registers over
97 * MCA/INIT and resume.
98 */
99 unsigned long isr;
100 unsigned long ifa;
101 unsigned long itir;
102 unsigned long iipa;
103 unsigned long iim;
104 unsigned long iha;
105
106 /* OS to SAL */
107 unsigned long os_status; /* OS status to SAL, enum below */
108 unsigned long context; /* 0 if return to same context
109 1 if return to new context */
110
111 /* I-resources */
112 unsigned long iip;
113 unsigned long ipsr;
114 unsigned long ifs;
115};
116
117enum {
118 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
119 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
120 IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
121 IA64_MCA_HALT = -3 /* System to be halted by SAL */
122};
123
124enum {
125 IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
126 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
127};
128
129enum {
130 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
131 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
132};
133
134/* Per-CPU MCA state that is too big for normal per-CPU variables. */
135
136struct ia64_mca_cpu {
137 u64 mca_stack[KERNEL_STACK_SIZE/8];
138 u64 init_stack[KERNEL_STACK_SIZE/8];
139};
140
141/* Array of physical addresses of each CPU's MCA area. */
142extern unsigned long __per_cpu_mca[NR_CPUS];
143
144extern int cpe_vector;
145extern int ia64_cpe_irq;
146extern void ia64_mca_init(void);
147extern void ia64_mca_irq_init(void);
148extern void ia64_mca_cpu_init(void *);
149extern void ia64_os_mca_dispatch(void);
150extern void ia64_os_mca_dispatch_end(void);
151extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
152extern void ia64_init_handler(struct pt_regs *,
153 struct switch_stack *,
154 struct ia64_sal_os_state *);
155extern void ia64_os_init_on_kdump(void);
156extern void ia64_monarch_init_handler(void);
157extern void ia64_slave_init_handler(void);
158extern void ia64_mca_cmc_vector_setup(void);
159extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
160extern void ia64_unreg_MCA_extension(void);
161extern unsigned long ia64_get_rnat(unsigned long *);
162extern void ia64_set_psr_mc(void);
163extern void ia64_mca_printk(const char * fmt, ...)
164 __attribute__ ((format (printf, 1, 2)));
165
166struct ia64_mca_notify_die {
167 struct ia64_sal_os_state *sos;
168 int *monarch_cpu;
169 int *data;
170};
171
172DECLARE_PER_CPU(u64, ia64_mca_pal_base);
173
174#else /* __ASSEMBLY__ */
175
176#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
177#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
178#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
179#define IA64_MCA_HALT -3 /* System to be halted by SAL */
180
181#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
182#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
183
184#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
185#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
186
187#endif /* !__ASSEMBLY__ */
188#endif /* _ASM_IA64_MCA_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * File: mca.h
4 * Purpose: Machine check handling specific defines
5 *
6 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
7 * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
8 * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
9 * Copyright (C) Russ Anderson <rja@sgi.com>
10 */
11
12#ifndef _ASM_IA64_MCA_H
13#define _ASM_IA64_MCA_H
14
15#if !defined(__ASSEMBLY__)
16
17#include <linux/percpu.h>
18#include <linux/threads.h>
19#include <linux/types.h>
20#include <asm/ptrace.h>
21
22#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
23
24typedef struct ia64_fptr {
25 unsigned long fp;
26 unsigned long gp;
27} ia64_fptr_t;
28
29typedef union cmcv_reg_u {
30 u64 cmcv_regval;
31 struct {
32 u64 cmcr_vector : 8;
33 u64 cmcr_reserved1 : 4;
34 u64 cmcr_ignored1 : 1;
35 u64 cmcr_reserved2 : 3;
36 u64 cmcr_mask : 1;
37 u64 cmcr_ignored2 : 47;
38 } cmcv_reg_s;
39
40} cmcv_reg_t;
41
42#define cmcv_mask cmcv_reg_s.cmcr_mask
43#define cmcv_vector cmcv_reg_s.cmcr_vector
44
45enum {
46 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
47 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
48 IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
49 IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
50};
51
52/* Information maintained by the MC infrastructure */
53typedef struct ia64_mc_info_s {
54 u64 imi_mca_handler;
55 size_t imi_mca_handler_size;
56 u64 imi_monarch_init_handler;
57 size_t imi_monarch_init_handler_size;
58 u64 imi_slave_init_handler;
59 size_t imi_slave_init_handler_size;
60 u8 imi_rendez_checkin[NR_CPUS];
61
62} ia64_mc_info_t;
63
64/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
65 * Besides the handover state, it also contains some saved registers from the
66 * time of the event.
67 * Note: mca_asm.S depends on the precise layout of this structure.
68 */
69
70struct ia64_sal_os_state {
71
72 /* SAL to OS */
73 unsigned long os_gp; /* GP of the os registered with the SAL, physical */
74 unsigned long pal_proc; /* PAL_PROC entry point, physical */
75 unsigned long sal_proc; /* SAL_PROC entry point, physical */
76 unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
77 unsigned long proc_state_param; /* from R18 */
78 unsigned long monarch; /* 1 for a monarch event, 0 for a slave */
79
80 /* common */
81 unsigned long sal_ra; /* Return address in SAL, physical */
82 unsigned long sal_gp; /* GP of the SAL - physical */
83 struct pal_min_state_area *pal_min_state; /* from R17. physical in asm, virtual in C */
84 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
85 * Note: if the MCA/INIT recovery code wants to resume to a new context
86 * then it must change these values to reflect the new kernel stack.
87 */
88 unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
89 unsigned long prev_IA64_KR_CURRENT_STACK;
90 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
91 /* Some interrupt registers are not saved in minstate, pt_regs or
92 * switch_stack. Because MCA/INIT can occur when interrupts are
93 * disabled, we need to save the additional interrupt registers over
94 * MCA/INIT and resume.
95 */
96 unsigned long isr;
97 unsigned long ifa;
98 unsigned long itir;
99 unsigned long iipa;
100 unsigned long iim;
101 unsigned long iha;
102
103 /* OS to SAL */
104 unsigned long os_status; /* OS status to SAL, enum below */
105 unsigned long context; /* 0 if return to same context
106 1 if return to new context */
107
108 /* I-resources */
109 unsigned long iip;
110 unsigned long ipsr;
111 unsigned long ifs;
112};
113
114enum {
115 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
116 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
117 IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
118 IA64_MCA_HALT = -3 /* System to be halted by SAL */
119};
120
121enum {
122 IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
123 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
124};
125
126enum {
127 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
128 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
129};
130
131/* Per-CPU MCA state that is too big for normal per-CPU variables. */
132
133struct ia64_mca_cpu {
134 u64 mca_stack[KERNEL_STACK_SIZE/8];
135 u64 init_stack[KERNEL_STACK_SIZE/8];
136};
137
138/* Array of physical addresses of each CPU's MCA area. */
139extern unsigned long __per_cpu_mca[NR_CPUS];
140
141extern int cpe_vector;
142extern int ia64_cpe_irq;
143extern void ia64_mca_init(void);
144extern void ia64_mca_irq_init(void);
145extern void ia64_mca_cpu_init(void *);
146extern void ia64_os_mca_dispatch(void);
147extern void ia64_os_mca_dispatch_end(void);
148extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
149extern void ia64_init_handler(struct pt_regs *,
150 struct switch_stack *,
151 struct ia64_sal_os_state *);
152extern void ia64_os_init_on_kdump(void);
153extern void ia64_monarch_init_handler(void);
154extern void ia64_slave_init_handler(void);
155extern void ia64_mca_cmc_vector_setup(void);
156extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
157extern void ia64_unreg_MCA_extension(void);
158extern unsigned long ia64_get_rnat(unsigned long *);
159extern void ia64_set_psr_mc(void);
160extern void ia64_mca_printk(const char * fmt, ...)
161 __attribute__ ((format (printf, 1, 2)));
162
163struct ia64_mca_notify_die {
164 struct ia64_sal_os_state *sos;
165 int *monarch_cpu;
166 int *data;
167};
168
169DECLARE_PER_CPU(u64, ia64_mca_pal_base);
170
171#else /* __ASSEMBLY__ */
172
173#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
174#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
175#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
176#define IA64_MCA_HALT -3 /* System to be halted by SAL */
177
178#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
179#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
180
181#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
182#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
183
184#endif /* !__ASSEMBLY__ */
185#endif /* _ASM_IA64_MCA_H */