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1// SPDX-License-Identifier: GPL-2.0-only
2/* Analog Devices 1889 audio driver
3 *
4 * This is a driver for the AD1889 PCI audio chipset found
5 * on the HP PA-RISC [BCJ]-xxx0 workstations.
6 *
7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
10 *
11 * TODO:
12 * Do we need to take care of CCS register?
13 * Maybe we could use finer grained locking (separate locks for pb/cap)?
14 * Wishlist:
15 * Control Interface (mixer) support
16 * Better AC97 support (VSR...)?
17 * PM support
18 * MIDI support
19 * Game Port support
20 * SG DMA support (this will need *a lot* of work)
21 */
22
23#include <linux/init.h>
24#include <linux/pci.h>
25#include <linux/dma-mapping.h>
26#include <linux/slab.h>
27#include <linux/interrupt.h>
28#include <linux/compiler.h>
29#include <linux/delay.h>
30#include <linux/module.h>
31#include <linux/io.h>
32
33#include <sound/core.h>
34#include <sound/pcm.h>
35#include <sound/initval.h>
36#include <sound/ac97_codec.h>
37
38#include "ad1889.h"
39#include "ac97/ac97_id.h"
40
41#define AD1889_DRVVER "Version: 1.7"
42
43MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
44MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
45MODULE_LICENSE("GPL");
46MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
47
48static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
49module_param_array(index, int, NULL, 0444);
50MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
51
52static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
53module_param_array(id, charp, NULL, 0444);
54MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
55
56static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
57module_param_array(enable, bool, NULL, 0444);
58MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
59
60static char *ac97_quirk[SNDRV_CARDS];
61module_param_array(ac97_quirk, charp, NULL, 0444);
62MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
63
64#define DEVNAME "ad1889"
65#define PFX DEVNAME ": "
66
67/* keep track of some hw registers */
68struct ad1889_register_state {
69 u16 reg; /* reg setup */
70 u32 addr; /* dma base address */
71 unsigned long size; /* DMA buffer size */
72};
73
74struct snd_ad1889 {
75 struct snd_card *card;
76 struct pci_dev *pci;
77
78 int irq;
79 unsigned long bar;
80 void __iomem *iobase;
81
82 struct snd_ac97 *ac97;
83 struct snd_ac97_bus *ac97_bus;
84 struct snd_pcm *pcm;
85 struct snd_info_entry *proc;
86
87 struct snd_pcm_substream *psubs;
88 struct snd_pcm_substream *csubs;
89
90 /* playback register state */
91 struct ad1889_register_state wave;
92 struct ad1889_register_state ramc;
93
94 spinlock_t lock;
95};
96
97static inline u16
98ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
99{
100 return readw(chip->iobase + reg);
101}
102
103static inline void
104ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
105{
106 writew(val, chip->iobase + reg);
107}
108
109static inline u32
110ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
111{
112 return readl(chip->iobase + reg);
113}
114
115static inline void
116ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
117{
118 writel(val, chip->iobase + reg);
119}
120
121static inline void
122ad1889_unmute(struct snd_ad1889 *chip)
123{
124 u16 st;
125 st = ad1889_readw(chip, AD_DS_WADA) &
126 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
127 ad1889_writew(chip, AD_DS_WADA, st);
128 ad1889_readw(chip, AD_DS_WADA);
129}
130
131static inline void
132ad1889_mute(struct snd_ad1889 *chip)
133{
134 u16 st;
135 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
136 ad1889_writew(chip, AD_DS_WADA, st);
137 ad1889_readw(chip, AD_DS_WADA);
138}
139
140static inline void
141ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
142{
143 ad1889_writel(chip, AD_DMA_ADCBA, address);
144 ad1889_writel(chip, AD_DMA_ADCCA, address);
145}
146
147static inline void
148ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
149{
150 ad1889_writel(chip, AD_DMA_ADCBC, count);
151 ad1889_writel(chip, AD_DMA_ADCCC, count);
152}
153
154static inline void
155ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
156{
157 ad1889_writel(chip, AD_DMA_ADCIB, count);
158 ad1889_writel(chip, AD_DMA_ADCIC, count);
159}
160
161static inline void
162ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
163{
164 ad1889_writel(chip, AD_DMA_WAVBA, address);
165 ad1889_writel(chip, AD_DMA_WAVCA, address);
166}
167
168static inline void
169ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
170{
171 ad1889_writel(chip, AD_DMA_WAVBC, count);
172 ad1889_writel(chip, AD_DMA_WAVCC, count);
173}
174
175static inline void
176ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
177{
178 ad1889_writel(chip, AD_DMA_WAVIB, count);
179 ad1889_writel(chip, AD_DMA_WAVIC, count);
180}
181
182static void
183ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
184{
185 u16 reg;
186
187 if (channel & AD_CHAN_WAV) {
188 /* Disable wave channel */
189 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
190 ad1889_writew(chip, AD_DS_WSMC, reg);
191 chip->wave.reg = reg;
192
193 /* disable IRQs */
194 reg = ad1889_readw(chip, AD_DMA_WAV);
195 reg &= AD_DMA_IM_DIS;
196 reg &= ~AD_DMA_LOOP;
197 ad1889_writew(chip, AD_DMA_WAV, reg);
198
199 /* clear IRQ and address counters and pointers */
200 ad1889_load_wave_buffer_address(chip, 0x0);
201 ad1889_load_wave_buffer_count(chip, 0x0);
202 ad1889_load_wave_interrupt_count(chip, 0x0);
203
204 /* flush */
205 ad1889_readw(chip, AD_DMA_WAV);
206 }
207
208 if (channel & AD_CHAN_ADC) {
209 /* Disable ADC channel */
210 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
211 ad1889_writew(chip, AD_DS_RAMC, reg);
212 chip->ramc.reg = reg;
213
214 reg = ad1889_readw(chip, AD_DMA_ADC);
215 reg &= AD_DMA_IM_DIS;
216 reg &= ~AD_DMA_LOOP;
217 ad1889_writew(chip, AD_DMA_ADC, reg);
218
219 ad1889_load_adc_buffer_address(chip, 0x0);
220 ad1889_load_adc_buffer_count(chip, 0x0);
221 ad1889_load_adc_interrupt_count(chip, 0x0);
222
223 /* flush */
224 ad1889_readw(chip, AD_DMA_ADC);
225 }
226}
227
228static u16
229snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
230{
231 struct snd_ad1889 *chip = ac97->private_data;
232 return ad1889_readw(chip, AD_AC97_BASE + reg);
233}
234
235static void
236snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
237{
238 struct snd_ad1889 *chip = ac97->private_data;
239 ad1889_writew(chip, AD_AC97_BASE + reg, val);
240}
241
242static int
243snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
244{
245 int retry = 400; /* average needs 352 msec */
246
247 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
248 && --retry)
249 usleep_range(1000, 2000);
250 if (!retry) {
251 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
252 __func__);
253 return -EIO;
254 }
255 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
256
257 return 0;
258}
259
260static const struct snd_pcm_hardware snd_ad1889_playback_hw = {
261 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
262 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
263 .formats = SNDRV_PCM_FMTBIT_S16_LE,
264 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
265 .rate_min = 8000, /* docs say 7000, but we're lazy */
266 .rate_max = 48000,
267 .channels_min = 1,
268 .channels_max = 2,
269 .buffer_bytes_max = BUFFER_BYTES_MAX,
270 .period_bytes_min = PERIOD_BYTES_MIN,
271 .period_bytes_max = PERIOD_BYTES_MAX,
272 .periods_min = PERIODS_MIN,
273 .periods_max = PERIODS_MAX,
274 /*.fifo_size = 0,*/
275};
276
277static const struct snd_pcm_hardware snd_ad1889_capture_hw = {
278 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
279 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
280 .formats = SNDRV_PCM_FMTBIT_S16_LE,
281 .rates = SNDRV_PCM_RATE_48000,
282 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
283 .rate_max = 48000,
284 .channels_min = 1,
285 .channels_max = 2,
286 .buffer_bytes_max = BUFFER_BYTES_MAX,
287 .period_bytes_min = PERIOD_BYTES_MIN,
288 .period_bytes_max = PERIOD_BYTES_MAX,
289 .periods_min = PERIODS_MIN,
290 .periods_max = PERIODS_MAX,
291 /*.fifo_size = 0,*/
292};
293
294static int
295snd_ad1889_playback_open(struct snd_pcm_substream *ss)
296{
297 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
298 struct snd_pcm_runtime *rt = ss->runtime;
299
300 chip->psubs = ss;
301 rt->hw = snd_ad1889_playback_hw;
302
303 return 0;
304}
305
306static int
307snd_ad1889_capture_open(struct snd_pcm_substream *ss)
308{
309 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
310 struct snd_pcm_runtime *rt = ss->runtime;
311
312 chip->csubs = ss;
313 rt->hw = snd_ad1889_capture_hw;
314
315 return 0;
316}
317
318static int
319snd_ad1889_playback_close(struct snd_pcm_substream *ss)
320{
321 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
322 chip->psubs = NULL;
323 return 0;
324}
325
326static int
327snd_ad1889_capture_close(struct snd_pcm_substream *ss)
328{
329 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
330 chip->csubs = NULL;
331 return 0;
332}
333
334static int
335snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
336{
337 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
338 struct snd_pcm_runtime *rt = ss->runtime;
339 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
340 unsigned int count = snd_pcm_lib_period_bytes(ss);
341 u16 reg;
342
343 ad1889_channel_reset(chip, AD_CHAN_WAV);
344
345 reg = ad1889_readw(chip, AD_DS_WSMC);
346
347 /* Mask out 16-bit / Stereo */
348 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
349
350 if (snd_pcm_format_width(rt->format) == 16)
351 reg |= AD_DS_WSMC_WA16;
352
353 if (rt->channels > 1)
354 reg |= AD_DS_WSMC_WAST;
355
356 /* let's make sure we don't clobber ourselves */
357 spin_lock_irq(&chip->lock);
358
359 chip->wave.size = size;
360 chip->wave.reg = reg;
361 chip->wave.addr = rt->dma_addr;
362
363 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
364
365 /* Set sample rates on the codec */
366 ad1889_writew(chip, AD_DS_WAS, rt->rate);
367
368 /* Set up DMA */
369 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
370 ad1889_load_wave_buffer_count(chip, size);
371 ad1889_load_wave_interrupt_count(chip, count);
372
373 /* writes flush */
374 ad1889_readw(chip, AD_DS_WSMC);
375
376 spin_unlock_irq(&chip->lock);
377
378 dev_dbg(chip->card->dev,
379 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
380 chip->wave.addr, count, size, reg, rt->rate);
381 return 0;
382}
383
384static int
385snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
386{
387 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
388 struct snd_pcm_runtime *rt = ss->runtime;
389 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
390 unsigned int count = snd_pcm_lib_period_bytes(ss);
391 u16 reg;
392
393 ad1889_channel_reset(chip, AD_CHAN_ADC);
394
395 reg = ad1889_readw(chip, AD_DS_RAMC);
396
397 /* Mask out 16-bit / Stereo */
398 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
399
400 if (snd_pcm_format_width(rt->format) == 16)
401 reg |= AD_DS_RAMC_AD16;
402
403 if (rt->channels > 1)
404 reg |= AD_DS_RAMC_ADST;
405
406 /* let's make sure we don't clobber ourselves */
407 spin_lock_irq(&chip->lock);
408
409 chip->ramc.size = size;
410 chip->ramc.reg = reg;
411 chip->ramc.addr = rt->dma_addr;
412
413 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
414
415 /* Set up DMA */
416 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
417 ad1889_load_adc_buffer_count(chip, size);
418 ad1889_load_adc_interrupt_count(chip, count);
419
420 /* writes flush */
421 ad1889_readw(chip, AD_DS_RAMC);
422
423 spin_unlock_irq(&chip->lock);
424
425 dev_dbg(chip->card->dev,
426 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
427 chip->ramc.addr, count, size, reg, rt->rate);
428 return 0;
429}
430
431/* this is called in atomic context with IRQ disabled.
432 Must be as fast as possible and not sleep.
433 DMA should be *triggered* by this call.
434 The WSMC "WAEN" bit triggers DMA Wave On/Off */
435static int
436snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
437{
438 u16 wsmc;
439 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
440
441 wsmc = ad1889_readw(chip, AD_DS_WSMC);
442
443 switch (cmd) {
444 case SNDRV_PCM_TRIGGER_START:
445 /* enable DMA loop & interrupts */
446 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
447 wsmc |= AD_DS_WSMC_WAEN;
448 /* 1 to clear CHSS bit */
449 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
450 ad1889_unmute(chip);
451 break;
452 case SNDRV_PCM_TRIGGER_STOP:
453 ad1889_mute(chip);
454 wsmc &= ~AD_DS_WSMC_WAEN;
455 break;
456 default:
457 snd_BUG();
458 return -EINVAL;
459 }
460
461 chip->wave.reg = wsmc;
462 ad1889_writew(chip, AD_DS_WSMC, wsmc);
463 ad1889_readw(chip, AD_DS_WSMC); /* flush */
464
465 /* reset the chip when STOP - will disable IRQs */
466 if (cmd == SNDRV_PCM_TRIGGER_STOP)
467 ad1889_channel_reset(chip, AD_CHAN_WAV);
468
469 return 0;
470}
471
472/* this is called in atomic context with IRQ disabled.
473 Must be as fast as possible and not sleep.
474 DMA should be *triggered* by this call.
475 The RAMC "ADEN" bit triggers DMA ADC On/Off */
476static int
477snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
478{
479 u16 ramc;
480 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
481
482 ramc = ad1889_readw(chip, AD_DS_RAMC);
483
484 switch (cmd) {
485 case SNDRV_PCM_TRIGGER_START:
486 /* enable DMA loop & interrupts */
487 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
488 ramc |= AD_DS_RAMC_ADEN;
489 /* 1 to clear CHSS bit */
490 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
491 break;
492 case SNDRV_PCM_TRIGGER_STOP:
493 ramc &= ~AD_DS_RAMC_ADEN;
494 break;
495 default:
496 return -EINVAL;
497 }
498
499 chip->ramc.reg = ramc;
500 ad1889_writew(chip, AD_DS_RAMC, ramc);
501 ad1889_readw(chip, AD_DS_RAMC); /* flush */
502
503 /* reset the chip when STOP - will disable IRQs */
504 if (cmd == SNDRV_PCM_TRIGGER_STOP)
505 ad1889_channel_reset(chip, AD_CHAN_ADC);
506
507 return 0;
508}
509
510/* Called in atomic context with IRQ disabled */
511static snd_pcm_uframes_t
512snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
513{
514 size_t ptr = 0;
515 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
516
517 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
518 return 0;
519
520 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
521 ptr -= chip->wave.addr;
522
523 if (snd_BUG_ON(ptr >= chip->wave.size))
524 return 0;
525
526 return bytes_to_frames(ss->runtime, ptr);
527}
528
529/* Called in atomic context with IRQ disabled */
530static snd_pcm_uframes_t
531snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
532{
533 size_t ptr = 0;
534 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
535
536 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
537 return 0;
538
539 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
540 ptr -= chip->ramc.addr;
541
542 if (snd_BUG_ON(ptr >= chip->ramc.size))
543 return 0;
544
545 return bytes_to_frames(ss->runtime, ptr);
546}
547
548static const struct snd_pcm_ops snd_ad1889_playback_ops = {
549 .open = snd_ad1889_playback_open,
550 .close = snd_ad1889_playback_close,
551 .prepare = snd_ad1889_playback_prepare,
552 .trigger = snd_ad1889_playback_trigger,
553 .pointer = snd_ad1889_playback_pointer,
554};
555
556static const struct snd_pcm_ops snd_ad1889_capture_ops = {
557 .open = snd_ad1889_capture_open,
558 .close = snd_ad1889_capture_close,
559 .prepare = snd_ad1889_capture_prepare,
560 .trigger = snd_ad1889_capture_trigger,
561 .pointer = snd_ad1889_capture_pointer,
562};
563
564static irqreturn_t
565snd_ad1889_interrupt(int irq, void *dev_id)
566{
567 unsigned long st;
568 struct snd_ad1889 *chip = dev_id;
569
570 st = ad1889_readl(chip, AD_DMA_DISR);
571
572 /* clear ISR */
573 ad1889_writel(chip, AD_DMA_DISR, st);
574
575 st &= AD_INTR_MASK;
576
577 if (unlikely(!st))
578 return IRQ_NONE;
579
580 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
581 dev_dbg(chip->card->dev,
582 "Unexpected master or target abort interrupt!\n");
583
584 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
585 snd_pcm_period_elapsed(chip->psubs);
586 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
587 snd_pcm_period_elapsed(chip->csubs);
588
589 return IRQ_HANDLED;
590}
591
592static int
593snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
594{
595 int err;
596 struct snd_pcm *pcm;
597
598 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
599 if (err < 0)
600 return err;
601
602 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
603 &snd_ad1889_playback_ops);
604 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
605 &snd_ad1889_capture_ops);
606
607 pcm->private_data = chip;
608 pcm->info_flags = 0;
609 strcpy(pcm->name, chip->card->shortname);
610
611 chip->pcm = pcm;
612 chip->psubs = NULL;
613 chip->csubs = NULL;
614
615 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
616 BUFFER_BYTES_MAX / 2, BUFFER_BYTES_MAX);
617
618 return 0;
619}
620
621static void
622snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
623{
624 struct snd_ad1889 *chip = entry->private_data;
625 u16 reg;
626 int tmp;
627
628 reg = ad1889_readw(chip, AD_DS_WSMC);
629 snd_iprintf(buffer, "Wave output: %s\n",
630 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
631 snd_iprintf(buffer, "Wave Channels: %s\n",
632 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
633 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
634 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
635
636 /* WARQ is at offset 12 */
637 tmp = (reg & AD_DS_WSMC_WARQ) ?
638 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
639 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
640
641 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
642 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
643
644
645 snd_iprintf(buffer, "Synthesis output: %s\n",
646 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
647
648 /* SYRQ is at offset 4 */
649 tmp = (reg & AD_DS_WSMC_SYRQ) ?
650 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
651 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
652
653 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
654 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
655
656 reg = ad1889_readw(chip, AD_DS_RAMC);
657 snd_iprintf(buffer, "ADC input: %s\n",
658 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
659 snd_iprintf(buffer, "ADC Channels: %s\n",
660 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
661 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
662 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
663
664 /* ACRQ is at offset 4 */
665 tmp = (reg & AD_DS_RAMC_ACRQ) ?
666 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
667 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
668
669 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
670 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
671
672 snd_iprintf(buffer, "Resampler input: %s\n",
673 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
674
675 /* RERQ is at offset 12 */
676 tmp = (reg & AD_DS_RAMC_RERQ) ?
677 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
678 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
679
680 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
681 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
682
683
684 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
685 suggests that LSB is -3dB, which is more coherent with the logarithmic
686 nature of the dB scale */
687 reg = ad1889_readw(chip, AD_DS_WADA);
688 snd_iprintf(buffer, "Left: %s, -%d dB\n",
689 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
690 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
691 reg = ad1889_readw(chip, AD_DS_WADA);
692 snd_iprintf(buffer, "Right: %s, -%d dB\n",
693 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
694 (reg & AD_DS_WADA_RWAA) * 3);
695
696 reg = ad1889_readw(chip, AD_DS_WAS);
697 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
698 reg = ad1889_readw(chip, AD_DS_RES);
699 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
700}
701
702static void
703snd_ad1889_proc_init(struct snd_ad1889 *chip)
704{
705 snd_card_ro_proc_new(chip->card, chip->card->driver,
706 chip, snd_ad1889_proc_read);
707}
708
709static const struct ac97_quirk ac97_quirks[] = {
710 {
711 .subvendor = 0x11d4, /* AD */
712 .subdevice = 0x1889, /* AD1889 */
713 .codec_id = AC97_ID_AD1819,
714 .name = "AD1889",
715 .type = AC97_TUNE_HP_ONLY
716 },
717 { } /* terminator */
718};
719
720static void
721snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
722{
723 u16 reg;
724
725 reg = ad1889_readw(chip, AD_AC97_ACIC);
726 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
727 ad1889_writew(chip, AD_AC97_ACIC, reg);
728 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
729 udelay(10);
730 /* Interface Enable */
731 reg |= AD_AC97_ACIC_ACIE;
732 ad1889_writew(chip, AD_AC97_ACIC, reg);
733
734 snd_ad1889_ac97_ready(chip);
735
736 /* Audio Stream Output | Variable Sample Rate Mode */
737 reg = ad1889_readw(chip, AD_AC97_ACIC);
738 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
739 ad1889_writew(chip, AD_AC97_ACIC, reg);
740 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
741
742}
743
744static void
745snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
746{
747 struct snd_ad1889 *chip = bus->private_data;
748 chip->ac97_bus = NULL;
749}
750
751static void
752snd_ad1889_ac97_free(struct snd_ac97 *ac97)
753{
754 struct snd_ad1889 *chip = ac97->private_data;
755 chip->ac97 = NULL;
756}
757
758static int
759snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
760{
761 int err;
762 struct snd_ac97_template ac97;
763 static const struct snd_ac97_bus_ops ops = {
764 .write = snd_ad1889_ac97_write,
765 .read = snd_ad1889_ac97_read,
766 };
767
768 /* doing that here, it works. */
769 snd_ad1889_ac97_xinit(chip);
770
771 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
772 if (err < 0)
773 return err;
774
775 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
776
777 memset(&ac97, 0, sizeof(ac97));
778 ac97.private_data = chip;
779 ac97.private_free = snd_ad1889_ac97_free;
780 ac97.pci = chip->pci;
781
782 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
783 if (err < 0)
784 return err;
785
786 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
787
788 return 0;
789}
790
791static int
792snd_ad1889_free(struct snd_ad1889 *chip)
793{
794 if (chip->irq < 0)
795 goto skip_hw;
796
797 spin_lock_irq(&chip->lock);
798
799 ad1889_mute(chip);
800
801 /* Turn off interrupt on count and zero DMA registers */
802 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
803
804 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
805 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
806 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
807
808 spin_unlock_irq(&chip->lock);
809
810 if (chip->irq >= 0)
811 free_irq(chip->irq, chip);
812
813skip_hw:
814 iounmap(chip->iobase);
815 pci_release_regions(chip->pci);
816 pci_disable_device(chip->pci);
817 kfree(chip);
818 return 0;
819}
820
821static int
822snd_ad1889_dev_free(struct snd_device *device)
823{
824 struct snd_ad1889 *chip = device->device_data;
825 return snd_ad1889_free(chip);
826}
827
828static int
829snd_ad1889_init(struct snd_ad1889 *chip)
830{
831 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
832 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
833
834 usleep_range(10000, 11000);
835
836 /* enable Master and Target abort interrupts */
837 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
838
839 return 0;
840}
841
842static int
843snd_ad1889_create(struct snd_card *card,
844 struct pci_dev *pci,
845 struct snd_ad1889 **rchip)
846{
847 int err;
848
849 struct snd_ad1889 *chip;
850 static const struct snd_device_ops ops = {
851 .dev_free = snd_ad1889_dev_free,
852 };
853
854 *rchip = NULL;
855
856 if ((err = pci_enable_device(pci)) < 0)
857 return err;
858
859 /* check PCI availability (32bit DMA) */
860 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
861 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
862 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
863 pci_disable_device(pci);
864 return -ENXIO;
865 }
866
867 /* allocate chip specific data with zero-filled memory */
868 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
869 pci_disable_device(pci);
870 return -ENOMEM;
871 }
872
873 chip->card = card;
874 card->private_data = chip;
875 chip->pci = pci;
876 chip->irq = -1;
877
878 /* (1) PCI resource allocation */
879 if ((err = pci_request_regions(pci, card->driver)) < 0)
880 goto free_and_ret;
881
882 chip->bar = pci_resource_start(pci, 0);
883 chip->iobase = pci_ioremap_bar(pci, 0);
884 if (chip->iobase == NULL) {
885 dev_err(card->dev, "unable to reserve region.\n");
886 err = -EBUSY;
887 goto free_and_ret;
888 }
889
890 pci_set_master(pci);
891
892 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
893
894 if (request_irq(pci->irq, snd_ad1889_interrupt,
895 IRQF_SHARED, KBUILD_MODNAME, chip)) {
896 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
897 snd_ad1889_free(chip);
898 return -EBUSY;
899 }
900
901 chip->irq = pci->irq;
902 card->sync_irq = chip->irq;
903
904 /* (2) initialization of the chip hardware */
905 if ((err = snd_ad1889_init(chip)) < 0) {
906 snd_ad1889_free(chip);
907 return err;
908 }
909
910 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
911 snd_ad1889_free(chip);
912 return err;
913 }
914
915 *rchip = chip;
916
917 return 0;
918
919free_and_ret:
920 kfree(chip);
921 pci_disable_device(pci);
922
923 return err;
924}
925
926static int
927snd_ad1889_probe(struct pci_dev *pci,
928 const struct pci_device_id *pci_id)
929{
930 int err;
931 static int devno;
932 struct snd_card *card;
933 struct snd_ad1889 *chip;
934
935 /* (1) */
936 if (devno >= SNDRV_CARDS)
937 return -ENODEV;
938 if (!enable[devno]) {
939 devno++;
940 return -ENOENT;
941 }
942
943 /* (2) */
944 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
945 0, &card);
946 /* XXX REVISIT: we can probably allocate chip in this call */
947 if (err < 0)
948 return err;
949
950 strcpy(card->driver, "AD1889");
951 strcpy(card->shortname, "Analog Devices AD1889");
952
953 /* (3) */
954 err = snd_ad1889_create(card, pci, &chip);
955 if (err < 0)
956 goto free_and_ret;
957
958 /* (4) */
959 sprintf(card->longname, "%s at 0x%lx irq %i",
960 card->shortname, chip->bar, chip->irq);
961
962 /* (5) */
963 /* register AC97 mixer */
964 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
965 if (err < 0)
966 goto free_and_ret;
967
968 err = snd_ad1889_pcm_init(chip, 0);
969 if (err < 0)
970 goto free_and_ret;
971
972 /* register proc interface */
973 snd_ad1889_proc_init(chip);
974
975 /* (6) */
976 err = snd_card_register(card);
977 if (err < 0)
978 goto free_and_ret;
979
980 /* (7) */
981 pci_set_drvdata(pci, card);
982
983 devno++;
984 return 0;
985
986free_and_ret:
987 snd_card_free(card);
988 return err;
989}
990
991static void
992snd_ad1889_remove(struct pci_dev *pci)
993{
994 snd_card_free(pci_get_drvdata(pci));
995}
996
997static const struct pci_device_id snd_ad1889_ids[] = {
998 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
999 { 0, },
1000};
1001MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1002
1003static struct pci_driver ad1889_pci_driver = {
1004 .name = KBUILD_MODNAME,
1005 .id_table = snd_ad1889_ids,
1006 .probe = snd_ad1889_probe,
1007 .remove = snd_ad1889_remove,
1008};
1009
1010module_pci_driver(ad1889_pci_driver);
1// SPDX-License-Identifier: GPL-2.0-only
2/* Analog Devices 1889 audio driver
3 *
4 * This is a driver for the AD1889 PCI audio chipset found
5 * on the HP PA-RISC [BCJ]-xxx0 workstations.
6 *
7 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org>
8 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org>
9 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org>
10 *
11 * TODO:
12 * Do we need to take care of CCS register?
13 * Maybe we could use finer grained locking (separate locks for pb/cap)?
14 * Wishlist:
15 * Control Interface (mixer) support
16 * Better AC97 support (VSR...)?
17 * PM support
18 * MIDI support
19 * Game Port support
20 * SG DMA support (this will need *a lot* of work)
21 */
22
23#include <linux/init.h>
24#include <linux/pci.h>
25#include <linux/dma-mapping.h>
26#include <linux/slab.h>
27#include <linux/interrupt.h>
28#include <linux/compiler.h>
29#include <linux/delay.h>
30#include <linux/module.h>
31#include <linux/io.h>
32
33#include <sound/core.h>
34#include <sound/pcm.h>
35#include <sound/initval.h>
36#include <sound/ac97_codec.h>
37
38#include "ad1889.h"
39#include "ac97/ac97_id.h"
40
41#define AD1889_DRVVER "Version: 1.7"
42
43MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>");
44MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
45MODULE_LICENSE("GPL");
46
47static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
48module_param_array(index, int, NULL, 0444);
49MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
50
51static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
52module_param_array(id, charp, NULL, 0444);
53MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
54
55static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
56module_param_array(enable, bool, NULL, 0444);
57MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
58
59static char *ac97_quirk[SNDRV_CARDS];
60module_param_array(ac97_quirk, charp, NULL, 0444);
61MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
62
63#define DEVNAME "ad1889"
64#define PFX DEVNAME ": "
65
66/* keep track of some hw registers */
67struct ad1889_register_state {
68 u16 reg; /* reg setup */
69 u32 addr; /* dma base address */
70 unsigned long size; /* DMA buffer size */
71};
72
73struct snd_ad1889 {
74 struct snd_card *card;
75 struct pci_dev *pci;
76
77 int irq;
78 unsigned long bar;
79 void __iomem *iobase;
80
81 struct snd_ac97 *ac97;
82 struct snd_ac97_bus *ac97_bus;
83 struct snd_pcm *pcm;
84 struct snd_info_entry *proc;
85
86 struct snd_pcm_substream *psubs;
87 struct snd_pcm_substream *csubs;
88
89 /* playback register state */
90 struct ad1889_register_state wave;
91 struct ad1889_register_state ramc;
92
93 spinlock_t lock;
94};
95
96static inline u16
97ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
98{
99 return readw(chip->iobase + reg);
100}
101
102static inline void
103ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
104{
105 writew(val, chip->iobase + reg);
106}
107
108static inline u32
109ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
110{
111 return readl(chip->iobase + reg);
112}
113
114static inline void
115ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
116{
117 writel(val, chip->iobase + reg);
118}
119
120static inline void
121ad1889_unmute(struct snd_ad1889 *chip)
122{
123 u16 st;
124 st = ad1889_readw(chip, AD_DS_WADA) &
125 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
126 ad1889_writew(chip, AD_DS_WADA, st);
127 ad1889_readw(chip, AD_DS_WADA);
128}
129
130static inline void
131ad1889_mute(struct snd_ad1889 *chip)
132{
133 u16 st;
134 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
135 ad1889_writew(chip, AD_DS_WADA, st);
136 ad1889_readw(chip, AD_DS_WADA);
137}
138
139static inline void
140ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
141{
142 ad1889_writel(chip, AD_DMA_ADCBA, address);
143 ad1889_writel(chip, AD_DMA_ADCCA, address);
144}
145
146static inline void
147ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
148{
149 ad1889_writel(chip, AD_DMA_ADCBC, count);
150 ad1889_writel(chip, AD_DMA_ADCCC, count);
151}
152
153static inline void
154ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
155{
156 ad1889_writel(chip, AD_DMA_ADCIB, count);
157 ad1889_writel(chip, AD_DMA_ADCIC, count);
158}
159
160static inline void
161ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
162{
163 ad1889_writel(chip, AD_DMA_WAVBA, address);
164 ad1889_writel(chip, AD_DMA_WAVCA, address);
165}
166
167static inline void
168ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
169{
170 ad1889_writel(chip, AD_DMA_WAVBC, count);
171 ad1889_writel(chip, AD_DMA_WAVCC, count);
172}
173
174static inline void
175ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
176{
177 ad1889_writel(chip, AD_DMA_WAVIB, count);
178 ad1889_writel(chip, AD_DMA_WAVIC, count);
179}
180
181static void
182ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
183{
184 u16 reg;
185
186 if (channel & AD_CHAN_WAV) {
187 /* Disable wave channel */
188 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
189 ad1889_writew(chip, AD_DS_WSMC, reg);
190 chip->wave.reg = reg;
191
192 /* disable IRQs */
193 reg = ad1889_readw(chip, AD_DMA_WAV);
194 reg &= AD_DMA_IM_DIS;
195 reg &= ~AD_DMA_LOOP;
196 ad1889_writew(chip, AD_DMA_WAV, reg);
197
198 /* clear IRQ and address counters and pointers */
199 ad1889_load_wave_buffer_address(chip, 0x0);
200 ad1889_load_wave_buffer_count(chip, 0x0);
201 ad1889_load_wave_interrupt_count(chip, 0x0);
202
203 /* flush */
204 ad1889_readw(chip, AD_DMA_WAV);
205 }
206
207 if (channel & AD_CHAN_ADC) {
208 /* Disable ADC channel */
209 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
210 ad1889_writew(chip, AD_DS_RAMC, reg);
211 chip->ramc.reg = reg;
212
213 reg = ad1889_readw(chip, AD_DMA_ADC);
214 reg &= AD_DMA_IM_DIS;
215 reg &= ~AD_DMA_LOOP;
216 ad1889_writew(chip, AD_DMA_ADC, reg);
217
218 ad1889_load_adc_buffer_address(chip, 0x0);
219 ad1889_load_adc_buffer_count(chip, 0x0);
220 ad1889_load_adc_interrupt_count(chip, 0x0);
221
222 /* flush */
223 ad1889_readw(chip, AD_DMA_ADC);
224 }
225}
226
227static u16
228snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
229{
230 struct snd_ad1889 *chip = ac97->private_data;
231 return ad1889_readw(chip, AD_AC97_BASE + reg);
232}
233
234static void
235snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
236{
237 struct snd_ad1889 *chip = ac97->private_data;
238 ad1889_writew(chip, AD_AC97_BASE + reg, val);
239}
240
241static int
242snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
243{
244 int retry = 400; /* average needs 352 msec */
245
246 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
247 && --retry)
248 usleep_range(1000, 2000);
249 if (!retry) {
250 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
251 __func__);
252 return -EIO;
253 }
254 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
255
256 return 0;
257}
258
259static const struct snd_pcm_hardware snd_ad1889_playback_hw = {
260 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
261 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
262 .formats = SNDRV_PCM_FMTBIT_S16_LE,
263 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
264 .rate_min = 8000, /* docs say 7000, but we're lazy */
265 .rate_max = 48000,
266 .channels_min = 1,
267 .channels_max = 2,
268 .buffer_bytes_max = BUFFER_BYTES_MAX,
269 .period_bytes_min = PERIOD_BYTES_MIN,
270 .period_bytes_max = PERIOD_BYTES_MAX,
271 .periods_min = PERIODS_MIN,
272 .periods_max = PERIODS_MAX,
273 /*.fifo_size = 0,*/
274};
275
276static const struct snd_pcm_hardware snd_ad1889_capture_hw = {
277 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
278 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
279 .formats = SNDRV_PCM_FMTBIT_S16_LE,
280 .rates = SNDRV_PCM_RATE_48000,
281 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
282 .rate_max = 48000,
283 .channels_min = 1,
284 .channels_max = 2,
285 .buffer_bytes_max = BUFFER_BYTES_MAX,
286 .period_bytes_min = PERIOD_BYTES_MIN,
287 .period_bytes_max = PERIOD_BYTES_MAX,
288 .periods_min = PERIODS_MIN,
289 .periods_max = PERIODS_MAX,
290 /*.fifo_size = 0,*/
291};
292
293static int
294snd_ad1889_playback_open(struct snd_pcm_substream *ss)
295{
296 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
297 struct snd_pcm_runtime *rt = ss->runtime;
298
299 chip->psubs = ss;
300 rt->hw = snd_ad1889_playback_hw;
301
302 return 0;
303}
304
305static int
306snd_ad1889_capture_open(struct snd_pcm_substream *ss)
307{
308 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
309 struct snd_pcm_runtime *rt = ss->runtime;
310
311 chip->csubs = ss;
312 rt->hw = snd_ad1889_capture_hw;
313
314 return 0;
315}
316
317static int
318snd_ad1889_playback_close(struct snd_pcm_substream *ss)
319{
320 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
321 chip->psubs = NULL;
322 return 0;
323}
324
325static int
326snd_ad1889_capture_close(struct snd_pcm_substream *ss)
327{
328 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
329 chip->csubs = NULL;
330 return 0;
331}
332
333static int
334snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
335{
336 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
337 struct snd_pcm_runtime *rt = ss->runtime;
338 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
339 unsigned int count = snd_pcm_lib_period_bytes(ss);
340 u16 reg;
341
342 ad1889_channel_reset(chip, AD_CHAN_WAV);
343
344 reg = ad1889_readw(chip, AD_DS_WSMC);
345
346 /* Mask out 16-bit / Stereo */
347 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
348
349 if (snd_pcm_format_width(rt->format) == 16)
350 reg |= AD_DS_WSMC_WA16;
351
352 if (rt->channels > 1)
353 reg |= AD_DS_WSMC_WAST;
354
355 /* let's make sure we don't clobber ourselves */
356 spin_lock_irq(&chip->lock);
357
358 chip->wave.size = size;
359 chip->wave.reg = reg;
360 chip->wave.addr = rt->dma_addr;
361
362 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
363
364 /* Set sample rates on the codec */
365 ad1889_writew(chip, AD_DS_WAS, rt->rate);
366
367 /* Set up DMA */
368 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
369 ad1889_load_wave_buffer_count(chip, size);
370 ad1889_load_wave_interrupt_count(chip, count);
371
372 /* writes flush */
373 ad1889_readw(chip, AD_DS_WSMC);
374
375 spin_unlock_irq(&chip->lock);
376
377 dev_dbg(chip->card->dev,
378 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
379 chip->wave.addr, count, size, reg, rt->rate);
380 return 0;
381}
382
383static int
384snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
385{
386 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
387 struct snd_pcm_runtime *rt = ss->runtime;
388 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
389 unsigned int count = snd_pcm_lib_period_bytes(ss);
390 u16 reg;
391
392 ad1889_channel_reset(chip, AD_CHAN_ADC);
393
394 reg = ad1889_readw(chip, AD_DS_RAMC);
395
396 /* Mask out 16-bit / Stereo */
397 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
398
399 if (snd_pcm_format_width(rt->format) == 16)
400 reg |= AD_DS_RAMC_AD16;
401
402 if (rt->channels > 1)
403 reg |= AD_DS_RAMC_ADST;
404
405 /* let's make sure we don't clobber ourselves */
406 spin_lock_irq(&chip->lock);
407
408 chip->ramc.size = size;
409 chip->ramc.reg = reg;
410 chip->ramc.addr = rt->dma_addr;
411
412 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
413
414 /* Set up DMA */
415 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
416 ad1889_load_adc_buffer_count(chip, size);
417 ad1889_load_adc_interrupt_count(chip, count);
418
419 /* writes flush */
420 ad1889_readw(chip, AD_DS_RAMC);
421
422 spin_unlock_irq(&chip->lock);
423
424 dev_dbg(chip->card->dev,
425 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
426 chip->ramc.addr, count, size, reg, rt->rate);
427 return 0;
428}
429
430/* this is called in atomic context with IRQ disabled.
431 Must be as fast as possible and not sleep.
432 DMA should be *triggered* by this call.
433 The WSMC "WAEN" bit triggers DMA Wave On/Off */
434static int
435snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
436{
437 u16 wsmc;
438 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
439
440 wsmc = ad1889_readw(chip, AD_DS_WSMC);
441
442 switch (cmd) {
443 case SNDRV_PCM_TRIGGER_START:
444 /* enable DMA loop & interrupts */
445 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
446 wsmc |= AD_DS_WSMC_WAEN;
447 /* 1 to clear CHSS bit */
448 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
449 ad1889_unmute(chip);
450 break;
451 case SNDRV_PCM_TRIGGER_STOP:
452 ad1889_mute(chip);
453 wsmc &= ~AD_DS_WSMC_WAEN;
454 break;
455 default:
456 snd_BUG();
457 return -EINVAL;
458 }
459
460 chip->wave.reg = wsmc;
461 ad1889_writew(chip, AD_DS_WSMC, wsmc);
462 ad1889_readw(chip, AD_DS_WSMC); /* flush */
463
464 /* reset the chip when STOP - will disable IRQs */
465 if (cmd == SNDRV_PCM_TRIGGER_STOP)
466 ad1889_channel_reset(chip, AD_CHAN_WAV);
467
468 return 0;
469}
470
471/* this is called in atomic context with IRQ disabled.
472 Must be as fast as possible and not sleep.
473 DMA should be *triggered* by this call.
474 The RAMC "ADEN" bit triggers DMA ADC On/Off */
475static int
476snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
477{
478 u16 ramc;
479 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
480
481 ramc = ad1889_readw(chip, AD_DS_RAMC);
482
483 switch (cmd) {
484 case SNDRV_PCM_TRIGGER_START:
485 /* enable DMA loop & interrupts */
486 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
487 ramc |= AD_DS_RAMC_ADEN;
488 /* 1 to clear CHSS bit */
489 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
490 break;
491 case SNDRV_PCM_TRIGGER_STOP:
492 ramc &= ~AD_DS_RAMC_ADEN;
493 break;
494 default:
495 return -EINVAL;
496 }
497
498 chip->ramc.reg = ramc;
499 ad1889_writew(chip, AD_DS_RAMC, ramc);
500 ad1889_readw(chip, AD_DS_RAMC); /* flush */
501
502 /* reset the chip when STOP - will disable IRQs */
503 if (cmd == SNDRV_PCM_TRIGGER_STOP)
504 ad1889_channel_reset(chip, AD_CHAN_ADC);
505
506 return 0;
507}
508
509/* Called in atomic context with IRQ disabled */
510static snd_pcm_uframes_t
511snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
512{
513 size_t ptr = 0;
514 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
515
516 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
517 return 0;
518
519 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
520 ptr -= chip->wave.addr;
521
522 if (snd_BUG_ON(ptr >= chip->wave.size))
523 return 0;
524
525 return bytes_to_frames(ss->runtime, ptr);
526}
527
528/* Called in atomic context with IRQ disabled */
529static snd_pcm_uframes_t
530snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
531{
532 size_t ptr = 0;
533 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
534
535 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
536 return 0;
537
538 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
539 ptr -= chip->ramc.addr;
540
541 if (snd_BUG_ON(ptr >= chip->ramc.size))
542 return 0;
543
544 return bytes_to_frames(ss->runtime, ptr);
545}
546
547static const struct snd_pcm_ops snd_ad1889_playback_ops = {
548 .open = snd_ad1889_playback_open,
549 .close = snd_ad1889_playback_close,
550 .prepare = snd_ad1889_playback_prepare,
551 .trigger = snd_ad1889_playback_trigger,
552 .pointer = snd_ad1889_playback_pointer,
553};
554
555static const struct snd_pcm_ops snd_ad1889_capture_ops = {
556 .open = snd_ad1889_capture_open,
557 .close = snd_ad1889_capture_close,
558 .prepare = snd_ad1889_capture_prepare,
559 .trigger = snd_ad1889_capture_trigger,
560 .pointer = snd_ad1889_capture_pointer,
561};
562
563static irqreturn_t
564snd_ad1889_interrupt(int irq, void *dev_id)
565{
566 unsigned long st;
567 struct snd_ad1889 *chip = dev_id;
568
569 st = ad1889_readl(chip, AD_DMA_DISR);
570
571 /* clear ISR */
572 ad1889_writel(chip, AD_DMA_DISR, st);
573
574 st &= AD_INTR_MASK;
575
576 if (unlikely(!st))
577 return IRQ_NONE;
578
579 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
580 dev_dbg(chip->card->dev,
581 "Unexpected master or target abort interrupt!\n");
582
583 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
584 snd_pcm_period_elapsed(chip->psubs);
585 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
586 snd_pcm_period_elapsed(chip->csubs);
587
588 return IRQ_HANDLED;
589}
590
591static int
592snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
593{
594 int err;
595 struct snd_pcm *pcm;
596
597 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
598 if (err < 0)
599 return err;
600
601 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
602 &snd_ad1889_playback_ops);
603 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
604 &snd_ad1889_capture_ops);
605
606 pcm->private_data = chip;
607 pcm->info_flags = 0;
608 strcpy(pcm->name, chip->card->shortname);
609
610 chip->pcm = pcm;
611 chip->psubs = NULL;
612 chip->csubs = NULL;
613
614 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
615 BUFFER_BYTES_MAX / 2, BUFFER_BYTES_MAX);
616
617 return 0;
618}
619
620static void
621snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
622{
623 struct snd_ad1889 *chip = entry->private_data;
624 u16 reg;
625 int tmp;
626
627 reg = ad1889_readw(chip, AD_DS_WSMC);
628 snd_iprintf(buffer, "Wave output: %s\n",
629 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
630 snd_iprintf(buffer, "Wave Channels: %s\n",
631 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
632 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
633 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
634
635 /* WARQ is at offset 12 */
636 tmp = (reg & AD_DS_WSMC_WARQ) ?
637 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
638 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
639
640 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
641 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
642
643
644 snd_iprintf(buffer, "Synthesis output: %s\n",
645 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
646
647 /* SYRQ is at offset 4 */
648 tmp = (reg & AD_DS_WSMC_SYRQ) ?
649 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
650 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
651
652 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
653 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
654
655 reg = ad1889_readw(chip, AD_DS_RAMC);
656 snd_iprintf(buffer, "ADC input: %s\n",
657 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
658 snd_iprintf(buffer, "ADC Channels: %s\n",
659 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
660 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
661 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
662
663 /* ACRQ is at offset 4 */
664 tmp = (reg & AD_DS_RAMC_ACRQ) ?
665 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
666 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
667
668 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
669 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
670
671 snd_iprintf(buffer, "Resampler input: %s\n",
672 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
673
674 /* RERQ is at offset 12 */
675 tmp = (reg & AD_DS_RAMC_RERQ) ?
676 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
677 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
678
679 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
680 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
681
682
683 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
684 suggests that LSB is -3dB, which is more coherent with the logarithmic
685 nature of the dB scale */
686 reg = ad1889_readw(chip, AD_DS_WADA);
687 snd_iprintf(buffer, "Left: %s, -%d dB\n",
688 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
689 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
690 reg = ad1889_readw(chip, AD_DS_WADA);
691 snd_iprintf(buffer, "Right: %s, -%d dB\n",
692 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
693 (reg & AD_DS_WADA_RWAA) * 3);
694
695 reg = ad1889_readw(chip, AD_DS_WAS);
696 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
697 reg = ad1889_readw(chip, AD_DS_RES);
698 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
699}
700
701static void
702snd_ad1889_proc_init(struct snd_ad1889 *chip)
703{
704 snd_card_ro_proc_new(chip->card, chip->card->driver,
705 chip, snd_ad1889_proc_read);
706}
707
708static const struct ac97_quirk ac97_quirks[] = {
709 {
710 .subvendor = 0x11d4, /* AD */
711 .subdevice = 0x1889, /* AD1889 */
712 .codec_id = AC97_ID_AD1819,
713 .name = "AD1889",
714 .type = AC97_TUNE_HP_ONLY
715 },
716 { } /* terminator */
717};
718
719static void
720snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
721{
722 u16 reg;
723
724 reg = ad1889_readw(chip, AD_AC97_ACIC);
725 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
726 ad1889_writew(chip, AD_AC97_ACIC, reg);
727 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
728 udelay(10);
729 /* Interface Enable */
730 reg |= AD_AC97_ACIC_ACIE;
731 ad1889_writew(chip, AD_AC97_ACIC, reg);
732
733 snd_ad1889_ac97_ready(chip);
734
735 /* Audio Stream Output | Variable Sample Rate Mode */
736 reg = ad1889_readw(chip, AD_AC97_ACIC);
737 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
738 ad1889_writew(chip, AD_AC97_ACIC, reg);
739 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
740
741}
742
743static void
744snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
745{
746 struct snd_ad1889 *chip = bus->private_data;
747 chip->ac97_bus = NULL;
748}
749
750static void
751snd_ad1889_ac97_free(struct snd_ac97 *ac97)
752{
753 struct snd_ad1889 *chip = ac97->private_data;
754 chip->ac97 = NULL;
755}
756
757static int
758snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
759{
760 int err;
761 struct snd_ac97_template ac97;
762 static const struct snd_ac97_bus_ops ops = {
763 .write = snd_ad1889_ac97_write,
764 .read = snd_ad1889_ac97_read,
765 };
766
767 /* doing that here, it works. */
768 snd_ad1889_ac97_xinit(chip);
769
770 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
771 if (err < 0)
772 return err;
773
774 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
775
776 memset(&ac97, 0, sizeof(ac97));
777 ac97.private_data = chip;
778 ac97.private_free = snd_ad1889_ac97_free;
779 ac97.pci = chip->pci;
780
781 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
782 if (err < 0)
783 return err;
784
785 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
786
787 return 0;
788}
789
790static int
791snd_ad1889_free(struct snd_ad1889 *chip)
792{
793 if (chip->irq < 0)
794 goto skip_hw;
795
796 spin_lock_irq(&chip->lock);
797
798 ad1889_mute(chip);
799
800 /* Turn off interrupt on count and zero DMA registers */
801 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
802
803 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
804 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
805 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
806
807 spin_unlock_irq(&chip->lock);
808
809 if (chip->irq >= 0)
810 free_irq(chip->irq, chip);
811
812skip_hw:
813 iounmap(chip->iobase);
814 pci_release_regions(chip->pci);
815 pci_disable_device(chip->pci);
816 kfree(chip);
817 return 0;
818}
819
820static int
821snd_ad1889_dev_free(struct snd_device *device)
822{
823 struct snd_ad1889 *chip = device->device_data;
824 return snd_ad1889_free(chip);
825}
826
827static int
828snd_ad1889_init(struct snd_ad1889 *chip)
829{
830 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
831 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
832
833 usleep_range(10000, 11000);
834
835 /* enable Master and Target abort interrupts */
836 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
837
838 return 0;
839}
840
841static int
842snd_ad1889_create(struct snd_card *card,
843 struct pci_dev *pci,
844 struct snd_ad1889 **rchip)
845{
846 int err;
847
848 struct snd_ad1889 *chip;
849 static const struct snd_device_ops ops = {
850 .dev_free = snd_ad1889_dev_free,
851 };
852
853 *rchip = NULL;
854
855 err = pci_enable_device(pci);
856 if (err < 0)
857 return err;
858
859 /* check PCI availability (32bit DMA) */
860 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) {
861 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
862 pci_disable_device(pci);
863 return -ENXIO;
864 }
865
866 /* allocate chip specific data with zero-filled memory */
867 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
868 if (!chip) {
869 pci_disable_device(pci);
870 return -ENOMEM;
871 }
872
873 chip->card = card;
874 card->private_data = chip;
875 chip->pci = pci;
876 chip->irq = -1;
877
878 /* (1) PCI resource allocation */
879 err = pci_request_regions(pci, card->driver);
880 if (err < 0)
881 goto free_and_ret;
882
883 chip->bar = pci_resource_start(pci, 0);
884 chip->iobase = pci_ioremap_bar(pci, 0);
885 if (chip->iobase == NULL) {
886 dev_err(card->dev, "unable to reserve region.\n");
887 err = -EBUSY;
888 goto free_and_ret;
889 }
890
891 pci_set_master(pci);
892
893 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
894
895 if (request_irq(pci->irq, snd_ad1889_interrupt,
896 IRQF_SHARED, KBUILD_MODNAME, chip)) {
897 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
898 snd_ad1889_free(chip);
899 return -EBUSY;
900 }
901
902 chip->irq = pci->irq;
903 card->sync_irq = chip->irq;
904
905 /* (2) initialization of the chip hardware */
906 err = snd_ad1889_init(chip);
907 if (err < 0) {
908 snd_ad1889_free(chip);
909 return err;
910 }
911
912 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
913 if (err < 0) {
914 snd_ad1889_free(chip);
915 return err;
916 }
917
918 *rchip = chip;
919
920 return 0;
921
922free_and_ret:
923 kfree(chip);
924 pci_disable_device(pci);
925
926 return err;
927}
928
929static int
930snd_ad1889_probe(struct pci_dev *pci,
931 const struct pci_device_id *pci_id)
932{
933 int err;
934 static int devno;
935 struct snd_card *card;
936 struct snd_ad1889 *chip;
937
938 /* (1) */
939 if (devno >= SNDRV_CARDS)
940 return -ENODEV;
941 if (!enable[devno]) {
942 devno++;
943 return -ENOENT;
944 }
945
946 /* (2) */
947 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
948 0, &card);
949 /* XXX REVISIT: we can probably allocate chip in this call */
950 if (err < 0)
951 return err;
952
953 strcpy(card->driver, "AD1889");
954 strcpy(card->shortname, "Analog Devices AD1889");
955
956 /* (3) */
957 err = snd_ad1889_create(card, pci, &chip);
958 if (err < 0)
959 goto free_and_ret;
960
961 /* (4) */
962 sprintf(card->longname, "%s at 0x%lx irq %i",
963 card->shortname, chip->bar, chip->irq);
964
965 /* (5) */
966 /* register AC97 mixer */
967 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
968 if (err < 0)
969 goto free_and_ret;
970
971 err = snd_ad1889_pcm_init(chip, 0);
972 if (err < 0)
973 goto free_and_ret;
974
975 /* register proc interface */
976 snd_ad1889_proc_init(chip);
977
978 /* (6) */
979 err = snd_card_register(card);
980 if (err < 0)
981 goto free_and_ret;
982
983 /* (7) */
984 pci_set_drvdata(pci, card);
985
986 devno++;
987 return 0;
988
989free_and_ret:
990 snd_card_free(card);
991 return err;
992}
993
994static void
995snd_ad1889_remove(struct pci_dev *pci)
996{
997 snd_card_free(pci_get_drvdata(pci));
998}
999
1000static const struct pci_device_id snd_ad1889_ids[] = {
1001 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1002 { 0, },
1003};
1004MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1005
1006static struct pci_driver ad1889_pci_driver = {
1007 .name = KBUILD_MODNAME,
1008 .id_table = snd_ad1889_ids,
1009 .probe = snd_ad1889_probe,
1010 .remove = snd_ad1889_remove,
1011};
1012
1013module_pci_driver(ad1889_pci_driver);