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Note: File does not exist in v4.6.
  1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26/**
 27 * This file defines helper functions provided by the Display Manager to
 28 * Display Core.
 29 */
 30#ifndef __DM_HELPERS__
 31#define __DM_HELPERS__
 32
 33#include "dc_types.h"
 34#include "dc.h"
 35
 36struct dp_mst_stream_allocation_table;
 37
 38#ifdef CONFIG_DRM_AMD_DC_DCN3_0
 39/*
 40 * Allocate memory accessible by the GPU
 41 *
 42 * frame buffer allocations must be aligned to a 4096-byte boundary
 43 *
 44 * Returns virtual address, sets addr to physical address
 45 */
 46void *dm_helpers_allocate_gpu_mem(
 47		struct dc_context *ctx,
 48		enum dc_gpu_mem_alloc_type type,
 49		size_t size,
 50		long long *addr);
 51
 52/*
 53 * Free the GPU-accessible memory at the virtual address pvMem
 54 */
 55void dm_helpers_free_gpu_mem(
 56		struct dc_context *ctx,
 57		enum dc_gpu_mem_alloc_type type,
 58		void *pvMem);
 59
 60#endif
 61enum dc_edid_status dm_helpers_parse_edid_caps(
 62	struct dc_context *ctx,
 63	const struct dc_edid *edid,
 64	struct dc_edid_caps *edid_caps);
 65
 66
 67/*
 68 * Update DP branch info
 69 */
 70void dm_helpers_dp_update_branch_info(
 71		struct dc_context *ctx,
 72		const struct dc_link *link);
 73
 74/*
 75 * Writes payload allocation table in immediate downstream device.
 76 */
 77bool dm_helpers_dp_mst_write_payload_allocation_table(
 78		struct dc_context *ctx,
 79		const struct dc_stream_state *stream,
 80		struct dp_mst_stream_allocation_table *proposed_table,
 81		bool enable);
 82
 83/*
 84 * poll pending down reply
 85 */
 86void dm_helpers_dp_mst_poll_pending_down_reply(
 87	struct dc_context *ctx,
 88	const struct dc_link *link);
 89
 90/*
 91 * Clear payload allocation table before enable MST DP link.
 92 */
 93void dm_helpers_dp_mst_clear_payload_allocation_table(
 94	struct dc_context *ctx,
 95	const struct dc_link *link);
 96
 97/*
 98 * Polls for ACT (allocation change trigger) handled and
 99 */
100enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(
101		struct dc_context *ctx,
102		const struct dc_stream_state *stream);
103/*
104 * Sends ALLOCATE_PAYLOAD message.
105 */
106bool dm_helpers_dp_mst_send_payload_allocation(
107		struct dc_context *ctx,
108		const struct dc_stream_state *stream,
109		bool enable);
110
111bool dm_helpers_dp_mst_start_top_mgr(
112		struct dc_context *ctx,
113		const struct dc_link *link,
114		bool boot);
115
116void dm_helpers_dp_mst_stop_top_mgr(
117		struct dc_context *ctx,
118		const struct dc_link *link);
119/**
120 * OS specific aux read callback.
121 */
122bool dm_helpers_dp_read_dpcd(
123		struct dc_context *ctx,
124		const struct dc_link *link,
125		uint32_t address,
126		uint8_t *data,
127		uint32_t size);
128
129/**
130 * OS specific aux write callback.
131 */
132bool dm_helpers_dp_write_dpcd(
133		struct dc_context *ctx,
134		const struct dc_link *link,
135		uint32_t address,
136		const uint8_t *data,
137		uint32_t size);
138
139bool dm_helpers_submit_i2c(
140		struct dc_context *ctx,
141		const struct dc_link *link,
142		struct i2c_command *cmd);
143
144bool dm_helpers_dp_write_dsc_enable(
145		struct dc_context *ctx,
146		const struct dc_stream_state *stream,
147		bool enable
148);
149bool dm_helpers_is_dp_sink_present(
150		struct dc_link *link);
151
152enum dc_edid_status dm_helpers_read_local_edid(
153		struct dc_context *ctx,
154		struct dc_link *link,
155		struct dc_sink *sink);
156
157void dm_set_dcn_clocks(
158		struct dc_context *ctx,
159		struct dc_clocks *clks);
160
161#endif /* __DM_HELPERS__ */