Loading...
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/cmpxchg.h>
21#include <asm/io.h>
22#include <asm/pgtable-bits.h>
23#include <asm/cpu-features.h>
24
25struct mm_struct;
26struct vm_area_struct;
27
28#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \
29 _page_cachable_default)
30#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
31 _page_cachable_default)
32#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_NO_EXEC | \
33 _page_cachable_default)
34#define PAGE_READONLY __pgprot(_PAGE_PRESENT | \
35 _page_cachable_default)
36#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
37 _PAGE_GLOBAL | _page_cachable_default)
38#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
39 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
40#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \
41 _page_cachable_default)
42#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
43 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
44
45/*
46 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
47 * execute, and consider it to be the same as read. Also, write
48 * permissions imply read permissions. This is the closest we can get
49 * by reasonable means..
50 */
51
52/*
53 * Dummy values to fill the table in mmap.c
54 * The real values will be generated at runtime
55 */
56#define __P000 __pgprot(0)
57#define __P001 __pgprot(0)
58#define __P010 __pgprot(0)
59#define __P011 __pgprot(0)
60#define __P100 __pgprot(0)
61#define __P101 __pgprot(0)
62#define __P110 __pgprot(0)
63#define __P111 __pgprot(0)
64
65#define __S000 __pgprot(0)
66#define __S001 __pgprot(0)
67#define __S010 __pgprot(0)
68#define __S011 __pgprot(0)
69#define __S100 __pgprot(0)
70#define __S101 __pgprot(0)
71#define __S110 __pgprot(0)
72#define __S111 __pgprot(0)
73
74extern unsigned long _page_cachable_default;
75
76/*
77 * ZERO_PAGE is a global shared page that is always zero; used
78 * for zero-mapped memory areas etc..
79 */
80
81extern unsigned long empty_zero_page;
82extern unsigned long zero_page_mask;
83
84#define ZERO_PAGE(vaddr) \
85 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
86#define __HAVE_COLOR_ZERO_PAGE
87
88extern void paging_init(void);
89
90/*
91 * Conversion functions: convert a page and protection to a page entry,
92 * and a page entry and page directory to the page they refer to.
93 */
94#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
95
96#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
97#ifndef CONFIG_TRANSPARENT_HUGEPAGE
98#define pmd_page(pmd) __pmd_page(pmd)
99#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
100
101#define pmd_page_vaddr(pmd) pmd_val(pmd)
102
103#define htw_stop() \
104do { \
105 unsigned long flags; \
106 \
107 if (cpu_has_htw) { \
108 local_irq_save(flags); \
109 if(!raw_current_cpu_data.htw_seq++) { \
110 write_c0_pwctl(read_c0_pwctl() & \
111 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
112 back_to_back_c0_hazard(); \
113 } \
114 local_irq_restore(flags); \
115 } \
116} while(0)
117
118#define htw_start() \
119do { \
120 unsigned long flags; \
121 \
122 if (cpu_has_htw) { \
123 local_irq_save(flags); \
124 if (!--raw_current_cpu_data.htw_seq) { \
125 write_c0_pwctl(read_c0_pwctl() | \
126 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
127 back_to_back_c0_hazard(); \
128 } \
129 local_irq_restore(flags); \
130 } \
131} while(0)
132
133static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
134 pte_t *ptep, pte_t pteval);
135
136#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
137
138#ifdef CONFIG_XPA
139# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
140#else
141# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
142#endif
143
144#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
145#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC)
146
147static inline void set_pte(pte_t *ptep, pte_t pte)
148{
149 ptep->pte_high = pte.pte_high;
150 smp_wmb();
151 ptep->pte_low = pte.pte_low;
152
153#ifdef CONFIG_XPA
154 if (pte.pte_high & _PAGE_GLOBAL) {
155#else
156 if (pte.pte_low & _PAGE_GLOBAL) {
157#endif
158 pte_t *buddy = ptep_buddy(ptep);
159 /*
160 * Make sure the buddy is global too (if it's !none,
161 * it better already be global)
162 */
163 if (pte_none(*buddy)) {
164 if (!IS_ENABLED(CONFIG_XPA))
165 buddy->pte_low |= _PAGE_GLOBAL;
166 buddy->pte_high |= _PAGE_GLOBAL;
167 }
168 }
169}
170
171static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
172{
173 pte_t null = __pte(0);
174
175 htw_stop();
176 /* Preserve global status for the pair */
177 if (IS_ENABLED(CONFIG_XPA)) {
178 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
179 null.pte_high = _PAGE_GLOBAL;
180 } else {
181 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
182 null.pte_low = null.pte_high = _PAGE_GLOBAL;
183 }
184
185 set_pte_at(mm, addr, ptep, null);
186 htw_start();
187}
188#else
189
190#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
191#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
192#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
193
194/*
195 * Certain architectures need to do special things when pte's
196 * within a page table are directly modified. Thus, the following
197 * hook is made available.
198 */
199static inline void set_pte(pte_t *ptep, pte_t pteval)
200{
201 *ptep = pteval;
202#if !defined(CONFIG_CPU_R3K_TLB)
203 if (pte_val(pteval) & _PAGE_GLOBAL) {
204 pte_t *buddy = ptep_buddy(ptep);
205 /*
206 * Make sure the buddy is global too (if it's !none,
207 * it better already be global)
208 */
209# if defined(CONFIG_PHYS_ADDR_T_64BIT) && !defined(CONFIG_CPU_MIPS32)
210 cmpxchg64(&buddy->pte, 0, _PAGE_GLOBAL);
211# else
212 cmpxchg(&buddy->pte, 0, _PAGE_GLOBAL);
213# endif
214 }
215#endif
216}
217
218static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
219{
220 htw_stop();
221#if !defined(CONFIG_CPU_R3K_TLB)
222 /* Preserve global status for the pair */
223 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
224 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
225 else
226#endif
227 set_pte_at(mm, addr, ptep, __pte(0));
228 htw_start();
229}
230#endif
231
232static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
233 pte_t *ptep, pte_t pteval)
234{
235 extern void __update_cache(unsigned long address, pte_t pte);
236
237 if (!pte_present(pteval))
238 goto cache_sync_done;
239
240 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
241 goto cache_sync_done;
242
243 __update_cache(addr, pteval);
244cache_sync_done:
245 set_pte(ptep, pteval);
246}
247
248/*
249 * (pmds are folded into puds so this doesn't get actually called,
250 * but the define is needed for a generic inline function.)
251 */
252#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
253
254#ifndef __PAGETABLE_PMD_FOLDED
255/*
256 * (puds are folded into pgds so this doesn't get actually called,
257 * but the define is needed for a generic inline function.)
258 */
259#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
260#endif
261
262#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
263#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
264#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
265
266/*
267 * We used to declare this array with size but gcc 3.3 and older are not able
268 * to find that this expression is a constant, so the size is dropped.
269 */
270extern pgd_t swapper_pg_dir[];
271
272/*
273 * Platform specific pte_special() and pte_mkspecial() definitions
274 * are required only when ARCH_HAS_PTE_SPECIAL is enabled.
275 */
276#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
277#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
278static inline int pte_special(pte_t pte)
279{
280 return pte.pte_low & _PAGE_SPECIAL;
281}
282
283static inline pte_t pte_mkspecial(pte_t pte)
284{
285 pte.pte_low |= _PAGE_SPECIAL;
286 return pte;
287}
288#else
289static inline int pte_special(pte_t pte)
290{
291 return pte_val(pte) & _PAGE_SPECIAL;
292}
293
294static inline pte_t pte_mkspecial(pte_t pte)
295{
296 pte_val(pte) |= _PAGE_SPECIAL;
297 return pte;
298}
299#endif
300#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
301
302/*
303 * The following only work if pte_present() is true.
304 * Undefined behaviour if not..
305 */
306#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
307static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
308static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
309static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
310
311static inline pte_t pte_wrprotect(pte_t pte)
312{
313 pte.pte_low &= ~_PAGE_WRITE;
314 if (!IS_ENABLED(CONFIG_XPA))
315 pte.pte_low &= ~_PAGE_SILENT_WRITE;
316 pte.pte_high &= ~_PAGE_SILENT_WRITE;
317 return pte;
318}
319
320static inline pte_t pte_mkclean(pte_t pte)
321{
322 pte.pte_low &= ~_PAGE_MODIFIED;
323 if (!IS_ENABLED(CONFIG_XPA))
324 pte.pte_low &= ~_PAGE_SILENT_WRITE;
325 pte.pte_high &= ~_PAGE_SILENT_WRITE;
326 return pte;
327}
328
329static inline pte_t pte_mkold(pte_t pte)
330{
331 pte.pte_low &= ~_PAGE_ACCESSED;
332 if (!IS_ENABLED(CONFIG_XPA))
333 pte.pte_low &= ~_PAGE_SILENT_READ;
334 pte.pte_high &= ~_PAGE_SILENT_READ;
335 return pte;
336}
337
338static inline pte_t pte_mkwrite(pte_t pte)
339{
340 pte.pte_low |= _PAGE_WRITE;
341 if (pte.pte_low & _PAGE_MODIFIED) {
342 if (!IS_ENABLED(CONFIG_XPA))
343 pte.pte_low |= _PAGE_SILENT_WRITE;
344 pte.pte_high |= _PAGE_SILENT_WRITE;
345 }
346 return pte;
347}
348
349static inline pte_t pte_mkdirty(pte_t pte)
350{
351 pte.pte_low |= _PAGE_MODIFIED;
352 if (pte.pte_low & _PAGE_WRITE) {
353 if (!IS_ENABLED(CONFIG_XPA))
354 pte.pte_low |= _PAGE_SILENT_WRITE;
355 pte.pte_high |= _PAGE_SILENT_WRITE;
356 }
357 return pte;
358}
359
360static inline pte_t pte_mkyoung(pte_t pte)
361{
362 pte.pte_low |= _PAGE_ACCESSED;
363 if (!(pte.pte_low & _PAGE_NO_READ)) {
364 if (!IS_ENABLED(CONFIG_XPA))
365 pte.pte_low |= _PAGE_SILENT_READ;
366 pte.pte_high |= _PAGE_SILENT_READ;
367 }
368 return pte;
369}
370#else
371static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
372static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
373static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
374
375static inline pte_t pte_wrprotect(pte_t pte)
376{
377 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
378 return pte;
379}
380
381static inline pte_t pte_mkclean(pte_t pte)
382{
383 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
384 return pte;
385}
386
387static inline pte_t pte_mkold(pte_t pte)
388{
389 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
390 return pte;
391}
392
393static inline pte_t pte_mkwrite(pte_t pte)
394{
395 pte_val(pte) |= _PAGE_WRITE;
396 if (pte_val(pte) & _PAGE_MODIFIED)
397 pte_val(pte) |= _PAGE_SILENT_WRITE;
398 return pte;
399}
400
401static inline pte_t pte_mkdirty(pte_t pte)
402{
403 pte_val(pte) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
404 if (pte_val(pte) & _PAGE_WRITE)
405 pte_val(pte) |= _PAGE_SILENT_WRITE;
406 return pte;
407}
408
409static inline pte_t pte_mkyoung(pte_t pte)
410{
411 pte_val(pte) |= _PAGE_ACCESSED;
412 if (!(pte_val(pte) & _PAGE_NO_READ))
413 pte_val(pte) |= _PAGE_SILENT_READ;
414 return pte;
415}
416
417#define pte_sw_mkyoung pte_mkyoung
418
419#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
420static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
421
422static inline pte_t pte_mkhuge(pte_t pte)
423{
424 pte_val(pte) |= _PAGE_HUGE;
425 return pte;
426}
427#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
428
429#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
430static inline bool pte_soft_dirty(pte_t pte)
431{
432 return pte_val(pte) & _PAGE_SOFT_DIRTY;
433}
434#define pte_swp_soft_dirty pte_soft_dirty
435
436static inline pte_t pte_mksoft_dirty(pte_t pte)
437{
438 pte_val(pte) |= _PAGE_SOFT_DIRTY;
439 return pte;
440}
441#define pte_swp_mksoft_dirty pte_mksoft_dirty
442
443static inline pte_t pte_clear_soft_dirty(pte_t pte)
444{
445 pte_val(pte) &= ~(_PAGE_SOFT_DIRTY);
446 return pte;
447}
448#define pte_swp_clear_soft_dirty pte_clear_soft_dirty
449
450#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
451
452#endif
453
454/*
455 * Macro to make mark a page protection value as "uncacheable". Note
456 * that "protection" is really a misnomer here as the protection value
457 * contains the memory attribute bits, dirty bits, and various other
458 * bits as well.
459 */
460#define pgprot_noncached pgprot_noncached
461
462static inline pgprot_t pgprot_noncached(pgprot_t _prot)
463{
464 unsigned long prot = pgprot_val(_prot);
465
466 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
467
468 return __pgprot(prot);
469}
470
471#define pgprot_writecombine pgprot_writecombine
472
473static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
474{
475 unsigned long prot = pgprot_val(_prot);
476
477 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
478 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
479
480 return __pgprot(prot);
481}
482
483static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,
484 unsigned long address)
485{
486}
487
488#define __HAVE_ARCH_PTE_SAME
489static inline int pte_same(pte_t pte_a, pte_t pte_b)
490{
491 return pte_val(pte_a) == pte_val(pte_b);
492}
493
494#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
495static inline int ptep_set_access_flags(struct vm_area_struct *vma,
496 unsigned long address, pte_t *ptep,
497 pte_t entry, int dirty)
498{
499 if (!pte_same(*ptep, entry))
500 set_pte_at(vma->vm_mm, address, ptep, entry);
501 /*
502 * update_mmu_cache will unconditionally execute, handling both
503 * the case that the PTE changed and the spurious fault case.
504 */
505 return true;
506}
507
508/*
509 * Conversion functions: convert a page and protection to a page entry,
510 * and a page entry and page directory to the page they refer to.
511 */
512#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
513
514#if defined(CONFIG_XPA)
515static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
516{
517 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
518 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
519 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
520 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
521 return pte;
522}
523#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
524static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
525{
526 pte.pte_low &= _PAGE_CHG_MASK;
527 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
528 pte.pte_low |= pgprot_val(newprot);
529 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
530 return pte;
531}
532#else
533static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
534{
535 pte_val(pte) &= _PAGE_CHG_MASK;
536 pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_CHG_MASK;
537 if ((pte_val(pte) & _PAGE_ACCESSED) && !(pte_val(pte) & _PAGE_NO_READ))
538 pte_val(pte) |= _PAGE_SILENT_READ;
539 return pte;
540}
541#endif
542
543
544extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
545 pte_t pte);
546
547static inline void update_mmu_cache(struct vm_area_struct *vma,
548 unsigned long address, pte_t *ptep)
549{
550 pte_t pte = *ptep;
551 __update_tlb(vma, address, pte);
552}
553
554#define __HAVE_ARCH_UPDATE_MMU_TLB
555#define update_mmu_tlb update_mmu_cache
556
557static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
558 unsigned long address, pmd_t *pmdp)
559{
560 pte_t pte = *(pte_t *)pmdp;
561
562 __update_tlb(vma, address, pte);
563}
564
565#define kern_addr_valid(addr) (1)
566
567/*
568 * Allow physical addresses to be fixed up to help 36-bit peripherals.
569 */
570#ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
571phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size);
572int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
573 unsigned long pfn, unsigned long size, pgprot_t prot);
574#define io_remap_pfn_range io_remap_pfn_range
575#else
576#define fixup_bigphys_addr(addr, size) (addr)
577#endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */
578
579#ifdef CONFIG_TRANSPARENT_HUGEPAGE
580
581/* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
582#define pmdp_establish generic_pmdp_establish
583
584#define has_transparent_hugepage has_transparent_hugepage
585extern int has_transparent_hugepage(void);
586
587static inline int pmd_trans_huge(pmd_t pmd)
588{
589 return !!(pmd_val(pmd) & _PAGE_HUGE);
590}
591
592static inline pmd_t pmd_mkhuge(pmd_t pmd)
593{
594 pmd_val(pmd) |= _PAGE_HUGE;
595
596 return pmd;
597}
598
599extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
600 pmd_t *pmdp, pmd_t pmd);
601
602#define pmd_write pmd_write
603static inline int pmd_write(pmd_t pmd)
604{
605 return !!(pmd_val(pmd) & _PAGE_WRITE);
606}
607
608static inline pmd_t pmd_wrprotect(pmd_t pmd)
609{
610 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
611 return pmd;
612}
613
614static inline pmd_t pmd_mkwrite(pmd_t pmd)
615{
616 pmd_val(pmd) |= _PAGE_WRITE;
617 if (pmd_val(pmd) & _PAGE_MODIFIED)
618 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
619
620 return pmd;
621}
622
623static inline int pmd_dirty(pmd_t pmd)
624{
625 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
626}
627
628static inline pmd_t pmd_mkclean(pmd_t pmd)
629{
630 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
631 return pmd;
632}
633
634static inline pmd_t pmd_mkdirty(pmd_t pmd)
635{
636 pmd_val(pmd) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
637 if (pmd_val(pmd) & _PAGE_WRITE)
638 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
639
640 return pmd;
641}
642
643static inline int pmd_young(pmd_t pmd)
644{
645 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
646}
647
648static inline pmd_t pmd_mkold(pmd_t pmd)
649{
650 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
651
652 return pmd;
653}
654
655static inline pmd_t pmd_mkyoung(pmd_t pmd)
656{
657 pmd_val(pmd) |= _PAGE_ACCESSED;
658
659 if (!(pmd_val(pmd) & _PAGE_NO_READ))
660 pmd_val(pmd) |= _PAGE_SILENT_READ;
661
662 return pmd;
663}
664
665#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
666static inline int pmd_soft_dirty(pmd_t pmd)
667{
668 return !!(pmd_val(pmd) & _PAGE_SOFT_DIRTY);
669}
670
671static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
672{
673 pmd_val(pmd) |= _PAGE_SOFT_DIRTY;
674 return pmd;
675}
676
677static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
678{
679 pmd_val(pmd) &= ~(_PAGE_SOFT_DIRTY);
680 return pmd;
681}
682
683#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
684
685/* Extern to avoid header file madness */
686extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
687
688static inline unsigned long pmd_pfn(pmd_t pmd)
689{
690 return pmd_val(pmd) >> _PFN_SHIFT;
691}
692
693static inline struct page *pmd_page(pmd_t pmd)
694{
695 if (pmd_trans_huge(pmd))
696 return pfn_to_page(pmd_pfn(pmd));
697
698 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
699}
700
701static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
702{
703 pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
704 (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
705 return pmd;
706}
707
708static inline pmd_t pmd_mkinvalid(pmd_t pmd)
709{
710 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
711
712 return pmd;
713}
714
715/*
716 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
717 * different prototype.
718 */
719#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
720static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
721 unsigned long address, pmd_t *pmdp)
722{
723 pmd_t old = *pmdp;
724
725 pmd_clear(pmdp);
726
727 return old;
728}
729
730#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
731
732#ifdef _PAGE_HUGE
733#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)
734#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
735#endif
736
737#define gup_fast_permitted(start, end) (!cpu_has_dc_aliases)
738
739/*
740 * We provide our own get_unmapped area to cope with the virtual aliasing
741 * constraints placed on us by the cache architecture.
742 */
743#define HAVE_ARCH_UNMAPPED_AREA
744#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
745
746#endif /* _ASM_PGTABLE_H */
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/io.h>
21#include <asm/pgtable-bits.h>
22
23struct mm_struct;
24struct vm_area_struct;
25
26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
27#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \
28 _page_cachable_default)
29#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \
30 _page_cachable_default)
31#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \
32 _page_cachable_default)
33#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
34 _PAGE_GLOBAL | _page_cachable_default)
35#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
37#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
38 _page_cachable_default)
39#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
41
42/*
43 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
44 * execute, and consider it to be the same as read. Also, write
45 * permissions imply read permissions. This is the closest we can get
46 * by reasonable means..
47 */
48
49/*
50 * Dummy values to fill the table in mmap.c
51 * The real values will be generated at runtime
52 */
53#define __P000 __pgprot(0)
54#define __P001 __pgprot(0)
55#define __P010 __pgprot(0)
56#define __P011 __pgprot(0)
57#define __P100 __pgprot(0)
58#define __P101 __pgprot(0)
59#define __P110 __pgprot(0)
60#define __P111 __pgprot(0)
61
62#define __S000 __pgprot(0)
63#define __S001 __pgprot(0)
64#define __S010 __pgprot(0)
65#define __S011 __pgprot(0)
66#define __S100 __pgprot(0)
67#define __S101 __pgprot(0)
68#define __S110 __pgprot(0)
69#define __S111 __pgprot(0)
70
71extern unsigned long _page_cachable_default;
72
73/*
74 * ZERO_PAGE is a global shared page that is always zero; used
75 * for zero-mapped memory areas etc..
76 */
77
78extern unsigned long empty_zero_page;
79extern unsigned long zero_page_mask;
80
81#define ZERO_PAGE(vaddr) \
82 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
83#define __HAVE_COLOR_ZERO_PAGE
84
85extern void paging_init(void);
86
87/*
88 * Conversion functions: convert a page and protection to a page entry,
89 * and a page entry and page directory to the page they refer to.
90 */
91#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
92
93#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
94#ifndef CONFIG_TRANSPARENT_HUGEPAGE
95#define pmd_page(pmd) __pmd_page(pmd)
96#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
97
98#define pmd_page_vaddr(pmd) pmd_val(pmd)
99
100#define htw_stop() \
101do { \
102 unsigned long flags; \
103 \
104 if (cpu_has_htw) { \
105 local_irq_save(flags); \
106 if(!raw_current_cpu_data.htw_seq++) { \
107 write_c0_pwctl(read_c0_pwctl() & \
108 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
109 back_to_back_c0_hazard(); \
110 } \
111 local_irq_restore(flags); \
112 } \
113} while(0)
114
115#define htw_start() \
116do { \
117 unsigned long flags; \
118 \
119 if (cpu_has_htw) { \
120 local_irq_save(flags); \
121 if (!--raw_current_cpu_data.htw_seq) { \
122 write_c0_pwctl(read_c0_pwctl() | \
123 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
124 back_to_back_c0_hazard(); \
125 } \
126 local_irq_restore(flags); \
127 } \
128} while(0)
129
130#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
131
132#define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
133#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
134
135static inline void set_pte(pte_t *ptep, pte_t pte)
136{
137 ptep->pte_high = pte.pte_high;
138 smp_wmb();
139 ptep->pte_low = pte.pte_low;
140
141 if (pte.pte_high & _PAGE_GLOBAL) {
142 pte_t *buddy = ptep_buddy(ptep);
143 /*
144 * Make sure the buddy is global too (if it's !none,
145 * it better already be global)
146 */
147 if (pte_none(*buddy))
148 buddy->pte_high |= _PAGE_GLOBAL;
149 }
150}
151#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
152
153static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
154{
155 pte_t null = __pte(0);
156
157 htw_stop();
158 /* Preserve global status for the pair */
159 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
160 null.pte_high = _PAGE_GLOBAL;
161
162 set_pte_at(mm, addr, ptep, null);
163 htw_start();
164}
165#else
166
167#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
168#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
169
170/*
171 * Certain architectures need to do special things when pte's
172 * within a page table are directly modified. Thus, the following
173 * hook is made available.
174 */
175static inline void set_pte(pte_t *ptep, pte_t pteval)
176{
177 *ptep = pteval;
178#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
179 if (pte_val(pteval) & _PAGE_GLOBAL) {
180 pte_t *buddy = ptep_buddy(ptep);
181 /*
182 * Make sure the buddy is global too (if it's !none,
183 * it better already be global)
184 */
185#ifdef CONFIG_SMP
186 /*
187 * For SMP, multiple CPUs can race, so we need to do
188 * this atomically.
189 */
190#ifdef CONFIG_64BIT
191#define LL_INSN "lld"
192#define SC_INSN "scd"
193#else /* CONFIG_32BIT */
194#define LL_INSN "ll"
195#define SC_INSN "sc"
196#endif
197 unsigned long page_global = _PAGE_GLOBAL;
198 unsigned long tmp;
199
200 __asm__ __volatile__ (
201 " .set push\n"
202 " .set noreorder\n"
203 "1: " LL_INSN " %[tmp], %[buddy]\n"
204 " bnez %[tmp], 2f\n"
205 " or %[tmp], %[tmp], %[global]\n"
206 " " SC_INSN " %[tmp], %[buddy]\n"
207 " beqz %[tmp], 1b\n"
208 " nop\n"
209 "2:\n"
210 " .set pop"
211 : [buddy] "+m" (buddy->pte),
212 [tmp] "=&r" (tmp)
213 : [global] "r" (page_global));
214#else /* !CONFIG_SMP */
215 if (pte_none(*buddy))
216 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
217#endif /* CONFIG_SMP */
218 }
219#endif
220}
221#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
222
223static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
224{
225 htw_stop();
226#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
227 /* Preserve global status for the pair */
228 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
229 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
230 else
231#endif
232 set_pte_at(mm, addr, ptep, __pte(0));
233 htw_start();
234}
235#endif
236
237/*
238 * (pmds are folded into puds so this doesn't get actually called,
239 * but the define is needed for a generic inline function.)
240 */
241#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
242
243#ifndef __PAGETABLE_PMD_FOLDED
244/*
245 * (puds are folded into pgds so this doesn't get actually called,
246 * but the define is needed for a generic inline function.)
247 */
248#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
249#endif
250
251#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
252#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
253#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
254
255/*
256 * We used to declare this array with size but gcc 3.3 and older are not able
257 * to find that this expression is a constant, so the size is dropped.
258 */
259extern pgd_t swapper_pg_dir[];
260
261/*
262 * The following only work if pte_present() is true.
263 * Undefined behaviour if not..
264 */
265#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
266static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
267static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
268static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
269
270static inline pte_t pte_wrprotect(pte_t pte)
271{
272 pte.pte_low &= ~_PAGE_WRITE;
273 pte.pte_high &= ~_PAGE_SILENT_WRITE;
274 return pte;
275}
276
277static inline pte_t pte_mkclean(pte_t pte)
278{
279 pte.pte_low &= ~_PAGE_MODIFIED;
280 pte.pte_high &= ~_PAGE_SILENT_WRITE;
281 return pte;
282}
283
284static inline pte_t pte_mkold(pte_t pte)
285{
286 pte.pte_low &= ~_PAGE_ACCESSED;
287 pte.pte_high &= ~_PAGE_SILENT_READ;
288 return pte;
289}
290
291static inline pte_t pte_mkwrite(pte_t pte)
292{
293 pte.pte_low |= _PAGE_WRITE;
294 if (pte.pte_low & _PAGE_MODIFIED)
295 pte.pte_high |= _PAGE_SILENT_WRITE;
296 return pte;
297}
298
299static inline pte_t pte_mkdirty(pte_t pte)
300{
301 pte.pte_low |= _PAGE_MODIFIED;
302 if (pte.pte_low & _PAGE_WRITE)
303 pte.pte_high |= _PAGE_SILENT_WRITE;
304 return pte;
305}
306
307static inline pte_t pte_mkyoung(pte_t pte)
308{
309 pte.pte_low |= _PAGE_ACCESSED;
310 if (pte.pte_low & _PAGE_READ)
311 pte.pte_high |= _PAGE_SILENT_READ;
312 return pte;
313}
314#else
315static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
316static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
317static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
318
319static inline pte_t pte_wrprotect(pte_t pte)
320{
321 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
322 return pte;
323}
324
325static inline pte_t pte_mkclean(pte_t pte)
326{
327 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
328 return pte;
329}
330
331static inline pte_t pte_mkold(pte_t pte)
332{
333 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
334 return pte;
335}
336
337static inline pte_t pte_mkwrite(pte_t pte)
338{
339 pte_val(pte) |= _PAGE_WRITE;
340 if (pte_val(pte) & _PAGE_MODIFIED)
341 pte_val(pte) |= _PAGE_SILENT_WRITE;
342 return pte;
343}
344
345static inline pte_t pte_mkdirty(pte_t pte)
346{
347 pte_val(pte) |= _PAGE_MODIFIED;
348 if (pte_val(pte) & _PAGE_WRITE)
349 pte_val(pte) |= _PAGE_SILENT_WRITE;
350 return pte;
351}
352
353static inline pte_t pte_mkyoung(pte_t pte)
354{
355 pte_val(pte) |= _PAGE_ACCESSED;
356#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
357 if (!(pte_val(pte) & _PAGE_NO_READ))
358 pte_val(pte) |= _PAGE_SILENT_READ;
359 else
360#endif
361 if (pte_val(pte) & _PAGE_READ)
362 pte_val(pte) |= _PAGE_SILENT_READ;
363 return pte;
364}
365
366#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
367static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
368
369static inline pte_t pte_mkhuge(pte_t pte)
370{
371 pte_val(pte) |= _PAGE_HUGE;
372 return pte;
373}
374#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
375#endif
376static inline int pte_special(pte_t pte) { return 0; }
377static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
378
379/*
380 * Macro to make mark a page protection value as "uncacheable". Note
381 * that "protection" is really a misnomer here as the protection value
382 * contains the memory attribute bits, dirty bits, and various other
383 * bits as well.
384 */
385#define pgprot_noncached pgprot_noncached
386
387static inline pgprot_t pgprot_noncached(pgprot_t _prot)
388{
389 unsigned long prot = pgprot_val(_prot);
390
391 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
392
393 return __pgprot(prot);
394}
395
396#define pgprot_writecombine pgprot_writecombine
397
398static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
399{
400 unsigned long prot = pgprot_val(_prot);
401
402 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
403 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
404
405 return __pgprot(prot);
406}
407
408/*
409 * Conversion functions: convert a page and protection to a page entry,
410 * and a page entry and page directory to the page they refer to.
411 */
412#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
413
414#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
415static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
416{
417 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
418 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
419 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
420 pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK;
421 return pte;
422}
423#else
424static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
425{
426 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
427}
428#endif
429
430
431extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
432 pte_t pte);
433extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
434 pte_t pte);
435
436static inline void update_mmu_cache(struct vm_area_struct *vma,
437 unsigned long address, pte_t *ptep)
438{
439 pte_t pte = *ptep;
440 __update_tlb(vma, address, pte);
441 __update_cache(vma, address, pte);
442}
443
444static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
445 unsigned long address, pmd_t *pmdp)
446{
447 pte_t pte = *(pte_t *)pmdp;
448
449 __update_tlb(vma, address, pte);
450}
451
452#define kern_addr_valid(addr) (1)
453
454#ifdef CONFIG_PHYS_ADDR_T_64BIT
455extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
456
457static inline int io_remap_pfn_range(struct vm_area_struct *vma,
458 unsigned long vaddr,
459 unsigned long pfn,
460 unsigned long size,
461 pgprot_t prot)
462{
463 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
464 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
465}
466#define io_remap_pfn_range io_remap_pfn_range
467#endif
468
469#ifdef CONFIG_TRANSPARENT_HUGEPAGE
470
471extern int has_transparent_hugepage(void);
472
473static inline int pmd_trans_huge(pmd_t pmd)
474{
475 return !!(pmd_val(pmd) & _PAGE_HUGE);
476}
477
478static inline pmd_t pmd_mkhuge(pmd_t pmd)
479{
480 pmd_val(pmd) |= _PAGE_HUGE;
481
482 return pmd;
483}
484
485extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
486 pmd_t *pmdp, pmd_t pmd);
487
488#define __HAVE_ARCH_PMD_WRITE
489static inline int pmd_write(pmd_t pmd)
490{
491 return !!(pmd_val(pmd) & _PAGE_WRITE);
492}
493
494static inline pmd_t pmd_wrprotect(pmd_t pmd)
495{
496 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
497 return pmd;
498}
499
500static inline pmd_t pmd_mkwrite(pmd_t pmd)
501{
502 pmd_val(pmd) |= _PAGE_WRITE;
503 if (pmd_val(pmd) & _PAGE_MODIFIED)
504 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
505
506 return pmd;
507}
508
509static inline int pmd_dirty(pmd_t pmd)
510{
511 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
512}
513
514static inline pmd_t pmd_mkclean(pmd_t pmd)
515{
516 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
517 return pmd;
518}
519
520static inline pmd_t pmd_mkdirty(pmd_t pmd)
521{
522 pmd_val(pmd) |= _PAGE_MODIFIED;
523 if (pmd_val(pmd) & _PAGE_WRITE)
524 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
525
526 return pmd;
527}
528
529static inline int pmd_young(pmd_t pmd)
530{
531 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
532}
533
534static inline pmd_t pmd_mkold(pmd_t pmd)
535{
536 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
537
538 return pmd;
539}
540
541static inline pmd_t pmd_mkyoung(pmd_t pmd)
542{
543 pmd_val(pmd) |= _PAGE_ACCESSED;
544
545#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
546 if (!(pmd_val(pmd) & _PAGE_NO_READ))
547 pmd_val(pmd) |= _PAGE_SILENT_READ;
548 else
549#endif
550 if (pmd_val(pmd) & _PAGE_READ)
551 pmd_val(pmd) |= _PAGE_SILENT_READ;
552
553 return pmd;
554}
555
556/* Extern to avoid header file madness */
557extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
558
559static inline unsigned long pmd_pfn(pmd_t pmd)
560{
561 return pmd_val(pmd) >> _PFN_SHIFT;
562}
563
564static inline struct page *pmd_page(pmd_t pmd)
565{
566 if (pmd_trans_huge(pmd))
567 return pfn_to_page(pmd_pfn(pmd));
568
569 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
570}
571
572static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
573{
574 pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot);
575 return pmd;
576}
577
578static inline pmd_t pmd_mknotpresent(pmd_t pmd)
579{
580 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
581
582 return pmd;
583}
584
585/*
586 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
587 * different prototype.
588 */
589#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
590static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
591 unsigned long address, pmd_t *pmdp)
592{
593 pmd_t old = *pmdp;
594
595 pmd_clear(pmdp);
596
597 return old;
598}
599
600#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
601
602#include <asm-generic/pgtable.h>
603
604/*
605 * uncached accelerated TLB map for video memory access
606 */
607#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
608#define __HAVE_PHYS_MEM_ACCESS_PROT
609
610struct file;
611pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
612 unsigned long size, pgprot_t vma_prot);
613int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
614 unsigned long size, pgprot_t *vma_prot);
615#endif
616
617/*
618 * We provide our own get_unmapped area to cope with the virtual aliasing
619 * constraints placed on us by the cache architecture.
620 */
621#define HAVE_ARCH_UNMAPPED_AREA
622#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
623
624/*
625 * No page table caches to initialise
626 */
627#define pgtable_cache_init() do { } while (0)
628
629#endif /* _ASM_PGTABLE_H */