1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * contains some Q40 related interrupt definitions
 4 */
 5
 6#define Q40_IRQ_MAX      (34)
 7
 8#define Q40_IRQ_SAMPLE    (34)
 9#define Q40_IRQ_KEYBOARD (32)
10#define Q40_IRQ_FRAME    (33)
11
12
13/* masks for interrupt regiosters*/
14/* internal, IIRQ_REG */
15#define Q40_IRQ_KEYB_MASK    (2)
16#define Q40_IRQ_SER_MASK     (1<<2)
17#define Q40_IRQ_FRAME_MASK   (1<<3)
18#define Q40_IRQ_EXT_MASK     (1<<4)    /* is a EIRQ */
19/* eirq, EIRQ_REG */
20#define Q40_IRQ3_MASK        (1)
21#define Q40_IRQ4_MASK        (1<<1)
22#define Q40_IRQ5_MASK        (1<<2)
23#define Q40_IRQ6_MASK        (1<<3)
24#define Q40_IRQ7_MASK        (1<<4)
25#define Q40_IRQ10_MASK       (1<<5)
26#define Q40_IRQ14_MASK       (1<<6)
27#define Q40_IRQ15_MASK       (1<<7)

 
 1/*
 2 * contains some Q40 related interrupt definitions
 3 */
 4
 5#define Q40_IRQ_MAX      (34)
 6
 7#define Q40_IRQ_SAMPLE    (34)
 8#define Q40_IRQ_KEYBOARD (32)
 9#define Q40_IRQ_FRAME    (33)
10
11
12/* masks for interrupt regiosters*/
13/* internal, IIRQ_REG */
14#define Q40_IRQ_KEYB_MASK    (2)
15#define Q40_IRQ_SER_MASK     (1<<2)
16#define Q40_IRQ_FRAME_MASK   (1<<3)
17#define Q40_IRQ_EXT_MASK     (1<<4)    /* is a EIRQ */
18/* eirq, EIRQ_REG */
19#define Q40_IRQ3_MASK        (1)
20#define Q40_IRQ4_MASK        (1<<1)
21#define Q40_IRQ5_MASK        (1<<2)
22#define Q40_IRQ6_MASK        (1<<3)
23#define Q40_IRQ7_MASK        (1<<4)
24#define Q40_IRQ10_MASK       (1<<5)
25#define Q40_IRQ14_MASK       (1<<6)
26#define Q40_IRQ15_MASK       (1<<7)