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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * tlv320aic32x4.h
4 */
5
6
7#ifndef _TLV320AIC32X4_H
8#define _TLV320AIC32X4_H
9
10struct device;
11struct regmap_config;
12
13extern const struct regmap_config aic32x4_regmap_config;
14int aic32x4_probe(struct device *dev, struct regmap *regmap);
15int aic32x4_remove(struct device *dev);
16int aic32x4_register_clocks(struct device *dev, const char *mclk_name);
17
18/* tlv320aic32x4 register space (in decimal to match datasheet) */
19
20#define AIC32X4_REG(page, reg) ((page * 128) + reg)
21
22#define AIC32X4_PSEL AIC32X4_REG(0, 0)
23
24#define AIC32X4_RESET AIC32X4_REG(0, 1)
25#define AIC32X4_CLKMUX AIC32X4_REG(0, 4)
26#define AIC32X4_PLLPR AIC32X4_REG(0, 5)
27#define AIC32X4_PLLJ AIC32X4_REG(0, 6)
28#define AIC32X4_PLLDMSB AIC32X4_REG(0, 7)
29#define AIC32X4_PLLDLSB AIC32X4_REG(0, 8)
30#define AIC32X4_NDAC AIC32X4_REG(0, 11)
31#define AIC32X4_MDAC AIC32X4_REG(0, 12)
32#define AIC32X4_DOSRMSB AIC32X4_REG(0, 13)
33#define AIC32X4_DOSRLSB AIC32X4_REG(0, 14)
34#define AIC32X4_NADC AIC32X4_REG(0, 18)
35#define AIC32X4_MADC AIC32X4_REG(0, 19)
36#define AIC32X4_AOSR AIC32X4_REG(0, 20)
37#define AIC32X4_CLKMUX2 AIC32X4_REG(0, 25)
38#define AIC32X4_CLKOUTM AIC32X4_REG(0, 26)
39#define AIC32X4_IFACE1 AIC32X4_REG(0, 27)
40#define AIC32X4_IFACE2 AIC32X4_REG(0, 28)
41#define AIC32X4_IFACE3 AIC32X4_REG(0, 29)
42#define AIC32X4_BCLKN AIC32X4_REG(0, 30)
43#define AIC32X4_IFACE4 AIC32X4_REG(0, 31)
44#define AIC32X4_IFACE5 AIC32X4_REG(0, 32)
45#define AIC32X4_IFACE6 AIC32X4_REG(0, 33)
46#define AIC32X4_GPIOCTL AIC32X4_REG(0, 52)
47#define AIC32X4_DOUTCTL AIC32X4_REG(0, 53)
48#define AIC32X4_DINCTL AIC32X4_REG(0, 54)
49#define AIC32X4_MISOCTL AIC32X4_REG(0, 55)
50#define AIC32X4_SCLKCTL AIC32X4_REG(0, 56)
51#define AIC32X4_DACSPB AIC32X4_REG(0, 60)
52#define AIC32X4_ADCSPB AIC32X4_REG(0, 61)
53#define AIC32X4_DACSETUP AIC32X4_REG(0, 63)
54#define AIC32X4_DACMUTE AIC32X4_REG(0, 64)
55#define AIC32X4_LDACVOL AIC32X4_REG(0, 65)
56#define AIC32X4_RDACVOL AIC32X4_REG(0, 66)
57#define AIC32X4_ADCSETUP AIC32X4_REG(0, 81)
58#define AIC32X4_ADCFGA AIC32X4_REG(0, 82)
59#define AIC32X4_LADCVOL AIC32X4_REG(0, 83)
60#define AIC32X4_RADCVOL AIC32X4_REG(0, 84)
61#define AIC32X4_LAGC1 AIC32X4_REG(0, 86)
62#define AIC32X4_LAGC2 AIC32X4_REG(0, 87)
63#define AIC32X4_LAGC3 AIC32X4_REG(0, 88)
64#define AIC32X4_LAGC4 AIC32X4_REG(0, 89)
65#define AIC32X4_LAGC5 AIC32X4_REG(0, 90)
66#define AIC32X4_LAGC6 AIC32X4_REG(0, 91)
67#define AIC32X4_LAGC7 AIC32X4_REG(0, 92)
68#define AIC32X4_RAGC1 AIC32X4_REG(0, 94)
69#define AIC32X4_RAGC2 AIC32X4_REG(0, 95)
70#define AIC32X4_RAGC3 AIC32X4_REG(0, 96)
71#define AIC32X4_RAGC4 AIC32X4_REG(0, 97)
72#define AIC32X4_RAGC5 AIC32X4_REG(0, 98)
73#define AIC32X4_RAGC6 AIC32X4_REG(0, 99)
74#define AIC32X4_RAGC7 AIC32X4_REG(0, 100)
75
76#define AIC32X4_PWRCFG AIC32X4_REG(1, 1)
77#define AIC32X4_LDOCTL AIC32X4_REG(1, 2)
78#define AIC32X4_LPLAYBACK AIC32X4_REG(1, 3)
79#define AIC32X4_RPLAYBACK AIC32X4_REG(1, 4)
80#define AIC32X4_OUTPWRCTL AIC32X4_REG(1, 9)
81#define AIC32X4_CMMODE AIC32X4_REG(1, 10)
82#define AIC32X4_HPLROUTE AIC32X4_REG(1, 12)
83#define AIC32X4_HPRROUTE AIC32X4_REG(1, 13)
84#define AIC32X4_LOLROUTE AIC32X4_REG(1, 14)
85#define AIC32X4_LORROUTE AIC32X4_REG(1, 15)
86#define AIC32X4_HPLGAIN AIC32X4_REG(1, 16)
87#define AIC32X4_HPRGAIN AIC32X4_REG(1, 17)
88#define AIC32X4_LOLGAIN AIC32X4_REG(1, 18)
89#define AIC32X4_LORGAIN AIC32X4_REG(1, 19)
90#define AIC32X4_HEADSTART AIC32X4_REG(1, 20)
91#define AIC32X4_MICBIAS AIC32X4_REG(1, 51)
92#define AIC32X4_LMICPGAPIN AIC32X4_REG(1, 52)
93#define AIC32X4_LMICPGANIN AIC32X4_REG(1, 54)
94#define AIC32X4_RMICPGAPIN AIC32X4_REG(1, 55)
95#define AIC32X4_RMICPGANIN AIC32X4_REG(1, 57)
96#define AIC32X4_FLOATINGINPUT AIC32X4_REG(1, 58)
97#define AIC32X4_LMICPGAVOL AIC32X4_REG(1, 59)
98#define AIC32X4_RMICPGAVOL AIC32X4_REG(1, 60)
99
100/* Bits, masks, and shifts */
101
102/* AIC32X4_CLKMUX */
103#define AIC32X4_PLL_CLKIN_MASK GENMASK(3, 2)
104#define AIC32X4_PLL_CLKIN_SHIFT (2)
105#define AIC32X4_PLL_CLKIN_MCLK (0x00)
106#define AIC32X4_PLL_CLKIN_BCKL (0x01)
107#define AIC32X4_PLL_CLKIN_GPIO1 (0x02)
108#define AIC32X4_PLL_CLKIN_DIN (0x03)
109#define AIC32X4_CODEC_CLKIN_MASK GENMASK(1, 0)
110#define AIC32X4_CODEC_CLKIN_SHIFT (0)
111#define AIC32X4_CODEC_CLKIN_MCLK (0x00)
112#define AIC32X4_CODEC_CLKIN_BCLK (0x01)
113#define AIC32X4_CODEC_CLKIN_GPIO1 (0x02)
114#define AIC32X4_CODEC_CLKIN_PLL (0x03)
115
116/* AIC32X4_PLLPR */
117#define AIC32X4_PLLEN BIT(7)
118#define AIC32X4_PLL_P_MASK GENMASK(6, 4)
119#define AIC32X4_PLL_P_SHIFT (4)
120#define AIC32X4_PLL_R_MASK GENMASK(3, 0)
121
122/* AIC32X4_NDAC */
123#define AIC32X4_NDACEN BIT(7)
124#define AIC32X4_NDAC_MASK GENMASK(6, 0)
125
126/* AIC32X4_MDAC */
127#define AIC32X4_MDACEN BIT(7)
128#define AIC32X4_MDAC_MASK GENMASK(6, 0)
129
130/* AIC32X4_NADC */
131#define AIC32X4_NADCEN BIT(7)
132#define AIC32X4_NADC_MASK GENMASK(6, 0)
133
134/* AIC32X4_MADC */
135#define AIC32X4_MADCEN BIT(7)
136#define AIC32X4_MADC_MASK GENMASK(6, 0)
137
138/* AIC32X4_BCLKN */
139#define AIC32X4_BCLKEN BIT(7)
140#define AIC32X4_BCLK_MASK GENMASK(6, 0)
141
142/* AIC32X4_IFACE1 */
143#define AIC32X4_IFACE1_DATATYPE_MASK GENMASK(7, 6)
144#define AIC32X4_IFACE1_DATATYPE_SHIFT (6)
145#define AIC32X4_I2S_MODE (0x00)
146#define AIC32X4_DSP_MODE (0x01)
147#define AIC32X4_RIGHT_JUSTIFIED_MODE (0x02)
148#define AIC32X4_LEFT_JUSTIFIED_MODE (0x03)
149#define AIC32X4_IFACE1_DATALEN_MASK GENMASK(5, 4)
150#define AIC32X4_IFACE1_DATALEN_SHIFT (4)
151#define AIC32X4_WORD_LEN_16BITS (0x00)
152#define AIC32X4_WORD_LEN_20BITS (0x01)
153#define AIC32X4_WORD_LEN_24BITS (0x02)
154#define AIC32X4_WORD_LEN_32BITS (0x03)
155#define AIC32X4_IFACE1_MASTER_MASK GENMASK(3, 2)
156#define AIC32X4_BCLKMASTER BIT(2)
157#define AIC32X4_WCLKMASTER BIT(3)
158
159/* AIC32X4_IFACE2 */
160#define AIC32X4_DATA_OFFSET_MASK GENMASK(7, 0)
161
162/* AIC32X4_IFACE3 */
163#define AIC32X4_BCLKINV_MASK BIT(3)
164#define AIC32X4_BDIVCLK_MASK GENMASK(1, 0)
165#define AIC32X4_BDIVCLK_SHIFT (0)
166#define AIC32X4_DAC2BCLK (0x00)
167#define AIC32X4_DACMOD2BCLK (0x01)
168#define AIC32X4_ADC2BCLK (0x02)
169#define AIC32X4_ADCMOD2BCLK (0x03)
170
171/* AIC32X4_DACSETUP */
172#define AIC32X4_DAC_CHAN_MASK GENMASK(5, 2)
173#define AIC32X4_LDAC2RCHN BIT(5)
174#define AIC32X4_LDAC2LCHN BIT(4)
175#define AIC32X4_RDAC2LCHN BIT(3)
176#define AIC32X4_RDAC2RCHN BIT(2)
177
178/* AIC32X4_DACMUTE */
179#define AIC32X4_MUTEON 0x0C
180
181/* AIC32X4_ADCSETUP */
182#define AIC32X4_LADC_EN BIT(7)
183#define AIC32X4_RADC_EN BIT(6)
184
185/* AIC32X4_PWRCFG */
186#define AIC32X4_AVDDWEAKDISABLE BIT(3)
187
188/* AIC32X4_LDOCTL */
189#define AIC32X4_LDOCTLEN BIT(0)
190
191/* AIC32X4_CMMODE */
192#define AIC32X4_LDOIN_18_36 BIT(0)
193#define AIC32X4_LDOIN2HP BIT(1)
194
195/* AIC32X4_MICBIAS */
196#define AIC32X4_MICBIAS_LDOIN BIT(3)
197#define AIC32X4_MICBIAS_2075V 0x60
198#define AIC32x4_MICBIAS_MASK GENMASK(6, 3)
199
200/* AIC32X4_LMICPGANIN */
201#define AIC32X4_LMICPGANIN_IN2R_10K 0x10
202#define AIC32X4_LMICPGANIN_CM1L_10K 0x40
203
204/* AIC32X4_RMICPGANIN */
205#define AIC32X4_RMICPGANIN_IN1L_10K 0x10
206#define AIC32X4_RMICPGANIN_CM1R_10K 0x40
207
208/* Common mask and enable for all of the dividers */
209#define AIC32X4_DIVEN BIT(7)
210#define AIC32X4_DIV_MASK GENMASK(6, 0)
211
212/* Clock Limits */
213#define AIC32X4_MAX_DOSR_FREQ 6200000
214#define AIC32X4_MIN_DOSR_FREQ 2800000
215#define AIC32X4_MAX_CODEC_CLKIN_FREQ 110000000
216#define AIC32X4_MAX_PLL_CLKIN 20000000
217
218#endif /* _TLV320AIC32X4_H */
1/*
2 * tlv320aic32x4.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9
10#ifndef _TLV320AIC32X4_H
11#define _TLV320AIC32X4_H
12
13/* tlv320aic32x4 register space (in decimal to match datasheet) */
14
15#define AIC32X4_PAGE1 128
16
17#define AIC32X4_PSEL 0
18#define AIC32X4_RESET 1
19#define AIC32X4_CLKMUX 4
20#define AIC32X4_PLLPR 5
21#define AIC32X4_PLLJ 6
22#define AIC32X4_PLLDMSB 7
23#define AIC32X4_PLLDLSB 8
24#define AIC32X4_NDAC 11
25#define AIC32X4_MDAC 12
26#define AIC32X4_DOSRMSB 13
27#define AIC32X4_DOSRLSB 14
28#define AIC32X4_NADC 18
29#define AIC32X4_MADC 19
30#define AIC32X4_AOSR 20
31#define AIC32X4_CLKMUX2 25
32#define AIC32X4_CLKOUTM 26
33#define AIC32X4_IFACE1 27
34#define AIC32X4_IFACE2 28
35#define AIC32X4_IFACE3 29
36#define AIC32X4_BCLKN 30
37#define AIC32X4_IFACE4 31
38#define AIC32X4_IFACE5 32
39#define AIC32X4_IFACE6 33
40#define AIC32X4_DOUTCTL 53
41#define AIC32X4_DINCTL 54
42#define AIC32X4_DACSPB 60
43#define AIC32X4_ADCSPB 61
44#define AIC32X4_DACSETUP 63
45#define AIC32X4_DACMUTE 64
46#define AIC32X4_LDACVOL 65
47#define AIC32X4_RDACVOL 66
48#define AIC32X4_ADCSETUP 81
49#define AIC32X4_ADCFGA 82
50#define AIC32X4_LADCVOL 83
51#define AIC32X4_RADCVOL 84
52#define AIC32X4_LAGC1 86
53#define AIC32X4_LAGC2 87
54#define AIC32X4_LAGC3 88
55#define AIC32X4_LAGC4 89
56#define AIC32X4_LAGC5 90
57#define AIC32X4_LAGC6 91
58#define AIC32X4_LAGC7 92
59#define AIC32X4_RAGC1 94
60#define AIC32X4_RAGC2 95
61#define AIC32X4_RAGC3 96
62#define AIC32X4_RAGC4 97
63#define AIC32X4_RAGC5 98
64#define AIC32X4_RAGC6 99
65#define AIC32X4_RAGC7 100
66#define AIC32X4_PWRCFG (AIC32X4_PAGE1 + 1)
67#define AIC32X4_LDOCTL (AIC32X4_PAGE1 + 2)
68#define AIC32X4_OUTPWRCTL (AIC32X4_PAGE1 + 9)
69#define AIC32X4_CMMODE (AIC32X4_PAGE1 + 10)
70#define AIC32X4_HPLROUTE (AIC32X4_PAGE1 + 12)
71#define AIC32X4_HPRROUTE (AIC32X4_PAGE1 + 13)
72#define AIC32X4_LOLROUTE (AIC32X4_PAGE1 + 14)
73#define AIC32X4_LORROUTE (AIC32X4_PAGE1 + 15)
74#define AIC32X4_HPLGAIN (AIC32X4_PAGE1 + 16)
75#define AIC32X4_HPRGAIN (AIC32X4_PAGE1 + 17)
76#define AIC32X4_LOLGAIN (AIC32X4_PAGE1 + 18)
77#define AIC32X4_LORGAIN (AIC32X4_PAGE1 + 19)
78#define AIC32X4_HEADSTART (AIC32X4_PAGE1 + 20)
79#define AIC32X4_MICBIAS (AIC32X4_PAGE1 + 51)
80#define AIC32X4_LMICPGAPIN (AIC32X4_PAGE1 + 52)
81#define AIC32X4_LMICPGANIN (AIC32X4_PAGE1 + 54)
82#define AIC32X4_RMICPGAPIN (AIC32X4_PAGE1 + 55)
83#define AIC32X4_RMICPGANIN (AIC32X4_PAGE1 + 57)
84#define AIC32X4_FLOATINGINPUT (AIC32X4_PAGE1 + 58)
85#define AIC32X4_LMICPGAVOL (AIC32X4_PAGE1 + 59)
86#define AIC32X4_RMICPGAVOL (AIC32X4_PAGE1 + 60)
87
88#define AIC32X4_FREQ_12000000 12000000
89#define AIC32X4_FREQ_24000000 24000000
90#define AIC32X4_FREQ_25000000 25000000
91
92#define AIC32X4_WORD_LEN_16BITS 0x00
93#define AIC32X4_WORD_LEN_20BITS 0x01
94#define AIC32X4_WORD_LEN_24BITS 0x02
95#define AIC32X4_WORD_LEN_32BITS 0x03
96
97#define AIC32X4_LADC_EN (1 << 7)
98#define AIC32X4_RADC_EN (1 << 6)
99
100#define AIC32X4_I2S_MODE 0x00
101#define AIC32X4_DSP_MODE 0x01
102#define AIC32X4_RIGHT_JUSTIFIED_MODE 0x02
103#define AIC32X4_LEFT_JUSTIFIED_MODE 0x03
104
105#define AIC32X4_AVDDWEAKDISABLE 0x08
106#define AIC32X4_LDOCTLEN 0x01
107
108#define AIC32X4_LDOIN_18_36 0x01
109#define AIC32X4_LDOIN2HP 0x02
110
111#define AIC32X4_DACSPBLOCK_MASK 0x1f
112#define AIC32X4_ADCSPBLOCK_MASK 0x1f
113
114#define AIC32X4_PLLJ_SHIFT 6
115#define AIC32X4_DOSRMSB_SHIFT 4
116
117#define AIC32X4_PLLCLKIN 0x03
118
119#define AIC32X4_MICBIAS_LDOIN 0x08
120#define AIC32X4_MICBIAS_2075V 0x60
121
122#define AIC32X4_LMICPGANIN_IN2R_10K 0x10
123#define AIC32X4_LMICPGANIN_CM1L_10K 0x40
124#define AIC32X4_RMICPGANIN_IN1L_10K 0x10
125#define AIC32X4_RMICPGANIN_CM1R_10K 0x40
126
127#define AIC32X4_LMICPGAVOL_NOGAIN 0x80
128#define AIC32X4_RMICPGAVOL_NOGAIN 0x80
129
130#define AIC32X4_BCLKMASTER 0x08
131#define AIC32X4_WCLKMASTER 0x04
132#define AIC32X4_PLLEN (0x01 << 7)
133#define AIC32X4_NDACEN (0x01 << 7)
134#define AIC32X4_MDACEN (0x01 << 7)
135#define AIC32X4_NADCEN (0x01 << 7)
136#define AIC32X4_MADCEN (0x01 << 7)
137#define AIC32X4_BCLKEN (0x01 << 7)
138#define AIC32X4_DACEN (0x03 << 6)
139#define AIC32X4_RDAC2LCHN (0x02 << 2)
140#define AIC32X4_LDAC2RCHN (0x02 << 4)
141#define AIC32X4_LDAC2LCHN (0x01 << 4)
142#define AIC32X4_RDAC2RCHN (0x01 << 2)
143#define AIC32X4_DAC_CHAN_MASK 0x3c
144
145#define AIC32X4_SSTEP2WCLK 0x01
146#define AIC32X4_MUTEON 0x0C
147#define AIC32X4_DACMOD2BCLK 0x01
148
149#endif /* _TLV320AIC32X4_H */