1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
 
 
 
 
 
 
 
 
 
 4 */
 5
 6#ifndef _DMA_H_
 7#define _DMA_H_
 8
 9#include <linux/dmaengine.h>
10
11/* maximum data transfer block size between BAM and CE */
12#define QCE_BAM_BURST_SIZE		64
13
14#define QCE_AUTHIV_REGS_CNT		16
15#define QCE_AUTH_BYTECOUNT_REGS_CNT	4
16#define QCE_CNTRIV_REGS_CNT		4
17
18struct qce_result_dump {
19	u32 auth_iv[QCE_AUTHIV_REGS_CNT];
20	u32 auth_byte_count[QCE_AUTH_BYTECOUNT_REGS_CNT];
21	u32 encr_cntr_iv[QCE_CNTRIV_REGS_CNT];
22	u32 status;
23	u32 status2;
24};
25
26#define QCE_IGNORE_BUF_SZ	(2 * QCE_BAM_BURST_SIZE)
27#define QCE_RESULT_BUF_SZ	\
28		ALIGN(sizeof(struct qce_result_dump), QCE_BAM_BURST_SIZE)
29
30struct qce_dma_data {
31	struct dma_chan *txchan;
32	struct dma_chan *rxchan;
33	struct qce_result_dump *result_buf;
34	void *ignore_buf;
35};
36
37int qce_dma_request(struct device *dev, struct qce_dma_data *dma);
38void qce_dma_release(struct qce_dma_data *dma);
39int qce_dma_prep_sgs(struct qce_dma_data *dma, struct scatterlist *sg_in,
40		     int in_ents, struct scatterlist *sg_out, int out_ents,
41		     dma_async_tx_callback cb, void *cb_param);
42void qce_dma_issue_pending(struct qce_dma_data *dma);
43int qce_dma_terminate_all(struct qce_dma_data *dma);
44struct scatterlist *
45qce_sgtable_add(struct sg_table *sgt, struct scatterlist *sg_add,
46		unsigned int max_len);
47
48#endif /* _DMA_H_ */

 
 1/*
 2 * Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License version 2 and
 6 * only version 2 as published by the Free Software Foundation.
 7 *
 8 * This program is distributed in the hope that it will be useful,
 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DMA_H_
15#define _DMA_H_
16
17#include <linux/dmaengine.h>
18
19/* maximum data transfer block size between BAM and CE */
20#define QCE_BAM_BURST_SIZE		64
21
22#define QCE_AUTHIV_REGS_CNT		16
23#define QCE_AUTH_BYTECOUNT_REGS_CNT	4
24#define QCE_CNTRIV_REGS_CNT		4
25
26struct qce_result_dump {
27	u32 auth_iv[QCE_AUTHIV_REGS_CNT];
28	u32 auth_byte_count[QCE_AUTH_BYTECOUNT_REGS_CNT];
29	u32 encr_cntr_iv[QCE_CNTRIV_REGS_CNT];
30	u32 status;
31	u32 status2;
32};
33
34#define QCE_IGNORE_BUF_SZ	(2 * QCE_BAM_BURST_SIZE)
35#define QCE_RESULT_BUF_SZ	\
36		ALIGN(sizeof(struct qce_result_dump), QCE_BAM_BURST_SIZE)
37
38struct qce_dma_data {
39	struct dma_chan *txchan;
40	struct dma_chan *rxchan;
41	struct qce_result_dump *result_buf;
42	void *ignore_buf;
43};
44
45int qce_dma_request(struct device *dev, struct qce_dma_data *dma);
46void qce_dma_release(struct qce_dma_data *dma);
47int qce_dma_prep_sgs(struct qce_dma_data *dma, struct scatterlist *sg_in,
48		     int in_ents, struct scatterlist *sg_out, int out_ents,
49		     dma_async_tx_callback cb, void *cb_param);
50void qce_dma_issue_pending(struct qce_dma_data *dma);
51int qce_dma_terminate_all(struct qce_dma_data *dma);
52struct scatterlist *
53qce_sgtable_add(struct sg_table *sgt, struct scatterlist *sg_add);
 
54
55#endif /* _DMA_H_ */