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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This file is based on code from OCTEON SDK by Cavium Networks.
4 *
5 * Copyright (c) 2003-2007 Cavium Networks
6 */
7
8#include <linux/platform_device.h>
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/netdevice.h>
12#include <linux/etherdevice.h>
13#include <linux/phy.h>
14#include <linux/slab.h>
15#include <linux/interrupt.h>
16#include <linux/of_net.h>
17#include <linux/if_ether.h>
18#include <linux/if_vlan.h>
19
20#include <net/dst.h>
21
22#include "octeon-ethernet.h"
23#include "ethernet-defines.h"
24#include "ethernet-mem.h"
25#include "ethernet-rx.h"
26#include "ethernet-tx.h"
27#include "ethernet-mdio.h"
28#include "ethernet-util.h"
29
30#define OCTEON_MAX_MTU 65392
31
32static int num_packet_buffers = 1024;
33module_param(num_packet_buffers, int, 0444);
34MODULE_PARM_DESC(num_packet_buffers, "\n"
35 "\tNumber of packet buffers to allocate and store in the\n"
36 "\tFPA. By default, 1024 packet buffers are used.\n");
37
38static int pow_receive_group = 15;
39module_param(pow_receive_group, int, 0444);
40MODULE_PARM_DESC(pow_receive_group, "\n"
41 "\tPOW group to receive packets from. All ethernet hardware\n"
42 "\twill be configured to send incoming packets to this POW\n"
43 "\tgroup. Also any other software can submit packets to this\n"
44 "\tgroup for the kernel to process.");
45
46static int receive_group_order;
47module_param(receive_group_order, int, 0444);
48MODULE_PARM_DESC(receive_group_order, "\n"
49 "\tOrder (0..4) of receive groups to take into use. Ethernet hardware\n"
50 "\twill be configured to send incoming packets to multiple POW\n"
51 "\tgroups. pow_receive_group parameter is ignored when multiple\n"
52 "\tgroups are taken into use and groups are allocated starting\n"
53 "\tfrom 0. By default, a single group is used.\n");
54
55int pow_send_group = -1;
56module_param(pow_send_group, int, 0644);
57MODULE_PARM_DESC(pow_send_group, "\n"
58 "\tPOW group to send packets to other software on. This\n"
59 "\tcontrols the creation of the virtual device pow0.\n"
60 "\talways_use_pow also depends on this value.");
61
62int always_use_pow;
63module_param(always_use_pow, int, 0444);
64MODULE_PARM_DESC(always_use_pow, "\n"
65 "\tWhen set, always send to the pow group. This will cause\n"
66 "\tpackets sent to real ethernet devices to be sent to the\n"
67 "\tPOW group instead of the hardware. Unless some other\n"
68 "\tapplication changes the config, packets will still be\n"
69 "\treceived from the low level hardware. Use this option\n"
70 "\tto allow a CVMX app to intercept all packets from the\n"
71 "\tlinux kernel. You must specify pow_send_group along with\n"
72 "\tthis option.");
73
74char pow_send_list[128] = "";
75module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444);
76MODULE_PARM_DESC(pow_send_list, "\n"
77 "\tComma separated list of ethernet devices that should use the\n"
78 "\tPOW for transmit instead of the actual ethernet hardware. This\n"
79 "\tis a per port version of always_use_pow. always_use_pow takes\n"
80 "\tprecedence over this list. For example, setting this to\n"
81 "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n"
82 "\tusing the pow_send_group.");
83
84int rx_napi_weight = 32;
85module_param(rx_napi_weight, int, 0444);
86MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter.");
87
88/* Mask indicating which receive groups are in use. */
89int pow_receive_groups;
90
91/*
92 * cvm_oct_poll_queue_stopping - flag to indicate polling should stop.
93 *
94 * Set to one right before cvm_oct_poll_queue is destroyed.
95 */
96atomic_t cvm_oct_poll_queue_stopping = ATOMIC_INIT(0);
97
98/*
99 * Array of every ethernet device owned by this driver indexed by
100 * the ipd input port number.
101 */
102struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
103
104u64 cvm_oct_tx_poll_interval;
105
106static void cvm_oct_rx_refill_worker(struct work_struct *work);
107static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker);
108
109static void cvm_oct_rx_refill_worker(struct work_struct *work)
110{
111 /*
112 * FPA 0 may have been drained, try to refill it if we need
113 * more than num_packet_buffers / 2, otherwise normal receive
114 * processing will refill it. If it were drained, no packets
115 * could be received so cvm_oct_napi_poll would never be
116 * invoked to do the refill.
117 */
118 cvm_oct_rx_refill_pool(num_packet_buffers / 2);
119
120 if (!atomic_read(&cvm_oct_poll_queue_stopping))
121 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ);
122}
123
124static void cvm_oct_periodic_worker(struct work_struct *work)
125{
126 struct octeon_ethernet *priv = container_of(work,
127 struct octeon_ethernet,
128 port_periodic_work.work);
129
130 if (priv->poll)
131 priv->poll(cvm_oct_device[priv->port]);
132
133 cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats
134 (cvm_oct_device[priv->port]);
135
136 if (!atomic_read(&cvm_oct_poll_queue_stopping))
137 schedule_delayed_work(&priv->port_periodic_work, HZ);
138}
139
140static void cvm_oct_configure_common_hw(void)
141{
142 /* Setup the FPA */
143 cvmx_fpa_enable();
144 cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
145 num_packet_buffers);
146 cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
147 num_packet_buffers);
148 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
149 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
150 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 1024);
151
152#ifdef __LITTLE_ENDIAN
153 {
154 union cvmx_ipd_ctl_status ipd_ctl_status;
155
156 ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
157 ipd_ctl_status.s.pkt_lend = 1;
158 ipd_ctl_status.s.wqe_lend = 1;
159 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_status.u64);
160 }
161#endif
162
163 cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8);
164}
165
166/**
167 * cvm_oct_free_work- Free a work queue entry
168 *
169 * @work_queue_entry: Work queue entry to free
170 *
171 * Returns Zero on success, Negative on failure.
172 */
173int cvm_oct_free_work(void *work_queue_entry)
174{
175 struct cvmx_wqe *work = work_queue_entry;
176
177 int segments = work->word2.s.bufs;
178 union cvmx_buf_ptr segment_ptr = work->packet_ptr;
179
180 while (segments--) {
181 union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *)
182 cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
183 if (unlikely(!segment_ptr.s.i))
184 cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr),
185 segment_ptr.s.pool,
186 CVMX_FPA_PACKET_POOL_SIZE / 128);
187 segment_ptr = next_ptr;
188 }
189 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, 1);
190
191 return 0;
192}
193EXPORT_SYMBOL(cvm_oct_free_work);
194
195/**
196 * cvm_oct_common_get_stats - get the low level ethernet statistics
197 * @dev: Device to get the statistics from
198 *
199 * Returns Pointer to the statistics
200 */
201static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev)
202{
203 cvmx_pip_port_status_t rx_status;
204 cvmx_pko_port_status_t tx_status;
205 struct octeon_ethernet *priv = netdev_priv(dev);
206
207 if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
208 if (octeon_is_simulation()) {
209 /* The simulator doesn't support statistics */
210 memset(&rx_status, 0, sizeof(rx_status));
211 memset(&tx_status, 0, sizeof(tx_status));
212 } else {
213 cvmx_pip_get_port_status(priv->port, 1, &rx_status);
214 cvmx_pko_get_port_status(priv->port, 1, &tx_status);
215 }
216
217 dev->stats.rx_packets += rx_status.inb_packets;
218 dev->stats.tx_packets += tx_status.packets;
219 dev->stats.rx_bytes += rx_status.inb_octets;
220 dev->stats.tx_bytes += tx_status.octets;
221 dev->stats.multicast += rx_status.multicast_packets;
222 dev->stats.rx_crc_errors += rx_status.inb_errors;
223 dev->stats.rx_frame_errors += rx_status.fcs_align_err_packets;
224 dev->stats.rx_dropped += rx_status.dropped_packets;
225 }
226
227 return &dev->stats;
228}
229
230/**
231 * cvm_oct_common_change_mtu - change the link MTU
232 * @dev: Device to change
233 * @new_mtu: The new MTU
234 *
235 * Returns Zero on success
236 */
237static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu)
238{
239 struct octeon_ethernet *priv = netdev_priv(dev);
240 int interface = INTERFACE(priv->port);
241#if IS_ENABLED(CONFIG_VLAN_8021Q)
242 int vlan_bytes = VLAN_HLEN;
243#else
244 int vlan_bytes = 0;
245#endif
246 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN + vlan_bytes;
247
248 dev->mtu = new_mtu;
249
250 if ((interface < 2) &&
251 (cvmx_helper_interface_get_mode(interface) !=
252 CVMX_HELPER_INTERFACE_MODE_SPI)) {
253 int index = INDEX(priv->port);
254 /* Add ethernet header and FCS, and VLAN if configured. */
255 int max_packet = new_mtu + mtu_overhead;
256
257 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) ||
258 OCTEON_IS_MODEL(OCTEON_CN58XX)) {
259 /* Signal errors on packets larger than the MTU */
260 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface),
261 max_packet);
262 } else {
263 /*
264 * Set the hardware to truncate packets larger
265 * than the MTU and smaller the 64 bytes.
266 */
267 union cvmx_pip_frm_len_chkx frm_len_chk;
268
269 frm_len_chk.u64 = 0;
270 frm_len_chk.s.minlen = VLAN_ETH_ZLEN;
271 frm_len_chk.s.maxlen = max_packet;
272 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface),
273 frm_len_chk.u64);
274 }
275 /*
276 * Set the hardware to truncate packets larger than
277 * the MTU. The jabber register must be set to a
278 * multiple of 8 bytes, so round up.
279 */
280 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface),
281 (max_packet + 7) & ~7u);
282 }
283 return 0;
284}
285
286/**
287 * cvm_oct_common_set_multicast_list - set the multicast list
288 * @dev: Device to work on
289 */
290static void cvm_oct_common_set_multicast_list(struct net_device *dev)
291{
292 union cvmx_gmxx_prtx_cfg gmx_cfg;
293 struct octeon_ethernet *priv = netdev_priv(dev);
294 int interface = INTERFACE(priv->port);
295
296 if ((interface < 2) &&
297 (cvmx_helper_interface_get_mode(interface) !=
298 CVMX_HELPER_INTERFACE_MODE_SPI)) {
299 union cvmx_gmxx_rxx_adr_ctl control;
300 int index = INDEX(priv->port);
301
302 control.u64 = 0;
303 control.s.bcst = 1; /* Allow broadcast MAC addresses */
304
305 if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI) ||
306 (dev->flags & IFF_PROMISC))
307 /* Force accept multicast packets */
308 control.s.mcst = 2;
309 else
310 /* Force reject multicast packets */
311 control.s.mcst = 1;
312
313 if (dev->flags & IFF_PROMISC)
314 /*
315 * Reject matches if promisc. Since CAM is
316 * shut off, should accept everything.
317 */
318 control.s.cam_mode = 0;
319 else
320 /* Filter packets based on the CAM */
321 control.s.cam_mode = 1;
322
323 gmx_cfg.u64 =
324 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
325 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
326 gmx_cfg.u64 & ~1ull);
327
328 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface),
329 control.u64);
330 if (dev->flags & IFF_PROMISC)
331 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
332 (index, interface), 0);
333 else
334 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
335 (index, interface), 1);
336
337 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
338 gmx_cfg.u64);
339 }
340}
341
342static int cvm_oct_set_mac_filter(struct net_device *dev)
343{
344 struct octeon_ethernet *priv = netdev_priv(dev);
345 union cvmx_gmxx_prtx_cfg gmx_cfg;
346 int interface = INTERFACE(priv->port);
347
348 if ((interface < 2) &&
349 (cvmx_helper_interface_get_mode(interface) !=
350 CVMX_HELPER_INTERFACE_MODE_SPI)) {
351 int i;
352 u8 *ptr = dev->dev_addr;
353 u64 mac = 0;
354 int index = INDEX(priv->port);
355
356 for (i = 0; i < 6; i++)
357 mac = (mac << 8) | (u64)ptr[i];
358
359 gmx_cfg.u64 =
360 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
361 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
362 gmx_cfg.u64 & ~1ull);
363
364 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
365 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface),
366 ptr[0]);
367 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface),
368 ptr[1]);
369 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface),
370 ptr[2]);
371 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface),
372 ptr[3]);
373 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface),
374 ptr[4]);
375 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface),
376 ptr[5]);
377 cvm_oct_common_set_multicast_list(dev);
378 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
379 gmx_cfg.u64);
380 }
381 return 0;
382}
383
384/**
385 * cvm_oct_common_set_mac_address - set the hardware MAC address for a device
386 * @dev: The device in question.
387 * @addr: Socket address.
388 *
389 * Returns Zero on success
390 */
391static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr)
392{
393 int r = eth_mac_addr(dev, addr);
394
395 if (r)
396 return r;
397 return cvm_oct_set_mac_filter(dev);
398}
399
400/**
401 * cvm_oct_common_init - per network device initialization
402 * @dev: Device to initialize
403 *
404 * Returns Zero on success
405 */
406int cvm_oct_common_init(struct net_device *dev)
407{
408 struct octeon_ethernet *priv = netdev_priv(dev);
409 const u8 *mac = NULL;
410
411 if (priv->of_node)
412 mac = of_get_mac_address(priv->of_node);
413
414 if (!IS_ERR_OR_NULL(mac))
415 ether_addr_copy(dev->dev_addr, mac);
416 else
417 eth_hw_addr_random(dev);
418
419 /*
420 * Force the interface to use the POW send if always_use_pow
421 * was specified or it is in the pow send list.
422 */
423 if ((pow_send_group != -1) &&
424 (always_use_pow || strstr(pow_send_list, dev->name)))
425 priv->queue = -1;
426
427 if (priv->queue != -1)
428 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
429
430 /* We do our own locking, Linux doesn't need to */
431 dev->features |= NETIF_F_LLTX;
432 dev->ethtool_ops = &cvm_oct_ethtool_ops;
433
434 cvm_oct_set_mac_filter(dev);
435 dev_set_mtu(dev, dev->mtu);
436
437 /*
438 * Zero out stats for port so we won't mistakenly show
439 * counters from the bootloader.
440 */
441 memset(dev->netdev_ops->ndo_get_stats(dev), 0,
442 sizeof(struct net_device_stats));
443
444 if (dev->netdev_ops->ndo_stop)
445 dev->netdev_ops->ndo_stop(dev);
446
447 return 0;
448}
449
450void cvm_oct_common_uninit(struct net_device *dev)
451{
452 if (dev->phydev)
453 phy_disconnect(dev->phydev);
454}
455
456int cvm_oct_common_open(struct net_device *dev,
457 void (*link_poll)(struct net_device *))
458{
459 union cvmx_gmxx_prtx_cfg gmx_cfg;
460 struct octeon_ethernet *priv = netdev_priv(dev);
461 int interface = INTERFACE(priv->port);
462 int index = INDEX(priv->port);
463 union cvmx_helper_link_info link_info;
464 int rv;
465
466 rv = cvm_oct_phy_setup_device(dev);
467 if (rv)
468 return rv;
469
470 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
471 gmx_cfg.s.en = 1;
472 if (octeon_has_feature(OCTEON_FEATURE_PKND))
473 gmx_cfg.s.pknd = priv->port;
474 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
475
476 if (octeon_is_simulation())
477 return 0;
478
479 if (dev->phydev) {
480 int r = phy_read_status(dev->phydev);
481
482 if (r == 0 && dev->phydev->link == 0)
483 netif_carrier_off(dev);
484 cvm_oct_adjust_link(dev);
485 } else {
486 link_info = cvmx_helper_link_get(priv->port);
487 if (!link_info.s.link_up)
488 netif_carrier_off(dev);
489 priv->poll = link_poll;
490 link_poll(dev);
491 }
492
493 return 0;
494}
495
496void cvm_oct_link_poll(struct net_device *dev)
497{
498 struct octeon_ethernet *priv = netdev_priv(dev);
499 union cvmx_helper_link_info link_info;
500
501 link_info = cvmx_helper_link_get(priv->port);
502 if (link_info.u64 == priv->link_info)
503 return;
504
505 if (cvmx_helper_link_set(priv->port, link_info))
506 link_info.u64 = priv->link_info;
507 else
508 priv->link_info = link_info.u64;
509
510 if (link_info.s.link_up) {
511 if (!netif_carrier_ok(dev))
512 netif_carrier_on(dev);
513 } else if (netif_carrier_ok(dev)) {
514 netif_carrier_off(dev);
515 }
516 cvm_oct_note_carrier(priv, link_info);
517}
518
519static int cvm_oct_xaui_open(struct net_device *dev)
520{
521 return cvm_oct_common_open(dev, cvm_oct_link_poll);
522}
523
524static const struct net_device_ops cvm_oct_npi_netdev_ops = {
525 .ndo_init = cvm_oct_common_init,
526 .ndo_uninit = cvm_oct_common_uninit,
527 .ndo_start_xmit = cvm_oct_xmit,
528 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
529 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
530 .ndo_do_ioctl = cvm_oct_ioctl,
531 .ndo_change_mtu = cvm_oct_common_change_mtu,
532 .ndo_get_stats = cvm_oct_common_get_stats,
533#ifdef CONFIG_NET_POLL_CONTROLLER
534 .ndo_poll_controller = cvm_oct_poll_controller,
535#endif
536};
537
538static const struct net_device_ops cvm_oct_xaui_netdev_ops = {
539 .ndo_init = cvm_oct_common_init,
540 .ndo_uninit = cvm_oct_common_uninit,
541 .ndo_open = cvm_oct_xaui_open,
542 .ndo_stop = cvm_oct_common_stop,
543 .ndo_start_xmit = cvm_oct_xmit,
544 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
545 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
546 .ndo_do_ioctl = cvm_oct_ioctl,
547 .ndo_change_mtu = cvm_oct_common_change_mtu,
548 .ndo_get_stats = cvm_oct_common_get_stats,
549#ifdef CONFIG_NET_POLL_CONTROLLER
550 .ndo_poll_controller = cvm_oct_poll_controller,
551#endif
552};
553
554static const struct net_device_ops cvm_oct_sgmii_netdev_ops = {
555 .ndo_init = cvm_oct_sgmii_init,
556 .ndo_uninit = cvm_oct_common_uninit,
557 .ndo_open = cvm_oct_sgmii_open,
558 .ndo_stop = cvm_oct_common_stop,
559 .ndo_start_xmit = cvm_oct_xmit,
560 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
561 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
562 .ndo_do_ioctl = cvm_oct_ioctl,
563 .ndo_change_mtu = cvm_oct_common_change_mtu,
564 .ndo_get_stats = cvm_oct_common_get_stats,
565#ifdef CONFIG_NET_POLL_CONTROLLER
566 .ndo_poll_controller = cvm_oct_poll_controller,
567#endif
568};
569
570static const struct net_device_ops cvm_oct_spi_netdev_ops = {
571 .ndo_init = cvm_oct_spi_init,
572 .ndo_uninit = cvm_oct_spi_uninit,
573 .ndo_start_xmit = cvm_oct_xmit,
574 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
575 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
576 .ndo_do_ioctl = cvm_oct_ioctl,
577 .ndo_change_mtu = cvm_oct_common_change_mtu,
578 .ndo_get_stats = cvm_oct_common_get_stats,
579#ifdef CONFIG_NET_POLL_CONTROLLER
580 .ndo_poll_controller = cvm_oct_poll_controller,
581#endif
582};
583
584static const struct net_device_ops cvm_oct_rgmii_netdev_ops = {
585 .ndo_init = cvm_oct_common_init,
586 .ndo_uninit = cvm_oct_common_uninit,
587 .ndo_open = cvm_oct_rgmii_open,
588 .ndo_stop = cvm_oct_common_stop,
589 .ndo_start_xmit = cvm_oct_xmit,
590 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
591 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
592 .ndo_do_ioctl = cvm_oct_ioctl,
593 .ndo_change_mtu = cvm_oct_common_change_mtu,
594 .ndo_get_stats = cvm_oct_common_get_stats,
595#ifdef CONFIG_NET_POLL_CONTROLLER
596 .ndo_poll_controller = cvm_oct_poll_controller,
597#endif
598};
599
600static const struct net_device_ops cvm_oct_pow_netdev_ops = {
601 .ndo_init = cvm_oct_common_init,
602 .ndo_start_xmit = cvm_oct_xmit_pow,
603 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
604 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
605 .ndo_do_ioctl = cvm_oct_ioctl,
606 .ndo_change_mtu = cvm_oct_common_change_mtu,
607 .ndo_get_stats = cvm_oct_common_get_stats,
608#ifdef CONFIG_NET_POLL_CONTROLLER
609 .ndo_poll_controller = cvm_oct_poll_controller,
610#endif
611};
612
613static struct device_node *cvm_oct_of_get_child
614 (const struct device_node *parent, int reg_val)
615{
616 struct device_node *node = NULL;
617 int size;
618 const __be32 *addr;
619
620 for (;;) {
621 node = of_get_next_child(parent, node);
622 if (!node)
623 break;
624 addr = of_get_property(node, "reg", &size);
625 if (addr && (be32_to_cpu(*addr) == reg_val))
626 break;
627 }
628 return node;
629}
630
631static struct device_node *cvm_oct_node_for_port(struct device_node *pip,
632 int interface, int port)
633{
634 struct device_node *ni, *np;
635
636 ni = cvm_oct_of_get_child(pip, interface);
637 if (!ni)
638 return NULL;
639
640 np = cvm_oct_of_get_child(ni, port);
641 of_node_put(ni);
642
643 return np;
644}
645
646static void cvm_set_rgmii_delay(struct octeon_ethernet *priv, int iface,
647 int port)
648{
649 struct device_node *np = priv->of_node;
650 u32 delay_value;
651 bool rx_delay;
652 bool tx_delay;
653
654 /* By default, both RX/TX delay is enabled in
655 * __cvmx_helper_rgmii_enable().
656 */
657 rx_delay = true;
658 tx_delay = true;
659
660 if (!of_property_read_u32(np, "rx-delay", &delay_value)) {
661 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value);
662 rx_delay = delay_value > 0;
663 }
664 if (!of_property_read_u32(np, "tx-delay", &delay_value)) {
665 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value);
666 tx_delay = delay_value > 0;
667 }
668
669 if (!rx_delay && !tx_delay)
670 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_ID;
671 else if (!rx_delay)
672 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_RXID;
673 else if (!tx_delay)
674 priv->phy_mode = PHY_INTERFACE_MODE_RGMII_TXID;
675 else
676 priv->phy_mode = PHY_INTERFACE_MODE_RGMII;
677}
678
679static int cvm_oct_probe(struct platform_device *pdev)
680{
681 int num_interfaces;
682 int interface;
683 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
684 int qos;
685 struct device_node *pip;
686 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN;
687
688#if IS_ENABLED(CONFIG_VLAN_8021Q)
689 mtu_overhead += VLAN_HLEN;
690#endif
691
692 pip = pdev->dev.of_node;
693 if (!pip) {
694 pr_err("Error: No 'pip' in /aliases\n");
695 return -EINVAL;
696 }
697
698 cvm_oct_configure_common_hw();
699
700 cvmx_helper_initialize_packet_io_global();
701
702 if (receive_group_order) {
703 if (receive_group_order > 4)
704 receive_group_order = 4;
705 pow_receive_groups = (1 << (1 << receive_group_order)) - 1;
706 } else {
707 pow_receive_groups = BIT(pow_receive_group);
708 }
709
710 /* Change the input group for all ports before input is enabled */
711 num_interfaces = cvmx_helper_get_number_of_interfaces();
712 for (interface = 0; interface < num_interfaces; interface++) {
713 int num_ports = cvmx_helper_ports_on_interface(interface);
714 int port;
715
716 for (port = cvmx_helper_get_ipd_port(interface, 0);
717 port < cvmx_helper_get_ipd_port(interface, num_ports);
718 port++) {
719 union cvmx_pip_prt_tagx pip_prt_tagx;
720
721 pip_prt_tagx.u64 =
722 cvmx_read_csr(CVMX_PIP_PRT_TAGX(port));
723
724 if (receive_group_order) {
725 int tag_mask;
726
727 /* We support only 16 groups at the moment, so
728 * always disable the two additional "hidden"
729 * tag_mask bits on CN68XX.
730 */
731 if (OCTEON_IS_MODEL(OCTEON_CN68XX))
732 pip_prt_tagx.u64 |= 0x3ull << 44;
733
734 tag_mask = ~((1 << receive_group_order) - 1);
735 pip_prt_tagx.s.grptagbase = 0;
736 pip_prt_tagx.s.grptagmask = tag_mask;
737 pip_prt_tagx.s.grptag = 1;
738 pip_prt_tagx.s.tag_mode = 0;
739 pip_prt_tagx.s.inc_prt_flag = 1;
740 pip_prt_tagx.s.ip6_dprt_flag = 1;
741 pip_prt_tagx.s.ip4_dprt_flag = 1;
742 pip_prt_tagx.s.ip6_sprt_flag = 1;
743 pip_prt_tagx.s.ip4_sprt_flag = 1;
744 pip_prt_tagx.s.ip6_dst_flag = 1;
745 pip_prt_tagx.s.ip4_dst_flag = 1;
746 pip_prt_tagx.s.ip6_src_flag = 1;
747 pip_prt_tagx.s.ip4_src_flag = 1;
748 pip_prt_tagx.s.grp = 0;
749 } else {
750 pip_prt_tagx.s.grptag = 0;
751 pip_prt_tagx.s.grp = pow_receive_group;
752 }
753
754 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port),
755 pip_prt_tagx.u64);
756 }
757 }
758
759 cvmx_helper_ipd_and_packet_input_enable();
760
761 memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
762
763 /*
764 * Initialize the FAU used for counting packet buffers that
765 * need to be freed.
766 */
767 cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
768
769 /* Initialize the FAU used for counting tx SKBs that need to be freed */
770 cvmx_fau_atomic_write32(FAU_TOTAL_TX_TO_CLEAN, 0);
771
772 if ((pow_send_group != -1)) {
773 struct net_device *dev;
774
775 dev = alloc_etherdev(sizeof(struct octeon_ethernet));
776 if (dev) {
777 /* Initialize the device private structure. */
778 struct octeon_ethernet *priv = netdev_priv(dev);
779
780 SET_NETDEV_DEV(dev, &pdev->dev);
781 dev->netdev_ops = &cvm_oct_pow_netdev_ops;
782 priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED;
783 priv->port = CVMX_PIP_NUM_INPUT_PORTS;
784 priv->queue = -1;
785 strscpy(dev->name, "pow%d", sizeof(dev->name));
786 for (qos = 0; qos < 16; qos++)
787 skb_queue_head_init(&priv->tx_free_list[qos]);
788 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead;
789 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead;
790
791 if (register_netdev(dev) < 0) {
792 pr_err("Failed to register ethernet device for POW\n");
793 free_netdev(dev);
794 } else {
795 cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev;
796 pr_info("%s: POW send group %d, receive group %d\n",
797 dev->name, pow_send_group,
798 pow_receive_group);
799 }
800 } else {
801 pr_err("Failed to allocate ethernet device for POW\n");
802 }
803 }
804
805 num_interfaces = cvmx_helper_get_number_of_interfaces();
806 for (interface = 0; interface < num_interfaces; interface++) {
807 cvmx_helper_interface_mode_t imode =
808 cvmx_helper_interface_get_mode(interface);
809 int num_ports = cvmx_helper_ports_on_interface(interface);
810 int port;
811 int port_index;
812
813 for (port_index = 0,
814 port = cvmx_helper_get_ipd_port(interface, 0);
815 port < cvmx_helper_get_ipd_port(interface, num_ports);
816 port_index++, port++) {
817 struct octeon_ethernet *priv;
818 struct net_device *dev =
819 alloc_etherdev(sizeof(struct octeon_ethernet));
820 if (!dev) {
821 pr_err("Failed to allocate ethernet device for port %d\n",
822 port);
823 continue;
824 }
825
826 /* Initialize the device private structure. */
827 SET_NETDEV_DEV(dev, &pdev->dev);
828 priv = netdev_priv(dev);
829 priv->netdev = dev;
830 priv->of_node = cvm_oct_node_for_port(pip, interface,
831 port_index);
832
833 INIT_DELAYED_WORK(&priv->port_periodic_work,
834 cvm_oct_periodic_worker);
835 priv->imode = imode;
836 priv->port = port;
837 priv->queue = cvmx_pko_get_base_queue(priv->port);
838 priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
839 priv->phy_mode = PHY_INTERFACE_MODE_NA;
840 for (qos = 0; qos < 16; qos++)
841 skb_queue_head_init(&priv->tx_free_list[qos]);
842 for (qos = 0; qos < cvmx_pko_get_num_queues(port);
843 qos++)
844 cvmx_fau_atomic_write32(priv->fau + qos * 4, 0);
845 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead;
846 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead;
847
848 switch (priv->imode) {
849 /* These types don't support ports to IPD/PKO */
850 case CVMX_HELPER_INTERFACE_MODE_DISABLED:
851 case CVMX_HELPER_INTERFACE_MODE_PCIE:
852 case CVMX_HELPER_INTERFACE_MODE_PICMG:
853 break;
854
855 case CVMX_HELPER_INTERFACE_MODE_NPI:
856 dev->netdev_ops = &cvm_oct_npi_netdev_ops;
857 strscpy(dev->name, "npi%d", sizeof(dev->name));
858 break;
859
860 case CVMX_HELPER_INTERFACE_MODE_XAUI:
861 dev->netdev_ops = &cvm_oct_xaui_netdev_ops;
862 strscpy(dev->name, "xaui%d", sizeof(dev->name));
863 break;
864
865 case CVMX_HELPER_INTERFACE_MODE_LOOP:
866 dev->netdev_ops = &cvm_oct_npi_netdev_ops;
867 strscpy(dev->name, "loop%d", sizeof(dev->name));
868 break;
869
870 case CVMX_HELPER_INTERFACE_MODE_SGMII:
871 priv->phy_mode = PHY_INTERFACE_MODE_SGMII;
872 dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
873 strscpy(dev->name, "eth%d", sizeof(dev->name));
874 break;
875
876 case CVMX_HELPER_INTERFACE_MODE_SPI:
877 dev->netdev_ops = &cvm_oct_spi_netdev_ops;
878 strscpy(dev->name, "spi%d", sizeof(dev->name));
879 break;
880
881 case CVMX_HELPER_INTERFACE_MODE_GMII:
882 priv->phy_mode = PHY_INTERFACE_MODE_GMII;
883 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops;
884 strscpy(dev->name, "eth%d", sizeof(dev->name));
885 break;
886
887 case CVMX_HELPER_INTERFACE_MODE_RGMII:
888 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops;
889 strscpy(dev->name, "eth%d", sizeof(dev->name));
890 cvm_set_rgmii_delay(priv, interface,
891 port_index);
892 break;
893 }
894
895 if (!dev->netdev_ops) {
896 free_netdev(dev);
897 } else if (register_netdev(dev) < 0) {
898 pr_err("Failed to register ethernet device for interface %d, port %d\n",
899 interface, priv->port);
900 free_netdev(dev);
901 } else {
902 cvm_oct_device[priv->port] = dev;
903 fau -=
904 cvmx_pko_get_num_queues(priv->port) *
905 sizeof(u32);
906 schedule_delayed_work(&priv->port_periodic_work,
907 HZ);
908 }
909 }
910 }
911
912 cvm_oct_tx_initialize();
913 cvm_oct_rx_initialize();
914
915 /*
916 * 150 uS: about 10 1500-byte packets at 1GE.
917 */
918 cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000);
919
920 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ);
921
922 return 0;
923}
924
925static int cvm_oct_remove(struct platform_device *pdev)
926{
927 int port;
928
929 cvmx_ipd_disable();
930
931 atomic_inc_return(&cvm_oct_poll_queue_stopping);
932 cancel_delayed_work_sync(&cvm_oct_rx_refill_work);
933
934 cvm_oct_rx_shutdown();
935 cvm_oct_tx_shutdown();
936
937 cvmx_pko_disable();
938
939 /* Free the ethernet devices */
940 for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
941 if (cvm_oct_device[port]) {
942 struct net_device *dev = cvm_oct_device[port];
943 struct octeon_ethernet *priv = netdev_priv(dev);
944
945 cancel_delayed_work_sync(&priv->port_periodic_work);
946
947 cvm_oct_tx_shutdown_dev(dev);
948 unregister_netdev(dev);
949 free_netdev(dev);
950 cvm_oct_device[port] = NULL;
951 }
952 }
953
954 cvmx_pko_shutdown();
955
956 cvmx_ipd_free_ptr();
957
958 /* Free the HW pools */
959 cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
960 num_packet_buffers);
961 cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
962 num_packet_buffers);
963 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
964 cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
965 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
966 return 0;
967}
968
969static const struct of_device_id cvm_oct_match[] = {
970 {
971 .compatible = "cavium,octeon-3860-pip",
972 },
973 {},
974};
975MODULE_DEVICE_TABLE(of, cvm_oct_match);
976
977static struct platform_driver cvm_oct_driver = {
978 .probe = cvm_oct_probe,
979 .remove = cvm_oct_remove,
980 .driver = {
981 .name = KBUILD_MODNAME,
982 .of_match_table = cvm_oct_match,
983 },
984};
985
986module_platform_driver(cvm_oct_driver);
987
988MODULE_SOFTDEP("pre: mdio-cavium");
989MODULE_LICENSE("GPL");
990MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
991MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This file is based on code from OCTEON SDK by Cavium Networks.
4 *
5 * Copyright (c) 2003-2007 Cavium Networks
6 */
7
8#include <linux/platform_device.h>
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/netdevice.h>
12#include <linux/etherdevice.h>
13#include <linux/phy.h>
14#include <linux/slab.h>
15#include <linux/interrupt.h>
16#include <linux/of_net.h>
17#include <linux/if_ether.h>
18#include <linux/if_vlan.h>
19
20#include <net/dst.h>
21
22#include <asm/octeon/octeon.h>
23
24#include "ethernet-defines.h"
25#include "octeon-ethernet.h"
26#include "ethernet-mem.h"
27#include "ethernet-rx.h"
28#include "ethernet-tx.h"
29#include "ethernet-mdio.h"
30#include "ethernet-util.h"
31
32#include <asm/octeon/cvmx-pip.h>
33#include <asm/octeon/cvmx-pko.h>
34#include <asm/octeon/cvmx-fau.h>
35#include <asm/octeon/cvmx-ipd.h>
36#include <asm/octeon/cvmx-helper.h>
37#include <asm/octeon/cvmx-asxx-defs.h>
38#include <asm/octeon/cvmx-gmxx-defs.h>
39#include <asm/octeon/cvmx-smix-defs.h>
40
41#define OCTEON_MAX_MTU 65392
42
43static int num_packet_buffers = 1024;
44module_param(num_packet_buffers, int, 0444);
45MODULE_PARM_DESC(num_packet_buffers, "\n"
46 "\tNumber of packet buffers to allocate and store in the\n"
47 "\tFPA. By default, 1024 packet buffers are used.\n");
48
49static int pow_receive_group = 15;
50module_param(pow_receive_group, int, 0444);
51MODULE_PARM_DESC(pow_receive_group, "\n"
52 "\tPOW group to receive packets from. All ethernet hardware\n"
53 "\twill be configured to send incoming packets to this POW\n"
54 "\tgroup. Also any other software can submit packets to this\n"
55 "\tgroup for the kernel to process.");
56
57static int receive_group_order;
58module_param(receive_group_order, int, 0444);
59MODULE_PARM_DESC(receive_group_order, "\n"
60 "\tOrder (0..4) of receive groups to take into use. Ethernet hardware\n"
61 "\twill be configured to send incoming packets to multiple POW\n"
62 "\tgroups. pow_receive_group parameter is ignored when multiple\n"
63 "\tgroups are taken into use and groups are allocated starting\n"
64 "\tfrom 0. By default, a single group is used.\n");
65
66int pow_send_group = -1;
67module_param(pow_send_group, int, 0644);
68MODULE_PARM_DESC(pow_send_group, "\n"
69 "\tPOW group to send packets to other software on. This\n"
70 "\tcontrols the creation of the virtual device pow0.\n"
71 "\talways_use_pow also depends on this value.");
72
73int always_use_pow;
74module_param(always_use_pow, int, 0444);
75MODULE_PARM_DESC(always_use_pow, "\n"
76 "\tWhen set, always send to the pow group. This will cause\n"
77 "\tpackets sent to real ethernet devices to be sent to the\n"
78 "\tPOW group instead of the hardware. Unless some other\n"
79 "\tapplication changes the config, packets will still be\n"
80 "\treceived from the low level hardware. Use this option\n"
81 "\tto allow a CVMX app to intercept all packets from the\n"
82 "\tlinux kernel. You must specify pow_send_group along with\n"
83 "\tthis option.");
84
85char pow_send_list[128] = "";
86module_param_string(pow_send_list, pow_send_list, sizeof(pow_send_list), 0444);
87MODULE_PARM_DESC(pow_send_list, "\n"
88 "\tComma separated list of ethernet devices that should use the\n"
89 "\tPOW for transmit instead of the actual ethernet hardware. This\n"
90 "\tis a per port version of always_use_pow. always_use_pow takes\n"
91 "\tprecedence over this list. For example, setting this to\n"
92 "\t\"eth2,spi3,spi7\" would cause these three devices to transmit\n"
93 "\tusing the pow_send_group.");
94
95int rx_napi_weight = 32;
96module_param(rx_napi_weight, int, 0444);
97MODULE_PARM_DESC(rx_napi_weight, "The NAPI WEIGHT parameter.");
98
99/* Mask indicating which receive groups are in use. */
100int pow_receive_groups;
101
102/*
103 * cvm_oct_poll_queue_stopping - flag to indicate polling should stop.
104 *
105 * Set to one right before cvm_oct_poll_queue is destroyed.
106 */
107atomic_t cvm_oct_poll_queue_stopping = ATOMIC_INIT(0);
108
109/*
110 * Array of every ethernet device owned by this driver indexed by
111 * the ipd input port number.
112 */
113struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
114
115u64 cvm_oct_tx_poll_interval;
116
117static void cvm_oct_rx_refill_worker(struct work_struct *work);
118static DECLARE_DELAYED_WORK(cvm_oct_rx_refill_work, cvm_oct_rx_refill_worker);
119
120static void cvm_oct_rx_refill_worker(struct work_struct *work)
121{
122 /*
123 * FPA 0 may have been drained, try to refill it if we need
124 * more than num_packet_buffers / 2, otherwise normal receive
125 * processing will refill it. If it were drained, no packets
126 * could be received so cvm_oct_napi_poll would never be
127 * invoked to do the refill.
128 */
129 cvm_oct_rx_refill_pool(num_packet_buffers / 2);
130
131 if (!atomic_read(&cvm_oct_poll_queue_stopping))
132 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ);
133}
134
135static void cvm_oct_periodic_worker(struct work_struct *work)
136{
137 struct octeon_ethernet *priv = container_of(work,
138 struct octeon_ethernet,
139 port_periodic_work.work);
140
141 if (priv->poll)
142 priv->poll(cvm_oct_device[priv->port]);
143
144 cvm_oct_device[priv->port]->netdev_ops->ndo_get_stats(
145 cvm_oct_device[priv->port]);
146
147 if (!atomic_read(&cvm_oct_poll_queue_stopping))
148 schedule_delayed_work(&priv->port_periodic_work, HZ);
149}
150
151static void cvm_oct_configure_common_hw(void)
152{
153 /* Setup the FPA */
154 cvmx_fpa_enable();
155 cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
156 num_packet_buffers);
157 cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
158 num_packet_buffers);
159 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
160 cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
161 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 1024);
162
163#ifdef __LITTLE_ENDIAN
164 {
165 union cvmx_ipd_ctl_status ipd_ctl_status;
166
167 ipd_ctl_status.u64 = cvmx_read_csr(CVMX_IPD_CTL_STATUS);
168 ipd_ctl_status.s.pkt_lend = 1;
169 ipd_ctl_status.s.wqe_lend = 1;
170 cvmx_write_csr(CVMX_IPD_CTL_STATUS, ipd_ctl_status.u64);
171 }
172#endif
173
174 cvmx_helper_setup_red(num_packet_buffers / 4, num_packet_buffers / 8);
175}
176
177/**
178 * cvm_oct_free_work- Free a work queue entry
179 *
180 * @work_queue_entry: Work queue entry to free
181 *
182 * Returns Zero on success, Negative on failure.
183 */
184int cvm_oct_free_work(void *work_queue_entry)
185{
186 cvmx_wqe_t *work = work_queue_entry;
187
188 int segments = work->word2.s.bufs;
189 union cvmx_buf_ptr segment_ptr = work->packet_ptr;
190
191 while (segments--) {
192 union cvmx_buf_ptr next_ptr = *(union cvmx_buf_ptr *)
193 cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
194 if (unlikely(!segment_ptr.s.i))
195 cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr),
196 segment_ptr.s.pool,
197 CVMX_FPA_PACKET_POOL_SIZE / 128);
198 segment_ptr = next_ptr;
199 }
200 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, 1);
201
202 return 0;
203}
204EXPORT_SYMBOL(cvm_oct_free_work);
205
206/**
207 * cvm_oct_common_get_stats - get the low level ethernet statistics
208 * @dev: Device to get the statistics from
209 *
210 * Returns Pointer to the statistics
211 */
212static struct net_device_stats *cvm_oct_common_get_stats(struct net_device *dev)
213{
214 cvmx_pip_port_status_t rx_status;
215 cvmx_pko_port_status_t tx_status;
216 struct octeon_ethernet *priv = netdev_priv(dev);
217
218 if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
219 if (octeon_is_simulation()) {
220 /* The simulator doesn't support statistics */
221 memset(&rx_status, 0, sizeof(rx_status));
222 memset(&tx_status, 0, sizeof(tx_status));
223 } else {
224 cvmx_pip_get_port_status(priv->port, 1, &rx_status);
225 cvmx_pko_get_port_status(priv->port, 1, &tx_status);
226 }
227
228 dev->stats.rx_packets += rx_status.inb_packets;
229 dev->stats.tx_packets += tx_status.packets;
230 dev->stats.rx_bytes += rx_status.inb_octets;
231 dev->stats.tx_bytes += tx_status.octets;
232 dev->stats.multicast += rx_status.multicast_packets;
233 dev->stats.rx_crc_errors += rx_status.inb_errors;
234 dev->stats.rx_frame_errors += rx_status.fcs_align_err_packets;
235 dev->stats.rx_dropped += rx_status.dropped_packets;
236 }
237
238 return &dev->stats;
239}
240
241/**
242 * cvm_oct_common_change_mtu - change the link MTU
243 * @dev: Device to change
244 * @new_mtu: The new MTU
245 *
246 * Returns Zero on success
247 */
248static int cvm_oct_common_change_mtu(struct net_device *dev, int new_mtu)
249{
250 struct octeon_ethernet *priv = netdev_priv(dev);
251 int interface = INTERFACE(priv->port);
252#if IS_ENABLED(CONFIG_VLAN_8021Q)
253 int vlan_bytes = VLAN_HLEN;
254#else
255 int vlan_bytes = 0;
256#endif
257 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN + vlan_bytes;
258
259 dev->mtu = new_mtu;
260
261 if ((interface < 2) &&
262 (cvmx_helper_interface_get_mode(interface) !=
263 CVMX_HELPER_INTERFACE_MODE_SPI)) {
264 int index = INDEX(priv->port);
265 /* Add ethernet header and FCS, and VLAN if configured. */
266 int max_packet = new_mtu + mtu_overhead;
267
268 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) ||
269 OCTEON_IS_MODEL(OCTEON_CN58XX)) {
270 /* Signal errors on packets larger than the MTU */
271 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface),
272 max_packet);
273 } else {
274 /*
275 * Set the hardware to truncate packets larger
276 * than the MTU and smaller the 64 bytes.
277 */
278 union cvmx_pip_frm_len_chkx frm_len_chk;
279
280 frm_len_chk.u64 = 0;
281 frm_len_chk.s.minlen = VLAN_ETH_ZLEN;
282 frm_len_chk.s.maxlen = max_packet;
283 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface),
284 frm_len_chk.u64);
285 }
286 /*
287 * Set the hardware to truncate packets larger than
288 * the MTU. The jabber register must be set to a
289 * multiple of 8 bytes, so round up.
290 */
291 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface),
292 (max_packet + 7) & ~7u);
293 }
294 return 0;
295}
296
297/**
298 * cvm_oct_common_set_multicast_list - set the multicast list
299 * @dev: Device to work on
300 */
301static void cvm_oct_common_set_multicast_list(struct net_device *dev)
302{
303 union cvmx_gmxx_prtx_cfg gmx_cfg;
304 struct octeon_ethernet *priv = netdev_priv(dev);
305 int interface = INTERFACE(priv->port);
306
307 if ((interface < 2) &&
308 (cvmx_helper_interface_get_mode(interface) !=
309 CVMX_HELPER_INTERFACE_MODE_SPI)) {
310 union cvmx_gmxx_rxx_adr_ctl control;
311 int index = INDEX(priv->port);
312
313 control.u64 = 0;
314 control.s.bcst = 1; /* Allow broadcast MAC addresses */
315
316 if (!netdev_mc_empty(dev) || (dev->flags & IFF_ALLMULTI) ||
317 (dev->flags & IFF_PROMISC))
318 /* Force accept multicast packets */
319 control.s.mcst = 2;
320 else
321 /* Force reject multicast packets */
322 control.s.mcst = 1;
323
324 if (dev->flags & IFF_PROMISC)
325 /*
326 * Reject matches if promisc. Since CAM is
327 * shut off, should accept everything.
328 */
329 control.s.cam_mode = 0;
330 else
331 /* Filter packets based on the CAM */
332 control.s.cam_mode = 1;
333
334 gmx_cfg.u64 =
335 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
336 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
337 gmx_cfg.u64 & ~1ull);
338
339 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface),
340 control.u64);
341 if (dev->flags & IFF_PROMISC)
342 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
343 (index, interface), 0);
344 else
345 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN
346 (index, interface), 1);
347
348 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
349 gmx_cfg.u64);
350 }
351}
352
353static int cvm_oct_set_mac_filter(struct net_device *dev)
354{
355 struct octeon_ethernet *priv = netdev_priv(dev);
356 union cvmx_gmxx_prtx_cfg gmx_cfg;
357 int interface = INTERFACE(priv->port);
358
359 if ((interface < 2) &&
360 (cvmx_helper_interface_get_mode(interface) !=
361 CVMX_HELPER_INTERFACE_MODE_SPI)) {
362 int i;
363 u8 *ptr = dev->dev_addr;
364 u64 mac = 0;
365 int index = INDEX(priv->port);
366
367 for (i = 0; i < 6; i++)
368 mac = (mac << 8) | (u64)ptr[i];
369
370 gmx_cfg.u64 =
371 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
372 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
373 gmx_cfg.u64 & ~1ull);
374
375 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
376 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface),
377 ptr[0]);
378 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface),
379 ptr[1]);
380 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface),
381 ptr[2]);
382 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface),
383 ptr[3]);
384 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface),
385 ptr[4]);
386 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface),
387 ptr[5]);
388 cvm_oct_common_set_multicast_list(dev);
389 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
390 gmx_cfg.u64);
391 }
392 return 0;
393}
394
395/**
396 * cvm_oct_common_set_mac_address - set the hardware MAC address for a device
397 * @dev: The device in question.
398 * @addr: Socket address.
399 *
400 * Returns Zero on success
401 */
402static int cvm_oct_common_set_mac_address(struct net_device *dev, void *addr)
403{
404 int r = eth_mac_addr(dev, addr);
405
406 if (r)
407 return r;
408 return cvm_oct_set_mac_filter(dev);
409}
410
411/**
412 * cvm_oct_common_init - per network device initialization
413 * @dev: Device to initialize
414 *
415 * Returns Zero on success
416 */
417int cvm_oct_common_init(struct net_device *dev)
418{
419 struct octeon_ethernet *priv = netdev_priv(dev);
420 const u8 *mac = NULL;
421
422 if (priv->of_node)
423 mac = of_get_mac_address(priv->of_node);
424
425 if (mac)
426 ether_addr_copy(dev->dev_addr, mac);
427 else
428 eth_hw_addr_random(dev);
429
430 /*
431 * Force the interface to use the POW send if always_use_pow
432 * was specified or it is in the pow send list.
433 */
434 if ((pow_send_group != -1) &&
435 (always_use_pow || strstr(pow_send_list, dev->name)))
436 priv->queue = -1;
437
438 if (priv->queue != -1)
439 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
440
441 /* We do our own locking, Linux doesn't need to */
442 dev->features |= NETIF_F_LLTX;
443 dev->ethtool_ops = &cvm_oct_ethtool_ops;
444
445 cvm_oct_set_mac_filter(dev);
446 dev_set_mtu(dev, dev->mtu);
447
448 /*
449 * Zero out stats for port so we won't mistakenly show
450 * counters from the bootloader.
451 */
452 memset(dev->netdev_ops->ndo_get_stats(dev), 0,
453 sizeof(struct net_device_stats));
454
455 if (dev->netdev_ops->ndo_stop)
456 dev->netdev_ops->ndo_stop(dev);
457
458 return 0;
459}
460
461void cvm_oct_common_uninit(struct net_device *dev)
462{
463 if (dev->phydev)
464 phy_disconnect(dev->phydev);
465}
466
467int cvm_oct_common_open(struct net_device *dev,
468 void (*link_poll)(struct net_device *))
469{
470 union cvmx_gmxx_prtx_cfg gmx_cfg;
471 struct octeon_ethernet *priv = netdev_priv(dev);
472 int interface = INTERFACE(priv->port);
473 int index = INDEX(priv->port);
474 cvmx_helper_link_info_t link_info;
475 int rv;
476
477 rv = cvm_oct_phy_setup_device(dev);
478 if (rv)
479 return rv;
480
481 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
482 gmx_cfg.s.en = 1;
483 if (octeon_has_feature(OCTEON_FEATURE_PKND))
484 gmx_cfg.s.pknd = priv->port;
485 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
486
487 if (octeon_is_simulation())
488 return 0;
489
490 if (dev->phydev) {
491 int r = phy_read_status(dev->phydev);
492
493 if (r == 0 && dev->phydev->link == 0)
494 netif_carrier_off(dev);
495 cvm_oct_adjust_link(dev);
496 } else {
497 link_info = cvmx_helper_link_get(priv->port);
498 if (!link_info.s.link_up)
499 netif_carrier_off(dev);
500 priv->poll = link_poll;
501 link_poll(dev);
502 }
503
504 return 0;
505}
506
507void cvm_oct_link_poll(struct net_device *dev)
508{
509 struct octeon_ethernet *priv = netdev_priv(dev);
510 cvmx_helper_link_info_t link_info;
511
512 link_info = cvmx_helper_link_get(priv->port);
513 if (link_info.u64 == priv->link_info)
514 return;
515
516 if (cvmx_helper_link_set(priv->port, link_info))
517 link_info.u64 = priv->link_info;
518 else
519 priv->link_info = link_info.u64;
520
521 if (link_info.s.link_up) {
522 if (!netif_carrier_ok(dev))
523 netif_carrier_on(dev);
524 } else if (netif_carrier_ok(dev)) {
525 netif_carrier_off(dev);
526 }
527 cvm_oct_note_carrier(priv, link_info);
528}
529
530static int cvm_oct_xaui_open(struct net_device *dev)
531{
532 return cvm_oct_common_open(dev, cvm_oct_link_poll);
533}
534
535static const struct net_device_ops cvm_oct_npi_netdev_ops = {
536 .ndo_init = cvm_oct_common_init,
537 .ndo_uninit = cvm_oct_common_uninit,
538 .ndo_start_xmit = cvm_oct_xmit,
539 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
540 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
541 .ndo_do_ioctl = cvm_oct_ioctl,
542 .ndo_change_mtu = cvm_oct_common_change_mtu,
543 .ndo_get_stats = cvm_oct_common_get_stats,
544#ifdef CONFIG_NET_POLL_CONTROLLER
545 .ndo_poll_controller = cvm_oct_poll_controller,
546#endif
547};
548
549static const struct net_device_ops cvm_oct_xaui_netdev_ops = {
550 .ndo_init = cvm_oct_common_init,
551 .ndo_uninit = cvm_oct_common_uninit,
552 .ndo_open = cvm_oct_xaui_open,
553 .ndo_stop = cvm_oct_common_stop,
554 .ndo_start_xmit = cvm_oct_xmit,
555 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
556 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
557 .ndo_do_ioctl = cvm_oct_ioctl,
558 .ndo_change_mtu = cvm_oct_common_change_mtu,
559 .ndo_get_stats = cvm_oct_common_get_stats,
560#ifdef CONFIG_NET_POLL_CONTROLLER
561 .ndo_poll_controller = cvm_oct_poll_controller,
562#endif
563};
564
565static const struct net_device_ops cvm_oct_sgmii_netdev_ops = {
566 .ndo_init = cvm_oct_sgmii_init,
567 .ndo_uninit = cvm_oct_common_uninit,
568 .ndo_open = cvm_oct_sgmii_open,
569 .ndo_stop = cvm_oct_common_stop,
570 .ndo_start_xmit = cvm_oct_xmit,
571 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
572 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
573 .ndo_do_ioctl = cvm_oct_ioctl,
574 .ndo_change_mtu = cvm_oct_common_change_mtu,
575 .ndo_get_stats = cvm_oct_common_get_stats,
576#ifdef CONFIG_NET_POLL_CONTROLLER
577 .ndo_poll_controller = cvm_oct_poll_controller,
578#endif
579};
580
581static const struct net_device_ops cvm_oct_spi_netdev_ops = {
582 .ndo_init = cvm_oct_spi_init,
583 .ndo_uninit = cvm_oct_spi_uninit,
584 .ndo_start_xmit = cvm_oct_xmit,
585 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
586 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
587 .ndo_do_ioctl = cvm_oct_ioctl,
588 .ndo_change_mtu = cvm_oct_common_change_mtu,
589 .ndo_get_stats = cvm_oct_common_get_stats,
590#ifdef CONFIG_NET_POLL_CONTROLLER
591 .ndo_poll_controller = cvm_oct_poll_controller,
592#endif
593};
594
595static const struct net_device_ops cvm_oct_rgmii_netdev_ops = {
596 .ndo_init = cvm_oct_common_init,
597 .ndo_uninit = cvm_oct_common_uninit,
598 .ndo_open = cvm_oct_rgmii_open,
599 .ndo_stop = cvm_oct_common_stop,
600 .ndo_start_xmit = cvm_oct_xmit,
601 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
602 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
603 .ndo_do_ioctl = cvm_oct_ioctl,
604 .ndo_change_mtu = cvm_oct_common_change_mtu,
605 .ndo_get_stats = cvm_oct_common_get_stats,
606#ifdef CONFIG_NET_POLL_CONTROLLER
607 .ndo_poll_controller = cvm_oct_poll_controller,
608#endif
609};
610
611static const struct net_device_ops cvm_oct_pow_netdev_ops = {
612 .ndo_init = cvm_oct_common_init,
613 .ndo_start_xmit = cvm_oct_xmit_pow,
614 .ndo_set_rx_mode = cvm_oct_common_set_multicast_list,
615 .ndo_set_mac_address = cvm_oct_common_set_mac_address,
616 .ndo_do_ioctl = cvm_oct_ioctl,
617 .ndo_change_mtu = cvm_oct_common_change_mtu,
618 .ndo_get_stats = cvm_oct_common_get_stats,
619#ifdef CONFIG_NET_POLL_CONTROLLER
620 .ndo_poll_controller = cvm_oct_poll_controller,
621#endif
622};
623
624static struct device_node *cvm_oct_of_get_child(
625 const struct device_node *parent, int reg_val)
626{
627 struct device_node *node = NULL;
628 int size;
629 const __be32 *addr;
630
631 for (;;) {
632 node = of_get_next_child(parent, node);
633 if (!node)
634 break;
635 addr = of_get_property(node, "reg", &size);
636 if (addr && (be32_to_cpu(*addr) == reg_val))
637 break;
638 }
639 return node;
640}
641
642static struct device_node *cvm_oct_node_for_port(struct device_node *pip,
643 int interface, int port)
644{
645 struct device_node *ni, *np;
646
647 ni = cvm_oct_of_get_child(pip, interface);
648 if (!ni)
649 return NULL;
650
651 np = cvm_oct_of_get_child(ni, port);
652 of_node_put(ni);
653
654 return np;
655}
656
657static void cvm_set_rgmii_delay(struct device_node *np, int iface, int port)
658{
659 u32 delay_value;
660
661 if (!of_property_read_u32(np, "rx-delay", &delay_value))
662 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, iface), delay_value);
663 if (!of_property_read_u32(np, "tx-delay", &delay_value))
664 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, iface), delay_value);
665}
666
667static int cvm_oct_probe(struct platform_device *pdev)
668{
669 int num_interfaces;
670 int interface;
671 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
672 int qos;
673 struct device_node *pip;
674 int mtu_overhead = ETH_HLEN + ETH_FCS_LEN;
675
676#if IS_ENABLED(CONFIG_VLAN_8021Q)
677 mtu_overhead += VLAN_HLEN;
678#endif
679
680 octeon_mdiobus_force_mod_depencency();
681
682 pip = pdev->dev.of_node;
683 if (!pip) {
684 pr_err("Error: No 'pip' in /aliases\n");
685 return -EINVAL;
686 }
687
688 cvm_oct_configure_common_hw();
689
690 cvmx_helper_initialize_packet_io_global();
691
692 if (receive_group_order) {
693 if (receive_group_order > 4)
694 receive_group_order = 4;
695 pow_receive_groups = (1 << (1 << receive_group_order)) - 1;
696 } else {
697 pow_receive_groups = BIT(pow_receive_group);
698 }
699
700 /* Change the input group for all ports before input is enabled */
701 num_interfaces = cvmx_helper_get_number_of_interfaces();
702 for (interface = 0; interface < num_interfaces; interface++) {
703 int num_ports = cvmx_helper_ports_on_interface(interface);
704 int port;
705
706 for (port = cvmx_helper_get_ipd_port(interface, 0);
707 port < cvmx_helper_get_ipd_port(interface, num_ports);
708 port++) {
709 union cvmx_pip_prt_tagx pip_prt_tagx;
710
711 pip_prt_tagx.u64 =
712 cvmx_read_csr(CVMX_PIP_PRT_TAGX(port));
713
714 if (receive_group_order) {
715 int tag_mask;
716
717 /* We support only 16 groups at the moment, so
718 * always disable the two additional "hidden"
719 * tag_mask bits on CN68XX.
720 */
721 if (OCTEON_IS_MODEL(OCTEON_CN68XX))
722 pip_prt_tagx.u64 |= 0x3ull << 44;
723
724 tag_mask = ~((1 << receive_group_order) - 1);
725 pip_prt_tagx.s.grptagbase = 0;
726 pip_prt_tagx.s.grptagmask = tag_mask;
727 pip_prt_tagx.s.grptag = 1;
728 pip_prt_tagx.s.tag_mode = 0;
729 pip_prt_tagx.s.inc_prt_flag = 1;
730 pip_prt_tagx.s.ip6_dprt_flag = 1;
731 pip_prt_tagx.s.ip4_dprt_flag = 1;
732 pip_prt_tagx.s.ip6_sprt_flag = 1;
733 pip_prt_tagx.s.ip4_sprt_flag = 1;
734 pip_prt_tagx.s.ip6_dst_flag = 1;
735 pip_prt_tagx.s.ip4_dst_flag = 1;
736 pip_prt_tagx.s.ip6_src_flag = 1;
737 pip_prt_tagx.s.ip4_src_flag = 1;
738 pip_prt_tagx.s.grp = 0;
739 } else {
740 pip_prt_tagx.s.grptag = 0;
741 pip_prt_tagx.s.grp = pow_receive_group;
742 }
743
744 cvmx_write_csr(CVMX_PIP_PRT_TAGX(port),
745 pip_prt_tagx.u64);
746 }
747 }
748
749 cvmx_helper_ipd_and_packet_input_enable();
750
751 memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
752
753 /*
754 * Initialize the FAU used for counting packet buffers that
755 * need to be freed.
756 */
757 cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
758
759 /* Initialize the FAU used for counting tx SKBs that need to be freed */
760 cvmx_fau_atomic_write32(FAU_TOTAL_TX_TO_CLEAN, 0);
761
762 if ((pow_send_group != -1)) {
763 struct net_device *dev;
764
765 dev = alloc_etherdev(sizeof(struct octeon_ethernet));
766 if (dev) {
767 /* Initialize the device private structure. */
768 struct octeon_ethernet *priv = netdev_priv(dev);
769
770 SET_NETDEV_DEV(dev, &pdev->dev);
771 dev->netdev_ops = &cvm_oct_pow_netdev_ops;
772 priv->imode = CVMX_HELPER_INTERFACE_MODE_DISABLED;
773 priv->port = CVMX_PIP_NUM_INPUT_PORTS;
774 priv->queue = -1;
775 strcpy(dev->name, "pow%d");
776 for (qos = 0; qos < 16; qos++)
777 skb_queue_head_init(&priv->tx_free_list[qos]);
778 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead;
779 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead;
780
781 if (register_netdev(dev) < 0) {
782 pr_err("Failed to register ethernet device for POW\n");
783 free_netdev(dev);
784 } else {
785 cvm_oct_device[CVMX_PIP_NUM_INPUT_PORTS] = dev;
786 pr_info("%s: POW send group %d, receive group %d\n",
787 dev->name, pow_send_group,
788 pow_receive_group);
789 }
790 } else {
791 pr_err("Failed to allocate ethernet device for POW\n");
792 }
793 }
794
795 num_interfaces = cvmx_helper_get_number_of_interfaces();
796 for (interface = 0; interface < num_interfaces; interface++) {
797 cvmx_helper_interface_mode_t imode =
798 cvmx_helper_interface_get_mode(interface);
799 int num_ports = cvmx_helper_ports_on_interface(interface);
800 int port;
801 int port_index;
802
803 for (port_index = 0,
804 port = cvmx_helper_get_ipd_port(interface, 0);
805 port < cvmx_helper_get_ipd_port(interface, num_ports);
806 port_index++, port++) {
807 struct octeon_ethernet *priv;
808 struct net_device *dev =
809 alloc_etherdev(sizeof(struct octeon_ethernet));
810 if (!dev) {
811 pr_err("Failed to allocate ethernet device for port %d\n",
812 port);
813 continue;
814 }
815
816 /* Initialize the device private structure. */
817 SET_NETDEV_DEV(dev, &pdev->dev);
818 priv = netdev_priv(dev);
819 priv->netdev = dev;
820 priv->of_node = cvm_oct_node_for_port(pip, interface,
821 port_index);
822
823 INIT_DELAYED_WORK(&priv->port_periodic_work,
824 cvm_oct_periodic_worker);
825 priv->imode = imode;
826 priv->port = port;
827 priv->queue = cvmx_pko_get_base_queue(priv->port);
828 priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
829 for (qos = 0; qos < 16; qos++)
830 skb_queue_head_init(&priv->tx_free_list[qos]);
831 for (qos = 0; qos < cvmx_pko_get_num_queues(port);
832 qos++)
833 cvmx_fau_atomic_write32(priv->fau + qos * 4, 0);
834 dev->min_mtu = VLAN_ETH_ZLEN - mtu_overhead;
835 dev->max_mtu = OCTEON_MAX_MTU - mtu_overhead;
836
837 switch (priv->imode) {
838 /* These types don't support ports to IPD/PKO */
839 case CVMX_HELPER_INTERFACE_MODE_DISABLED:
840 case CVMX_HELPER_INTERFACE_MODE_PCIE:
841 case CVMX_HELPER_INTERFACE_MODE_PICMG:
842 break;
843
844 case CVMX_HELPER_INTERFACE_MODE_NPI:
845 dev->netdev_ops = &cvm_oct_npi_netdev_ops;
846 strcpy(dev->name, "npi%d");
847 break;
848
849 case CVMX_HELPER_INTERFACE_MODE_XAUI:
850 dev->netdev_ops = &cvm_oct_xaui_netdev_ops;
851 strcpy(dev->name, "xaui%d");
852 break;
853
854 case CVMX_HELPER_INTERFACE_MODE_LOOP:
855 dev->netdev_ops = &cvm_oct_npi_netdev_ops;
856 strcpy(dev->name, "loop%d");
857 break;
858
859 case CVMX_HELPER_INTERFACE_MODE_SGMII:
860 dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
861 strcpy(dev->name, "eth%d");
862 break;
863
864 case CVMX_HELPER_INTERFACE_MODE_SPI:
865 dev->netdev_ops = &cvm_oct_spi_netdev_ops;
866 strcpy(dev->name, "spi%d");
867 break;
868
869 case CVMX_HELPER_INTERFACE_MODE_RGMII:
870 case CVMX_HELPER_INTERFACE_MODE_GMII:
871 dev->netdev_ops = &cvm_oct_rgmii_netdev_ops;
872 strcpy(dev->name, "eth%d");
873 cvm_set_rgmii_delay(priv->of_node, interface,
874 port_index);
875 break;
876 }
877
878 if (!dev->netdev_ops) {
879 free_netdev(dev);
880 } else if (register_netdev(dev) < 0) {
881 pr_err("Failed to register ethernet device for interface %d, port %d\n",
882 interface, priv->port);
883 free_netdev(dev);
884 } else {
885 cvm_oct_device[priv->port] = dev;
886 fau -=
887 cvmx_pko_get_num_queues(priv->port) *
888 sizeof(u32);
889 schedule_delayed_work(&priv->port_periodic_work,
890 HZ);
891 }
892 }
893 }
894
895 cvm_oct_tx_initialize();
896 cvm_oct_rx_initialize();
897
898 /*
899 * 150 uS: about 10 1500-byte packets at 1GE.
900 */
901 cvm_oct_tx_poll_interval = 150 * (octeon_get_clock_rate() / 1000000);
902
903 schedule_delayed_work(&cvm_oct_rx_refill_work, HZ);
904
905 return 0;
906}
907
908static int cvm_oct_remove(struct platform_device *pdev)
909{
910 int port;
911
912 cvmx_ipd_disable();
913
914 atomic_inc_return(&cvm_oct_poll_queue_stopping);
915 cancel_delayed_work_sync(&cvm_oct_rx_refill_work);
916
917 cvm_oct_rx_shutdown();
918 cvm_oct_tx_shutdown();
919
920 cvmx_pko_disable();
921
922 /* Free the ethernet devices */
923 for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
924 if (cvm_oct_device[port]) {
925 struct net_device *dev = cvm_oct_device[port];
926 struct octeon_ethernet *priv = netdev_priv(dev);
927
928 cancel_delayed_work_sync(&priv->port_periodic_work);
929
930 cvm_oct_tx_shutdown_dev(dev);
931 unregister_netdev(dev);
932 free_netdev(dev);
933 cvm_oct_device[port] = NULL;
934 }
935 }
936
937 cvmx_pko_shutdown();
938
939 cvmx_ipd_free_ptr();
940
941 /* Free the HW pools */
942 cvm_oct_mem_empty_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE,
943 num_packet_buffers);
944 cvm_oct_mem_empty_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE,
945 num_packet_buffers);
946 if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
947 cvm_oct_mem_empty_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL,
948 CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
949 return 0;
950}
951
952static const struct of_device_id cvm_oct_match[] = {
953 {
954 .compatible = "cavium,octeon-3860-pip",
955 },
956 {},
957};
958MODULE_DEVICE_TABLE(of, cvm_oct_match);
959
960static struct platform_driver cvm_oct_driver = {
961 .probe = cvm_oct_probe,
962 .remove = cvm_oct_remove,
963 .driver = {
964 .name = KBUILD_MODNAME,
965 .of_match_table = cvm_oct_match,
966 },
967};
968
969module_platform_driver(cvm_oct_driver);
970
971MODULE_LICENSE("GPL");
972MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>");
973MODULE_DESCRIPTION("Cavium Networks Octeon ethernet driver.");