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1// SPDX-License-Identifier: GPL-2.0-only
2/* drivers/rtc/rtc-s3c.c
3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * Copyright (c) 2004,2006 Simtec Electronics
8 * Ben Dooks, <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
12*/
13
14#include <linux/module.h>
15#include <linux/fs.h>
16#include <linux/string.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/bcd.h>
22#include <linux/clk.h>
23#include <linux/log2.h>
24#include <linux/slab.h>
25#include <linux/of.h>
26#include <linux/of_device.h>
27#include <linux/uaccess.h>
28#include <linux/io.h>
29
30#include <asm/irq.h>
31#include "rtc-s3c.h"
32
33struct s3c_rtc {
34 struct device *dev;
35 struct rtc_device *rtc;
36
37 void __iomem *base;
38 struct clk *rtc_clk;
39 struct clk *rtc_src_clk;
40 bool alarm_enabled;
41
42 const struct s3c_rtc_data *data;
43
44 int irq_alarm;
45 int irq_tick;
46
47 spinlock_t pie_lock;
48 spinlock_t alarm_lock;
49
50 int ticnt_save;
51 int ticnt_en_save;
52 bool wake_en;
53};
54
55struct s3c_rtc_data {
56 int max_user_freq;
57 bool needs_src_clk;
58
59 void (*irq_handler) (struct s3c_rtc *info, int mask);
60 void (*set_freq) (struct s3c_rtc *info, int freq);
61 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
62 void (*select_tick_clk) (struct s3c_rtc *info);
63 void (*save_tick_cnt) (struct s3c_rtc *info);
64 void (*restore_tick_cnt) (struct s3c_rtc *info);
65 void (*enable) (struct s3c_rtc *info);
66 void (*disable) (struct s3c_rtc *info);
67};
68
69static int s3c_rtc_enable_clk(struct s3c_rtc *info)
70{
71 int ret;
72
73 ret = clk_enable(info->rtc_clk);
74 if (ret)
75 return ret;
76
77 if (info->data->needs_src_clk) {
78 ret = clk_enable(info->rtc_src_clk);
79 if (ret) {
80 clk_disable(info->rtc_clk);
81 return ret;
82 }
83 }
84 return 0;
85}
86
87static void s3c_rtc_disable_clk(struct s3c_rtc *info)
88{
89 if (info->data->needs_src_clk)
90 clk_disable(info->rtc_src_clk);
91 clk_disable(info->rtc_clk);
92}
93
94/* IRQ Handlers */
95static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
96{
97 struct s3c_rtc *info = (struct s3c_rtc *)id;
98
99 if (info->data->irq_handler)
100 info->data->irq_handler(info, S3C2410_INTP_TIC);
101
102 return IRQ_HANDLED;
103}
104
105static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
106{
107 struct s3c_rtc *info = (struct s3c_rtc *)id;
108
109 if (info->data->irq_handler)
110 info->data->irq_handler(info, S3C2410_INTP_ALM);
111
112 return IRQ_HANDLED;
113}
114
115/* Update control registers */
116static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
117{
118 struct s3c_rtc *info = dev_get_drvdata(dev);
119 unsigned long flags;
120 unsigned int tmp;
121 int ret;
122
123 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
124
125 ret = s3c_rtc_enable_clk(info);
126 if (ret)
127 return ret;
128
129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
130
131 if (enabled)
132 tmp |= S3C2410_RTCALM_ALMEN;
133
134 writeb(tmp, info->base + S3C2410_RTCALM);
135
136 spin_lock_irqsave(&info->alarm_lock, flags);
137
138 if (info->alarm_enabled && !enabled)
139 s3c_rtc_disable_clk(info);
140 else if (!info->alarm_enabled && enabled)
141 ret = s3c_rtc_enable_clk(info);
142
143 info->alarm_enabled = enabled;
144 spin_unlock_irqrestore(&info->alarm_lock, flags);
145
146 s3c_rtc_disable_clk(info);
147
148 return ret;
149}
150
151/* Set RTC frequency */
152static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
153{
154 int ret;
155
156 if (!is_power_of_2(freq))
157 return -EINVAL;
158
159 ret = s3c_rtc_enable_clk(info);
160 if (ret)
161 return ret;
162 spin_lock_irq(&info->pie_lock);
163
164 if (info->data->set_freq)
165 info->data->set_freq(info, freq);
166
167 spin_unlock_irq(&info->pie_lock);
168 s3c_rtc_disable_clk(info);
169
170 return 0;
171}
172
173/* Time read/write */
174static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
175{
176 struct s3c_rtc *info = dev_get_drvdata(dev);
177 unsigned int have_retried = 0;
178 int ret;
179
180 ret = s3c_rtc_enable_clk(info);
181 if (ret)
182 return ret;
183
184retry_get_time:
185 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
186 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
187 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
188 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
189 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
190 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
191
192 /* the only way to work out whether the system was mid-update
193 * when we read it is to check the second counter, and if it
194 * is zero, then we re-try the entire read
195 */
196
197 if (rtc_tm->tm_sec == 0 && !have_retried) {
198 have_retried = 1;
199 goto retry_get_time;
200 }
201
202 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
203 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
204 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
205 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
206 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
207 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
208
209 s3c_rtc_disable_clk(info);
210
211 rtc_tm->tm_year += 100;
212 rtc_tm->tm_mon -= 1;
213
214 dev_dbg(dev, "read time %ptR\n", rtc_tm);
215 return 0;
216}
217
218static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
219{
220 struct s3c_rtc *info = dev_get_drvdata(dev);
221 int year = tm->tm_year - 100;
222 int ret;
223
224 dev_dbg(dev, "set time %ptR\n", tm);
225
226 /* we get around y2k by simply not supporting it */
227
228 if (year < 0 || year >= 100) {
229 dev_err(dev, "rtc only supports 100 years\n");
230 return -EINVAL;
231 }
232
233 ret = s3c_rtc_enable_clk(info);
234 if (ret)
235 return ret;
236
237 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
238 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
239 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
240 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
241 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
242 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
243
244 s3c_rtc_disable_clk(info);
245
246 return 0;
247}
248
249static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
250{
251 struct s3c_rtc *info = dev_get_drvdata(dev);
252 struct rtc_time *alm_tm = &alrm->time;
253 unsigned int alm_en;
254 int ret;
255
256 ret = s3c_rtc_enable_clk(info);
257 if (ret)
258 return ret;
259
260 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
261 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
262 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
263 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
264 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
265 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
266
267 alm_en = readb(info->base + S3C2410_RTCALM);
268
269 s3c_rtc_disable_clk(info);
270
271 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
272
273 dev_dbg(dev, "read alarm %d, %ptR\n", alm_en, alm_tm);
274
275 /* decode the alarm enable field */
276 if (alm_en & S3C2410_RTCALM_SECEN)
277 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
278
279 if (alm_en & S3C2410_RTCALM_MINEN)
280 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
281
282 if (alm_en & S3C2410_RTCALM_HOUREN)
283 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
284
285 if (alm_en & S3C2410_RTCALM_DAYEN)
286 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
287
288 if (alm_en & S3C2410_RTCALM_MONEN) {
289 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
290 alm_tm->tm_mon -= 1;
291 }
292
293 if (alm_en & S3C2410_RTCALM_YEAREN)
294 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
295
296 return 0;
297}
298
299static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
300{
301 struct s3c_rtc *info = dev_get_drvdata(dev);
302 struct rtc_time *tm = &alrm->time;
303 unsigned int alrm_en;
304 int ret;
305
306 dev_dbg(dev, "s3c_rtc_setalarm: %d, %ptR\n", alrm->enabled, tm);
307
308 ret = s3c_rtc_enable_clk(info);
309 if (ret)
310 return ret;
311
312 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
313 writeb(0x00, info->base + S3C2410_RTCALM);
314
315 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
316 alrm_en |= S3C2410_RTCALM_SECEN;
317 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
318 }
319
320 if (tm->tm_min < 60 && tm->tm_min >= 0) {
321 alrm_en |= S3C2410_RTCALM_MINEN;
322 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
323 }
324
325 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
326 alrm_en |= S3C2410_RTCALM_HOUREN;
327 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
328 }
329
330 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
331 alrm_en |= S3C2410_RTCALM_MONEN;
332 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
333 }
334
335 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
336 alrm_en |= S3C2410_RTCALM_DAYEN;
337 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
338 }
339
340 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
341
342 writeb(alrm_en, info->base + S3C2410_RTCALM);
343
344 s3c_rtc_setaie(dev, alrm->enabled);
345
346 s3c_rtc_disable_clk(info);
347
348 return 0;
349}
350
351static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
352{
353 struct s3c_rtc *info = dev_get_drvdata(dev);
354 int ret;
355
356 ret = s3c_rtc_enable_clk(info);
357 if (ret)
358 return ret;
359
360 if (info->data->enable_tick)
361 info->data->enable_tick(info, seq);
362
363 s3c_rtc_disable_clk(info);
364
365 return 0;
366}
367
368static const struct rtc_class_ops s3c_rtcops = {
369 .read_time = s3c_rtc_gettime,
370 .set_time = s3c_rtc_settime,
371 .read_alarm = s3c_rtc_getalarm,
372 .set_alarm = s3c_rtc_setalarm,
373 .proc = s3c_rtc_proc,
374 .alarm_irq_enable = s3c_rtc_setaie,
375};
376
377static void s3c24xx_rtc_enable(struct s3c_rtc *info)
378{
379 unsigned int con, tmp;
380
381 con = readw(info->base + S3C2410_RTCCON);
382 /* re-enable the device, and check it is ok */
383 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
384 dev_info(info->dev, "rtc disabled, re-enabling\n");
385
386 tmp = readw(info->base + S3C2410_RTCCON);
387 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
388 }
389
390 if (con & S3C2410_RTCCON_CNTSEL) {
391 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
392
393 tmp = readw(info->base + S3C2410_RTCCON);
394 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
395 info->base + S3C2410_RTCCON);
396 }
397
398 if (con & S3C2410_RTCCON_CLKRST) {
399 dev_info(info->dev, "removing RTCCON_CLKRST\n");
400
401 tmp = readw(info->base + S3C2410_RTCCON);
402 writew(tmp & ~S3C2410_RTCCON_CLKRST,
403 info->base + S3C2410_RTCCON);
404 }
405}
406
407static void s3c24xx_rtc_disable(struct s3c_rtc *info)
408{
409 unsigned int con;
410
411 con = readw(info->base + S3C2410_RTCCON);
412 con &= ~S3C2410_RTCCON_RTCEN;
413 writew(con, info->base + S3C2410_RTCCON);
414
415 con = readb(info->base + S3C2410_TICNT);
416 con &= ~S3C2410_TICNT_ENABLE;
417 writeb(con, info->base + S3C2410_TICNT);
418}
419
420static void s3c6410_rtc_disable(struct s3c_rtc *info)
421{
422 unsigned int con;
423
424 con = readw(info->base + S3C2410_RTCCON);
425 con &= ~S3C64XX_RTCCON_TICEN;
426 con &= ~S3C2410_RTCCON_RTCEN;
427 writew(con, info->base + S3C2410_RTCCON);
428}
429
430static int s3c_rtc_remove(struct platform_device *pdev)
431{
432 struct s3c_rtc *info = platform_get_drvdata(pdev);
433
434 s3c_rtc_setaie(info->dev, 0);
435
436 if (info->data->needs_src_clk)
437 clk_unprepare(info->rtc_src_clk);
438 clk_unprepare(info->rtc_clk);
439
440 return 0;
441}
442
443static int s3c_rtc_probe(struct platform_device *pdev)
444{
445 struct s3c_rtc *info = NULL;
446 struct rtc_time rtc_tm;
447 int ret;
448
449 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
450 if (!info)
451 return -ENOMEM;
452
453 /* find the IRQs */
454 info->irq_tick = platform_get_irq(pdev, 1);
455 if (info->irq_tick < 0)
456 return info->irq_tick;
457
458 info->dev = &pdev->dev;
459 info->data = of_device_get_match_data(&pdev->dev);
460 if (!info->data) {
461 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
462 return -EINVAL;
463 }
464 spin_lock_init(&info->pie_lock);
465 spin_lock_init(&info->alarm_lock);
466
467 platform_set_drvdata(pdev, info);
468
469 info->irq_alarm = platform_get_irq(pdev, 0);
470 if (info->irq_alarm < 0)
471 return info->irq_alarm;
472
473 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
474 info->irq_tick, info->irq_alarm);
475
476 /* get the memory region */
477 info->base = devm_platform_ioremap_resource(pdev, 0);
478 if (IS_ERR(info->base))
479 return PTR_ERR(info->base);
480
481 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
482 if (IS_ERR(info->rtc_clk)) {
483 ret = PTR_ERR(info->rtc_clk);
484 if (ret != -EPROBE_DEFER)
485 dev_err(&pdev->dev, "failed to find rtc clock\n");
486 else
487 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
488 return ret;
489 }
490 ret = clk_prepare_enable(info->rtc_clk);
491 if (ret)
492 return ret;
493
494 if (info->data->needs_src_clk) {
495 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
496 if (IS_ERR(info->rtc_src_clk)) {
497 ret = PTR_ERR(info->rtc_src_clk);
498 if (ret != -EPROBE_DEFER)
499 dev_err(&pdev->dev,
500 "failed to find rtc source clock\n");
501 else
502 dev_dbg(&pdev->dev,
503 "probe deferred due to missing rtc src clk\n");
504 goto err_src_clk;
505 }
506 ret = clk_prepare_enable(info->rtc_src_clk);
507 if (ret)
508 goto err_src_clk;
509 }
510
511 /* check to see if everything is setup correctly */
512 if (info->data->enable)
513 info->data->enable(info);
514
515 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
516 readw(info->base + S3C2410_RTCCON));
517
518 device_init_wakeup(&pdev->dev, 1);
519
520 /* Check RTC Time */
521 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
522 rtc_tm.tm_year = 100;
523 rtc_tm.tm_mon = 0;
524 rtc_tm.tm_mday = 1;
525 rtc_tm.tm_hour = 0;
526 rtc_tm.tm_min = 0;
527 rtc_tm.tm_sec = 0;
528
529 s3c_rtc_settime(&pdev->dev, &rtc_tm);
530
531 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
532 }
533
534 /* register RTC and exit */
535 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
536 THIS_MODULE);
537 if (IS_ERR(info->rtc)) {
538 dev_err(&pdev->dev, "cannot attach rtc\n");
539 ret = PTR_ERR(info->rtc);
540 goto err_nortc;
541 }
542
543 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
544 0, "s3c2410-rtc alarm", info);
545 if (ret) {
546 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
547 goto err_nortc;
548 }
549
550 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
551 0, "s3c2410-rtc tick", info);
552 if (ret) {
553 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
554 goto err_nortc;
555 }
556
557 if (info->data->select_tick_clk)
558 info->data->select_tick_clk(info);
559
560 s3c_rtc_setfreq(info, 1);
561
562 s3c_rtc_disable_clk(info);
563
564 return 0;
565
566err_nortc:
567 if (info->data->disable)
568 info->data->disable(info);
569
570 if (info->data->needs_src_clk)
571 clk_disable_unprepare(info->rtc_src_clk);
572err_src_clk:
573 clk_disable_unprepare(info->rtc_clk);
574
575 return ret;
576}
577
578#ifdef CONFIG_PM_SLEEP
579
580static int s3c_rtc_suspend(struct device *dev)
581{
582 struct s3c_rtc *info = dev_get_drvdata(dev);
583 int ret;
584
585 ret = s3c_rtc_enable_clk(info);
586 if (ret)
587 return ret;
588
589 /* save TICNT for anyone using periodic interrupts */
590 if (info->data->save_tick_cnt)
591 info->data->save_tick_cnt(info);
592
593 if (info->data->disable)
594 info->data->disable(info);
595
596 if (device_may_wakeup(dev) && !info->wake_en) {
597 if (enable_irq_wake(info->irq_alarm) == 0)
598 info->wake_en = true;
599 else
600 dev_err(dev, "enable_irq_wake failed\n");
601 }
602
603 return 0;
604}
605
606static int s3c_rtc_resume(struct device *dev)
607{
608 struct s3c_rtc *info = dev_get_drvdata(dev);
609
610 if (info->data->enable)
611 info->data->enable(info);
612
613 if (info->data->restore_tick_cnt)
614 info->data->restore_tick_cnt(info);
615
616 s3c_rtc_disable_clk(info);
617
618 if (device_may_wakeup(dev) && info->wake_en) {
619 disable_irq_wake(info->irq_alarm);
620 info->wake_en = false;
621 }
622
623 return 0;
624}
625#endif
626static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
627
628static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
629{
630 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
631}
632
633static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
634{
635 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
636 writeb(mask, info->base + S3C2410_INTP);
637}
638
639static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
640{
641 unsigned int tmp = 0;
642 int val;
643
644 tmp = readb(info->base + S3C2410_TICNT);
645 tmp &= S3C2410_TICNT_ENABLE;
646
647 val = (info->rtc->max_user_freq / freq) - 1;
648 tmp |= val;
649
650 writel(tmp, info->base + S3C2410_TICNT);
651}
652
653static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
654{
655 unsigned int tmp = 0;
656 int val;
657
658 tmp = readb(info->base + S3C2410_TICNT);
659 tmp &= S3C2410_TICNT_ENABLE;
660
661 val = (info->rtc->max_user_freq / freq) - 1;
662
663 tmp |= S3C2443_TICNT_PART(val);
664 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
665
666 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
667
668 writel(tmp, info->base + S3C2410_TICNT);
669}
670
671static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
672{
673 unsigned int tmp = 0;
674 int val;
675
676 tmp = readb(info->base + S3C2410_TICNT);
677 tmp &= S3C2410_TICNT_ENABLE;
678
679 val = (info->rtc->max_user_freq / freq) - 1;
680
681 tmp |= S3C2443_TICNT_PART(val);
682 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
683
684 writel(tmp, info->base + S3C2410_TICNT);
685}
686
687static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
688{
689 int val;
690
691 val = (info->rtc->max_user_freq / freq) - 1;
692 writel(val, info->base + S3C2410_TICNT);
693}
694
695static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
696{
697 unsigned int ticnt;
698
699 ticnt = readb(info->base + S3C2410_TICNT);
700 ticnt &= S3C2410_TICNT_ENABLE;
701
702 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
703}
704
705static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
706{
707 unsigned int con;
708
709 con = readw(info->base + S3C2410_RTCCON);
710 con |= S3C2443_RTCCON_TICSEL;
711 writew(con, info->base + S3C2410_RTCCON);
712}
713
714static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
715{
716 unsigned int ticnt;
717
718 ticnt = readw(info->base + S3C2410_RTCCON);
719 ticnt &= S3C64XX_RTCCON_TICEN;
720
721 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
722}
723
724static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
725{
726 info->ticnt_save = readb(info->base + S3C2410_TICNT);
727}
728
729static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
730{
731 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
732}
733
734static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
735{
736 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
737 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
738 info->ticnt_save = readl(info->base + S3C2410_TICNT);
739}
740
741static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
742{
743 unsigned int con;
744
745 writel(info->ticnt_save, info->base + S3C2410_TICNT);
746 if (info->ticnt_en_save) {
747 con = readw(info->base + S3C2410_RTCCON);
748 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON);
749 }
750}
751
752static struct s3c_rtc_data const s3c2410_rtc_data = {
753 .max_user_freq = 128,
754 .irq_handler = s3c24xx_rtc_irq,
755 .set_freq = s3c2410_rtc_setfreq,
756 .enable_tick = s3c24xx_rtc_enable_tick,
757 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
758 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
759 .enable = s3c24xx_rtc_enable,
760 .disable = s3c24xx_rtc_disable,
761};
762
763static struct s3c_rtc_data const s3c2416_rtc_data = {
764 .max_user_freq = 32768,
765 .irq_handler = s3c24xx_rtc_irq,
766 .set_freq = s3c2416_rtc_setfreq,
767 .enable_tick = s3c24xx_rtc_enable_tick,
768 .select_tick_clk = s3c2416_rtc_select_tick_clk,
769 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
770 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
771 .enable = s3c24xx_rtc_enable,
772 .disable = s3c24xx_rtc_disable,
773};
774
775static struct s3c_rtc_data const s3c2443_rtc_data = {
776 .max_user_freq = 32768,
777 .irq_handler = s3c24xx_rtc_irq,
778 .set_freq = s3c2443_rtc_setfreq,
779 .enable_tick = s3c24xx_rtc_enable_tick,
780 .select_tick_clk = s3c2416_rtc_select_tick_clk,
781 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
782 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
783 .enable = s3c24xx_rtc_enable,
784 .disable = s3c24xx_rtc_disable,
785};
786
787static struct s3c_rtc_data const s3c6410_rtc_data = {
788 .max_user_freq = 32768,
789 .needs_src_clk = true,
790 .irq_handler = s3c6410_rtc_irq,
791 .set_freq = s3c6410_rtc_setfreq,
792 .enable_tick = s3c6410_rtc_enable_tick,
793 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
794 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
795 .enable = s3c24xx_rtc_enable,
796 .disable = s3c6410_rtc_disable,
797};
798
799static const struct of_device_id s3c_rtc_dt_match[] = {
800 {
801 .compatible = "samsung,s3c2410-rtc",
802 .data = &s3c2410_rtc_data,
803 }, {
804 .compatible = "samsung,s3c2416-rtc",
805 .data = &s3c2416_rtc_data,
806 }, {
807 .compatible = "samsung,s3c2443-rtc",
808 .data = &s3c2443_rtc_data,
809 }, {
810 .compatible = "samsung,s3c6410-rtc",
811 .data = &s3c6410_rtc_data,
812 }, {
813 .compatible = "samsung,exynos3250-rtc",
814 .data = &s3c6410_rtc_data,
815 },
816 { /* sentinel */ },
817};
818MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
819
820static struct platform_driver s3c_rtc_driver = {
821 .probe = s3c_rtc_probe,
822 .remove = s3c_rtc_remove,
823 .driver = {
824 .name = "s3c-rtc",
825 .pm = &s3c_rtc_pm_ops,
826 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
827 },
828};
829module_platform_driver(s3c_rtc_driver);
830
831MODULE_DESCRIPTION("Samsung S3C RTC Driver");
832MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
833MODULE_LICENSE("GPL");
834MODULE_ALIAS("platform:s3c2410-rtc");
1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/uaccess.h>
30#include <linux/io.h>
31
32#include <asm/irq.h>
33#include "rtc-s3c.h"
34
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
41 struct clk *rtc_src_clk;
42 bool clk_disabled;
43
44 const struct s3c_rtc_data *data;
45
46 int irq_alarm;
47 int irq_tick;
48
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
51
52 int ticnt_save;
53 int ticnt_en_save;
54 bool wake_en;
55};
56
57struct s3c_rtc_data {
58 int max_user_freq;
59 bool needs_src_clk;
60
61 void (*irq_handler) (struct s3c_rtc *info, int mask);
62 void (*set_freq) (struct s3c_rtc *info, int freq);
63 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
64 void (*select_tick_clk) (struct s3c_rtc *info);
65 void (*save_tick_cnt) (struct s3c_rtc *info);
66 void (*restore_tick_cnt) (struct s3c_rtc *info);
67 void (*enable) (struct s3c_rtc *info);
68 void (*disable) (struct s3c_rtc *info);
69};
70
71static int s3c_rtc_enable_clk(struct s3c_rtc *info)
72{
73 unsigned long irq_flags;
74 int ret = 0;
75
76 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
77
78 if (info->clk_disabled) {
79 ret = clk_enable(info->rtc_clk);
80 if (ret)
81 goto out;
82
83 if (info->data->needs_src_clk) {
84 ret = clk_enable(info->rtc_src_clk);
85 if (ret) {
86 clk_disable(info->rtc_clk);
87 goto out;
88 }
89 }
90 info->clk_disabled = false;
91 }
92
93out:
94 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
95
96 return ret;
97}
98
99static void s3c_rtc_disable_clk(struct s3c_rtc *info)
100{
101 unsigned long irq_flags;
102
103 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
104 if (!info->clk_disabled) {
105 if (info->data->needs_src_clk)
106 clk_disable(info->rtc_src_clk);
107 clk_disable(info->rtc_clk);
108 info->clk_disabled = true;
109 }
110 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
111}
112
113/* IRQ Handlers */
114static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
115{
116 struct s3c_rtc *info = (struct s3c_rtc *)id;
117
118 if (info->data->irq_handler)
119 info->data->irq_handler(info, S3C2410_INTP_TIC);
120
121 return IRQ_HANDLED;
122}
123
124static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
125{
126 struct s3c_rtc *info = (struct s3c_rtc *)id;
127
128 if (info->data->irq_handler)
129 info->data->irq_handler(info, S3C2410_INTP_ALM);
130
131 return IRQ_HANDLED;
132}
133
134/* Update control registers */
135static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
136{
137 struct s3c_rtc *info = dev_get_drvdata(dev);
138 unsigned int tmp;
139 int ret;
140
141 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
142
143 ret = s3c_rtc_enable_clk(info);
144 if (ret)
145 return ret;
146
147 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
148
149 if (enabled)
150 tmp |= S3C2410_RTCALM_ALMEN;
151
152 writeb(tmp, info->base + S3C2410_RTCALM);
153
154 s3c_rtc_disable_clk(info);
155
156 if (enabled) {
157 ret = s3c_rtc_enable_clk(info);
158 if (ret)
159 return ret;
160 } else {
161 s3c_rtc_disable_clk(info);
162 }
163
164 return 0;
165}
166
167/* Set RTC frequency */
168static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
169{
170 int ret;
171
172 if (!is_power_of_2(freq))
173 return -EINVAL;
174
175 ret = s3c_rtc_enable_clk(info);
176 if (ret)
177 return ret;
178 spin_lock_irq(&info->pie_lock);
179
180 if (info->data->set_freq)
181 info->data->set_freq(info, freq);
182
183 spin_unlock_irq(&info->pie_lock);
184 s3c_rtc_disable_clk(info);
185
186 return 0;
187}
188
189/* Time read/write */
190static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
191{
192 struct s3c_rtc *info = dev_get_drvdata(dev);
193 unsigned int have_retried = 0;
194 int ret;
195
196 ret = s3c_rtc_enable_clk(info);
197 if (ret)
198 return ret;
199
200retry_get_time:
201 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
202 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
203 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
204 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
205 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
206 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
207
208 /* the only way to work out whether the system was mid-update
209 * when we read it is to check the second counter, and if it
210 * is zero, then we re-try the entire read
211 */
212
213 if (rtc_tm->tm_sec == 0 && !have_retried) {
214 have_retried = 1;
215 goto retry_get_time;
216 }
217
218 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
219 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
220 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
221 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
222 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
223 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
224
225 s3c_rtc_disable_clk(info);
226
227 rtc_tm->tm_year += 100;
228
229 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
230 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
231 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
232
233 rtc_tm->tm_mon -= 1;
234
235 return 0;
236}
237
238static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
239{
240 struct s3c_rtc *info = dev_get_drvdata(dev);
241 int year = tm->tm_year - 100;
242 int ret;
243
244 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
245 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
246 tm->tm_hour, tm->tm_min, tm->tm_sec);
247
248 /* we get around y2k by simply not supporting it */
249
250 if (year < 0 || year >= 100) {
251 dev_err(dev, "rtc only supports 100 years\n");
252 return -EINVAL;
253 }
254
255 ret = s3c_rtc_enable_clk(info);
256 if (ret)
257 return ret;
258
259 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
260 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
261 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
262 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
263 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
264 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
265
266 s3c_rtc_disable_clk(info);
267
268 return 0;
269}
270
271static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
272{
273 struct s3c_rtc *info = dev_get_drvdata(dev);
274 struct rtc_time *alm_tm = &alrm->time;
275 unsigned int alm_en;
276 int ret;
277
278 ret = s3c_rtc_enable_clk(info);
279 if (ret)
280 return ret;
281
282 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
283 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
284 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
285 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
286 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
287 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
288
289 alm_en = readb(info->base + S3C2410_RTCALM);
290
291 s3c_rtc_disable_clk(info);
292
293 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
294
295 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
296 alm_en,
297 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
298 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
299
300 /* decode the alarm enable field */
301 if (alm_en & S3C2410_RTCALM_SECEN)
302 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
303
304 if (alm_en & S3C2410_RTCALM_MINEN)
305 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
306
307 if (alm_en & S3C2410_RTCALM_HOUREN)
308 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
309
310 if (alm_en & S3C2410_RTCALM_DAYEN)
311 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
312
313 if (alm_en & S3C2410_RTCALM_MONEN) {
314 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
315 alm_tm->tm_mon -= 1;
316 }
317
318 if (alm_en & S3C2410_RTCALM_YEAREN)
319 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
320
321 return 0;
322}
323
324static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
325{
326 struct s3c_rtc *info = dev_get_drvdata(dev);
327 struct rtc_time *tm = &alrm->time;
328 unsigned int alrm_en;
329 int ret;
330 int year = tm->tm_year - 100;
331
332 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
333 alrm->enabled,
334 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
335 tm->tm_hour, tm->tm_min, tm->tm_sec);
336
337 ret = s3c_rtc_enable_clk(info);
338 if (ret)
339 return ret;
340
341 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
342 writeb(0x00, info->base + S3C2410_RTCALM);
343
344 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
345 alrm_en |= S3C2410_RTCALM_SECEN;
346 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
347 }
348
349 if (tm->tm_min < 60 && tm->tm_min >= 0) {
350 alrm_en |= S3C2410_RTCALM_MINEN;
351 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
352 }
353
354 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
355 alrm_en |= S3C2410_RTCALM_HOUREN;
356 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
357 }
358
359 if (year < 100 && year >= 0) {
360 alrm_en |= S3C2410_RTCALM_YEAREN;
361 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
362 }
363
364 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
365 alrm_en |= S3C2410_RTCALM_MONEN;
366 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
367 }
368
369 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
370 alrm_en |= S3C2410_RTCALM_DAYEN;
371 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
372 }
373
374 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
375
376 writeb(alrm_en, info->base + S3C2410_RTCALM);
377
378 s3c_rtc_disable_clk(info);
379
380 s3c_rtc_setaie(dev, alrm->enabled);
381
382 return 0;
383}
384
385static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
386{
387 struct s3c_rtc *info = dev_get_drvdata(dev);
388 int ret;
389
390 ret = s3c_rtc_enable_clk(info);
391 if (ret)
392 return ret;
393
394 if (info->data->enable_tick)
395 info->data->enable_tick(info, seq);
396
397 s3c_rtc_disable_clk(info);
398
399 return 0;
400}
401
402static const struct rtc_class_ops s3c_rtcops = {
403 .read_time = s3c_rtc_gettime,
404 .set_time = s3c_rtc_settime,
405 .read_alarm = s3c_rtc_getalarm,
406 .set_alarm = s3c_rtc_setalarm,
407 .proc = s3c_rtc_proc,
408 .alarm_irq_enable = s3c_rtc_setaie,
409};
410
411static void s3c24xx_rtc_enable(struct s3c_rtc *info)
412{
413 unsigned int con, tmp;
414
415 con = readw(info->base + S3C2410_RTCCON);
416 /* re-enable the device, and check it is ok */
417 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
418 dev_info(info->dev, "rtc disabled, re-enabling\n");
419
420 tmp = readw(info->base + S3C2410_RTCCON);
421 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
422 }
423
424 if (con & S3C2410_RTCCON_CNTSEL) {
425 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
426
427 tmp = readw(info->base + S3C2410_RTCCON);
428 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
429 info->base + S3C2410_RTCCON);
430 }
431
432 if (con & S3C2410_RTCCON_CLKRST) {
433 dev_info(info->dev, "removing RTCCON_CLKRST\n");
434
435 tmp = readw(info->base + S3C2410_RTCCON);
436 writew(tmp & ~S3C2410_RTCCON_CLKRST,
437 info->base + S3C2410_RTCCON);
438 }
439}
440
441static void s3c24xx_rtc_disable(struct s3c_rtc *info)
442{
443 unsigned int con;
444
445 con = readw(info->base + S3C2410_RTCCON);
446 con &= ~S3C2410_RTCCON_RTCEN;
447 writew(con, info->base + S3C2410_RTCCON);
448
449 con = readb(info->base + S3C2410_TICNT);
450 con &= ~S3C2410_TICNT_ENABLE;
451 writeb(con, info->base + S3C2410_TICNT);
452}
453
454static void s3c6410_rtc_disable(struct s3c_rtc *info)
455{
456 unsigned int con;
457
458 con = readw(info->base + S3C2410_RTCCON);
459 con &= ~S3C64XX_RTCCON_TICEN;
460 con &= ~S3C2410_RTCCON_RTCEN;
461 writew(con, info->base + S3C2410_RTCCON);
462}
463
464static int s3c_rtc_remove(struct platform_device *pdev)
465{
466 struct s3c_rtc *info = platform_get_drvdata(pdev);
467
468 s3c_rtc_setaie(info->dev, 0);
469
470 if (info->data->needs_src_clk)
471 clk_unprepare(info->rtc_src_clk);
472 clk_unprepare(info->rtc_clk);
473
474 return 0;
475}
476
477static const struct of_device_id s3c_rtc_dt_match[];
478
479static const struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
480{
481 const struct of_device_id *match;
482
483 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
484 return match->data;
485}
486
487static int s3c_rtc_probe(struct platform_device *pdev)
488{
489 struct s3c_rtc *info = NULL;
490 struct rtc_time rtc_tm;
491 struct resource *res;
492 int ret;
493
494 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
495 if (!info)
496 return -ENOMEM;
497
498 /* find the IRQs */
499 info->irq_tick = platform_get_irq(pdev, 1);
500 if (info->irq_tick < 0) {
501 dev_err(&pdev->dev, "no irq for rtc tick\n");
502 return info->irq_tick;
503 }
504
505 info->dev = &pdev->dev;
506 info->data = s3c_rtc_get_data(pdev);
507 if (!info->data) {
508 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
509 return -EINVAL;
510 }
511 spin_lock_init(&info->pie_lock);
512 spin_lock_init(&info->alarm_clk_lock);
513
514 platform_set_drvdata(pdev, info);
515
516 info->irq_alarm = platform_get_irq(pdev, 0);
517 if (info->irq_alarm < 0) {
518 dev_err(&pdev->dev, "no irq for alarm\n");
519 return info->irq_alarm;
520 }
521
522 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
523 info->irq_tick, info->irq_alarm);
524
525 /* get the memory region */
526 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
527 info->base = devm_ioremap_resource(&pdev->dev, res);
528 if (IS_ERR(info->base))
529 return PTR_ERR(info->base);
530
531 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
532 if (IS_ERR(info->rtc_clk)) {
533 ret = PTR_ERR(info->rtc_clk);
534 if (ret != -EPROBE_DEFER)
535 dev_err(&pdev->dev, "failed to find rtc clock\n");
536 else
537 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
538 return ret;
539 }
540 ret = clk_prepare_enable(info->rtc_clk);
541 if (ret)
542 return ret;
543
544 if (info->data->needs_src_clk) {
545 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
546 if (IS_ERR(info->rtc_src_clk)) {
547 ret = PTR_ERR(info->rtc_src_clk);
548 if (ret != -EPROBE_DEFER)
549 dev_err(&pdev->dev,
550 "failed to find rtc source clock\n");
551 else
552 dev_dbg(&pdev->dev,
553 "probe deferred due to missing rtc src clk\n");
554 goto err_src_clk;
555 }
556 ret = clk_prepare_enable(info->rtc_src_clk);
557 if (ret)
558 goto err_src_clk;
559 }
560
561 /* check to see if everything is setup correctly */
562 if (info->data->enable)
563 info->data->enable(info);
564
565 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
566 readw(info->base + S3C2410_RTCCON));
567
568 device_init_wakeup(&pdev->dev, 1);
569
570 /* Check RTC Time */
571 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
572 rtc_tm.tm_year = 100;
573 rtc_tm.tm_mon = 0;
574 rtc_tm.tm_mday = 1;
575 rtc_tm.tm_hour = 0;
576 rtc_tm.tm_min = 0;
577 rtc_tm.tm_sec = 0;
578
579 s3c_rtc_settime(&pdev->dev, &rtc_tm);
580
581 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
582 }
583
584 /* register RTC and exit */
585 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
586 THIS_MODULE);
587 if (IS_ERR(info->rtc)) {
588 dev_err(&pdev->dev, "cannot attach rtc\n");
589 ret = PTR_ERR(info->rtc);
590 goto err_nortc;
591 }
592
593 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
594 0, "s3c2410-rtc alarm", info);
595 if (ret) {
596 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
597 goto err_nortc;
598 }
599
600 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
601 0, "s3c2410-rtc tick", info);
602 if (ret) {
603 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
604 goto err_nortc;
605 }
606
607 if (info->data->select_tick_clk)
608 info->data->select_tick_clk(info);
609
610 s3c_rtc_setfreq(info, 1);
611
612 return 0;
613
614err_nortc:
615 if (info->data->disable)
616 info->data->disable(info);
617
618 if (info->data->needs_src_clk)
619 clk_disable_unprepare(info->rtc_src_clk);
620err_src_clk:
621 clk_disable_unprepare(info->rtc_clk);
622
623 return ret;
624}
625
626#ifdef CONFIG_PM_SLEEP
627
628static int s3c_rtc_suspend(struct device *dev)
629{
630 struct s3c_rtc *info = dev_get_drvdata(dev);
631 int ret;
632
633 ret = s3c_rtc_enable_clk(info);
634 if (ret)
635 return ret;
636
637 /* save TICNT for anyone using periodic interrupts */
638 if (info->data->save_tick_cnt)
639 info->data->save_tick_cnt(info);
640
641 if (info->data->disable)
642 info->data->disable(info);
643
644 if (device_may_wakeup(dev) && !info->wake_en) {
645 if (enable_irq_wake(info->irq_alarm) == 0)
646 info->wake_en = true;
647 else
648 dev_err(dev, "enable_irq_wake failed\n");
649 }
650
651 return 0;
652}
653
654static int s3c_rtc_resume(struct device *dev)
655{
656 struct s3c_rtc *info = dev_get_drvdata(dev);
657
658 if (info->data->enable)
659 info->data->enable(info);
660
661 if (info->data->restore_tick_cnt)
662 info->data->restore_tick_cnt(info);
663
664 s3c_rtc_disable_clk(info);
665
666 if (device_may_wakeup(dev) && info->wake_en) {
667 disable_irq_wake(info->irq_alarm);
668 info->wake_en = false;
669 }
670
671 return 0;
672}
673#endif
674static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
675
676static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
677{
678 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
679}
680
681static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
682{
683 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
684 writeb(mask, info->base + S3C2410_INTP);
685}
686
687static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
688{
689 unsigned int tmp = 0;
690 int val;
691
692 tmp = readb(info->base + S3C2410_TICNT);
693 tmp &= S3C2410_TICNT_ENABLE;
694
695 val = (info->rtc->max_user_freq / freq) - 1;
696 tmp |= val;
697
698 writel(tmp, info->base + S3C2410_TICNT);
699}
700
701static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
702{
703 unsigned int tmp = 0;
704 int val;
705
706 tmp = readb(info->base + S3C2410_TICNT);
707 tmp &= S3C2410_TICNT_ENABLE;
708
709 val = (info->rtc->max_user_freq / freq) - 1;
710
711 tmp |= S3C2443_TICNT_PART(val);
712 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
713
714 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
715
716 writel(tmp, info->base + S3C2410_TICNT);
717}
718
719static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
720{
721 unsigned int tmp = 0;
722 int val;
723
724 tmp = readb(info->base + S3C2410_TICNT);
725 tmp &= S3C2410_TICNT_ENABLE;
726
727 val = (info->rtc->max_user_freq / freq) - 1;
728
729 tmp |= S3C2443_TICNT_PART(val);
730 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
731
732 writel(tmp, info->base + S3C2410_TICNT);
733}
734
735static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
736{
737 int val;
738
739 val = (info->rtc->max_user_freq / freq) - 1;
740 writel(val, info->base + S3C2410_TICNT);
741}
742
743static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
744{
745 unsigned int ticnt;
746
747 ticnt = readb(info->base + S3C2410_TICNT);
748 ticnt &= S3C2410_TICNT_ENABLE;
749
750 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
751}
752
753static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
754{
755 unsigned int con;
756
757 con = readw(info->base + S3C2410_RTCCON);
758 con |= S3C2443_RTCCON_TICSEL;
759 writew(con, info->base + S3C2410_RTCCON);
760}
761
762static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
763{
764 unsigned int ticnt;
765
766 ticnt = readw(info->base + S3C2410_RTCCON);
767 ticnt &= S3C64XX_RTCCON_TICEN;
768
769 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
770}
771
772static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
773{
774 info->ticnt_save = readb(info->base + S3C2410_TICNT);
775}
776
777static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
778{
779 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
780}
781
782static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
783{
784 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
785 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
786 info->ticnt_save = readl(info->base + S3C2410_TICNT);
787}
788
789static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
790{
791 unsigned int con;
792
793 writel(info->ticnt_save, info->base + S3C2410_TICNT);
794 if (info->ticnt_en_save) {
795 con = readw(info->base + S3C2410_RTCCON);
796 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON);
797 }
798}
799
800static struct s3c_rtc_data const s3c2410_rtc_data = {
801 .max_user_freq = 128,
802 .irq_handler = s3c24xx_rtc_irq,
803 .set_freq = s3c2410_rtc_setfreq,
804 .enable_tick = s3c24xx_rtc_enable_tick,
805 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
806 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
807 .enable = s3c24xx_rtc_enable,
808 .disable = s3c24xx_rtc_disable,
809};
810
811static struct s3c_rtc_data const s3c2416_rtc_data = {
812 .max_user_freq = 32768,
813 .irq_handler = s3c24xx_rtc_irq,
814 .set_freq = s3c2416_rtc_setfreq,
815 .enable_tick = s3c24xx_rtc_enable_tick,
816 .select_tick_clk = s3c2416_rtc_select_tick_clk,
817 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
818 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
819 .enable = s3c24xx_rtc_enable,
820 .disable = s3c24xx_rtc_disable,
821};
822
823static struct s3c_rtc_data const s3c2443_rtc_data = {
824 .max_user_freq = 32768,
825 .irq_handler = s3c24xx_rtc_irq,
826 .set_freq = s3c2443_rtc_setfreq,
827 .enable_tick = s3c24xx_rtc_enable_tick,
828 .select_tick_clk = s3c2416_rtc_select_tick_clk,
829 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
830 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
831 .enable = s3c24xx_rtc_enable,
832 .disable = s3c24xx_rtc_disable,
833};
834
835static struct s3c_rtc_data const s3c6410_rtc_data = {
836 .max_user_freq = 32768,
837 .needs_src_clk = true,
838 .irq_handler = s3c6410_rtc_irq,
839 .set_freq = s3c6410_rtc_setfreq,
840 .enable_tick = s3c6410_rtc_enable_tick,
841 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
842 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
843 .enable = s3c24xx_rtc_enable,
844 .disable = s3c6410_rtc_disable,
845};
846
847static const struct of_device_id s3c_rtc_dt_match[] = {
848 {
849 .compatible = "samsung,s3c2410-rtc",
850 .data = &s3c2410_rtc_data,
851 }, {
852 .compatible = "samsung,s3c2416-rtc",
853 .data = &s3c2416_rtc_data,
854 }, {
855 .compatible = "samsung,s3c2443-rtc",
856 .data = &s3c2443_rtc_data,
857 }, {
858 .compatible = "samsung,s3c6410-rtc",
859 .data = &s3c6410_rtc_data,
860 }, {
861 .compatible = "samsung,exynos3250-rtc",
862 .data = &s3c6410_rtc_data,
863 },
864 { /* sentinel */ },
865};
866MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
867
868static struct platform_driver s3c_rtc_driver = {
869 .probe = s3c_rtc_probe,
870 .remove = s3c_rtc_remove,
871 .driver = {
872 .name = "s3c-rtc",
873 .pm = &s3c_rtc_pm_ops,
874 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
875 },
876};
877module_platform_driver(s3c_rtc_driver);
878
879MODULE_DESCRIPTION("Samsung S3C RTC Driver");
880MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
881MODULE_LICENSE("GPL");
882MODULE_ALIAS("platform:s3c2410-rtc");