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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2012, The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/kernel.h>
7#include <linux/init.h>
8#include <linux/types.h>
9#include <linux/device.h>
10#include <linux/io.h>
11#include <linux/err.h>
12#include <linux/export.h>
13#include <linux/slab.h>
14#include <linux/stringhash.h>
15#include <linux/mutex.h>
16#include <linux/clk.h>
17#include <linux/coresight.h>
18#include <linux/of_platform.h>
19#include <linux/delay.h>
20#include <linux/pm_runtime.h>
21
22#include "coresight-etm-perf.h"
23#include "coresight-priv.h"
24
25static DEFINE_MUTEX(coresight_mutex);
26
27/**
28 * struct coresight_node - elements of a path, from source to sink
29 * @csdev: Address of an element.
30 * @link: hook to the list.
31 */
32struct coresight_node {
33 struct coresight_device *csdev;
34 struct list_head link;
35};
36
37/*
38 * When operating Coresight drivers from the sysFS interface, only a single
39 * path can exist from a tracer (associated to a CPU) to a sink.
40 */
41static DEFINE_PER_CPU(struct list_head *, tracer_path);
42
43/*
44 * As of this writing only a single STM can be found in CS topologies. Since
45 * there is no way to know if we'll ever see more and what kind of
46 * configuration they will enact, for the time being only define a single path
47 * for STM.
48 */
49static struct list_head *stm_path;
50
51/*
52 * When losing synchronisation a new barrier packet needs to be inserted at the
53 * beginning of the data collected in a buffer. That way the decoder knows that
54 * it needs to look for another sync sequence.
55 */
56const u32 barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
57
58static int coresight_id_match(struct device *dev, void *data)
59{
60 int trace_id, i_trace_id;
61 struct coresight_device *csdev, *i_csdev;
62
63 csdev = data;
64 i_csdev = to_coresight_device(dev);
65
66 /*
67 * No need to care about oneself and components that are not
68 * sources or not enabled
69 */
70 if (i_csdev == csdev || !i_csdev->enable ||
71 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
72 return 0;
73
74 /* Get the source ID for both compoment */
75 trace_id = source_ops(csdev)->trace_id(csdev);
76 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev);
77
78 /* All you need is one */
79 if (trace_id == i_trace_id)
80 return 1;
81
82 return 0;
83}
84
85static int coresight_source_is_unique(struct coresight_device *csdev)
86{
87 int trace_id = source_ops(csdev)->trace_id(csdev);
88
89 /* this shouldn't happen */
90 if (trace_id < 0)
91 return 0;
92
93 return !bus_for_each_dev(&coresight_bustype, NULL,
94 csdev, coresight_id_match);
95}
96
97static int coresight_find_link_inport(struct coresight_device *csdev,
98 struct coresight_device *parent)
99{
100 int i;
101 struct coresight_connection *conn;
102
103 for (i = 0; i < parent->pdata->nr_outport; i++) {
104 conn = &parent->pdata->conns[i];
105 if (conn->child_dev == csdev)
106 return conn->child_port;
107 }
108
109 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
110 dev_name(&parent->dev), dev_name(&csdev->dev));
111
112 return -ENODEV;
113}
114
115static int coresight_find_link_outport(struct coresight_device *csdev,
116 struct coresight_device *child)
117{
118 int i;
119 struct coresight_connection *conn;
120
121 for (i = 0; i < csdev->pdata->nr_outport; i++) {
122 conn = &csdev->pdata->conns[i];
123 if (conn->child_dev == child)
124 return conn->outport;
125 }
126
127 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
128 dev_name(&csdev->dev), dev_name(&child->dev));
129
130 return -ENODEV;
131}
132
133static inline u32 coresight_read_claim_tags(void __iomem *base)
134{
135 return readl_relaxed(base + CORESIGHT_CLAIMCLR);
136}
137
138static inline bool coresight_is_claimed_self_hosted(void __iomem *base)
139{
140 return coresight_read_claim_tags(base) == CORESIGHT_CLAIM_SELF_HOSTED;
141}
142
143static inline bool coresight_is_claimed_any(void __iomem *base)
144{
145 return coresight_read_claim_tags(base) != 0;
146}
147
148static inline void coresight_set_claim_tags(void __iomem *base)
149{
150 writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMSET);
151 isb();
152}
153
154static inline void coresight_clear_claim_tags(void __iomem *base)
155{
156 writel_relaxed(CORESIGHT_CLAIM_SELF_HOSTED, base + CORESIGHT_CLAIMCLR);
157 isb();
158}
159
160/*
161 * coresight_claim_device_unlocked : Claim the device for self-hosted usage
162 * to prevent an external tool from touching this device. As per PSCI
163 * standards, section "Preserving the execution context" => "Debug and Trace
164 * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and
165 * DBGCLAIM[0] is reserved for external tools.
166 *
167 * Called with CS_UNLOCKed for the component.
168 * Returns : 0 on success
169 */
170int coresight_claim_device_unlocked(void __iomem *base)
171{
172 if (coresight_is_claimed_any(base))
173 return -EBUSY;
174
175 coresight_set_claim_tags(base);
176 if (coresight_is_claimed_self_hosted(base))
177 return 0;
178 /* There was a race setting the tags, clean up and fail */
179 coresight_clear_claim_tags(base);
180 return -EBUSY;
181}
182
183int coresight_claim_device(void __iomem *base)
184{
185 int rc;
186
187 CS_UNLOCK(base);
188 rc = coresight_claim_device_unlocked(base);
189 CS_LOCK(base);
190
191 return rc;
192}
193
194/*
195 * coresight_disclaim_device_unlocked : Clear the claim tags for the device.
196 * Called with CS_UNLOCKed for the component.
197 */
198void coresight_disclaim_device_unlocked(void __iomem *base)
199{
200
201 if (coresight_is_claimed_self_hosted(base))
202 coresight_clear_claim_tags(base);
203 else
204 /*
205 * The external agent may have not honoured our claim
206 * and has manipulated it. Or something else has seriously
207 * gone wrong in our driver.
208 */
209 WARN_ON_ONCE(1);
210}
211
212void coresight_disclaim_device(void __iomem *base)
213{
214 CS_UNLOCK(base);
215 coresight_disclaim_device_unlocked(base);
216 CS_LOCK(base);
217}
218
219/* enable or disable an associated CTI device of the supplied CS device */
220static int
221coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable)
222{
223 int ect_ret = 0;
224 struct coresight_device *ect_csdev = csdev->ect_dev;
225
226 if (!ect_csdev)
227 return 0;
228
229 if (enable) {
230 if (ect_ops(ect_csdev)->enable)
231 ect_ret = ect_ops(ect_csdev)->enable(ect_csdev);
232 } else {
233 if (ect_ops(ect_csdev)->disable)
234 ect_ret = ect_ops(ect_csdev)->disable(ect_csdev);
235 }
236
237 /* output warning if ECT enable is preventing trace operation */
238 if (ect_ret)
239 dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n",
240 dev_name(&ect_csdev->dev),
241 enable ? "enable" : "disable");
242 return ect_ret;
243}
244
245/*
246 * Set the associated ect / cti device while holding the coresight_mutex
247 * to avoid a race with coresight_enable that may try to use this value.
248 */
249void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev,
250 struct coresight_device *ect_csdev)
251{
252 mutex_lock(&coresight_mutex);
253 csdev->ect_dev = ect_csdev;
254 mutex_unlock(&coresight_mutex);
255}
256
257static int coresight_enable_sink(struct coresight_device *csdev,
258 u32 mode, void *data)
259{
260 int ret;
261
262 /*
263 * We need to make sure the "new" session is compatible with the
264 * existing "mode" of operation.
265 */
266 if (!sink_ops(csdev)->enable)
267 return -EINVAL;
268
269 ret = coresight_control_assoc_ectdev(csdev, true);
270 if (ret)
271 return ret;
272 ret = sink_ops(csdev)->enable(csdev, mode, data);
273 if (ret) {
274 coresight_control_assoc_ectdev(csdev, false);
275 return ret;
276 }
277 csdev->enable = true;
278
279 return 0;
280}
281
282static void coresight_disable_sink(struct coresight_device *csdev)
283{
284 int ret;
285
286 if (!sink_ops(csdev)->disable)
287 return;
288
289 ret = sink_ops(csdev)->disable(csdev);
290 if (ret)
291 return;
292 coresight_control_assoc_ectdev(csdev, false);
293 csdev->enable = false;
294}
295
296static int coresight_enable_link(struct coresight_device *csdev,
297 struct coresight_device *parent,
298 struct coresight_device *child)
299{
300 int ret = 0;
301 int link_subtype;
302 int inport, outport;
303
304 if (!parent || !child)
305 return -EINVAL;
306
307 inport = coresight_find_link_inport(csdev, parent);
308 outport = coresight_find_link_outport(csdev, child);
309 link_subtype = csdev->subtype.link_subtype;
310
311 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0)
312 return inport;
313 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0)
314 return outport;
315
316 if (link_ops(csdev)->enable) {
317 ret = coresight_control_assoc_ectdev(csdev, true);
318 if (!ret) {
319 ret = link_ops(csdev)->enable(csdev, inport, outport);
320 if (ret)
321 coresight_control_assoc_ectdev(csdev, false);
322 }
323 }
324
325 if (!ret)
326 csdev->enable = true;
327
328 return ret;
329}
330
331static void coresight_disable_link(struct coresight_device *csdev,
332 struct coresight_device *parent,
333 struct coresight_device *child)
334{
335 int i, nr_conns;
336 int link_subtype;
337 int inport, outport;
338
339 if (!parent || !child)
340 return;
341
342 inport = coresight_find_link_inport(csdev, parent);
343 outport = coresight_find_link_outport(csdev, child);
344 link_subtype = csdev->subtype.link_subtype;
345
346 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) {
347 nr_conns = csdev->pdata->nr_inport;
348 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) {
349 nr_conns = csdev->pdata->nr_outport;
350 } else {
351 nr_conns = 1;
352 }
353
354 if (link_ops(csdev)->disable) {
355 link_ops(csdev)->disable(csdev, inport, outport);
356 coresight_control_assoc_ectdev(csdev, false);
357 }
358
359 for (i = 0; i < nr_conns; i++)
360 if (atomic_read(&csdev->refcnt[i]) != 0)
361 return;
362
363 csdev->enable = false;
364}
365
366static int coresight_enable_source(struct coresight_device *csdev, u32 mode)
367{
368 int ret;
369
370 if (!coresight_source_is_unique(csdev)) {
371 dev_warn(&csdev->dev, "traceID %d not unique\n",
372 source_ops(csdev)->trace_id(csdev));
373 return -EINVAL;
374 }
375
376 if (!csdev->enable) {
377 if (source_ops(csdev)->enable) {
378 ret = coresight_control_assoc_ectdev(csdev, true);
379 if (ret)
380 return ret;
381 ret = source_ops(csdev)->enable(csdev, NULL, mode);
382 if (ret) {
383 coresight_control_assoc_ectdev(csdev, false);
384 return ret;
385 };
386 }
387 csdev->enable = true;
388 }
389
390 atomic_inc(csdev->refcnt);
391
392 return 0;
393}
394
395/**
396 * coresight_disable_source - Drop the reference count by 1 and disable
397 * the device if there are no users left.
398 *
399 * @csdev - The coresight device to disable
400 *
401 * Returns true if the device has been disabled.
402 */
403static bool coresight_disable_source(struct coresight_device *csdev)
404{
405 if (atomic_dec_return(csdev->refcnt) == 0) {
406 if (source_ops(csdev)->disable)
407 source_ops(csdev)->disable(csdev, NULL);
408 coresight_control_assoc_ectdev(csdev, false);
409 csdev->enable = false;
410 }
411 return !csdev->enable;
412}
413
414/*
415 * coresight_disable_path_from : Disable components in the given path beyond
416 * @nd in the list. If @nd is NULL, all the components, except the SOURCE are
417 * disabled.
418 */
419static void coresight_disable_path_from(struct list_head *path,
420 struct coresight_node *nd)
421{
422 u32 type;
423 struct coresight_device *csdev, *parent, *child;
424
425 if (!nd)
426 nd = list_first_entry(path, struct coresight_node, link);
427
428 list_for_each_entry_continue(nd, path, link) {
429 csdev = nd->csdev;
430 type = csdev->type;
431
432 /*
433 * ETF devices are tricky... They can be a link or a sink,
434 * depending on how they are configured. If an ETF has been
435 * "activated" it will be configured as a sink, otherwise
436 * go ahead with the link configuration.
437 */
438 if (type == CORESIGHT_DEV_TYPE_LINKSINK)
439 type = (csdev == coresight_get_sink(path)) ?
440 CORESIGHT_DEV_TYPE_SINK :
441 CORESIGHT_DEV_TYPE_LINK;
442
443 switch (type) {
444 case CORESIGHT_DEV_TYPE_SINK:
445 coresight_disable_sink(csdev);
446 break;
447 case CORESIGHT_DEV_TYPE_SOURCE:
448 /*
449 * We skip the first node in the path assuming that it
450 * is the source. So we don't expect a source device in
451 * the middle of a path.
452 */
453 WARN_ON(1);
454 break;
455 case CORESIGHT_DEV_TYPE_LINK:
456 parent = list_prev_entry(nd, link)->csdev;
457 child = list_next_entry(nd, link)->csdev;
458 coresight_disable_link(csdev, parent, child);
459 break;
460 default:
461 break;
462 }
463 }
464}
465
466void coresight_disable_path(struct list_head *path)
467{
468 coresight_disable_path_from(path, NULL);
469}
470
471int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data)
472{
473
474 int ret = 0;
475 u32 type;
476 struct coresight_node *nd;
477 struct coresight_device *csdev, *parent, *child;
478
479 list_for_each_entry_reverse(nd, path, link) {
480 csdev = nd->csdev;
481 type = csdev->type;
482
483 /*
484 * ETF devices are tricky... They can be a link or a sink,
485 * depending on how they are configured. If an ETF has been
486 * "activated" it will be configured as a sink, otherwise
487 * go ahead with the link configuration.
488 */
489 if (type == CORESIGHT_DEV_TYPE_LINKSINK)
490 type = (csdev == coresight_get_sink(path)) ?
491 CORESIGHT_DEV_TYPE_SINK :
492 CORESIGHT_DEV_TYPE_LINK;
493
494 switch (type) {
495 case CORESIGHT_DEV_TYPE_SINK:
496 ret = coresight_enable_sink(csdev, mode, sink_data);
497 /*
498 * Sink is the first component turned on. If we
499 * failed to enable the sink, there are no components
500 * that need disabling. Disabling the path here
501 * would mean we could disrupt an existing session.
502 */
503 if (ret)
504 goto out;
505 break;
506 case CORESIGHT_DEV_TYPE_SOURCE:
507 /* sources are enabled from either sysFS or Perf */
508 break;
509 case CORESIGHT_DEV_TYPE_LINK:
510 parent = list_prev_entry(nd, link)->csdev;
511 child = list_next_entry(nd, link)->csdev;
512 ret = coresight_enable_link(csdev, parent, child);
513 if (ret)
514 goto err;
515 break;
516 default:
517 goto err;
518 }
519 }
520
521out:
522 return ret;
523err:
524 coresight_disable_path_from(path, nd);
525 goto out;
526}
527
528struct coresight_device *coresight_get_sink(struct list_head *path)
529{
530 struct coresight_device *csdev;
531
532 if (!path)
533 return NULL;
534
535 csdev = list_last_entry(path, struct coresight_node, link)->csdev;
536 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
537 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
538 return NULL;
539
540 return csdev;
541}
542
543static int coresight_enabled_sink(struct device *dev, const void *data)
544{
545 const bool *reset = data;
546 struct coresight_device *csdev = to_coresight_device(dev);
547
548 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
549 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
550 csdev->activated) {
551 /*
552 * Now that we have a handle on the sink for this session,
553 * disable the sysFS "enable_sink" flag so that possible
554 * concurrent perf session that wish to use another sink don't
555 * trip on it. Doing so has no ramification for the current
556 * session.
557 */
558 if (*reset)
559 csdev->activated = false;
560
561 return 1;
562 }
563
564 return 0;
565}
566
567/**
568 * coresight_get_enabled_sink - returns the first enabled sink found on the bus
569 * @deactivate: Whether the 'enable_sink' flag should be reset
570 *
571 * When operated from perf the deactivate parameter should be set to 'true'.
572 * That way the "enabled_sink" flag of the sink that was selected can be reset,
573 * allowing for other concurrent perf sessions to choose a different sink.
574 *
575 * When operated from sysFS users have full control and as such the deactivate
576 * parameter should be set to 'false', hence mandating users to explicitly
577 * clear the flag.
578 */
579struct coresight_device *coresight_get_enabled_sink(bool deactivate)
580{
581 struct device *dev = NULL;
582
583 dev = bus_find_device(&coresight_bustype, NULL, &deactivate,
584 coresight_enabled_sink);
585
586 return dev ? to_coresight_device(dev) : NULL;
587}
588
589static int coresight_sink_by_id(struct device *dev, const void *data)
590{
591 struct coresight_device *csdev = to_coresight_device(dev);
592 unsigned long hash;
593
594 if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
595 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
596
597 if (!csdev->ea)
598 return 0;
599 /*
600 * See function etm_perf_add_symlink_sink() to know where
601 * this comes from.
602 */
603 hash = (unsigned long)csdev->ea->var;
604
605 if ((u32)hash == *(u32 *)data)
606 return 1;
607 }
608
609 return 0;
610}
611
612/**
613 * coresight_get_sink_by_id - returns the sink that matches the id
614 * @id: Id of the sink to match
615 *
616 * The name of a sink is unique, whether it is found on the AMBA bus or
617 * otherwise. As such the hash of that name can easily be used to identify
618 * a sink.
619 */
620struct coresight_device *coresight_get_sink_by_id(u32 id)
621{
622 struct device *dev = NULL;
623
624 dev = bus_find_device(&coresight_bustype, NULL, &id,
625 coresight_sink_by_id);
626
627 return dev ? to_coresight_device(dev) : NULL;
628}
629
630/*
631 * coresight_grab_device - Power up this device and any of the helper
632 * devices connected to it for trace operation. Since the helper devices
633 * don't appear on the trace path, they should be handled along with the
634 * the master device.
635 */
636static void coresight_grab_device(struct coresight_device *csdev)
637{
638 int i;
639
640 for (i = 0; i < csdev->pdata->nr_outport; i++) {
641 struct coresight_device *child;
642
643 child = csdev->pdata->conns[i].child_dev;
644 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
645 pm_runtime_get_sync(child->dev.parent);
646 }
647 pm_runtime_get_sync(csdev->dev.parent);
648}
649
650/*
651 * coresight_drop_device - Release this device and any of the helper
652 * devices connected to it.
653 */
654static void coresight_drop_device(struct coresight_device *csdev)
655{
656 int i;
657
658 pm_runtime_put(csdev->dev.parent);
659 for (i = 0; i < csdev->pdata->nr_outport; i++) {
660 struct coresight_device *child;
661
662 child = csdev->pdata->conns[i].child_dev;
663 if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
664 pm_runtime_put(child->dev.parent);
665 }
666}
667
668/**
669 * _coresight_build_path - recursively build a path from a @csdev to a sink.
670 * @csdev: The device to start from.
671 * @path: The list to add devices to.
672 *
673 * The tree of Coresight device is traversed until an activated sink is
674 * found. From there the sink is added to the list along with all the
675 * devices that led to that point - the end result is a list from source
676 * to sink. In that list the source is the first device and the sink the
677 * last one.
678 */
679static int _coresight_build_path(struct coresight_device *csdev,
680 struct coresight_device *sink,
681 struct list_head *path)
682{
683 int i;
684 bool found = false;
685 struct coresight_node *node;
686
687 /* An activated sink has been found. Enqueue the element */
688 if (csdev == sink)
689 goto out;
690
691 /* Not a sink - recursively explore each port found on this element */
692 for (i = 0; i < csdev->pdata->nr_outport; i++) {
693 struct coresight_device *child_dev;
694
695 child_dev = csdev->pdata->conns[i].child_dev;
696 if (child_dev &&
697 _coresight_build_path(child_dev, sink, path) == 0) {
698 found = true;
699 break;
700 }
701 }
702
703 if (!found)
704 return -ENODEV;
705
706out:
707 /*
708 * A path from this element to a sink has been found. The elements
709 * leading to the sink are already enqueued, all that is left to do
710 * is tell the PM runtime core we need this element and add a node
711 * for it.
712 */
713 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL);
714 if (!node)
715 return -ENOMEM;
716
717 coresight_grab_device(csdev);
718 node->csdev = csdev;
719 list_add(&node->link, path);
720
721 return 0;
722}
723
724struct list_head *coresight_build_path(struct coresight_device *source,
725 struct coresight_device *sink)
726{
727 struct list_head *path;
728 int rc;
729
730 if (!sink)
731 return ERR_PTR(-EINVAL);
732
733 path = kzalloc(sizeof(struct list_head), GFP_KERNEL);
734 if (!path)
735 return ERR_PTR(-ENOMEM);
736
737 INIT_LIST_HEAD(path);
738
739 rc = _coresight_build_path(source, sink, path);
740 if (rc) {
741 kfree(path);
742 return ERR_PTR(rc);
743 }
744
745 return path;
746}
747
748/**
749 * coresight_release_path - release a previously built path.
750 * @path: the path to release.
751 *
752 * Go through all the elements of a path and 1) removed it from the list and
753 * 2) free the memory allocated for each node.
754 */
755void coresight_release_path(struct list_head *path)
756{
757 struct coresight_device *csdev;
758 struct coresight_node *nd, *next;
759
760 list_for_each_entry_safe(nd, next, path, link) {
761 csdev = nd->csdev;
762
763 coresight_drop_device(csdev);
764 list_del(&nd->link);
765 kfree(nd);
766 }
767
768 kfree(path);
769 path = NULL;
770}
771
772/* return true if the device is a suitable type for a default sink */
773static inline bool coresight_is_def_sink_type(struct coresight_device *csdev)
774{
775 /* sink & correct subtype */
776 if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) ||
777 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) &&
778 (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER))
779 return true;
780 return false;
781}
782
783/**
784 * coresight_select_best_sink - return the best sink for use as default from
785 * the two provided.
786 *
787 * @sink: current best sink.
788 * @depth: search depth where current sink was found.
789 * @new_sink: new sink for comparison with current sink.
790 * @new_depth: search depth where new sink was found.
791 *
792 * Sinks prioritised according to coresight_dev_subtype_sink, with only
793 * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used.
794 *
795 * Where two sinks of equal priority are found, the sink closest to the
796 * source is used (smallest search depth).
797 *
798 * return @new_sink & update @depth if better than @sink, else return @sink.
799 */
800static struct coresight_device *
801coresight_select_best_sink(struct coresight_device *sink, int *depth,
802 struct coresight_device *new_sink, int new_depth)
803{
804 bool update = false;
805
806 if (!sink) {
807 /* first found at this level */
808 update = true;
809 } else if (new_sink->subtype.sink_subtype >
810 sink->subtype.sink_subtype) {
811 /* found better sink */
812 update = true;
813 } else if ((new_sink->subtype.sink_subtype ==
814 sink->subtype.sink_subtype) &&
815 (*depth > new_depth)) {
816 /* found same but closer sink */
817 update = true;
818 }
819
820 if (update)
821 *depth = new_depth;
822 return update ? new_sink : sink;
823}
824
825/**
826 * coresight_find_sink - recursive function to walk trace connections from
827 * source to find a suitable default sink.
828 *
829 * @csdev: source / current device to check.
830 * @depth: [in] search depth of calling dev, [out] depth of found sink.
831 *
832 * This will walk the connection path from a source (ETM) till a suitable
833 * sink is encountered and return that sink to the original caller.
834 *
835 * If current device is a plain sink return that & depth, otherwise recursively
836 * call child connections looking for a sink. Select best possible using
837 * coresight_select_best_sink.
838 *
839 * return best sink found, or NULL if not found at this node or child nodes.
840 */
841static struct coresight_device *
842coresight_find_sink(struct coresight_device *csdev, int *depth)
843{
844 int i, curr_depth = *depth + 1, found_depth = 0;
845 struct coresight_device *found_sink = NULL;
846
847 if (coresight_is_def_sink_type(csdev)) {
848 found_depth = curr_depth;
849 found_sink = csdev;
850 if (csdev->type == CORESIGHT_DEV_TYPE_SINK)
851 goto return_def_sink;
852 /* look past LINKSINK for something better */
853 }
854
855 /*
856 * Not a sink we want - or possible child sink may be better.
857 * recursively explore each port found on this element.
858 */
859 for (i = 0; i < csdev->pdata->nr_outport; i++) {
860 struct coresight_device *child_dev, *sink = NULL;
861 int child_depth = curr_depth;
862
863 child_dev = csdev->pdata->conns[i].child_dev;
864 if (child_dev)
865 sink = coresight_find_sink(child_dev, &child_depth);
866
867 if (sink)
868 found_sink = coresight_select_best_sink(found_sink,
869 &found_depth,
870 sink,
871 child_depth);
872 }
873
874return_def_sink:
875 /* return found sink and depth */
876 if (found_sink)
877 *depth = found_depth;
878 return found_sink;
879}
880
881/**
882 * coresight_find_default_sink: Find a sink suitable for use as a
883 * default sink.
884 *
885 * @csdev: starting source to find a connected sink.
886 *
887 * Walks connections graph looking for a suitable sink to enable for the
888 * supplied source. Uses CoreSight device subtypes and distance from source
889 * to select the best sink.
890 *
891 * If a sink is found, then the default sink for this device is set and
892 * will be automatically used in future.
893 *
894 * Used in cases where the CoreSight user (perf / sysfs) has not selected a
895 * sink.
896 */
897struct coresight_device *
898coresight_find_default_sink(struct coresight_device *csdev)
899{
900 int depth = 0;
901
902 /* look for a default sink if we have not found for this device */
903 if (!csdev->def_sink)
904 csdev->def_sink = coresight_find_sink(csdev, &depth);
905 return csdev->def_sink;
906}
907
908static int coresight_remove_sink_ref(struct device *dev, void *data)
909{
910 struct coresight_device *sink = data;
911 struct coresight_device *source = to_coresight_device(dev);
912
913 if (source->def_sink == sink)
914 source->def_sink = NULL;
915 return 0;
916}
917
918/**
919 * coresight_clear_default_sink: Remove all default sink references to the
920 * supplied sink.
921 *
922 * If supplied device is a sink, then check all the bus devices and clear
923 * out all the references to this sink from the coresight_device def_sink
924 * parameter.
925 *
926 * @csdev: coresight sink - remove references to this from all sources.
927 */
928static void coresight_clear_default_sink(struct coresight_device *csdev)
929{
930 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) ||
931 (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) {
932 bus_for_each_dev(&coresight_bustype, NULL, csdev,
933 coresight_remove_sink_ref);
934 }
935}
936
937/** coresight_validate_source - make sure a source has the right credentials
938 * @csdev: the device structure for a source.
939 * @function: the function this was called from.
940 *
941 * Assumes the coresight_mutex is held.
942 */
943static int coresight_validate_source(struct coresight_device *csdev,
944 const char *function)
945{
946 u32 type, subtype;
947
948 type = csdev->type;
949 subtype = csdev->subtype.source_subtype;
950
951 if (type != CORESIGHT_DEV_TYPE_SOURCE) {
952 dev_err(&csdev->dev, "wrong device type in %s\n", function);
953 return -EINVAL;
954 }
955
956 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
957 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
958 dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
959 return -EINVAL;
960 }
961
962 return 0;
963}
964
965int coresight_enable(struct coresight_device *csdev)
966{
967 int cpu, ret = 0;
968 struct coresight_device *sink;
969 struct list_head *path;
970 enum coresight_dev_subtype_source subtype;
971
972 subtype = csdev->subtype.source_subtype;
973
974 mutex_lock(&coresight_mutex);
975
976 ret = coresight_validate_source(csdev, __func__);
977 if (ret)
978 goto out;
979
980 if (csdev->enable) {
981 /*
982 * There could be multiple applications driving the software
983 * source. So keep the refcount for each such user when the
984 * source is already enabled.
985 */
986 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE)
987 atomic_inc(csdev->refcnt);
988 goto out;
989 }
990
991 /*
992 * Search for a valid sink for this session but don't reset the
993 * "enable_sink" flag in sysFS. Users get to do that explicitly.
994 */
995 sink = coresight_get_enabled_sink(false);
996 if (!sink) {
997 ret = -EINVAL;
998 goto out;
999 }
1000
1001 path = coresight_build_path(csdev, sink);
1002 if (IS_ERR(path)) {
1003 pr_err("building path(s) failed\n");
1004 ret = PTR_ERR(path);
1005 goto out;
1006 }
1007
1008 ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL);
1009 if (ret)
1010 goto err_path;
1011
1012 ret = coresight_enable_source(csdev, CS_MODE_SYSFS);
1013 if (ret)
1014 goto err_source;
1015
1016 switch (subtype) {
1017 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
1018 /*
1019 * When working from sysFS it is important to keep track
1020 * of the paths that were created so that they can be
1021 * undone in 'coresight_disable()'. Since there can only
1022 * be a single session per tracer (when working from sysFS)
1023 * a per-cpu variable will do just fine.
1024 */
1025 cpu = source_ops(csdev)->cpu_id(csdev);
1026 per_cpu(tracer_path, cpu) = path;
1027 break;
1028 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
1029 stm_path = path;
1030 break;
1031 default:
1032 /* We can't be here */
1033 break;
1034 }
1035
1036out:
1037 mutex_unlock(&coresight_mutex);
1038 return ret;
1039
1040err_source:
1041 coresight_disable_path(path);
1042
1043err_path:
1044 coresight_release_path(path);
1045 goto out;
1046}
1047EXPORT_SYMBOL_GPL(coresight_enable);
1048
1049void coresight_disable(struct coresight_device *csdev)
1050{
1051 int cpu, ret;
1052 struct list_head *path = NULL;
1053
1054 mutex_lock(&coresight_mutex);
1055
1056 ret = coresight_validate_source(csdev, __func__);
1057 if (ret)
1058 goto out;
1059
1060 if (!csdev->enable || !coresight_disable_source(csdev))
1061 goto out;
1062
1063 switch (csdev->subtype.source_subtype) {
1064 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
1065 cpu = source_ops(csdev)->cpu_id(csdev);
1066 path = per_cpu(tracer_path, cpu);
1067 per_cpu(tracer_path, cpu) = NULL;
1068 break;
1069 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
1070 path = stm_path;
1071 stm_path = NULL;
1072 break;
1073 default:
1074 /* We can't be here */
1075 break;
1076 }
1077
1078 coresight_disable_path(path);
1079 coresight_release_path(path);
1080
1081out:
1082 mutex_unlock(&coresight_mutex);
1083}
1084EXPORT_SYMBOL_GPL(coresight_disable);
1085
1086static ssize_t enable_sink_show(struct device *dev,
1087 struct device_attribute *attr, char *buf)
1088{
1089 struct coresight_device *csdev = to_coresight_device(dev);
1090
1091 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated);
1092}
1093
1094static ssize_t enable_sink_store(struct device *dev,
1095 struct device_attribute *attr,
1096 const char *buf, size_t size)
1097{
1098 int ret;
1099 unsigned long val;
1100 struct coresight_device *csdev = to_coresight_device(dev);
1101
1102 ret = kstrtoul(buf, 10, &val);
1103 if (ret)
1104 return ret;
1105
1106 if (val)
1107 csdev->activated = true;
1108 else
1109 csdev->activated = false;
1110
1111 return size;
1112
1113}
1114static DEVICE_ATTR_RW(enable_sink);
1115
1116static ssize_t enable_source_show(struct device *dev,
1117 struct device_attribute *attr, char *buf)
1118{
1119 struct coresight_device *csdev = to_coresight_device(dev);
1120
1121 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable);
1122}
1123
1124static ssize_t enable_source_store(struct device *dev,
1125 struct device_attribute *attr,
1126 const char *buf, size_t size)
1127{
1128 int ret = 0;
1129 unsigned long val;
1130 struct coresight_device *csdev = to_coresight_device(dev);
1131
1132 ret = kstrtoul(buf, 10, &val);
1133 if (ret)
1134 return ret;
1135
1136 if (val) {
1137 ret = coresight_enable(csdev);
1138 if (ret)
1139 return ret;
1140 } else {
1141 coresight_disable(csdev);
1142 }
1143
1144 return size;
1145}
1146static DEVICE_ATTR_RW(enable_source);
1147
1148static struct attribute *coresight_sink_attrs[] = {
1149 &dev_attr_enable_sink.attr,
1150 NULL,
1151};
1152ATTRIBUTE_GROUPS(coresight_sink);
1153
1154static struct attribute *coresight_source_attrs[] = {
1155 &dev_attr_enable_source.attr,
1156 NULL,
1157};
1158ATTRIBUTE_GROUPS(coresight_source);
1159
1160static struct device_type coresight_dev_type[] = {
1161 {
1162 .name = "none",
1163 },
1164 {
1165 .name = "sink",
1166 .groups = coresight_sink_groups,
1167 },
1168 {
1169 .name = "link",
1170 },
1171 {
1172 .name = "linksink",
1173 .groups = coresight_sink_groups,
1174 },
1175 {
1176 .name = "source",
1177 .groups = coresight_source_groups,
1178 },
1179 {
1180 .name = "helper",
1181 },
1182 {
1183 .name = "ect",
1184 },
1185};
1186
1187static void coresight_device_release(struct device *dev)
1188{
1189 struct coresight_device *csdev = to_coresight_device(dev);
1190
1191 cti_remove_assoc_from_csdev(csdev);
1192 fwnode_handle_put(csdev->dev.fwnode);
1193 kfree(csdev->refcnt);
1194 kfree(csdev);
1195}
1196
1197static int coresight_orphan_match(struct device *dev, void *data)
1198{
1199 int i, ret = 0;
1200 bool still_orphan = false;
1201 struct coresight_device *csdev, *i_csdev;
1202 struct coresight_connection *conn;
1203
1204 csdev = data;
1205 i_csdev = to_coresight_device(dev);
1206
1207 /* No need to check oneself */
1208 if (csdev == i_csdev)
1209 return 0;
1210
1211 /* Move on to another component if no connection is orphan */
1212 if (!i_csdev->orphan)
1213 return 0;
1214 /*
1215 * Circle throuch all the connection of that component. If we find
1216 * an orphan connection whose name matches @csdev, link it.
1217 */
1218 for (i = 0; i < i_csdev->pdata->nr_outport; i++) {
1219 conn = &i_csdev->pdata->conns[i];
1220
1221 /* Skip the port if FW doesn't describe it */
1222 if (!conn->child_fwnode)
1223 continue;
1224 /* We have found at least one orphan connection */
1225 if (conn->child_dev == NULL) {
1226 /* Does it match this newly added device? */
1227 if (conn->child_fwnode == csdev->dev.fwnode) {
1228 ret = coresight_make_links(i_csdev,
1229 conn, csdev);
1230 if (ret)
1231 return ret;
1232 } else {
1233 /* This component still has an orphan */
1234 still_orphan = true;
1235 }
1236 }
1237 }
1238
1239 i_csdev->orphan = still_orphan;
1240
1241 /*
1242 * Returning '0' in case we didn't encounter any error,
1243 * ensures that all known component on the bus will be checked.
1244 */
1245 return 0;
1246}
1247
1248static int coresight_fixup_orphan_conns(struct coresight_device *csdev)
1249{
1250 return bus_for_each_dev(&coresight_bustype, NULL,
1251 csdev, coresight_orphan_match);
1252}
1253
1254
1255static int coresight_fixup_device_conns(struct coresight_device *csdev)
1256{
1257 int i, ret = 0;
1258
1259 for (i = 0; i < csdev->pdata->nr_outport; i++) {
1260 struct coresight_connection *conn = &csdev->pdata->conns[i];
1261
1262 if (!conn->child_fwnode)
1263 continue;
1264 conn->child_dev =
1265 coresight_find_csdev_by_fwnode(conn->child_fwnode);
1266 if (conn->child_dev) {
1267 ret = coresight_make_links(csdev, conn,
1268 conn->child_dev);
1269 if (ret)
1270 break;
1271 } else {
1272 csdev->orphan = true;
1273 }
1274 }
1275
1276 return 0;
1277}
1278
1279static int coresight_remove_match(struct device *dev, void *data)
1280{
1281 int i;
1282 struct coresight_device *csdev, *iterator;
1283 struct coresight_connection *conn;
1284
1285 csdev = data;
1286 iterator = to_coresight_device(dev);
1287
1288 /* No need to check oneself */
1289 if (csdev == iterator)
1290 return 0;
1291
1292 /*
1293 * Circle throuch all the connection of that component. If we find
1294 * a connection whose name matches @csdev, remove it.
1295 */
1296 for (i = 0; i < iterator->pdata->nr_outport; i++) {
1297 conn = &iterator->pdata->conns[i];
1298
1299 if (conn->child_dev == NULL || conn->child_fwnode == NULL)
1300 continue;
1301
1302 if (csdev->dev.fwnode == conn->child_fwnode) {
1303 iterator->orphan = true;
1304 coresight_remove_links(iterator, conn);
1305 /*
1306 * Drop the reference to the handle for the remote
1307 * device acquired in parsing the connections from
1308 * platform data.
1309 */
1310 fwnode_handle_put(conn->child_fwnode);
1311 /* No need to continue */
1312 break;
1313 }
1314 }
1315
1316 /*
1317 * Returning '0' ensures that all known component on the
1318 * bus will be checked.
1319 */
1320 return 0;
1321}
1322
1323/*
1324 * coresight_remove_conns - Remove references to this given devices
1325 * from the connections of other devices.
1326 */
1327static void coresight_remove_conns(struct coresight_device *csdev)
1328{
1329 /*
1330 * Another device will point to this device only if there is
1331 * an output port connected to this one. i.e, if the device
1332 * doesn't have at least one input port, there is no point
1333 * in searching all the devices.
1334 */
1335 if (csdev->pdata->nr_inport)
1336 bus_for_each_dev(&coresight_bustype, NULL,
1337 csdev, coresight_remove_match);
1338}
1339
1340/**
1341 * coresight_timeout - loop until a bit has changed to a specific state.
1342 * @addr: base address of the area of interest.
1343 * @offset: address of a register, starting from @addr.
1344 * @position: the position of the bit of interest.
1345 * @value: the value the bit should have.
1346 *
1347 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
1348 * TIMEOUT_US has elapsed, which ever happens first.
1349 */
1350
1351int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
1352{
1353 int i;
1354 u32 val;
1355
1356 for (i = TIMEOUT_US; i > 0; i--) {
1357 val = __raw_readl(addr + offset);
1358 /* waiting on the bit to go from 0 to 1 */
1359 if (value) {
1360 if (val & BIT(position))
1361 return 0;
1362 /* waiting on the bit to go from 1 to 0 */
1363 } else {
1364 if (!(val & BIT(position)))
1365 return 0;
1366 }
1367
1368 /*
1369 * Delay is arbitrary - the specification doesn't say how long
1370 * we are expected to wait. Extra check required to make sure
1371 * we don't wait needlessly on the last iteration.
1372 */
1373 if (i - 1)
1374 udelay(1);
1375 }
1376
1377 return -EAGAIN;
1378}
1379
1380struct bus_type coresight_bustype = {
1381 .name = "coresight",
1382};
1383
1384static int __init coresight_init(void)
1385{
1386 return bus_register(&coresight_bustype);
1387}
1388postcore_initcall(coresight_init);
1389
1390/*
1391 * coresight_release_platform_data: Release references to the devices connected
1392 * to the output port of this device.
1393 */
1394void coresight_release_platform_data(struct coresight_device *csdev,
1395 struct coresight_platform_data *pdata)
1396{
1397 int i;
1398 struct coresight_connection *conns = pdata->conns;
1399
1400 for (i = 0; i < pdata->nr_outport; i++) {
1401 /* If we have made the links, remove them now */
1402 if (csdev && conns[i].child_dev)
1403 coresight_remove_links(csdev, &conns[i]);
1404 /*
1405 * Drop the refcount and clear the handle as this device
1406 * is going away
1407 */
1408 if (conns[i].child_fwnode) {
1409 fwnode_handle_put(conns[i].child_fwnode);
1410 pdata->conns[i].child_fwnode = NULL;
1411 }
1412 }
1413 if (csdev)
1414 coresight_remove_conns_sysfs_group(csdev);
1415}
1416
1417struct coresight_device *coresight_register(struct coresight_desc *desc)
1418{
1419 int ret;
1420 int link_subtype;
1421 int nr_refcnts = 1;
1422 atomic_t *refcnts = NULL;
1423 struct coresight_device *csdev;
1424
1425 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL);
1426 if (!csdev) {
1427 ret = -ENOMEM;
1428 goto err_out;
1429 }
1430
1431 if (desc->type == CORESIGHT_DEV_TYPE_LINK ||
1432 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) {
1433 link_subtype = desc->subtype.link_subtype;
1434
1435 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
1436 nr_refcnts = desc->pdata->nr_inport;
1437 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
1438 nr_refcnts = desc->pdata->nr_outport;
1439 }
1440
1441 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL);
1442 if (!refcnts) {
1443 ret = -ENOMEM;
1444 goto err_free_csdev;
1445 }
1446
1447 csdev->refcnt = refcnts;
1448
1449 csdev->pdata = desc->pdata;
1450
1451 csdev->type = desc->type;
1452 csdev->subtype = desc->subtype;
1453 csdev->ops = desc->ops;
1454 csdev->orphan = false;
1455
1456 csdev->dev.type = &coresight_dev_type[desc->type];
1457 csdev->dev.groups = desc->groups;
1458 csdev->dev.parent = desc->dev;
1459 csdev->dev.release = coresight_device_release;
1460 csdev->dev.bus = &coresight_bustype;
1461 /*
1462 * Hold the reference to our parent device. This will be
1463 * dropped only in coresight_device_release().
1464 */
1465 csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev));
1466 dev_set_name(&csdev->dev, "%s", desc->name);
1467
1468 ret = device_register(&csdev->dev);
1469 if (ret) {
1470 put_device(&csdev->dev);
1471 /*
1472 * All resources are free'd explicitly via
1473 * coresight_device_release(), triggered from put_device().
1474 */
1475 goto err_out;
1476 }
1477
1478 if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
1479 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
1480 ret = etm_perf_add_symlink_sink(csdev);
1481
1482 if (ret) {
1483 device_unregister(&csdev->dev);
1484 /*
1485 * As with the above, all resources are free'd
1486 * explicitly via coresight_device_release() triggered
1487 * from put_device(), which is in turn called from
1488 * function device_unregister().
1489 */
1490 goto err_out;
1491 }
1492 }
1493
1494 mutex_lock(&coresight_mutex);
1495
1496 ret = coresight_create_conns_sysfs_group(csdev);
1497 if (!ret)
1498 ret = coresight_fixup_device_conns(csdev);
1499 if (!ret)
1500 ret = coresight_fixup_orphan_conns(csdev);
1501 if (!ret)
1502 cti_add_assoc_to_csdev(csdev);
1503
1504 mutex_unlock(&coresight_mutex);
1505 if (ret) {
1506 coresight_unregister(csdev);
1507 return ERR_PTR(ret);
1508 }
1509
1510 return csdev;
1511
1512err_free_csdev:
1513 kfree(csdev);
1514err_out:
1515 /* Cleanup the connection information */
1516 coresight_release_platform_data(NULL, desc->pdata);
1517 return ERR_PTR(ret);
1518}
1519EXPORT_SYMBOL_GPL(coresight_register);
1520
1521void coresight_unregister(struct coresight_device *csdev)
1522{
1523 etm_perf_del_symlink_sink(csdev);
1524 /* Remove references of that device in the topology */
1525 coresight_remove_conns(csdev);
1526 coresight_clear_default_sink(csdev);
1527 coresight_release_platform_data(csdev, csdev->pdata);
1528 device_unregister(&csdev->dev);
1529}
1530EXPORT_SYMBOL_GPL(coresight_unregister);
1531
1532
1533/*
1534 * coresight_search_device_idx - Search the fwnode handle of a device
1535 * in the given dev_idx list. Must be called with the coresight_mutex held.
1536 *
1537 * Returns the index of the entry, when found. Otherwise, -ENOENT.
1538 */
1539static inline int coresight_search_device_idx(struct coresight_dev_list *dict,
1540 struct fwnode_handle *fwnode)
1541{
1542 int i;
1543
1544 for (i = 0; i < dict->nr_idx; i++)
1545 if (dict->fwnode_list[i] == fwnode)
1546 return i;
1547 return -ENOENT;
1548}
1549
1550bool coresight_loses_context_with_cpu(struct device *dev)
1551{
1552 return fwnode_property_present(dev_fwnode(dev),
1553 "arm,coresight-loses-context-with-cpu");
1554}
1555
1556/*
1557 * coresight_alloc_device_name - Get an index for a given device in the
1558 * device index list specific to a driver. An index is allocated for a
1559 * device and is tracked with the fwnode_handle to prevent allocating
1560 * duplicate indices for the same device (e.g, if we defer probing of
1561 * a device due to dependencies), in case the index is requested again.
1562 */
1563char *coresight_alloc_device_name(struct coresight_dev_list *dict,
1564 struct device *dev)
1565{
1566 int idx;
1567 char *name = NULL;
1568 struct fwnode_handle **list;
1569
1570 mutex_lock(&coresight_mutex);
1571
1572 idx = coresight_search_device_idx(dict, dev_fwnode(dev));
1573 if (idx < 0) {
1574 /* Make space for the new entry */
1575 idx = dict->nr_idx;
1576 list = krealloc(dict->fwnode_list,
1577 (idx + 1) * sizeof(*dict->fwnode_list),
1578 GFP_KERNEL);
1579 if (ZERO_OR_NULL_PTR(list)) {
1580 idx = -ENOMEM;
1581 goto done;
1582 }
1583
1584 list[idx] = dev_fwnode(dev);
1585 dict->fwnode_list = list;
1586 dict->nr_idx = idx + 1;
1587 }
1588
1589 name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx);
1590done:
1591 mutex_unlock(&coresight_mutex);
1592 return name;
1593}
1594EXPORT_SYMBOL_GPL(coresight_alloc_device_name);
1/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/types.h>
16#include <linux/device.h>
17#include <linux/io.h>
18#include <linux/err.h>
19#include <linux/export.h>
20#include <linux/slab.h>
21#include <linux/mutex.h>
22#include <linux/clk.h>
23#include <linux/coresight.h>
24#include <linux/of_platform.h>
25#include <linux/delay.h>
26#include <linux/pm_runtime.h>
27
28#include "coresight-priv.h"
29
30static DEFINE_MUTEX(coresight_mutex);
31
32/**
33 * struct coresight_node - elements of a path, from source to sink
34 * @csdev: Address of an element.
35 * @link: hook to the list.
36 */
37struct coresight_node {
38 struct coresight_device *csdev;
39 struct list_head link;
40};
41
42/*
43 * When operating Coresight drivers from the sysFS interface, only a single
44 * path can exist from a tracer (associated to a CPU) to a sink.
45 */
46static DEFINE_PER_CPU(struct list_head *, tracer_path);
47
48/*
49 * As of this writing only a single STM can be found in CS topologies. Since
50 * there is no way to know if we'll ever see more and what kind of
51 * configuration they will enact, for the time being only define a single path
52 * for STM.
53 */
54static struct list_head *stm_path;
55
56/*
57 * When losing synchronisation a new barrier packet needs to be inserted at the
58 * beginning of the data collected in a buffer. That way the decoder knows that
59 * it needs to look for another sync sequence.
60 */
61const u32 barrier_pkt[5] = {0x7fffffff, 0x7fffffff,
62 0x7fffffff, 0x7fffffff, 0x0};
63
64static int coresight_id_match(struct device *dev, void *data)
65{
66 int trace_id, i_trace_id;
67 struct coresight_device *csdev, *i_csdev;
68
69 csdev = data;
70 i_csdev = to_coresight_device(dev);
71
72 /*
73 * No need to care about oneself and components that are not
74 * sources or not enabled
75 */
76 if (i_csdev == csdev || !i_csdev->enable ||
77 i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
78 return 0;
79
80 /* Get the source ID for both compoment */
81 trace_id = source_ops(csdev)->trace_id(csdev);
82 i_trace_id = source_ops(i_csdev)->trace_id(i_csdev);
83
84 /* All you need is one */
85 if (trace_id == i_trace_id)
86 return 1;
87
88 return 0;
89}
90
91static int coresight_source_is_unique(struct coresight_device *csdev)
92{
93 int trace_id = source_ops(csdev)->trace_id(csdev);
94
95 /* this shouldn't happen */
96 if (trace_id < 0)
97 return 0;
98
99 return !bus_for_each_dev(&coresight_bustype, NULL,
100 csdev, coresight_id_match);
101}
102
103static int coresight_find_link_inport(struct coresight_device *csdev,
104 struct coresight_device *parent)
105{
106 int i;
107 struct coresight_connection *conn;
108
109 for (i = 0; i < parent->nr_outport; i++) {
110 conn = &parent->conns[i];
111 if (conn->child_dev == csdev)
112 return conn->child_port;
113 }
114
115 dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
116 dev_name(&parent->dev), dev_name(&csdev->dev));
117
118 return 0;
119}
120
121static int coresight_find_link_outport(struct coresight_device *csdev,
122 struct coresight_device *child)
123{
124 int i;
125 struct coresight_connection *conn;
126
127 for (i = 0; i < csdev->nr_outport; i++) {
128 conn = &csdev->conns[i];
129 if (conn->child_dev == child)
130 return conn->outport;
131 }
132
133 dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
134 dev_name(&csdev->dev), dev_name(&child->dev));
135
136 return 0;
137}
138
139static int coresight_enable_sink(struct coresight_device *csdev, u32 mode)
140{
141 int ret;
142
143 if (!csdev->enable) {
144 if (sink_ops(csdev)->enable) {
145 ret = sink_ops(csdev)->enable(csdev, mode);
146 if (ret)
147 return ret;
148 }
149 csdev->enable = true;
150 }
151
152 atomic_inc(csdev->refcnt);
153
154 return 0;
155}
156
157static void coresight_disable_sink(struct coresight_device *csdev)
158{
159 if (atomic_dec_return(csdev->refcnt) == 0) {
160 if (sink_ops(csdev)->disable) {
161 sink_ops(csdev)->disable(csdev);
162 csdev->enable = false;
163 }
164 }
165}
166
167static int coresight_enable_link(struct coresight_device *csdev,
168 struct coresight_device *parent,
169 struct coresight_device *child)
170{
171 int ret;
172 int link_subtype;
173 int refport, inport, outport;
174
175 if (!parent || !child)
176 return -EINVAL;
177
178 inport = coresight_find_link_inport(csdev, parent);
179 outport = coresight_find_link_outport(csdev, child);
180 link_subtype = csdev->subtype.link_subtype;
181
182 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
183 refport = inport;
184 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
185 refport = outport;
186 else
187 refport = 0;
188
189 if (atomic_inc_return(&csdev->refcnt[refport]) == 1) {
190 if (link_ops(csdev)->enable) {
191 ret = link_ops(csdev)->enable(csdev, inport, outport);
192 if (ret)
193 return ret;
194 }
195 }
196
197 csdev->enable = true;
198
199 return 0;
200}
201
202static void coresight_disable_link(struct coresight_device *csdev,
203 struct coresight_device *parent,
204 struct coresight_device *child)
205{
206 int i, nr_conns;
207 int link_subtype;
208 int refport, inport, outport;
209
210 if (!parent || !child)
211 return;
212
213 inport = coresight_find_link_inport(csdev, parent);
214 outport = coresight_find_link_outport(csdev, child);
215 link_subtype = csdev->subtype.link_subtype;
216
217 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) {
218 refport = inport;
219 nr_conns = csdev->nr_inport;
220 } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) {
221 refport = outport;
222 nr_conns = csdev->nr_outport;
223 } else {
224 refport = 0;
225 nr_conns = 1;
226 }
227
228 if (atomic_dec_return(&csdev->refcnt[refport]) == 0) {
229 if (link_ops(csdev)->disable)
230 link_ops(csdev)->disable(csdev, inport, outport);
231 }
232
233 for (i = 0; i < nr_conns; i++)
234 if (atomic_read(&csdev->refcnt[i]) != 0)
235 return;
236
237 csdev->enable = false;
238}
239
240static int coresight_enable_source(struct coresight_device *csdev, u32 mode)
241{
242 int ret;
243
244 if (!coresight_source_is_unique(csdev)) {
245 dev_warn(&csdev->dev, "traceID %d not unique\n",
246 source_ops(csdev)->trace_id(csdev));
247 return -EINVAL;
248 }
249
250 if (!csdev->enable) {
251 if (source_ops(csdev)->enable) {
252 ret = source_ops(csdev)->enable(csdev, NULL, mode);
253 if (ret)
254 return ret;
255 }
256 csdev->enable = true;
257 }
258
259 atomic_inc(csdev->refcnt);
260
261 return 0;
262}
263
264/**
265 * coresight_disable_source - Drop the reference count by 1 and disable
266 * the device if there are no users left.
267 *
268 * @csdev - The coresight device to disable
269 *
270 * Returns true if the device has been disabled.
271 */
272static bool coresight_disable_source(struct coresight_device *csdev)
273{
274 if (atomic_dec_return(csdev->refcnt) == 0) {
275 if (source_ops(csdev)->disable)
276 source_ops(csdev)->disable(csdev, NULL);
277 csdev->enable = false;
278 }
279 return !csdev->enable;
280}
281
282void coresight_disable_path(struct list_head *path)
283{
284 u32 type;
285 struct coresight_node *nd;
286 struct coresight_device *csdev, *parent, *child;
287
288 list_for_each_entry(nd, path, link) {
289 csdev = nd->csdev;
290 type = csdev->type;
291
292 /*
293 * ETF devices are tricky... They can be a link or a sink,
294 * depending on how they are configured. If an ETF has been
295 * "activated" it will be configured as a sink, otherwise
296 * go ahead with the link configuration.
297 */
298 if (type == CORESIGHT_DEV_TYPE_LINKSINK)
299 type = (csdev == coresight_get_sink(path)) ?
300 CORESIGHT_DEV_TYPE_SINK :
301 CORESIGHT_DEV_TYPE_LINK;
302
303 switch (type) {
304 case CORESIGHT_DEV_TYPE_SINK:
305 coresight_disable_sink(csdev);
306 break;
307 case CORESIGHT_DEV_TYPE_SOURCE:
308 /* sources are disabled from either sysFS or Perf */
309 break;
310 case CORESIGHT_DEV_TYPE_LINK:
311 parent = list_prev_entry(nd, link)->csdev;
312 child = list_next_entry(nd, link)->csdev;
313 coresight_disable_link(csdev, parent, child);
314 break;
315 default:
316 break;
317 }
318 }
319}
320
321int coresight_enable_path(struct list_head *path, u32 mode)
322{
323
324 int ret = 0;
325 u32 type;
326 struct coresight_node *nd;
327 struct coresight_device *csdev, *parent, *child;
328
329 list_for_each_entry_reverse(nd, path, link) {
330 csdev = nd->csdev;
331 type = csdev->type;
332
333 /*
334 * ETF devices are tricky... They can be a link or a sink,
335 * depending on how they are configured. If an ETF has been
336 * "activated" it will be configured as a sink, otherwise
337 * go ahead with the link configuration.
338 */
339 if (type == CORESIGHT_DEV_TYPE_LINKSINK)
340 type = (csdev == coresight_get_sink(path)) ?
341 CORESIGHT_DEV_TYPE_SINK :
342 CORESIGHT_DEV_TYPE_LINK;
343
344 switch (type) {
345 case CORESIGHT_DEV_TYPE_SINK:
346 ret = coresight_enable_sink(csdev, mode);
347 if (ret)
348 goto err;
349 break;
350 case CORESIGHT_DEV_TYPE_SOURCE:
351 /* sources are enabled from either sysFS or Perf */
352 break;
353 case CORESIGHT_DEV_TYPE_LINK:
354 parent = list_prev_entry(nd, link)->csdev;
355 child = list_next_entry(nd, link)->csdev;
356 ret = coresight_enable_link(csdev, parent, child);
357 if (ret)
358 goto err;
359 break;
360 default:
361 goto err;
362 }
363 }
364
365out:
366 return ret;
367err:
368 coresight_disable_path(path);
369 goto out;
370}
371
372struct coresight_device *coresight_get_sink(struct list_head *path)
373{
374 struct coresight_device *csdev;
375
376 if (!path)
377 return NULL;
378
379 csdev = list_last_entry(path, struct coresight_node, link)->csdev;
380 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
381 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
382 return NULL;
383
384 return csdev;
385}
386
387static int coresight_enabled_sink(struct device *dev, void *data)
388{
389 bool *reset = data;
390 struct coresight_device *csdev = to_coresight_device(dev);
391
392 if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
393 csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
394 csdev->activated) {
395 /*
396 * Now that we have a handle on the sink for this session,
397 * disable the sysFS "enable_sink" flag so that possible
398 * concurrent perf session that wish to use another sink don't
399 * trip on it. Doing so has no ramification for the current
400 * session.
401 */
402 if (*reset)
403 csdev->activated = false;
404
405 return 1;
406 }
407
408 return 0;
409}
410
411/**
412 * coresight_get_enabled_sink - returns the first enabled sink found on the bus
413 * @deactivate: Whether the 'enable_sink' flag should be reset
414 *
415 * When operated from perf the deactivate parameter should be set to 'true'.
416 * That way the "enabled_sink" flag of the sink that was selected can be reset,
417 * allowing for other concurrent perf sessions to choose a different sink.
418 *
419 * When operated from sysFS users have full control and as such the deactivate
420 * parameter should be set to 'false', hence mandating users to explicitly
421 * clear the flag.
422 */
423struct coresight_device *coresight_get_enabled_sink(bool deactivate)
424{
425 struct device *dev = NULL;
426
427 dev = bus_find_device(&coresight_bustype, NULL, &deactivate,
428 coresight_enabled_sink);
429
430 return dev ? to_coresight_device(dev) : NULL;
431}
432
433/**
434 * _coresight_build_path - recursively build a path from a @csdev to a sink.
435 * @csdev: The device to start from.
436 * @path: The list to add devices to.
437 *
438 * The tree of Coresight device is traversed until an activated sink is
439 * found. From there the sink is added to the list along with all the
440 * devices that led to that point - the end result is a list from source
441 * to sink. In that list the source is the first device and the sink the
442 * last one.
443 */
444static int _coresight_build_path(struct coresight_device *csdev,
445 struct coresight_device *sink,
446 struct list_head *path)
447{
448 int i;
449 bool found = false;
450 struct coresight_node *node;
451
452 /* An activated sink has been found. Enqueue the element */
453 if (csdev == sink)
454 goto out;
455
456 /* Not a sink - recursively explore each port found on this element */
457 for (i = 0; i < csdev->nr_outport; i++) {
458 struct coresight_device *child_dev = csdev->conns[i].child_dev;
459
460 if (child_dev &&
461 _coresight_build_path(child_dev, sink, path) == 0) {
462 found = true;
463 break;
464 }
465 }
466
467 if (!found)
468 return -ENODEV;
469
470out:
471 /*
472 * A path from this element to a sink has been found. The elements
473 * leading to the sink are already enqueued, all that is left to do
474 * is tell the PM runtime core we need this element and add a node
475 * for it.
476 */
477 node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL);
478 if (!node)
479 return -ENOMEM;
480
481 node->csdev = csdev;
482 list_add(&node->link, path);
483 pm_runtime_get_sync(csdev->dev.parent);
484
485 return 0;
486}
487
488struct list_head *coresight_build_path(struct coresight_device *source,
489 struct coresight_device *sink)
490{
491 struct list_head *path;
492 int rc;
493
494 if (!sink)
495 return ERR_PTR(-EINVAL);
496
497 path = kzalloc(sizeof(struct list_head), GFP_KERNEL);
498 if (!path)
499 return ERR_PTR(-ENOMEM);
500
501 INIT_LIST_HEAD(path);
502
503 rc = _coresight_build_path(source, sink, path);
504 if (rc) {
505 kfree(path);
506 return ERR_PTR(rc);
507 }
508
509 return path;
510}
511
512/**
513 * coresight_release_path - release a previously built path.
514 * @path: the path to release.
515 *
516 * Go through all the elements of a path and 1) removed it from the list and
517 * 2) free the memory allocated for each node.
518 */
519void coresight_release_path(struct list_head *path)
520{
521 struct coresight_device *csdev;
522 struct coresight_node *nd, *next;
523
524 list_for_each_entry_safe(nd, next, path, link) {
525 csdev = nd->csdev;
526
527 pm_runtime_put_sync(csdev->dev.parent);
528 list_del(&nd->link);
529 kfree(nd);
530 }
531
532 kfree(path);
533 path = NULL;
534}
535
536/** coresight_validate_source - make sure a source has the right credentials
537 * @csdev: the device structure for a source.
538 * @function: the function this was called from.
539 *
540 * Assumes the coresight_mutex is held.
541 */
542static int coresight_validate_source(struct coresight_device *csdev,
543 const char *function)
544{
545 u32 type, subtype;
546
547 type = csdev->type;
548 subtype = csdev->subtype.source_subtype;
549
550 if (type != CORESIGHT_DEV_TYPE_SOURCE) {
551 dev_err(&csdev->dev, "wrong device type in %s\n", function);
552 return -EINVAL;
553 }
554
555 if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
556 subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
557 dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
558 return -EINVAL;
559 }
560
561 return 0;
562}
563
564int coresight_enable(struct coresight_device *csdev)
565{
566 int cpu, ret = 0;
567 struct coresight_device *sink;
568 struct list_head *path;
569 enum coresight_dev_subtype_source subtype;
570
571 subtype = csdev->subtype.source_subtype;
572
573 mutex_lock(&coresight_mutex);
574
575 ret = coresight_validate_source(csdev, __func__);
576 if (ret)
577 goto out;
578
579 if (csdev->enable) {
580 /*
581 * There could be multiple applications driving the software
582 * source. So keep the refcount for each such user when the
583 * source is already enabled.
584 */
585 if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE)
586 atomic_inc(csdev->refcnt);
587 goto out;
588 }
589
590 /*
591 * Search for a valid sink for this session but don't reset the
592 * "enable_sink" flag in sysFS. Users get to do that explicitly.
593 */
594 sink = coresight_get_enabled_sink(false);
595 if (!sink) {
596 ret = -EINVAL;
597 goto out;
598 }
599
600 path = coresight_build_path(csdev, sink);
601 if (IS_ERR(path)) {
602 pr_err("building path(s) failed\n");
603 ret = PTR_ERR(path);
604 goto out;
605 }
606
607 ret = coresight_enable_path(path, CS_MODE_SYSFS);
608 if (ret)
609 goto err_path;
610
611 ret = coresight_enable_source(csdev, CS_MODE_SYSFS);
612 if (ret)
613 goto err_source;
614
615 switch (subtype) {
616 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
617 /*
618 * When working from sysFS it is important to keep track
619 * of the paths that were created so that they can be
620 * undone in 'coresight_disable()'. Since there can only
621 * be a single session per tracer (when working from sysFS)
622 * a per-cpu variable will do just fine.
623 */
624 cpu = source_ops(csdev)->cpu_id(csdev);
625 per_cpu(tracer_path, cpu) = path;
626 break;
627 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
628 stm_path = path;
629 break;
630 default:
631 /* We can't be here */
632 break;
633 }
634
635out:
636 mutex_unlock(&coresight_mutex);
637 return ret;
638
639err_source:
640 coresight_disable_path(path);
641
642err_path:
643 coresight_release_path(path);
644 goto out;
645}
646EXPORT_SYMBOL_GPL(coresight_enable);
647
648void coresight_disable(struct coresight_device *csdev)
649{
650 int cpu, ret;
651 struct list_head *path = NULL;
652
653 mutex_lock(&coresight_mutex);
654
655 ret = coresight_validate_source(csdev, __func__);
656 if (ret)
657 goto out;
658
659 if (!csdev->enable || !coresight_disable_source(csdev))
660 goto out;
661
662 switch (csdev->subtype.source_subtype) {
663 case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
664 cpu = source_ops(csdev)->cpu_id(csdev);
665 path = per_cpu(tracer_path, cpu);
666 per_cpu(tracer_path, cpu) = NULL;
667 break;
668 case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
669 path = stm_path;
670 stm_path = NULL;
671 break;
672 default:
673 /* We can't be here */
674 break;
675 }
676
677 coresight_disable_path(path);
678 coresight_release_path(path);
679
680out:
681 mutex_unlock(&coresight_mutex);
682}
683EXPORT_SYMBOL_GPL(coresight_disable);
684
685static ssize_t enable_sink_show(struct device *dev,
686 struct device_attribute *attr, char *buf)
687{
688 struct coresight_device *csdev = to_coresight_device(dev);
689
690 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated);
691}
692
693static ssize_t enable_sink_store(struct device *dev,
694 struct device_attribute *attr,
695 const char *buf, size_t size)
696{
697 int ret;
698 unsigned long val;
699 struct coresight_device *csdev = to_coresight_device(dev);
700
701 ret = kstrtoul(buf, 10, &val);
702 if (ret)
703 return ret;
704
705 if (val)
706 csdev->activated = true;
707 else
708 csdev->activated = false;
709
710 return size;
711
712}
713static DEVICE_ATTR_RW(enable_sink);
714
715static ssize_t enable_source_show(struct device *dev,
716 struct device_attribute *attr, char *buf)
717{
718 struct coresight_device *csdev = to_coresight_device(dev);
719
720 return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable);
721}
722
723static ssize_t enable_source_store(struct device *dev,
724 struct device_attribute *attr,
725 const char *buf, size_t size)
726{
727 int ret = 0;
728 unsigned long val;
729 struct coresight_device *csdev = to_coresight_device(dev);
730
731 ret = kstrtoul(buf, 10, &val);
732 if (ret)
733 return ret;
734
735 if (val) {
736 ret = coresight_enable(csdev);
737 if (ret)
738 return ret;
739 } else {
740 coresight_disable(csdev);
741 }
742
743 return size;
744}
745static DEVICE_ATTR_RW(enable_source);
746
747static struct attribute *coresight_sink_attrs[] = {
748 &dev_attr_enable_sink.attr,
749 NULL,
750};
751ATTRIBUTE_GROUPS(coresight_sink);
752
753static struct attribute *coresight_source_attrs[] = {
754 &dev_attr_enable_source.attr,
755 NULL,
756};
757ATTRIBUTE_GROUPS(coresight_source);
758
759static struct device_type coresight_dev_type[] = {
760 {
761 .name = "none",
762 },
763 {
764 .name = "sink",
765 .groups = coresight_sink_groups,
766 },
767 {
768 .name = "link",
769 },
770 {
771 .name = "linksink",
772 .groups = coresight_sink_groups,
773 },
774 {
775 .name = "source",
776 .groups = coresight_source_groups,
777 },
778};
779
780static void coresight_device_release(struct device *dev)
781{
782 struct coresight_device *csdev = to_coresight_device(dev);
783
784 kfree(csdev->conns);
785 kfree(csdev->refcnt);
786 kfree(csdev);
787}
788
789static int coresight_orphan_match(struct device *dev, void *data)
790{
791 int i;
792 bool still_orphan = false;
793 struct coresight_device *csdev, *i_csdev;
794 struct coresight_connection *conn;
795
796 csdev = data;
797 i_csdev = to_coresight_device(dev);
798
799 /* No need to check oneself */
800 if (csdev == i_csdev)
801 return 0;
802
803 /* Move on to another component if no connection is orphan */
804 if (!i_csdev->orphan)
805 return 0;
806 /*
807 * Circle throuch all the connection of that component. If we find
808 * an orphan connection whose name matches @csdev, link it.
809 */
810 for (i = 0; i < i_csdev->nr_outport; i++) {
811 conn = &i_csdev->conns[i];
812
813 /* We have found at least one orphan connection */
814 if (conn->child_dev == NULL) {
815 /* Does it match this newly added device? */
816 if (conn->child_name &&
817 !strcmp(dev_name(&csdev->dev), conn->child_name)) {
818 conn->child_dev = csdev;
819 } else {
820 /* This component still has an orphan */
821 still_orphan = true;
822 }
823 }
824 }
825
826 i_csdev->orphan = still_orphan;
827
828 /*
829 * Returning '0' ensures that all known component on the
830 * bus will be checked.
831 */
832 return 0;
833}
834
835static void coresight_fixup_orphan_conns(struct coresight_device *csdev)
836{
837 /*
838 * No need to check for a return value as orphan connection(s)
839 * are hooked-up with each newly added component.
840 */
841 bus_for_each_dev(&coresight_bustype, NULL,
842 csdev, coresight_orphan_match);
843}
844
845
846static void coresight_fixup_device_conns(struct coresight_device *csdev)
847{
848 int i;
849
850 for (i = 0; i < csdev->nr_outport; i++) {
851 struct coresight_connection *conn = &csdev->conns[i];
852 struct device *dev = NULL;
853
854 if (conn->child_name)
855 dev = bus_find_device_by_name(&coresight_bustype, NULL,
856 conn->child_name);
857 if (dev) {
858 conn->child_dev = to_coresight_device(dev);
859 /* and put reference from 'bus_find_device()' */
860 put_device(dev);
861 } else {
862 csdev->orphan = true;
863 conn->child_dev = NULL;
864 }
865 }
866}
867
868static int coresight_remove_match(struct device *dev, void *data)
869{
870 int i;
871 struct coresight_device *csdev, *iterator;
872 struct coresight_connection *conn;
873
874 csdev = data;
875 iterator = to_coresight_device(dev);
876
877 /* No need to check oneself */
878 if (csdev == iterator)
879 return 0;
880
881 /*
882 * Circle throuch all the connection of that component. If we find
883 * a connection whose name matches @csdev, remove it.
884 */
885 for (i = 0; i < iterator->nr_outport; i++) {
886 conn = &iterator->conns[i];
887
888 if (conn->child_dev == NULL)
889 continue;
890
891 if (!strcmp(dev_name(&csdev->dev), conn->child_name)) {
892 iterator->orphan = true;
893 conn->child_dev = NULL;
894 /* No need to continue */
895 break;
896 }
897 }
898
899 /*
900 * Returning '0' ensures that all known component on the
901 * bus will be checked.
902 */
903 return 0;
904}
905
906static void coresight_remove_conns(struct coresight_device *csdev)
907{
908 bus_for_each_dev(&coresight_bustype, NULL,
909 csdev, coresight_remove_match);
910}
911
912/**
913 * coresight_timeout - loop until a bit has changed to a specific state.
914 * @addr: base address of the area of interest.
915 * @offset: address of a register, starting from @addr.
916 * @position: the position of the bit of interest.
917 * @value: the value the bit should have.
918 *
919 * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
920 * TIMEOUT_US has elapsed, which ever happens first.
921 */
922
923int coresight_timeout(void __iomem *addr, u32 offset, int position, int value)
924{
925 int i;
926 u32 val;
927
928 for (i = TIMEOUT_US; i > 0; i--) {
929 val = __raw_readl(addr + offset);
930 /* waiting on the bit to go from 0 to 1 */
931 if (value) {
932 if (val & BIT(position))
933 return 0;
934 /* waiting on the bit to go from 1 to 0 */
935 } else {
936 if (!(val & BIT(position)))
937 return 0;
938 }
939
940 /*
941 * Delay is arbitrary - the specification doesn't say how long
942 * we are expected to wait. Extra check required to make sure
943 * we don't wait needlessly on the last iteration.
944 */
945 if (i - 1)
946 udelay(1);
947 }
948
949 return -EAGAIN;
950}
951
952struct bus_type coresight_bustype = {
953 .name = "coresight",
954};
955
956static int __init coresight_init(void)
957{
958 return bus_register(&coresight_bustype);
959}
960postcore_initcall(coresight_init);
961
962struct coresight_device *coresight_register(struct coresight_desc *desc)
963{
964 int i;
965 int ret;
966 int link_subtype;
967 int nr_refcnts = 1;
968 atomic_t *refcnts = NULL;
969 struct coresight_device *csdev;
970 struct coresight_connection *conns = NULL;
971
972 csdev = kzalloc(sizeof(*csdev), GFP_KERNEL);
973 if (!csdev) {
974 ret = -ENOMEM;
975 goto err_kzalloc_csdev;
976 }
977
978 if (desc->type == CORESIGHT_DEV_TYPE_LINK ||
979 desc->type == CORESIGHT_DEV_TYPE_LINKSINK) {
980 link_subtype = desc->subtype.link_subtype;
981
982 if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
983 nr_refcnts = desc->pdata->nr_inport;
984 else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
985 nr_refcnts = desc->pdata->nr_outport;
986 }
987
988 refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL);
989 if (!refcnts) {
990 ret = -ENOMEM;
991 goto err_kzalloc_refcnts;
992 }
993
994 csdev->refcnt = refcnts;
995
996 csdev->nr_inport = desc->pdata->nr_inport;
997 csdev->nr_outport = desc->pdata->nr_outport;
998
999 /* Initialise connections if there is at least one outport */
1000 if (csdev->nr_outport) {
1001 conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL);
1002 if (!conns) {
1003 ret = -ENOMEM;
1004 goto err_kzalloc_conns;
1005 }
1006
1007 for (i = 0; i < csdev->nr_outport; i++) {
1008 conns[i].outport = desc->pdata->outports[i];
1009 conns[i].child_name = desc->pdata->child_names[i];
1010 conns[i].child_port = desc->pdata->child_ports[i];
1011 }
1012 }
1013
1014 csdev->conns = conns;
1015
1016 csdev->type = desc->type;
1017 csdev->subtype = desc->subtype;
1018 csdev->ops = desc->ops;
1019 csdev->orphan = false;
1020
1021 csdev->dev.type = &coresight_dev_type[desc->type];
1022 csdev->dev.groups = desc->groups;
1023 csdev->dev.parent = desc->dev;
1024 csdev->dev.release = coresight_device_release;
1025 csdev->dev.bus = &coresight_bustype;
1026 dev_set_name(&csdev->dev, "%s", desc->pdata->name);
1027
1028 ret = device_register(&csdev->dev);
1029 if (ret)
1030 goto err_device_register;
1031
1032 mutex_lock(&coresight_mutex);
1033
1034 coresight_fixup_device_conns(csdev);
1035 coresight_fixup_orphan_conns(csdev);
1036
1037 mutex_unlock(&coresight_mutex);
1038
1039 return csdev;
1040
1041err_device_register:
1042 kfree(conns);
1043err_kzalloc_conns:
1044 kfree(refcnts);
1045err_kzalloc_refcnts:
1046 kfree(csdev);
1047err_kzalloc_csdev:
1048 return ERR_PTR(ret);
1049}
1050EXPORT_SYMBOL_GPL(coresight_register);
1051
1052void coresight_unregister(struct coresight_device *csdev)
1053{
1054 /* Remove references of that device in the topology */
1055 coresight_remove_conns(csdev);
1056 device_unregister(&csdev->dev);
1057}
1058EXPORT_SYMBOL_GPL(coresight_unregister);