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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * System Control and Management Interface (SCMI) Clock Protocol
4 *
5 * Copyright (C) 2018 ARM Ltd.
6 */
7
8#include <linux/sort.h>
9
10#include "common.h"
11
12enum scmi_clock_protocol_cmd {
13 CLOCK_ATTRIBUTES = 0x3,
14 CLOCK_DESCRIBE_RATES = 0x4,
15 CLOCK_RATE_SET = 0x5,
16 CLOCK_RATE_GET = 0x6,
17 CLOCK_CONFIG_SET = 0x7,
18};
19
20struct scmi_msg_resp_clock_protocol_attributes {
21 __le16 num_clocks;
22 u8 max_async_req;
23 u8 reserved;
24};
25
26struct scmi_msg_resp_clock_attributes {
27 __le32 attributes;
28#define CLOCK_ENABLE BIT(0)
29 u8 name[SCMI_MAX_STR_SIZE];
30};
31
32struct scmi_clock_set_config {
33 __le32 id;
34 __le32 attributes;
35};
36
37struct scmi_msg_clock_describe_rates {
38 __le32 id;
39 __le32 rate_index;
40};
41
42struct scmi_msg_resp_clock_describe_rates {
43 __le32 num_rates_flags;
44#define NUM_RETURNED(x) ((x) & 0xfff)
45#define RATE_DISCRETE(x) !((x) & BIT(12))
46#define NUM_REMAINING(x) ((x) >> 16)
47 struct {
48 __le32 value_low;
49 __le32 value_high;
50 } rate[0];
51#define RATE_TO_U64(X) \
52({ \
53 typeof(X) x = (X); \
54 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
55})
56};
57
58struct scmi_clock_set_rate {
59 __le32 flags;
60#define CLOCK_SET_ASYNC BIT(0)
61#define CLOCK_SET_IGNORE_RESP BIT(1)
62#define CLOCK_SET_ROUND_UP BIT(2)
63#define CLOCK_SET_ROUND_AUTO BIT(3)
64 __le32 id;
65 __le32 value_low;
66 __le32 value_high;
67};
68
69struct clock_info {
70 u32 version;
71 int num_clocks;
72 int max_async_req;
73 atomic_t cur_async_req;
74 struct scmi_clock_info *clk;
75};
76
77static int scmi_clock_protocol_attributes_get(const struct scmi_handle *handle,
78 struct clock_info *ci)
79{
80 int ret;
81 struct scmi_xfer *t;
82 struct scmi_msg_resp_clock_protocol_attributes *attr;
83
84 ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES,
85 SCMI_PROTOCOL_CLOCK, 0, sizeof(*attr), &t);
86 if (ret)
87 return ret;
88
89 attr = t->rx.buf;
90
91 ret = scmi_do_xfer(handle, t);
92 if (!ret) {
93 ci->num_clocks = le16_to_cpu(attr->num_clocks);
94 ci->max_async_req = attr->max_async_req;
95 }
96
97 scmi_xfer_put(handle, t);
98 return ret;
99}
100
101static int scmi_clock_attributes_get(const struct scmi_handle *handle,
102 u32 clk_id, struct scmi_clock_info *clk)
103{
104 int ret;
105 struct scmi_xfer *t;
106 struct scmi_msg_resp_clock_attributes *attr;
107
108 ret = scmi_xfer_get_init(handle, CLOCK_ATTRIBUTES, SCMI_PROTOCOL_CLOCK,
109 sizeof(clk_id), sizeof(*attr), &t);
110 if (ret)
111 return ret;
112
113 put_unaligned_le32(clk_id, t->tx.buf);
114 attr = t->rx.buf;
115
116 ret = scmi_do_xfer(handle, t);
117 if (!ret)
118 strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE);
119 else
120 clk->name[0] = '\0';
121
122 scmi_xfer_put(handle, t);
123 return ret;
124}
125
126static int rate_cmp_func(const void *_r1, const void *_r2)
127{
128 const u64 *r1 = _r1, *r2 = _r2;
129
130 if (*r1 < *r2)
131 return -1;
132 else if (*r1 == *r2)
133 return 0;
134 else
135 return 1;
136}
137
138static int
139scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id,
140 struct scmi_clock_info *clk)
141{
142 u64 *rate = NULL;
143 int ret, cnt;
144 bool rate_discrete = false;
145 u32 tot_rate_cnt = 0, rates_flag;
146 u16 num_returned, num_remaining;
147 struct scmi_xfer *t;
148 struct scmi_msg_clock_describe_rates *clk_desc;
149 struct scmi_msg_resp_clock_describe_rates *rlist;
150
151 ret = scmi_xfer_get_init(handle, CLOCK_DESCRIBE_RATES,
152 SCMI_PROTOCOL_CLOCK, sizeof(*clk_desc), 0, &t);
153 if (ret)
154 return ret;
155
156 clk_desc = t->tx.buf;
157 rlist = t->rx.buf;
158
159 do {
160 clk_desc->id = cpu_to_le32(clk_id);
161 /* Set the number of rates to be skipped/already read */
162 clk_desc->rate_index = cpu_to_le32(tot_rate_cnt);
163
164 ret = scmi_do_xfer(handle, t);
165 if (ret)
166 goto err;
167
168 rates_flag = le32_to_cpu(rlist->num_rates_flags);
169 num_remaining = NUM_REMAINING(rates_flag);
170 rate_discrete = RATE_DISCRETE(rates_flag);
171 num_returned = NUM_RETURNED(rates_flag);
172
173 if (tot_rate_cnt + num_returned > SCMI_MAX_NUM_RATES) {
174 dev_err(handle->dev, "No. of rates > MAX_NUM_RATES");
175 break;
176 }
177
178 if (!rate_discrete) {
179 clk->range.min_rate = RATE_TO_U64(rlist->rate[0]);
180 clk->range.max_rate = RATE_TO_U64(rlist->rate[1]);
181 clk->range.step_size = RATE_TO_U64(rlist->rate[2]);
182 dev_dbg(handle->dev, "Min %llu Max %llu Step %llu Hz\n",
183 clk->range.min_rate, clk->range.max_rate,
184 clk->range.step_size);
185 break;
186 }
187
188 rate = &clk->list.rates[tot_rate_cnt];
189 for (cnt = 0; cnt < num_returned; cnt++, rate++) {
190 *rate = RATE_TO_U64(rlist->rate[cnt]);
191 dev_dbg(handle->dev, "Rate %llu Hz\n", *rate);
192 }
193
194 tot_rate_cnt += num_returned;
195 /*
196 * check for both returned and remaining to avoid infinite
197 * loop due to buggy firmware
198 */
199 } while (num_returned && num_remaining);
200
201 if (rate_discrete && rate) {
202 clk->list.num_rates = tot_rate_cnt;
203 sort(rate, tot_rate_cnt, sizeof(*rate), rate_cmp_func, NULL);
204 }
205
206 clk->rate_discrete = rate_discrete;
207
208err:
209 scmi_xfer_put(handle, t);
210 return ret;
211}
212
213static int
214scmi_clock_rate_get(const struct scmi_handle *handle, u32 clk_id, u64 *value)
215{
216 int ret;
217 struct scmi_xfer *t;
218
219 ret = scmi_xfer_get_init(handle, CLOCK_RATE_GET, SCMI_PROTOCOL_CLOCK,
220 sizeof(__le32), sizeof(u64), &t);
221 if (ret)
222 return ret;
223
224 put_unaligned_le32(clk_id, t->tx.buf);
225
226 ret = scmi_do_xfer(handle, t);
227 if (!ret)
228 *value = get_unaligned_le64(t->rx.buf);
229
230 scmi_xfer_put(handle, t);
231 return ret;
232}
233
234static int scmi_clock_rate_set(const struct scmi_handle *handle, u32 clk_id,
235 u64 rate)
236{
237 int ret;
238 u32 flags = 0;
239 struct scmi_xfer *t;
240 struct scmi_clock_set_rate *cfg;
241 struct clock_info *ci = handle->clk_priv;
242
243 ret = scmi_xfer_get_init(handle, CLOCK_RATE_SET, SCMI_PROTOCOL_CLOCK,
244 sizeof(*cfg), 0, &t);
245 if (ret)
246 return ret;
247
248 if (ci->max_async_req &&
249 atomic_inc_return(&ci->cur_async_req) < ci->max_async_req)
250 flags |= CLOCK_SET_ASYNC;
251
252 cfg = t->tx.buf;
253 cfg->flags = cpu_to_le32(flags);
254 cfg->id = cpu_to_le32(clk_id);
255 cfg->value_low = cpu_to_le32(rate & 0xffffffff);
256 cfg->value_high = cpu_to_le32(rate >> 32);
257
258 if (flags & CLOCK_SET_ASYNC)
259 ret = scmi_do_xfer_with_response(handle, t);
260 else
261 ret = scmi_do_xfer(handle, t);
262
263 if (ci->max_async_req)
264 atomic_dec(&ci->cur_async_req);
265
266 scmi_xfer_put(handle, t);
267 return ret;
268}
269
270static int
271scmi_clock_config_set(const struct scmi_handle *handle, u32 clk_id, u32 config)
272{
273 int ret;
274 struct scmi_xfer *t;
275 struct scmi_clock_set_config *cfg;
276
277 ret = scmi_xfer_get_init(handle, CLOCK_CONFIG_SET, SCMI_PROTOCOL_CLOCK,
278 sizeof(*cfg), 0, &t);
279 if (ret)
280 return ret;
281
282 cfg = t->tx.buf;
283 cfg->id = cpu_to_le32(clk_id);
284 cfg->attributes = cpu_to_le32(config);
285
286 ret = scmi_do_xfer(handle, t);
287
288 scmi_xfer_put(handle, t);
289 return ret;
290}
291
292static int scmi_clock_enable(const struct scmi_handle *handle, u32 clk_id)
293{
294 return scmi_clock_config_set(handle, clk_id, CLOCK_ENABLE);
295}
296
297static int scmi_clock_disable(const struct scmi_handle *handle, u32 clk_id)
298{
299 return scmi_clock_config_set(handle, clk_id, 0);
300}
301
302static int scmi_clock_count_get(const struct scmi_handle *handle)
303{
304 struct clock_info *ci = handle->clk_priv;
305
306 return ci->num_clocks;
307}
308
309static const struct scmi_clock_info *
310scmi_clock_info_get(const struct scmi_handle *handle, u32 clk_id)
311{
312 struct clock_info *ci = handle->clk_priv;
313 struct scmi_clock_info *clk = ci->clk + clk_id;
314
315 if (!clk->name[0])
316 return NULL;
317
318 return clk;
319}
320
321static struct scmi_clk_ops clk_ops = {
322 .count_get = scmi_clock_count_get,
323 .info_get = scmi_clock_info_get,
324 .rate_get = scmi_clock_rate_get,
325 .rate_set = scmi_clock_rate_set,
326 .enable = scmi_clock_enable,
327 .disable = scmi_clock_disable,
328};
329
330static int scmi_clock_protocol_init(struct scmi_handle *handle)
331{
332 u32 version;
333 int clkid, ret;
334 struct clock_info *cinfo;
335
336 scmi_version_get(handle, SCMI_PROTOCOL_CLOCK, &version);
337
338 dev_dbg(handle->dev, "Clock Version %d.%d\n",
339 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
340
341 cinfo = devm_kzalloc(handle->dev, sizeof(*cinfo), GFP_KERNEL);
342 if (!cinfo)
343 return -ENOMEM;
344
345 scmi_clock_protocol_attributes_get(handle, cinfo);
346
347 cinfo->clk = devm_kcalloc(handle->dev, cinfo->num_clocks,
348 sizeof(*cinfo->clk), GFP_KERNEL);
349 if (!cinfo->clk)
350 return -ENOMEM;
351
352 for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
353 struct scmi_clock_info *clk = cinfo->clk + clkid;
354
355 ret = scmi_clock_attributes_get(handle, clkid, clk);
356 if (!ret)
357 scmi_clock_describe_rates_get(handle, clkid, clk);
358 }
359
360 cinfo->version = version;
361 handle->clk_ops = &clk_ops;
362 handle->clk_priv = cinfo;
363
364 return 0;
365}
366
367static int __init scmi_clock_init(void)
368{
369 return scmi_protocol_register(SCMI_PROTOCOL_CLOCK,
370 &scmi_clock_protocol_init);
371}
372subsys_initcall(scmi_clock_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * System Control and Management Interface (SCMI) Clock Protocol
4 *
5 * Copyright (C) 2018 ARM Ltd.
6 */
7
8#include "common.h"
9
10enum scmi_clock_protocol_cmd {
11 CLOCK_ATTRIBUTES = 0x3,
12 CLOCK_DESCRIBE_RATES = 0x4,
13 CLOCK_RATE_SET = 0x5,
14 CLOCK_RATE_GET = 0x6,
15 CLOCK_CONFIG_SET = 0x7,
16};
17
18struct scmi_msg_resp_clock_protocol_attributes {
19 __le16 num_clocks;
20 u8 max_async_req;
21 u8 reserved;
22};
23
24struct scmi_msg_resp_clock_attributes {
25 __le32 attributes;
26#define CLOCK_ENABLE BIT(0)
27 u8 name[SCMI_MAX_STR_SIZE];
28};
29
30struct scmi_clock_set_config {
31 __le32 id;
32 __le32 attributes;
33};
34
35struct scmi_msg_clock_describe_rates {
36 __le32 id;
37 __le32 rate_index;
38};
39
40struct scmi_msg_resp_clock_describe_rates {
41 __le32 num_rates_flags;
42#define NUM_RETURNED(x) ((x) & 0xfff)
43#define RATE_DISCRETE(x) !((x) & BIT(12))
44#define NUM_REMAINING(x) ((x) >> 16)
45 struct {
46 __le32 value_low;
47 __le32 value_high;
48 } rate[0];
49#define RATE_TO_U64(X) \
50({ \
51 typeof(X) x = (X); \
52 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
53})
54};
55
56struct scmi_clock_set_rate {
57 __le32 flags;
58#define CLOCK_SET_ASYNC BIT(0)
59#define CLOCK_SET_DELAYED BIT(1)
60#define CLOCK_SET_ROUND_UP BIT(2)
61#define CLOCK_SET_ROUND_AUTO BIT(3)
62 __le32 id;
63 __le32 value_low;
64 __le32 value_high;
65};
66
67struct clock_info {
68 int num_clocks;
69 int max_async_req;
70 struct scmi_clock_info *clk;
71};
72
73static int scmi_clock_protocol_attributes_get(const struct scmi_handle *handle,
74 struct clock_info *ci)
75{
76 int ret;
77 struct scmi_xfer *t;
78 struct scmi_msg_resp_clock_protocol_attributes *attr;
79
80 ret = scmi_one_xfer_init(handle, PROTOCOL_ATTRIBUTES,
81 SCMI_PROTOCOL_CLOCK, 0, sizeof(*attr), &t);
82 if (ret)
83 return ret;
84
85 attr = t->rx.buf;
86
87 ret = scmi_do_xfer(handle, t);
88 if (!ret) {
89 ci->num_clocks = le16_to_cpu(attr->num_clocks);
90 ci->max_async_req = attr->max_async_req;
91 }
92
93 scmi_one_xfer_put(handle, t);
94 return ret;
95}
96
97static int scmi_clock_attributes_get(const struct scmi_handle *handle,
98 u32 clk_id, struct scmi_clock_info *clk)
99{
100 int ret;
101 struct scmi_xfer *t;
102 struct scmi_msg_resp_clock_attributes *attr;
103
104 ret = scmi_one_xfer_init(handle, CLOCK_ATTRIBUTES, SCMI_PROTOCOL_CLOCK,
105 sizeof(clk_id), sizeof(*attr), &t);
106 if (ret)
107 return ret;
108
109 *(__le32 *)t->tx.buf = cpu_to_le32(clk_id);
110 attr = t->rx.buf;
111
112 ret = scmi_do_xfer(handle, t);
113 if (!ret)
114 memcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE);
115 else
116 clk->name[0] = '\0';
117
118 scmi_one_xfer_put(handle, t);
119 return ret;
120}
121
122static int
123scmi_clock_describe_rates_get(const struct scmi_handle *handle, u32 clk_id,
124 struct scmi_clock_info *clk)
125{
126 u64 *rate;
127 int ret, cnt;
128 bool rate_discrete = false;
129 u32 tot_rate_cnt = 0, rates_flag;
130 u16 num_returned, num_remaining;
131 struct scmi_xfer *t;
132 struct scmi_msg_clock_describe_rates *clk_desc;
133 struct scmi_msg_resp_clock_describe_rates *rlist;
134
135 ret = scmi_one_xfer_init(handle, CLOCK_DESCRIBE_RATES,
136 SCMI_PROTOCOL_CLOCK, sizeof(*clk_desc), 0, &t);
137 if (ret)
138 return ret;
139
140 clk_desc = t->tx.buf;
141 rlist = t->rx.buf;
142
143 do {
144 clk_desc->id = cpu_to_le32(clk_id);
145 /* Set the number of rates to be skipped/already read */
146 clk_desc->rate_index = cpu_to_le32(tot_rate_cnt);
147
148 ret = scmi_do_xfer(handle, t);
149 if (ret)
150 goto err;
151
152 rates_flag = le32_to_cpu(rlist->num_rates_flags);
153 num_remaining = NUM_REMAINING(rates_flag);
154 rate_discrete = RATE_DISCRETE(rates_flag);
155 num_returned = NUM_RETURNED(rates_flag);
156
157 if (tot_rate_cnt + num_returned > SCMI_MAX_NUM_RATES) {
158 dev_err(handle->dev, "No. of rates > MAX_NUM_RATES");
159 break;
160 }
161
162 if (!rate_discrete) {
163 clk->range.min_rate = RATE_TO_U64(rlist->rate[0]);
164 clk->range.max_rate = RATE_TO_U64(rlist->rate[1]);
165 clk->range.step_size = RATE_TO_U64(rlist->rate[2]);
166 dev_dbg(handle->dev, "Min %llu Max %llu Step %llu Hz\n",
167 clk->range.min_rate, clk->range.max_rate,
168 clk->range.step_size);
169 break;
170 }
171
172 rate = &clk->list.rates[tot_rate_cnt];
173 for (cnt = 0; cnt < num_returned; cnt++, rate++) {
174 *rate = RATE_TO_U64(rlist->rate[cnt]);
175 dev_dbg(handle->dev, "Rate %llu Hz\n", *rate);
176 }
177
178 tot_rate_cnt += num_returned;
179 /*
180 * check for both returned and remaining to avoid infinite
181 * loop due to buggy firmware
182 */
183 } while (num_returned && num_remaining);
184
185 if (rate_discrete)
186 clk->list.num_rates = tot_rate_cnt;
187
188err:
189 scmi_one_xfer_put(handle, t);
190 return ret;
191}
192
193static int
194scmi_clock_rate_get(const struct scmi_handle *handle, u32 clk_id, u64 *value)
195{
196 int ret;
197 struct scmi_xfer *t;
198
199 ret = scmi_one_xfer_init(handle, CLOCK_RATE_GET, SCMI_PROTOCOL_CLOCK,
200 sizeof(__le32), sizeof(u64), &t);
201 if (ret)
202 return ret;
203
204 *(__le32 *)t->tx.buf = cpu_to_le32(clk_id);
205
206 ret = scmi_do_xfer(handle, t);
207 if (!ret) {
208 __le32 *pval = t->rx.buf;
209
210 *value = le32_to_cpu(*pval);
211 *value |= (u64)le32_to_cpu(*(pval + 1)) << 32;
212 }
213
214 scmi_one_xfer_put(handle, t);
215 return ret;
216}
217
218static int scmi_clock_rate_set(const struct scmi_handle *handle, u32 clk_id,
219 u32 config, u64 rate)
220{
221 int ret;
222 struct scmi_xfer *t;
223 struct scmi_clock_set_rate *cfg;
224
225 ret = scmi_one_xfer_init(handle, CLOCK_RATE_SET, SCMI_PROTOCOL_CLOCK,
226 sizeof(*cfg), 0, &t);
227 if (ret)
228 return ret;
229
230 cfg = t->tx.buf;
231 cfg->flags = cpu_to_le32(config);
232 cfg->id = cpu_to_le32(clk_id);
233 cfg->value_low = cpu_to_le32(rate & 0xffffffff);
234 cfg->value_high = cpu_to_le32(rate >> 32);
235
236 ret = scmi_do_xfer(handle, t);
237
238 scmi_one_xfer_put(handle, t);
239 return ret;
240}
241
242static int
243scmi_clock_config_set(const struct scmi_handle *handle, u32 clk_id, u32 config)
244{
245 int ret;
246 struct scmi_xfer *t;
247 struct scmi_clock_set_config *cfg;
248
249 ret = scmi_one_xfer_init(handle, CLOCK_CONFIG_SET, SCMI_PROTOCOL_CLOCK,
250 sizeof(*cfg), 0, &t);
251 if (ret)
252 return ret;
253
254 cfg = t->tx.buf;
255 cfg->id = cpu_to_le32(clk_id);
256 cfg->attributes = cpu_to_le32(config);
257
258 ret = scmi_do_xfer(handle, t);
259
260 scmi_one_xfer_put(handle, t);
261 return ret;
262}
263
264static int scmi_clock_enable(const struct scmi_handle *handle, u32 clk_id)
265{
266 return scmi_clock_config_set(handle, clk_id, CLOCK_ENABLE);
267}
268
269static int scmi_clock_disable(const struct scmi_handle *handle, u32 clk_id)
270{
271 return scmi_clock_config_set(handle, clk_id, 0);
272}
273
274static int scmi_clock_count_get(const struct scmi_handle *handle)
275{
276 struct clock_info *ci = handle->clk_priv;
277
278 return ci->num_clocks;
279}
280
281static const struct scmi_clock_info *
282scmi_clock_info_get(const struct scmi_handle *handle, u32 clk_id)
283{
284 struct clock_info *ci = handle->clk_priv;
285 struct scmi_clock_info *clk = ci->clk + clk_id;
286
287 if (!clk->name[0])
288 return NULL;
289
290 return clk;
291}
292
293static struct scmi_clk_ops clk_ops = {
294 .count_get = scmi_clock_count_get,
295 .info_get = scmi_clock_info_get,
296 .rate_get = scmi_clock_rate_get,
297 .rate_set = scmi_clock_rate_set,
298 .enable = scmi_clock_enable,
299 .disable = scmi_clock_disable,
300};
301
302static int scmi_clock_protocol_init(struct scmi_handle *handle)
303{
304 u32 version;
305 int clkid, ret;
306 struct clock_info *cinfo;
307
308 scmi_version_get(handle, SCMI_PROTOCOL_CLOCK, &version);
309
310 dev_dbg(handle->dev, "Clock Version %d.%d\n",
311 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
312
313 cinfo = devm_kzalloc(handle->dev, sizeof(*cinfo), GFP_KERNEL);
314 if (!cinfo)
315 return -ENOMEM;
316
317 scmi_clock_protocol_attributes_get(handle, cinfo);
318
319 cinfo->clk = devm_kcalloc(handle->dev, cinfo->num_clocks,
320 sizeof(*cinfo->clk), GFP_KERNEL);
321 if (!cinfo->clk)
322 return -ENOMEM;
323
324 for (clkid = 0; clkid < cinfo->num_clocks; clkid++) {
325 struct scmi_clock_info *clk = cinfo->clk + clkid;
326
327 ret = scmi_clock_attributes_get(handle, clkid, clk);
328 if (!ret)
329 scmi_clock_describe_rates_get(handle, clkid, clk);
330 }
331
332 handle->clk_ops = &clk_ops;
333 handle->clk_priv = cinfo;
334
335 return 0;
336}
337
338static int __init scmi_clock_init(void)
339{
340 return scmi_protocol_register(SCMI_PROTOCOL_CLOCK,
341 &scmi_clock_protocol_init);
342}
343subsys_initcall(scmi_clock_init);