Loading...
1/*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef DC_STREAM_H_
27#define DC_STREAM_H_
28
29#include "dc_types.h"
30#include "grph_object_defs.h"
31
32/*******************************************************************************
33 * Stream Interfaces
34 ******************************************************************************/
35struct timing_sync_info {
36 int group_id;
37 int group_size;
38 bool master;
39};
40
41struct dc_stream_status {
42 int primary_otg_inst;
43 int stream_enc_inst;
44 int plane_count;
45 int audio_inst;
46 struct timing_sync_info timing_sync_info;
47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
48};
49
50// TODO: References to this needs to be removed..
51struct freesync_context {
52 bool dummy;
53};
54
55enum hubp_dmdata_mode {
56 DMDATA_SW_MODE,
57 DMDATA_HW_MODE
58};
59
60struct dc_dmdata_attributes {
61 /* Specifies whether dynamic meta data will be updated by software
62 * or has to be fetched by hardware (DMA mode)
63 */
64 enum hubp_dmdata_mode dmdata_mode;
65 /* Specifies if current dynamic meta data is to be used only for the current frame */
66 bool dmdata_repeat;
67 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */
68 uint32_t dmdata_size;
69 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */
70 bool dmdata_updated;
71 /* If hardware mode is used, the base address where DMDATA surface is located */
72 PHYSICAL_ADDRESS_LOC address;
73 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */
74 bool dmdata_qos_mode;
75 /* If qos_mode = 1, this is the QOS value to be used: */
76 uint32_t dmdata_qos_level;
77 /* Specifies the value in unit of REFCLK cycles to be added to the
78 * current time to produce the Amortized deadline for Dynamic Metadata chunk request
79 */
80 uint32_t dmdata_dl_delta;
81 /* An unbounded array of uint32s, represents software dmdata to be loaded */
82 uint32_t *dmdata_sw_data;
83};
84
85struct dc_writeback_info {
86 bool wb_enabled;
87 int dwb_pipe_inst;
88 struct dc_dwb_params dwb_params;
89 struct mcif_buf_params mcif_buf_params;
90#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
91 struct mcif_warmup_params mcif_warmup_params;
92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */
93 struct dc_plane_state *writeback_source_plane;
94 /* source MPCC instance. for use by internally by dc */
95 int mpcc_inst;
96#endif
97};
98
99struct dc_writeback_update {
100 unsigned int num_wb_info;
101 struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
102};
103
104enum vertical_interrupt_ref_point {
105 START_V_UPDATE = 0,
106 START_V_SYNC,
107 INVALID_POINT
108
109 //For now, only v_update interrupt is used.
110 //START_V_BLANK,
111 //START_V_ACTIVE
112};
113
114struct periodic_interrupt_config {
115 enum vertical_interrupt_ref_point ref_point;
116 int lines_offset;
117};
118
119union stream_update_flags {
120 struct {
121 uint32_t scaling:1;
122 uint32_t out_tf:1;
123 uint32_t out_csc:1;
124 uint32_t abm_level:1;
125 uint32_t dpms_off:1;
126 uint32_t gamut_remap:1;
127 uint32_t wb_update:1;
128 uint32_t dsc_changed : 1;
129 } bits;
130
131 uint32_t raw;
132};
133
134struct dc_stream_state {
135 // sink is deprecated, new code should not reference
136 // this pointer
137 struct dc_sink *sink;
138
139 struct dc_link *link;
140 struct dc_panel_patch sink_patches;
141 union display_content_support content_support;
142 struct dc_crtc_timing timing;
143 struct dc_crtc_timing_adjust adjust;
144 struct dc_info_packet vrr_infopacket;
145 struct dc_info_packet vsc_infopacket;
146 struct dc_info_packet vsp_infopacket;
147
148 struct rect src; /* composition area */
149 struct rect dst; /* stream addressable area */
150
151 // TODO: References to this needs to be removed..
152 struct freesync_context freesync_ctx;
153
154 struct audio_info audio_info;
155
156 struct dc_info_packet hdr_static_metadata;
157 PHYSICAL_ADDRESS_LOC dmdata_address;
158 bool use_dynamic_meta;
159
160 struct dc_transfer_func *out_transfer_func;
161 struct colorspace_transform gamut_remap_matrix;
162 struct dc_csc_transform csc_color_matrix;
163
164 enum dc_color_space output_color_space;
165 enum dc_dither_option dither_option;
166
167 enum view_3d_format view_format;
168
169 bool use_vsc_sdp_for_colorimetry;
170 bool ignore_msa_timing_param;
171 bool converter_disable_audio;
172 uint8_t qs_bit;
173 uint8_t qy_bit;
174
175 /* TODO: custom INFO packets */
176 /* TODO: ABM info (DMCU) */
177 /* TODO: CEA VIC */
178
179 /* DMCU info */
180 unsigned int abm_level;
181
182 struct periodic_interrupt_config periodic_interrupt0;
183 struct periodic_interrupt_config periodic_interrupt1;
184
185 /* from core_stream struct */
186 struct dc_context *ctx;
187
188 /* used by DCP and FMT */
189 struct bit_depth_reduction_params bit_depth_params;
190 struct clamping_and_pixel_encoding_params clamping;
191
192 int phy_pix_clk;
193 enum signal_type signal;
194 bool dpms_off;
195
196 void *dm_stream_context;
197
198 struct dc_cursor_attributes cursor_attributes;
199 struct dc_cursor_position cursor_position;
200 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode
201
202 /* from stream struct */
203 struct kref refcount;
204
205 struct crtc_trigger_info triggered_crtc_reset;
206
207 /* writeback */
208 unsigned int num_wb_info;
209 struct dc_writeback_info writeback_info[MAX_DWB_PIPES];
210#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
211 const struct dc_transfer_func *func_shaper;
212 const struct dc_3dlut *lut3d_func;
213#endif
214 /* Computed state bits */
215 bool mode_changed : 1;
216
217 /* Output from DC when stream state is committed or altered
218 * DC may only access these values during:
219 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams
220 * values may not change outside of those calls
221 */
222 struct {
223 // For interrupt management, some hardware instance
224 // offsets need to be exposed to DM
225 uint8_t otg_offset;
226 } out;
227
228 bool apply_edp_fast_boot_optimization;
229 bool apply_seamless_boot_optimization;
230
231 uint32_t stream_id;
232 bool is_dsc_enabled;
233 union stream_update_flags update_flags;
234};
235
236#define ABM_LEVEL_IMMEDIATE_DISABLE 255
237
238struct dc_stream_update {
239 struct dc_stream_state *stream;
240
241 struct rect src;
242 struct rect dst;
243 struct dc_transfer_func *out_transfer_func;
244 struct dc_info_packet *hdr_static_metadata;
245 unsigned int *abm_level;
246
247 struct periodic_interrupt_config *periodic_interrupt0;
248 struct periodic_interrupt_config *periodic_interrupt1;
249
250 struct dc_info_packet *vrr_infopacket;
251 struct dc_info_packet *vsc_infopacket;
252 struct dc_info_packet *vsp_infopacket;
253
254 bool *dpms_off;
255 bool integer_scaling_update;
256
257 struct colorspace_transform *gamut_remap;
258 enum dc_color_space *output_color_space;
259 enum dc_dither_option *dither_option;
260
261 struct dc_csc_transform *output_csc_transform;
262
263 struct dc_writeback_update *wb_update;
264 struct dc_dsc_config *dsc_config;
265#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
266 struct dc_transfer_func *func_shaper;
267 struct dc_3dlut *lut3d_func;
268#endif
269};
270
271bool dc_is_stream_unchanged(
272 struct dc_stream_state *old_stream, struct dc_stream_state *stream);
273bool dc_is_stream_scaling_unchanged(
274 struct dc_stream_state *old_stream, struct dc_stream_state *stream);
275
276/*
277 * Set up surface attributes and associate to a stream
278 * The surfaces parameter is an absolute set of all surface active for the stream.
279 * If no surfaces are provided, the stream will be blanked; no memory read.
280 * Any flip related attribute changes must be done through this interface.
281 *
282 * After this call:
283 * Surfaces attributes are programmed and configured to be composed into stream.
284 * This does not trigger a flip. No surface address is programmed.
285 */
286
287void dc_commit_updates_for_stream(struct dc *dc,
288 struct dc_surface_update *srf_updates,
289 int surface_count,
290 struct dc_stream_state *stream,
291 struct dc_stream_update *stream_update,
292 struct dc_state *state);
293/*
294 * Log the current stream state.
295 */
296void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream);
297
298uint8_t dc_get_current_stream_count(struct dc *dc);
299struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
300
301/*
302 * Return the current frame counter.
303 */
304uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
305
306/*
307 * Send dp sdp message.
308 */
309bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
310 const uint8_t *custom_sdp_message,
311 unsigned int sdp_message_size);
312
313/* TODO: Return parsed values rather than direct register read
314 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
315 * being refactored properly to be dce-specific
316 */
317bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
318 uint32_t *v_blank_start,
319 uint32_t *v_blank_end,
320 uint32_t *h_position,
321 uint32_t *v_position);
322
323enum dc_status dc_add_stream_to_ctx(
324 struct dc *dc,
325 struct dc_state *new_ctx,
326 struct dc_stream_state *stream);
327
328enum dc_status dc_remove_stream_from_ctx(
329 struct dc *dc,
330 struct dc_state *new_ctx,
331 struct dc_stream_state *stream);
332
333
334bool dc_add_plane_to_context(
335 const struct dc *dc,
336 struct dc_stream_state *stream,
337 struct dc_plane_state *plane_state,
338 struct dc_state *context);
339
340bool dc_remove_plane_from_context(
341 const struct dc *dc,
342 struct dc_stream_state *stream,
343 struct dc_plane_state *plane_state,
344 struct dc_state *context);
345
346bool dc_rem_all_planes_for_stream(
347 const struct dc *dc,
348 struct dc_stream_state *stream,
349 struct dc_state *context);
350
351bool dc_add_all_planes_for_stream(
352 const struct dc *dc,
353 struct dc_stream_state *stream,
354 struct dc_plane_state * const *plane_states,
355 int plane_count,
356 struct dc_state *context);
357
358bool dc_stream_add_writeback(struct dc *dc,
359 struct dc_stream_state *stream,
360 struct dc_writeback_info *wb_info);
361
362bool dc_stream_remove_writeback(struct dc *dc,
363 struct dc_stream_state *stream,
364 uint32_t dwb_pipe_inst);
365
366enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
367 struct dc_state *state,
368 struct dc_stream_state *stream);
369
370bool dc_stream_warmup_writeback(struct dc *dc,
371 int num_dwb,
372 struct dc_writeback_info *wb_info);
373
374bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream);
375
376bool dc_stream_set_dynamic_metadata(struct dc *dc,
377 struct dc_stream_state *stream,
378 struct dc_dmdata_attributes *dmdata_attr);
379
380enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
381
382/*
383 * Set up streams and links associated to drive sinks
384 * The streams parameter is an absolute set of all active streams.
385 *
386 * After this call:
387 * Phy, Encoder, Timing Generator are programmed and enabled.
388 * New streams are enabled with blank stream; no memory read.
389 */
390/*
391 * Enable stereo when commit_streams is not required,
392 * for example, frame alternate.
393 */
394bool dc_enable_stereo(
395 struct dc *dc,
396 struct dc_state *context,
397 struct dc_stream_state *streams[],
398 uint8_t stream_count);
399
400
401enum surface_update_type dc_check_update_surfaces_for_stream(
402 struct dc *dc,
403 struct dc_surface_update *updates,
404 int surface_count,
405 struct dc_stream_update *stream_update,
406 const struct dc_stream_status *stream_status);
407
408/**
409 * Create a new default stream for the requested sink
410 */
411struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
412
413struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream);
414
415void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink);
416
417void dc_stream_retain(struct dc_stream_state *dc_stream);
418void dc_stream_release(struct dc_stream_state *dc_stream);
419
420struct dc_stream_status *dc_stream_get_status_from_state(
421 struct dc_state *state,
422 struct dc_stream_state *stream);
423struct dc_stream_status *dc_stream_get_status(
424 struct dc_stream_state *dc_stream);
425
426#ifndef TRIM_FSFT
427bool dc_optimize_timing_for_fsft(
428 struct dc_stream_state *pStream,
429 unsigned int max_input_rate_in_khz);
430#endif
431
432/*******************************************************************************
433 * Cursor interfaces - To manages the cursor within a stream
434 ******************************************************************************/
435/* TODO: Deprecated once we switch to dc_set_cursor_position */
436bool dc_stream_set_cursor_attributes(
437 struct dc_stream_state *stream,
438 const struct dc_cursor_attributes *attributes);
439
440bool dc_stream_set_cursor_position(
441 struct dc_stream_state *stream,
442 const struct dc_cursor_position *position);
443
444
445bool dc_stream_adjust_vmin_vmax(struct dc *dc,
446 struct dc_stream_state *stream,
447 struct dc_crtc_timing_adjust *adjust);
448
449bool dc_stream_get_crtc_position(struct dc *dc,
450 struct dc_stream_state **stream,
451 int num_streams,
452 unsigned int *v_pos,
453 unsigned int *nom_v_pos);
454
455bool dc_stream_configure_crc(struct dc *dc,
456 struct dc_stream_state *stream,
457 bool enable,
458 bool continuous);
459
460bool dc_stream_get_crc(struct dc *dc,
461 struct dc_stream_state *stream,
462 uint32_t *r_cr,
463 uint32_t *g_y,
464 uint32_t *b_cb);
465
466void dc_stream_set_static_screen_params(struct dc *dc,
467 struct dc_stream_state **stream,
468 int num_streams,
469 const struct dc_static_screen_params *params);
470
471void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream,
472 enum dc_dynamic_expansion option);
473
474void dc_stream_set_dither_option(struct dc_stream_state *stream,
475 enum dc_dither_option option);
476
477bool dc_stream_set_gamut_remap(struct dc *dc,
478 const struct dc_stream_state *stream);
479
480bool dc_stream_program_csc_matrix(struct dc *dc,
481 struct dc_stream_state *stream);
482
483bool dc_stream_get_crtc_position(struct dc *dc,
484 struct dc_stream_state **stream,
485 int num_streams,
486 unsigned int *v_pos,
487 unsigned int *nom_v_pos);
488
489#endif /* DC_STREAM_H_ */
1/*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef DC_STREAM_H_
27#define DC_STREAM_H_
28
29#include "dc_types.h"
30#include "grph_object_defs.h"
31
32/*******************************************************************************
33 * Stream Interfaces
34 ******************************************************************************/
35
36struct dc_stream_status {
37 int primary_otg_inst;
38 int stream_enc_inst;
39 int plane_count;
40 struct dc_plane_state *plane_states[MAX_SURFACE_NUM];
41
42 /*
43 * link this stream passes through
44 */
45 struct dc_link *link;
46};
47
48struct dc_stream_state {
49 struct dc_sink *sink;
50 struct dc_crtc_timing timing;
51 struct dc_crtc_timing_adjust timing_adjust;
52 struct vrr_params vrr_params;
53
54 struct rect src; /* composition area */
55 struct rect dst; /* stream addressable area */
56
57 struct audio_info audio_info;
58
59 struct freesync_context freesync_ctx;
60
61 struct dc_hdr_static_metadata hdr_static_metadata;
62 struct dc_transfer_func *out_transfer_func;
63 struct colorspace_transform gamut_remap_matrix;
64 struct csc_transform csc_color_matrix;
65
66 enum dc_color_space output_color_space;
67 enum dc_dither_option dither_option;
68
69 enum view_3d_format view_format;
70 enum color_transfer_func output_tf;
71
72 bool ignore_msa_timing_param;
73 /* TODO: custom INFO packets */
74 /* TODO: ABM info (DMCU) */
75 /* PSR info */
76 unsigned char psr_version;
77 /* TODO: CEA VIC */
78
79 /* DMCU info */
80 unsigned int abm_level;
81 unsigned int bl_pwm_level;
82
83 /* from core_stream struct */
84 struct dc_context *ctx;
85
86 /* used by DCP and FMT */
87 struct bit_depth_reduction_params bit_depth_params;
88 struct clamping_and_pixel_encoding_params clamping;
89
90 int phy_pix_clk;
91 enum signal_type signal;
92 bool dpms_off;
93
94 struct dc_stream_status status;
95
96 struct dc_cursor_attributes cursor_attributes;
97 struct dc_cursor_position cursor_position;
98
99 /* from stream struct */
100 struct kref refcount;
101
102 struct crtc_trigger_info triggered_crtc_reset;
103
104 /* Computed state bits */
105 bool mode_changed : 1;
106
107};
108
109struct dc_stream_update {
110 struct rect src;
111 struct rect dst;
112 struct dc_transfer_func *out_transfer_func;
113 struct dc_hdr_static_metadata *hdr_static_metadata;
114 enum color_transfer_func color_output_tf;
115 unsigned int *abm_level;
116};
117
118bool dc_is_stream_unchanged(
119 struct dc_stream_state *old_stream, struct dc_stream_state *stream);
120bool dc_is_stream_scaling_unchanged(
121 struct dc_stream_state *old_stream, struct dc_stream_state *stream);
122
123/*
124 * Set up surface attributes and associate to a stream
125 * The surfaces parameter is an absolute set of all surface active for the stream.
126 * If no surfaces are provided, the stream will be blanked; no memory read.
127 * Any flip related attribute changes must be done through this interface.
128 *
129 * After this call:
130 * Surfaces attributes are programmed and configured to be composed into stream.
131 * This does not trigger a flip. No surface address is programmed.
132 */
133
134bool dc_commit_planes_to_stream(
135 struct dc *dc,
136 struct dc_plane_state **plane_states,
137 uint8_t new_plane_count,
138 struct dc_stream_state *dc_stream,
139 struct dc_state *state);
140
141void dc_commit_updates_for_stream(struct dc *dc,
142 struct dc_surface_update *srf_updates,
143 int surface_count,
144 struct dc_stream_state *stream,
145 struct dc_stream_update *stream_update,
146 struct dc_plane_state **plane_states,
147 struct dc_state *state);
148/*
149 * Log the current stream state.
150 */
151void dc_stream_log(
152 const struct dc_stream_state *stream,
153 struct dal_logger *dc_logger,
154 enum dc_log_type log_type);
155
156uint8_t dc_get_current_stream_count(struct dc *dc);
157struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i);
158
159/*
160 * Return the current frame counter.
161 */
162uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream);
163
164/* TODO: Return parsed values rather than direct register read
165 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos)
166 * being refactored properly to be dce-specific
167 */
168bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
169 uint32_t *v_blank_start,
170 uint32_t *v_blank_end,
171 uint32_t *h_position,
172 uint32_t *v_position);
173
174enum dc_status dc_add_stream_to_ctx(
175 struct dc *dc,
176 struct dc_state *new_ctx,
177 struct dc_stream_state *stream);
178
179enum dc_status dc_remove_stream_from_ctx(
180 struct dc *dc,
181 struct dc_state *new_ctx,
182 struct dc_stream_state *stream);
183
184
185bool dc_add_plane_to_context(
186 const struct dc *dc,
187 struct dc_stream_state *stream,
188 struct dc_plane_state *plane_state,
189 struct dc_state *context);
190
191bool dc_remove_plane_from_context(
192 const struct dc *dc,
193 struct dc_stream_state *stream,
194 struct dc_plane_state *plane_state,
195 struct dc_state *context);
196
197bool dc_rem_all_planes_for_stream(
198 const struct dc *dc,
199 struct dc_stream_state *stream,
200 struct dc_state *context);
201
202bool dc_add_all_planes_for_stream(
203 const struct dc *dc,
204 struct dc_stream_state *stream,
205 struct dc_plane_state * const *plane_states,
206 int plane_count,
207 struct dc_state *context);
208
209enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
210
211/*
212 * This function takes a stream and checks if it is guaranteed to be supported.
213 * Guaranteed means that MAX_COFUNC similar streams are supported.
214 *
215 * After this call:
216 * No hardware is programmed for call. Only validation is done.
217 */
218
219/*
220 * Set up streams and links associated to drive sinks
221 * The streams parameter is an absolute set of all active streams.
222 *
223 * After this call:
224 * Phy, Encoder, Timing Generator are programmed and enabled.
225 * New streams are enabled with blank stream; no memory read.
226 */
227/*
228 * Enable stereo when commit_streams is not required,
229 * for example, frame alternate.
230 */
231bool dc_enable_stereo(
232 struct dc *dc,
233 struct dc_state *context,
234 struct dc_stream_state *streams[],
235 uint8_t stream_count);
236
237
238enum surface_update_type dc_check_update_surfaces_for_stream(
239 struct dc *dc,
240 struct dc_surface_update *updates,
241 int surface_count,
242 struct dc_stream_update *stream_update,
243 const struct dc_stream_status *stream_status);
244
245/**
246 * Create a new default stream for the requested sink
247 */
248struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink);
249
250void update_stream_signal(struct dc_stream_state *stream);
251
252void dc_stream_retain(struct dc_stream_state *dc_stream);
253void dc_stream_release(struct dc_stream_state *dc_stream);
254
255struct dc_stream_status *dc_stream_get_status(
256 struct dc_stream_state *dc_stream);
257
258/*******************************************************************************
259 * Cursor interfaces - To manages the cursor within a stream
260 ******************************************************************************/
261/* TODO: Deprecated once we switch to dc_set_cursor_position */
262bool dc_stream_set_cursor_attributes(
263 struct dc_stream_state *stream,
264 const struct dc_cursor_attributes *attributes);
265
266bool dc_stream_set_cursor_position(
267 struct dc_stream_state *stream,
268 const struct dc_cursor_position *position);
269
270bool dc_stream_adjust_vmin_vmax(struct dc *dc,
271 struct dc_stream_state **stream,
272 int num_streams,
273 int vmin,
274 int vmax);
275
276bool dc_stream_get_crtc_position(struct dc *dc,
277 struct dc_stream_state **stream,
278 int num_streams,
279 unsigned int *v_pos,
280 unsigned int *nom_v_pos);
281
282bool dc_stream_configure_crc(struct dc *dc,
283 struct dc_stream_state *stream,
284 bool enable,
285 bool continuous);
286
287bool dc_stream_get_crc(struct dc *dc,
288 struct dc_stream_state *stream,
289 uint32_t *r_cr,
290 uint32_t *g_y,
291 uint32_t *b_cb);
292
293void dc_stream_set_static_screen_events(struct dc *dc,
294 struct dc_stream_state **stream,
295 int num_streams,
296 const struct dc_static_screen_events *events);
297
298void dc_stream_set_dither_option(struct dc_stream_state *stream,
299 enum dc_dither_option option);
300
301
302bool dc_stream_adjust_vmin_vmax(struct dc *dc,
303 struct dc_stream_state **stream,
304 int num_streams,
305 int vmin,
306 int vmax);
307
308bool dc_stream_get_crtc_position(struct dc *dc,
309 struct dc_stream_state **stream,
310 int num_streams,
311 unsigned int *v_pos,
312 unsigned int *nom_v_pos);
313
314void dc_stream_set_static_screen_events(struct dc *dc,
315 struct dc_stream_state **stream,
316 int num_streams,
317 const struct dc_static_screen_events *events);
318
319#endif /* DC_STREAM_H_ */