1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (c) 2018 MediaTek Inc.
 4 * Author: Owen Chen <owen.chen@mediatek.com>
 5 */
 6
 7#include <linux/clk-provider.h>
 8#include <linux/platform_device.h>
 9
10#include "clk-mtk.h"
11#include "clk-gate.h"
12
13#include <dt-bindings/clock/mt6765-clk.h>
14
15static const struct mtk_gate_regs cam_cg_regs = {
16	.set_ofs = 0x4,
17	.clr_ofs = 0x8,
18	.sta_ofs = 0x0,
19};
20
21#define GATE_CAM(_id, _name, _parent, _shift) {		\
22		.id = _id,				\
23		.name = _name,				\
24		.parent_name = _parent,			\
25		.regs = &cam_cg_regs,			\
26		.shift = _shift,			\
27		.ops = &mtk_clk_gate_ops_setclr,	\
28	}
29
30static const struct mtk_gate cam_clks[] = {
31	GATE_CAM(CLK_CAM_LARB3, "cam_larb3", "mm_ck", 0),
32	GATE_CAM(CLK_CAM_DFP_VAD, "cam_dfp_vad", "mm_ck", 1),
33	GATE_CAM(CLK_CAM, "cam", "mm_ck", 6),
34	GATE_CAM(CLK_CAMTG, "camtg", "mm_ck", 7),
35	GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "mm_ck", 8),
36	GATE_CAM(CLK_CAMSV0, "camsv0", "mm_ck", 9),
37	GATE_CAM(CLK_CAMSV1, "camsv1", "mm_ck", 10),
38	GATE_CAM(CLK_CAMSV2, "camsv2", "mm_ck", 11),
39	GATE_CAM(CLK_CAM_CCU, "cam_ccu", "mm_ck", 12),
40};
41
42static int clk_mt6765_cam_probe(struct platform_device *pdev)
43{
44	struct clk_onecell_data *clk_data;
45	int r;
46	struct device_node *node = pdev->dev.of_node;
47
48	clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
49
50	mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks), clk_data);
51
52	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
53
54	if (r)
55		pr_err("%s(): could not register clock provider: %d\n",
56		       __func__, r);
57
58	return r;
59}
60
61static const struct of_device_id of_match_clk_mt6765_cam[] = {
62	{ .compatible = "mediatek,mt6765-camsys", },
63	{}
64};
65
66static struct platform_driver clk_mt6765_cam_drv = {
67	.probe = clk_mt6765_cam_probe,
68	.driver = {
69		.name = "clk-mt6765-cam",
70		.of_match_table = of_match_clk_mt6765_cam,
71	},
72};
73
74builtin_platform_driver(clk_mt6765_cam_drv);