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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * F81532/F81534 USB to Serial Ports Bridge
4 *
5 * F81532 => 2 Serial Ports
6 * F81534 => 4 Serial Ports
7 *
8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
11 *
12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
14 * (Read Data/MSR/LSR).
15 *
16 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
17 * It can be described by f81534_prepare_write_buffer()
18 *
19 * Read URB is 512Bytes max, per serial port used 128Bytes.
20 * It can be described by f81534_process_read_urb() and maybe received with
21 * 128x1,2,3,4 bytes.
22 *
23 */
24#include <linux/slab.h>
25#include <linux/tty.h>
26#include <linux/tty_flip.h>
27#include <linux/usb.h>
28#include <linux/usb/serial.h>
29#include <linux/serial_reg.h>
30#include <linux/module.h>
31#include <linux/uaccess.h>
32
33/* Serial Port register Address */
34#define F81534_UART_BASE_ADDRESS 0x1200
35#define F81534_UART_OFFSET 0x10
36#define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
37#define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
38#define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
39#define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
40#define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
41#define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
42#define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
43#define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
44#define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
45#define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
46
47#define F81534_DEF_CONF_ADDRESS_START 0x3000
48#define F81534_DEF_CONF_SIZE 12
49
50#define F81534_CUSTOM_ADDRESS_START 0x2f00
51#define F81534_CUSTOM_DATA_SIZE 0x10
52#define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
53#define F81534_CUSTOM_VALID_TOKEN 0xf0
54#define F81534_CONF_OFFSET 1
55#define F81534_CONF_INIT_GPIO_OFFSET 4
56#define F81534_CONF_WORK_GPIO_OFFSET 8
57#define F81534_CONF_GPIO_SHUTDOWN 7
58#define F81534_CONF_GPIO_RS232 1
59
60#define F81534_MAX_DATA_BLOCK 64
61#define F81534_MAX_BUS_RETRY 20
62
63/* Default URB timeout for USB operations */
64#define F81534_USB_MAX_RETRY 10
65#define F81534_USB_TIMEOUT 2000
66#define F81534_SET_GET_REGISTER 0xA0
67
68#define F81534_NUM_PORT 4
69#define F81534_UNUSED_PORT 0xff
70#define F81534_WRITE_BUFFER_SIZE 512
71
72#define DRIVER_DESC "Fintek F81532/F81534"
73#define FINTEK_VENDOR_ID_1 0x1934
74#define FINTEK_VENDOR_ID_2 0x2C42
75#define FINTEK_DEVICE_ID 0x1202
76#define F81534_MAX_TX_SIZE 124
77#define F81534_MAX_RX_SIZE 124
78#define F81534_RECEIVE_BLOCK_SIZE 128
79#define F81534_MAX_RECEIVE_BLOCK_SIZE 512
80
81#define F81534_TOKEN_RECEIVE 0x01
82#define F81534_TOKEN_WRITE 0x02
83#define F81534_TOKEN_TX_EMPTY 0x03
84#define F81534_TOKEN_MSR_CHANGE 0x04
85
86/*
87 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
88 * idle if we performed any command.
89 *
90 * SPI Bus status register: F81534_BUS_REG_STATUS
91 * Bit 0/1 : BUSY
92 * Bit 2 : IDLE
93 */
94#define F81534_BUS_BUSY (BIT(0) | BIT(1))
95#define F81534_BUS_IDLE BIT(2)
96#define F81534_BUS_READ_DATA 0x1004
97#define F81534_BUS_REG_STATUS 0x1003
98#define F81534_BUS_REG_START 0x1002
99#define F81534_BUS_REG_END 0x1001
100
101#define F81534_CMD_READ 0x03
102
103#define F81534_DEFAULT_BAUD_RATE 9600
104
105#define F81534_PORT_CONF_RS232 0
106#define F81534_PORT_CONF_RS485 BIT(0)
107#define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
108#define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
109#define F81534_PORT_CONF_DISABLE_PORT BIT(3)
110#define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
111#define F81534_PORT_UNAVAILABLE \
112 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
113
114
115#define F81534_1X_RXTRIGGER 0xc3
116#define F81534_8X_RXTRIGGER 0xcf
117
118/*
119 * F81532/534 Clock registers (offset +08h)
120 *
121 * Bit0: UART Enable (always on)
122 * Bit2-1: Clock source selector
123 * 00: 1.846MHz.
124 * 01: 18.46MHz.
125 * 10: 24MHz.
126 * 11: 14.77MHz.
127 * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
128 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
129 */
130
131#define F81534_UART_EN BIT(0)
132#define F81534_CLK_1_846_MHZ 0
133#define F81534_CLK_18_46_MHZ BIT(1)
134#define F81534_CLK_24_MHZ BIT(2)
135#define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
136#define F81534_CLK_MASK GENMASK(2, 1)
137#define F81534_CLK_TX_DELAY_1BIT BIT(3)
138#define F81534_CLK_RS485_MODE BIT(4)
139#define F81534_CLK_RS485_INVERT BIT(5)
140
141static const struct usb_device_id f81534_id_table[] = {
142 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
143 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
144 {} /* Terminating entry */
145};
146
147#define F81534_TX_EMPTY_BIT 0
148
149struct f81534_serial_private {
150 u8 conf_data[F81534_DEF_CONF_SIZE];
151 int tty_idx[F81534_NUM_PORT];
152 u8 setting_idx;
153 int opened_port;
154 struct mutex urb_mutex;
155};
156
157struct f81534_port_private {
158 struct mutex mcr_mutex;
159 struct mutex lcr_mutex;
160 struct work_struct lsr_work;
161 struct usb_serial_port *port;
162 unsigned long tx_empty;
163 spinlock_t msr_lock;
164 u32 baud_base;
165 u8 shadow_mcr;
166 u8 shadow_lcr;
167 u8 shadow_msr;
168 u8 shadow_clk;
169 u8 phy_num;
170};
171
172struct f81534_pin_data {
173 const u16 reg_addr;
174 const u8 reg_mask;
175};
176
177struct f81534_port_out_pin {
178 struct f81534_pin_data pin[3];
179};
180
181/* Pin output value for M2/M1/M0(SD) */
182static const struct f81534_port_out_pin f81534_port_out_pins[] = {
183 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
184 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
185 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
186 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
187};
188
189static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
190static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
191 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
192
193static int f81534_logic_to_phy_port(struct usb_serial *serial,
194 struct usb_serial_port *port)
195{
196 struct f81534_serial_private *serial_priv =
197 usb_get_serial_data(port->serial);
198 int count = 0;
199 int i;
200
201 for (i = 0; i < F81534_NUM_PORT; ++i) {
202 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
203 continue;
204
205 if (port->port_number == count)
206 return i;
207
208 ++count;
209 }
210
211 return -ENODEV;
212}
213
214static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
215{
216 struct usb_interface *interface = serial->interface;
217 struct usb_device *dev = serial->dev;
218 size_t count = F81534_USB_MAX_RETRY;
219 int status;
220 u8 *tmp;
221
222 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
223 if (!tmp)
224 return -ENOMEM;
225
226 *tmp = data;
227
228 /*
229 * Our device maybe not reply when heavily loading, We'll retry for
230 * F81534_USB_MAX_RETRY times.
231 */
232 while (count--) {
233 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
234 F81534_SET_GET_REGISTER,
235 USB_TYPE_VENDOR | USB_DIR_OUT,
236 reg, 0, tmp, sizeof(u8),
237 F81534_USB_TIMEOUT);
238 if (status > 0) {
239 status = 0;
240 break;
241 } else if (status == 0) {
242 status = -EIO;
243 }
244 }
245
246 if (status < 0) {
247 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
248 __func__, reg, data, status);
249 }
250
251 kfree(tmp);
252 return status;
253}
254
255static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
256{
257 struct usb_interface *interface = serial->interface;
258 struct usb_device *dev = serial->dev;
259 size_t count = F81534_USB_MAX_RETRY;
260 int status;
261 u8 *tmp;
262
263 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
264 if (!tmp)
265 return -ENOMEM;
266
267 /*
268 * Our device maybe not reply when heavily loading, We'll retry for
269 * F81534_USB_MAX_RETRY times.
270 */
271 while (count--) {
272 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
273 F81534_SET_GET_REGISTER,
274 USB_TYPE_VENDOR | USB_DIR_IN,
275 reg, 0, tmp, sizeof(u8),
276 F81534_USB_TIMEOUT);
277 if (status > 0) {
278 status = 0;
279 break;
280 } else if (status == 0) {
281 status = -EIO;
282 }
283 }
284
285 if (status < 0) {
286 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
287 reg, status);
288 goto end;
289 }
290
291 *data = *tmp;
292
293end:
294 kfree(tmp);
295 return status;
296}
297
298static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
299 u8 mask, u8 data)
300{
301 int status;
302 u8 tmp;
303
304 status = f81534_get_register(serial, reg, &tmp);
305 if (status)
306 return status;
307
308 tmp &= ~mask;
309 tmp |= (mask & data);
310
311 return f81534_set_register(serial, reg, tmp);
312}
313
314static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
315 u16 reg, u8 data)
316{
317 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
318 data);
319}
320
321static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
322 u16 reg, u8 *data)
323{
324 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
325 data);
326}
327
328static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
329 u8 data)
330{
331 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
332
333 return f81534_set_register(port->serial,
334 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
335}
336
337static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
338 u8 *data)
339{
340 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
341
342 return f81534_get_register(port->serial,
343 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
344}
345
346/*
347 * If we try to access the internal flash via SPI bus, we should check the bus
348 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
349 */
350static int f81534_wait_for_spi_idle(struct usb_serial *serial)
351{
352 size_t count = F81534_MAX_BUS_RETRY;
353 u8 tmp;
354 int status;
355
356 do {
357 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
358 &tmp);
359 if (status)
360 return status;
361
362 if (tmp & F81534_BUS_BUSY)
363 continue;
364
365 if (tmp & F81534_BUS_IDLE)
366 break;
367
368 } while (--count);
369
370 if (!count) {
371 dev_err(&serial->interface->dev,
372 "%s: timed out waiting for idle SPI bus\n",
373 __func__);
374 return -EIO;
375 }
376
377 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
378 tmp & ~F81534_BUS_IDLE);
379}
380
381static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
382 u8 *data)
383{
384 int status;
385
386 status = f81534_get_register(serial, reg, data);
387 if (status)
388 return status;
389
390 return f81534_wait_for_spi_idle(serial);
391}
392
393static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
394{
395 int status;
396
397 status = f81534_set_register(serial, reg, data);
398 if (status)
399 return status;
400
401 return f81534_wait_for_spi_idle(serial);
402}
403
404static int f81534_read_flash(struct usb_serial *serial, u32 address,
405 size_t size, u8 *buf)
406{
407 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
408 size_t block = 0;
409 size_t read_size;
410 size_t count;
411 int status;
412 int offset;
413 u16 reg_tmp;
414
415 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
416 F81534_CMD_READ);
417 if (status)
418 return status;
419
420 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
421 (address >> 16) & 0xff);
422 if (status)
423 return status;
424
425 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
426 (address >> 8) & 0xff);
427 if (status)
428 return status;
429
430 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
431 (address >> 0) & 0xff);
432 if (status)
433 return status;
434
435 /* Continuous read mode */
436 do {
437 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
438
439 for (count = 0; count < read_size; ++count) {
440 /* To write F81534_BUS_REG_END when final byte */
441 if (size <= F81534_MAX_DATA_BLOCK &&
442 read_size == count + 1)
443 reg_tmp = F81534_BUS_REG_END;
444 else
445 reg_tmp = F81534_BUS_REG_START;
446
447 /*
448 * Dummy code, force IC to generate a read pulse, the
449 * set of value 0xf1 is dont care (any value is ok)
450 */
451 status = f81534_set_spi_register(serial, reg_tmp,
452 0xf1);
453 if (status)
454 return status;
455
456 status = f81534_get_spi_register(serial,
457 F81534_BUS_READ_DATA,
458 &tmp_buf[count]);
459 if (status)
460 return status;
461
462 offset = count + block * F81534_MAX_DATA_BLOCK;
463 buf[offset] = tmp_buf[count];
464 }
465
466 size -= read_size;
467 ++block;
468 } while (size);
469
470 return 0;
471}
472
473static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
474{
475 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
476 int phy_num = port_priv->phy_num;
477 u8 tx_len;
478 int i;
479
480 /*
481 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
482 * index 0: port phy idx (e.g., 0,1,2,3)
483 * index 1: only F81534_TOKEN_WRITE
484 * index 2: serial TX out length
485 * index 3: fix to 0
486 * index 4~127: serial out data block
487 */
488 for (i = 0; i < F81534_NUM_PORT; ++i) {
489 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
490 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
491 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
492 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
493 }
494
495 tx_len = kfifo_out_locked(&port->write_fifo,
496 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
497 F81534_MAX_TX_SIZE, &port->lock);
498
499 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
500}
501
502static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
503{
504 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
505 struct urb *urb;
506 unsigned long flags;
507 int result;
508
509 /* Check is any data in write_fifo */
510 spin_lock_irqsave(&port->lock, flags);
511
512 if (kfifo_is_empty(&port->write_fifo)) {
513 spin_unlock_irqrestore(&port->lock, flags);
514 return 0;
515 }
516
517 spin_unlock_irqrestore(&port->lock, flags);
518
519 /* Check H/W is TXEMPTY */
520 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
521 return 0;
522
523 urb = port->write_urbs[0];
524 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
525 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
526
527 result = usb_submit_urb(urb, mem_flags);
528 if (result) {
529 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
530 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
531 result);
532 return result;
533 }
534
535 usb_serial_port_softint(port);
536 return 0;
537}
538
539static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
540{
541 if (!baudrate)
542 return 0;
543
544 /* Round to nearest divisor */
545 return DIV_ROUND_CLOSEST(clockrate, baudrate);
546}
547
548static int f81534_find_clk(u32 baudrate)
549{
550 int idx;
551
552 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
553 if (baudrate <= baudrate_table[idx] &&
554 baudrate_table[idx] % baudrate == 0)
555 return idx;
556 }
557
558 return -EINVAL;
559}
560
561static int f81534_set_port_config(struct usb_serial_port *port,
562 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
563{
564 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
565 u32 divisor;
566 int status;
567 int i;
568 int idx;
569 u8 value;
570 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
571
572 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
573 idx = f81534_find_clk(baud_list[i]);
574 if (idx >= 0) {
575 baudrate = baud_list[i];
576 tty_encode_baud_rate(tty, baudrate, baudrate);
577 break;
578 }
579 }
580
581 if (idx < 0)
582 return -EINVAL;
583
584 port_priv->baud_base = baudrate_table[idx];
585 port_priv->shadow_clk &= ~F81534_CLK_MASK;
586 port_priv->shadow_clk |= clock_table[idx];
587
588 status = f81534_set_port_register(port, F81534_CLOCK_REG,
589 port_priv->shadow_clk);
590 if (status) {
591 dev_err(&port->dev, "CLOCK_REG setting failed\n");
592 return status;
593 }
594
595 if (baudrate <= 1200)
596 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
597 else
598 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
599
600 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
601 if (status) {
602 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
603 return status;
604 }
605
606 if (baudrate <= 1200)
607 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
608 else
609 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
610
611 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
612 value);
613 if (status) {
614 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
615 return status;
616 }
617
618 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
619
620 mutex_lock(&port_priv->lcr_mutex);
621
622 value = UART_LCR_DLAB;
623 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
624 value);
625 if (status) {
626 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
627 goto out_unlock;
628 }
629
630 value = divisor & 0xff;
631 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
632 if (status) {
633 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
634 goto out_unlock;
635 }
636
637 value = (divisor >> 8) & 0xff;
638 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
639 if (status) {
640 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
641 goto out_unlock;
642 }
643
644 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
645 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
646 value);
647 if (status) {
648 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
649 goto out_unlock;
650 }
651
652 port_priv->shadow_lcr = value;
653out_unlock:
654 mutex_unlock(&port_priv->lcr_mutex);
655
656 return status;
657}
658
659static void f81534_break_ctl(struct tty_struct *tty, int break_state)
660{
661 struct usb_serial_port *port = tty->driver_data;
662 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
663 int status;
664
665 mutex_lock(&port_priv->lcr_mutex);
666
667 if (break_state)
668 port_priv->shadow_lcr |= UART_LCR_SBC;
669 else
670 port_priv->shadow_lcr &= ~UART_LCR_SBC;
671
672 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
673 port_priv->shadow_lcr);
674 if (status)
675 dev_err(&port->dev, "set break failed: %d\n", status);
676
677 mutex_unlock(&port_priv->lcr_mutex);
678}
679
680static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
681 unsigned int clear)
682{
683 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
684 int status;
685 u8 tmp;
686
687 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
688 return 0; /* no change */
689
690 mutex_lock(&port_priv->mcr_mutex);
691
692 /* 'Set' takes precedence over 'Clear' */
693 clear &= ~set;
694
695 /* Always enable UART_MCR_OUT2 */
696 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
697
698 if (clear & TIOCM_DTR)
699 tmp &= ~UART_MCR_DTR;
700
701 if (clear & TIOCM_RTS)
702 tmp &= ~UART_MCR_RTS;
703
704 if (set & TIOCM_DTR)
705 tmp |= UART_MCR_DTR;
706
707 if (set & TIOCM_RTS)
708 tmp |= UART_MCR_RTS;
709
710 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
711 if (status < 0) {
712 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
713 mutex_unlock(&port_priv->mcr_mutex);
714 return status;
715 }
716
717 port_priv->shadow_mcr = tmp;
718 mutex_unlock(&port_priv->mcr_mutex);
719 return 0;
720}
721
722/*
723 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
724 * for latest configuration index. If nothing found
725 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
726 * F81534_DEF_CONF_ADDRESS_START section.
727 *
728 * Due to we only use block0 to save data, so *index should be 0 or
729 * F81534_CUSTOM_NO_CUSTOM_DATA.
730 */
731static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
732{
733 u8 tmp;
734 int status;
735
736 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
737 &tmp);
738 if (status) {
739 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
740 __func__, status);
741 return status;
742 }
743
744 /* We'll use the custom data when the data is valid. */
745 if (tmp == F81534_CUSTOM_VALID_TOKEN)
746 *index = 0;
747 else
748 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
749
750 return 0;
751}
752
753/*
754 * The F81532/534 will not report serial port to USB serial subsystem when
755 * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
756 *
757 * To detect RX pin status, we'll enable MCR interal loopback, disable it and
758 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
759 */
760static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
761{
762 int status;
763 u8 old_mcr;
764 u8 msr;
765 u8 lsr;
766 u8 msr_mask;
767
768 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
769
770 status = f81534_get_phy_port_register(serial, phy,
771 F81534_MODEM_STATUS_REG, &msr);
772 if (status)
773 return false;
774
775 if ((msr & msr_mask) != msr_mask)
776 return false;
777
778 status = f81534_set_phy_port_register(serial, phy,
779 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
780 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
781 if (status)
782 return false;
783
784 status = f81534_get_phy_port_register(serial, phy,
785 F81534_MODEM_CONTROL_REG, &old_mcr);
786 if (status)
787 return false;
788
789 status = f81534_set_phy_port_register(serial, phy,
790 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
791 if (status)
792 return false;
793
794 status = f81534_set_phy_port_register(serial, phy,
795 F81534_MODEM_CONTROL_REG, 0x0);
796 if (status)
797 return false;
798
799 msleep(60);
800
801 status = f81534_get_phy_port_register(serial, phy,
802 F81534_LINE_STATUS_REG, &lsr);
803 if (status)
804 return false;
805
806 status = f81534_set_phy_port_register(serial, phy,
807 F81534_MODEM_CONTROL_REG, old_mcr);
808 if (status)
809 return false;
810
811 if ((lsr & UART_LSR_BI) == UART_LSR_BI)
812 return true;
813
814 return false;
815}
816
817/*
818 * We had 2 generation of F81532/534 IC. All has an internal storage.
819 *
820 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
821 * internal data will used. All mode and gpio control should manually set
822 * by AP or Driver and all storage space value are 0xff. The
823 * f81534_calc_num_ports() will run to final we marked as "oldest version"
824 * for this IC.
825 *
826 * 2rd is designed to more generic to use any transceiver and this is our
827 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
828 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
829 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
830 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
831 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
832 * The f81534_calc_num_ports() will run to "new style" with checking
833 * F81534_PORT_UNAVAILABLE section.
834 */
835static int f81534_calc_num_ports(struct usb_serial *serial,
836 struct usb_serial_endpoints *epds)
837{
838 struct f81534_serial_private *serial_priv;
839 struct device *dev = &serial->interface->dev;
840 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
841 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
842 u8 num_port = 0;
843 int index = 0;
844 int status;
845 int i;
846
847 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
848 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
849 dev_err(dev, "unsupported endpoint max packet size\n");
850 return -ENODEV;
851 }
852
853 serial_priv = devm_kzalloc(&serial->interface->dev,
854 sizeof(*serial_priv), GFP_KERNEL);
855 if (!serial_priv)
856 return -ENOMEM;
857
858 usb_set_serial_data(serial, serial_priv);
859 mutex_init(&serial_priv->urb_mutex);
860
861 /* Check had custom setting */
862 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
863 if (status) {
864 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
865 __func__, status);
866 return status;
867 }
868
869 /*
870 * We'll read custom data only when data available, otherwise we'll
871 * read default value instead.
872 */
873 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
874 status = f81534_read_flash(serial,
875 F81534_CUSTOM_ADDRESS_START +
876 F81534_CONF_OFFSET,
877 sizeof(serial_priv->conf_data),
878 serial_priv->conf_data);
879 if (status) {
880 dev_err(&serial->interface->dev,
881 "%s: get custom data failed: %d\n",
882 __func__, status);
883 return status;
884 }
885
886 dev_dbg(&serial->interface->dev,
887 "%s: read config from block: %d\n", __func__,
888 serial_priv->setting_idx);
889 } else {
890 /* Read default board setting */
891 status = f81534_read_flash(serial,
892 F81534_DEF_CONF_ADDRESS_START,
893 sizeof(serial_priv->conf_data),
894 serial_priv->conf_data);
895 if (status) {
896 dev_err(&serial->interface->dev,
897 "%s: read failed: %d\n", __func__,
898 status);
899 return status;
900 }
901
902 dev_dbg(&serial->interface->dev, "%s: read default config\n",
903 __func__);
904 }
905
906 /* New style, find all possible ports */
907 for (i = 0; i < F81534_NUM_PORT; ++i) {
908 if (f81534_check_port_hw_disabled(serial, i))
909 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
910
911 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
912 continue;
913
914 ++num_port;
915 }
916
917 if (!num_port) {
918 dev_warn(&serial->interface->dev,
919 "no config found, assuming 4 ports\n");
920 num_port = 4; /* Nothing found, oldest version IC */
921 }
922
923 /* Assign phy-to-logic mapping */
924 for (i = 0; i < F81534_NUM_PORT; ++i) {
925 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
926 continue;
927
928 serial_priv->tty_idx[i] = index++;
929 dev_dbg(&serial->interface->dev,
930 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
931 serial_priv->tty_idx[i]);
932 }
933
934 /*
935 * Setup bulk-out endpoint multiplexing. All ports share the same
936 * bulk-out endpoint.
937 */
938 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
939
940 for (i = 1; i < num_port; ++i)
941 epds->bulk_out[i] = epds->bulk_out[0];
942
943 epds->num_bulk_out = num_port;
944
945 return num_port;
946}
947
948static void f81534_set_termios(struct tty_struct *tty,
949 struct usb_serial_port *port,
950 struct ktermios *old_termios)
951{
952 u8 new_lcr = 0;
953 int status;
954 u32 baud;
955 u32 old_baud;
956
957 if (C_BAUD(tty) == B0)
958 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
959 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
960 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
961
962 if (C_PARENB(tty)) {
963 new_lcr |= UART_LCR_PARITY;
964
965 if (!C_PARODD(tty))
966 new_lcr |= UART_LCR_EPAR;
967
968 if (C_CMSPAR(tty))
969 new_lcr |= UART_LCR_SPAR;
970 }
971
972 if (C_CSTOPB(tty))
973 new_lcr |= UART_LCR_STOP;
974
975 switch (C_CSIZE(tty)) {
976 case CS5:
977 new_lcr |= UART_LCR_WLEN5;
978 break;
979 case CS6:
980 new_lcr |= UART_LCR_WLEN6;
981 break;
982 case CS7:
983 new_lcr |= UART_LCR_WLEN7;
984 break;
985 default:
986 case CS8:
987 new_lcr |= UART_LCR_WLEN8;
988 break;
989 }
990
991 baud = tty_get_baud_rate(tty);
992 if (!baud)
993 return;
994
995 if (old_termios)
996 old_baud = tty_termios_baud_rate(old_termios);
997 else
998 old_baud = F81534_DEFAULT_BAUD_RATE;
999
1000 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
1001
1002 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
1003 if (status < 0) {
1004 dev_err(&port->dev, "%s: set port config failed: %d\n",
1005 __func__, status);
1006 }
1007}
1008
1009static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
1010{
1011 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
1012}
1013
1014static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
1015{
1016 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1017 struct tty_struct *tty;
1018 unsigned long flags;
1019 u8 old_msr;
1020
1021 if (!(msr & UART_MSR_ANY_DELTA))
1022 return;
1023
1024 spin_lock_irqsave(&port_priv->msr_lock, flags);
1025 old_msr = port_priv->shadow_msr;
1026 port_priv->shadow_msr = msr;
1027 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1028
1029 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
1030 msr);
1031
1032 /* Update input line counters */
1033 if (msr & UART_MSR_DCTS)
1034 port->icount.cts++;
1035 if (msr & UART_MSR_DDSR)
1036 port->icount.dsr++;
1037 if (msr & UART_MSR_DDCD)
1038 port->icount.dcd++;
1039 if (msr & UART_MSR_TERI)
1040 port->icount.rng++;
1041
1042 wake_up_interruptible(&port->port.delta_msr_wait);
1043
1044 if (!(msr & UART_MSR_DDCD))
1045 return;
1046
1047 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
1048 __func__, port_priv->phy_num, old_msr, msr);
1049
1050 tty = tty_port_tty_get(&port->port);
1051 if (!tty)
1052 return;
1053
1054 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
1055 tty_kref_put(tty);
1056}
1057
1058static int f81534_read_msr(struct usb_serial_port *port)
1059{
1060 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1061 unsigned long flags;
1062 int status;
1063 u8 msr;
1064
1065 /* Get MSR initial value */
1066 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1067 if (status)
1068 return status;
1069
1070 /* Force update current state */
1071 spin_lock_irqsave(&port_priv->msr_lock, flags);
1072 port_priv->shadow_msr = msr;
1073 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1074
1075 return 0;
1076}
1077
1078static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
1079{
1080 struct f81534_serial_private *serial_priv =
1081 usb_get_serial_data(port->serial);
1082 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1083 int status;
1084
1085 status = f81534_set_port_register(port,
1086 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
1087 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1088 if (status) {
1089 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
1090 status);
1091 return status;
1092 }
1093
1094 if (tty)
1095 f81534_set_termios(tty, port, NULL);
1096
1097 status = f81534_read_msr(port);
1098 if (status)
1099 return status;
1100
1101 mutex_lock(&serial_priv->urb_mutex);
1102
1103 /* Submit Read URBs for first port opened */
1104 if (!serial_priv->opened_port) {
1105 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
1106 if (status)
1107 goto exit;
1108 }
1109
1110 serial_priv->opened_port++;
1111
1112exit:
1113 mutex_unlock(&serial_priv->urb_mutex);
1114
1115 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1116 return status;
1117}
1118
1119static void f81534_close(struct usb_serial_port *port)
1120{
1121 struct f81534_serial_private *serial_priv =
1122 usb_get_serial_data(port->serial);
1123 struct usb_serial_port *port0 = port->serial->port[0];
1124 unsigned long flags;
1125 size_t i;
1126
1127 usb_kill_urb(port->write_urbs[0]);
1128
1129 spin_lock_irqsave(&port->lock, flags);
1130 kfifo_reset_out(&port->write_fifo);
1131 spin_unlock_irqrestore(&port->lock, flags);
1132
1133 /* Kill Read URBs when final port closed */
1134 mutex_lock(&serial_priv->urb_mutex);
1135 serial_priv->opened_port--;
1136
1137 if (!serial_priv->opened_port) {
1138 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
1139 usb_kill_urb(port0->read_urbs[i]);
1140 }
1141
1142 mutex_unlock(&serial_priv->urb_mutex);
1143}
1144
1145static int f81534_get_serial_info(struct tty_struct *tty,
1146 struct serial_struct *ss)
1147{
1148 struct usb_serial_port *port = tty->driver_data;
1149 struct f81534_port_private *port_priv;
1150
1151 port_priv = usb_get_serial_port_data(port);
1152
1153 ss->type = PORT_16550A;
1154 ss->port = port->port_number;
1155 ss->line = port->minor;
1156 ss->baud_base = port_priv->baud_base;
1157 return 0;
1158}
1159
1160static void f81534_process_per_serial_block(struct usb_serial_port *port,
1161 u8 *data)
1162{
1163 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1164 int phy_num = data[0];
1165 size_t read_size = 0;
1166 size_t i;
1167 char tty_flag;
1168 int status;
1169 u8 lsr;
1170
1171 /*
1172 * The block layout is 128 Bytes
1173 * index 0: port phy idx (e.g., 0,1,2,3),
1174 * index 1: It's could be
1175 * F81534_TOKEN_RECEIVE
1176 * F81534_TOKEN_TX_EMPTY
1177 * F81534_TOKEN_MSR_CHANGE
1178 * index 2: serial in size (data+lsr, must be even)
1179 * meaningful for F81534_TOKEN_RECEIVE only
1180 * index 3: current MSR with this device
1181 * index 4~127: serial in data block (data+lsr, must be even)
1182 */
1183 switch (data[1]) {
1184 case F81534_TOKEN_TX_EMPTY:
1185 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1186
1187 /* Try to submit writer */
1188 status = f81534_submit_writer(port, GFP_ATOMIC);
1189 if (status)
1190 dev_err(&port->dev, "%s: submit failed\n", __func__);
1191 return;
1192
1193 case F81534_TOKEN_MSR_CHANGE:
1194 f81534_msr_changed(port, data[3]);
1195 return;
1196
1197 case F81534_TOKEN_RECEIVE:
1198 read_size = data[2];
1199 if (read_size > F81534_MAX_RX_SIZE) {
1200 dev_err(&port->dev,
1201 "%s: phy: %d read_size: %zu larger than: %d\n",
1202 __func__, phy_num, read_size,
1203 F81534_MAX_RX_SIZE);
1204 return;
1205 }
1206
1207 break;
1208
1209 default:
1210 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
1211 data[1]);
1212 return;
1213 }
1214
1215 for (i = 4; i < 4 + read_size; i += 2) {
1216 tty_flag = TTY_NORMAL;
1217 lsr = data[i + 1];
1218
1219 if (lsr & UART_LSR_BRK_ERROR_BITS) {
1220 if (lsr & UART_LSR_BI) {
1221 tty_flag = TTY_BREAK;
1222 port->icount.brk++;
1223 usb_serial_handle_break(port);
1224 } else if (lsr & UART_LSR_PE) {
1225 tty_flag = TTY_PARITY;
1226 port->icount.parity++;
1227 } else if (lsr & UART_LSR_FE) {
1228 tty_flag = TTY_FRAME;
1229 port->icount.frame++;
1230 }
1231
1232 if (lsr & UART_LSR_OE) {
1233 port->icount.overrun++;
1234 tty_insert_flip_char(&port->port, 0,
1235 TTY_OVERRUN);
1236 }
1237
1238 schedule_work(&port_priv->lsr_work);
1239 }
1240
1241 if (port->sysrq) {
1242 if (usb_serial_handle_sysrq_char(port, data[i]))
1243 continue;
1244 }
1245
1246 tty_insert_flip_char(&port->port, data[i], tty_flag);
1247 }
1248
1249 tty_flip_buffer_push(&port->port);
1250}
1251
1252static void f81534_process_read_urb(struct urb *urb)
1253{
1254 struct f81534_serial_private *serial_priv;
1255 struct usb_serial_port *port;
1256 struct usb_serial *serial;
1257 u8 *buf;
1258 int phy_port_num;
1259 int tty_port_num;
1260 size_t i;
1261
1262 if (!urb->actual_length ||
1263 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1264 return;
1265 }
1266
1267 port = urb->context;
1268 serial = port->serial;
1269 buf = urb->transfer_buffer;
1270 serial_priv = usb_get_serial_data(serial);
1271
1272 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1273 phy_port_num = buf[i];
1274 if (phy_port_num >= F81534_NUM_PORT) {
1275 dev_err(&port->dev,
1276 "%s: phy_port_num: %d larger than: %d\n",
1277 __func__, phy_port_num, F81534_NUM_PORT);
1278 continue;
1279 }
1280
1281 tty_port_num = serial_priv->tty_idx[phy_port_num];
1282 port = serial->port[tty_port_num];
1283
1284 if (tty_port_initialized(&port->port))
1285 f81534_process_per_serial_block(port, &buf[i]);
1286 }
1287}
1288
1289static void f81534_write_usb_callback(struct urb *urb)
1290{
1291 struct usb_serial_port *port = urb->context;
1292
1293 switch (urb->status) {
1294 case 0:
1295 break;
1296 case -ENOENT:
1297 case -ECONNRESET:
1298 case -ESHUTDOWN:
1299 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1300 __func__, urb->status);
1301 return;
1302 case -EPIPE:
1303 dev_err(&port->dev, "%s - urb stopped: %d\n",
1304 __func__, urb->status);
1305 return;
1306 default:
1307 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1308 __func__, urb->status);
1309 break;
1310 }
1311}
1312
1313static void f81534_lsr_worker(struct work_struct *work)
1314{
1315 struct f81534_port_private *port_priv;
1316 struct usb_serial_port *port;
1317 int status;
1318 u8 tmp;
1319
1320 port_priv = container_of(work, struct f81534_port_private, lsr_work);
1321 port = port_priv->port;
1322
1323 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
1324 if (status)
1325 dev_warn(&port->dev, "read LSR failed: %d\n", status);
1326}
1327
1328static int f81534_set_port_output_pin(struct usb_serial_port *port)
1329{
1330 struct f81534_serial_private *serial_priv;
1331 struct f81534_port_private *port_priv;
1332 struct usb_serial *serial;
1333 const struct f81534_port_out_pin *pins;
1334 int status;
1335 int i;
1336 u8 value;
1337 u8 idx;
1338
1339 serial = port->serial;
1340 serial_priv = usb_get_serial_data(serial);
1341 port_priv = usb_get_serial_port_data(port);
1342
1343 idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num;
1344 value = serial_priv->conf_data[idx];
1345 if (value >= F81534_CONF_GPIO_SHUTDOWN) {
1346 /*
1347 * Newer IC configure will make transceiver in shutdown mode on
1348 * initial power on. We need enable it before using UARTs.
1349 */
1350 idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num;
1351 value = serial_priv->conf_data[idx];
1352 if (value >= F81534_CONF_GPIO_SHUTDOWN)
1353 value = F81534_CONF_GPIO_RS232;
1354 }
1355
1356 pins = &f81534_port_out_pins[port_priv->phy_num];
1357
1358 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
1359 status = f81534_set_mask_register(serial,
1360 pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1361 value & BIT(i) ? pins->pin[i].reg_mask : 0);
1362 if (status)
1363 return status;
1364 }
1365
1366 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
1367 return 0;
1368}
1369
1370static int f81534_port_probe(struct usb_serial_port *port)
1371{
1372 struct f81534_serial_private *serial_priv;
1373 struct f81534_port_private *port_priv;
1374 int ret;
1375 u8 value;
1376
1377 serial_priv = usb_get_serial_data(port->serial);
1378 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1379 if (!port_priv)
1380 return -ENOMEM;
1381
1382 /*
1383 * We'll make tx frame error when baud rate from 384~500kps. So we'll
1384 * delay all tx data frame with 1bit.
1385 */
1386 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
1387 spin_lock_init(&port_priv->msr_lock);
1388 mutex_init(&port_priv->mcr_mutex);
1389 mutex_init(&port_priv->lcr_mutex);
1390 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
1391
1392 /* Assign logic-to-phy mapping */
1393 ret = f81534_logic_to_phy_port(port->serial, port);
1394 if (ret < 0)
1395 return ret;
1396
1397 port_priv->phy_num = ret;
1398 port_priv->port = port;
1399 usb_set_serial_port_data(port, port_priv);
1400 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1401 port->port_number, port_priv->phy_num);
1402
1403 /*
1404 * The F81532/534 will hang-up when enable LSR interrupt in IER and
1405 * occur data overrun. So we'll disable the LSR interrupt in probe()
1406 * and submit the LSR worker to clear LSR state when reported LSR error
1407 * bit with bulk-in data in f81534_process_per_serial_block().
1408 */
1409 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
1410 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
1411 if (ret)
1412 return ret;
1413
1414 value = serial_priv->conf_data[port_priv->phy_num];
1415 switch (value & F81534_PORT_CONF_MODE_MASK) {
1416 case F81534_PORT_CONF_RS485_INVERT:
1417 port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
1418 F81534_CLK_RS485_INVERT;
1419 dev_dbg(&port->dev, "RS485 invert mode\n");
1420 break;
1421 case F81534_PORT_CONF_RS485:
1422 port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
1423 dev_dbg(&port->dev, "RS485 mode\n");
1424 break;
1425
1426 default:
1427 case F81534_PORT_CONF_RS232:
1428 dev_dbg(&port->dev, "RS232 mode\n");
1429 break;
1430 }
1431
1432 return f81534_set_port_output_pin(port);
1433}
1434
1435static int f81534_port_remove(struct usb_serial_port *port)
1436{
1437 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1438
1439 flush_work(&port_priv->lsr_work);
1440 return 0;
1441}
1442
1443static int f81534_tiocmget(struct tty_struct *tty)
1444{
1445 struct usb_serial_port *port = tty->driver_data;
1446 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1447 int status;
1448 int r;
1449 u8 msr;
1450 u8 mcr;
1451
1452 /* Read current MSR from device */
1453 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1454 if (status)
1455 return status;
1456
1457 mutex_lock(&port_priv->mcr_mutex);
1458 mcr = port_priv->shadow_mcr;
1459 mutex_unlock(&port_priv->mcr_mutex);
1460
1461 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1462 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1463 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1464 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1465 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1466 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1467
1468 return r;
1469}
1470
1471static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1472 unsigned int clear)
1473{
1474 struct usb_serial_port *port = tty->driver_data;
1475
1476 return f81534_update_mctrl(port, set, clear);
1477}
1478
1479static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1480{
1481 if (on)
1482 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1483 else
1484 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1485}
1486
1487static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1488 const u8 *buf, int count)
1489{
1490 int bytes_out, status;
1491
1492 if (!count)
1493 return 0;
1494
1495 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1496 &port->lock);
1497
1498 status = f81534_submit_writer(port, GFP_ATOMIC);
1499 if (status) {
1500 dev_err(&port->dev, "%s: submit failed\n", __func__);
1501 return status;
1502 }
1503
1504 return bytes_out;
1505}
1506
1507static bool f81534_tx_empty(struct usb_serial_port *port)
1508{
1509 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1510
1511 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1512}
1513
1514static int f81534_resume(struct usb_serial *serial)
1515{
1516 struct f81534_serial_private *serial_priv =
1517 usb_get_serial_data(serial);
1518 struct usb_serial_port *port;
1519 int error = 0;
1520 int status;
1521 size_t i;
1522
1523 /*
1524 * We'll register port 0 bulkin when port had opened, It'll take all
1525 * port received data, MSR register change and TX_EMPTY information.
1526 */
1527 mutex_lock(&serial_priv->urb_mutex);
1528
1529 if (serial_priv->opened_port) {
1530 status = f81534_submit_read_urb(serial, GFP_NOIO);
1531 if (status) {
1532 mutex_unlock(&serial_priv->urb_mutex);
1533 return status;
1534 }
1535 }
1536
1537 mutex_unlock(&serial_priv->urb_mutex);
1538
1539 for (i = 0; i < serial->num_ports; i++) {
1540 port = serial->port[i];
1541 if (!tty_port_initialized(&port->port))
1542 continue;
1543
1544 status = f81534_submit_writer(port, GFP_NOIO);
1545 if (status) {
1546 dev_err(&port->dev, "%s: submit failed\n", __func__);
1547 ++error;
1548 }
1549 }
1550
1551 if (error)
1552 return -EIO;
1553
1554 return 0;
1555}
1556
1557static struct usb_serial_driver f81534_device = {
1558 .driver = {
1559 .owner = THIS_MODULE,
1560 .name = "f81534",
1561 },
1562 .description = DRIVER_DESC,
1563 .id_table = f81534_id_table,
1564 .num_bulk_in = 1,
1565 .num_bulk_out = 1,
1566 .open = f81534_open,
1567 .close = f81534_close,
1568 .write = f81534_write,
1569 .tx_empty = f81534_tx_empty,
1570 .calc_num_ports = f81534_calc_num_ports,
1571 .port_probe = f81534_port_probe,
1572 .port_remove = f81534_port_remove,
1573 .break_ctl = f81534_break_ctl,
1574 .dtr_rts = f81534_dtr_rts,
1575 .process_read_urb = f81534_process_read_urb,
1576 .get_serial = f81534_get_serial_info,
1577 .tiocmget = f81534_tiocmget,
1578 .tiocmset = f81534_tiocmset,
1579 .write_bulk_callback = f81534_write_usb_callback,
1580 .set_termios = f81534_set_termios,
1581 .resume = f81534_resume,
1582};
1583
1584static struct usb_serial_driver *const serial_drivers[] = {
1585 &f81534_device, NULL
1586};
1587
1588module_usb_serial_driver(serial_drivers, f81534_id_table);
1589
1590MODULE_DEVICE_TABLE(usb, f81534_id_table);
1591MODULE_DESCRIPTION(DRIVER_DESC);
1592MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1593MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1594MODULE_LICENSE("GPL");
1/*
2 * F81532/F81534 USB to Serial Ports Bridge
3 *
4 * F81532 => 2 Serial Ports
5 * F81534 => 4 Serial Ports
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
13 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
14 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
15 *
16 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
17 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
18 * (Read Data/MSR/LSR).
19 *
20 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
21 * It can be described by f81534_prepare_write_buffer()
22 *
23 * Read URB is 512Bytes max, per serial port used 128Bytes.
24 * It can be described by f81534_process_read_urb() and maybe received with
25 * 128x1,2,3,4 bytes.
26 *
27 */
28#include <linux/slab.h>
29#include <linux/tty.h>
30#include <linux/tty_flip.h>
31#include <linux/usb.h>
32#include <linux/usb/serial.h>
33#include <linux/serial_reg.h>
34#include <linux/module.h>
35#include <linux/uaccess.h>
36
37/* Serial Port register Address */
38#define F81534_UART_BASE_ADDRESS 0x1200
39#define F81534_UART_OFFSET 0x10
40#define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
41#define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
42#define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
43#define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
44#define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
45#define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
46#define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
47
48#define F81534_DEF_CONF_ADDRESS_START 0x3000
49#define F81534_DEF_CONF_SIZE 8
50
51#define F81534_CUSTOM_ADDRESS_START 0x2f00
52#define F81534_CUSTOM_DATA_SIZE 0x10
53#define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
54#define F81534_CUSTOM_VALID_TOKEN 0xf0
55#define F81534_CONF_OFFSET 1
56
57#define F81534_MAX_DATA_BLOCK 64
58#define F81534_MAX_BUS_RETRY 20
59
60/* Default URB timeout for USB operations */
61#define F81534_USB_MAX_RETRY 10
62#define F81534_USB_TIMEOUT 1000
63#define F81534_SET_GET_REGISTER 0xA0
64
65#define F81534_NUM_PORT 4
66#define F81534_UNUSED_PORT 0xff
67#define F81534_WRITE_BUFFER_SIZE 512
68
69#define DRIVER_DESC "Fintek F81532/F81534"
70#define FINTEK_VENDOR_ID_1 0x1934
71#define FINTEK_VENDOR_ID_2 0x2C42
72#define FINTEK_DEVICE_ID 0x1202
73#define F81534_MAX_TX_SIZE 124
74#define F81534_MAX_RX_SIZE 124
75#define F81534_RECEIVE_BLOCK_SIZE 128
76#define F81534_MAX_RECEIVE_BLOCK_SIZE 512
77
78#define F81534_TOKEN_RECEIVE 0x01
79#define F81534_TOKEN_WRITE 0x02
80#define F81534_TOKEN_TX_EMPTY 0x03
81#define F81534_TOKEN_MSR_CHANGE 0x04
82
83/*
84 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
85 * idle if we performed any command.
86 *
87 * SPI Bus status register: F81534_BUS_REG_STATUS
88 * Bit 0/1 : BUSY
89 * Bit 2 : IDLE
90 */
91#define F81534_BUS_BUSY (BIT(0) | BIT(1))
92#define F81534_BUS_IDLE BIT(2)
93#define F81534_BUS_READ_DATA 0x1004
94#define F81534_BUS_REG_STATUS 0x1003
95#define F81534_BUS_REG_START 0x1002
96#define F81534_BUS_REG_END 0x1001
97
98#define F81534_CMD_READ 0x03
99
100#define F81534_DEFAULT_BAUD_RATE 9600
101#define F81534_MAX_BAUDRATE 115200
102
103#define F81534_PORT_CONF_DISABLE_PORT BIT(3)
104#define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
105#define F81534_PORT_UNAVAILABLE \
106 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
107
108#define F81534_1X_RXTRIGGER 0xc3
109#define F81534_8X_RXTRIGGER 0xcf
110
111static const struct usb_device_id f81534_id_table[] = {
112 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
113 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
114 {} /* Terminating entry */
115};
116
117#define F81534_TX_EMPTY_BIT 0
118
119struct f81534_serial_private {
120 u8 conf_data[F81534_DEF_CONF_SIZE];
121 int tty_idx[F81534_NUM_PORT];
122 u8 setting_idx;
123 int opened_port;
124 struct mutex urb_mutex;
125};
126
127struct f81534_port_private {
128 struct mutex mcr_mutex;
129 unsigned long tx_empty;
130 spinlock_t msr_lock;
131 u8 shadow_mcr;
132 u8 shadow_msr;
133 u8 phy_num;
134};
135
136static int f81534_logic_to_phy_port(struct usb_serial *serial,
137 struct usb_serial_port *port)
138{
139 struct f81534_serial_private *serial_priv =
140 usb_get_serial_data(port->serial);
141 int count = 0;
142 int i;
143
144 for (i = 0; i < F81534_NUM_PORT; ++i) {
145 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
146 continue;
147
148 if (port->port_number == count)
149 return i;
150
151 ++count;
152 }
153
154 return -ENODEV;
155}
156
157static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
158{
159 struct usb_interface *interface = serial->interface;
160 struct usb_device *dev = serial->dev;
161 size_t count = F81534_USB_MAX_RETRY;
162 int status;
163 u8 *tmp;
164
165 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
166 if (!tmp)
167 return -ENOMEM;
168
169 *tmp = data;
170
171 /*
172 * Our device maybe not reply when heavily loading, We'll retry for
173 * F81534_USB_MAX_RETRY times.
174 */
175 while (count--) {
176 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
177 F81534_SET_GET_REGISTER,
178 USB_TYPE_VENDOR | USB_DIR_OUT,
179 reg, 0, tmp, sizeof(u8),
180 F81534_USB_TIMEOUT);
181 if (status > 0) {
182 status = 0;
183 break;
184 } else if (status == 0) {
185 status = -EIO;
186 }
187 }
188
189 if (status < 0) {
190 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
191 __func__, reg, data, status);
192 }
193
194 kfree(tmp);
195 return status;
196}
197
198static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
199{
200 struct usb_interface *interface = serial->interface;
201 struct usb_device *dev = serial->dev;
202 size_t count = F81534_USB_MAX_RETRY;
203 int status;
204 u8 *tmp;
205
206 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
207 if (!tmp)
208 return -ENOMEM;
209
210 /*
211 * Our device maybe not reply when heavily loading, We'll retry for
212 * F81534_USB_MAX_RETRY times.
213 */
214 while (count--) {
215 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
216 F81534_SET_GET_REGISTER,
217 USB_TYPE_VENDOR | USB_DIR_IN,
218 reg, 0, tmp, sizeof(u8),
219 F81534_USB_TIMEOUT);
220 if (status > 0) {
221 status = 0;
222 break;
223 } else if (status == 0) {
224 status = -EIO;
225 }
226 }
227
228 if (status < 0) {
229 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
230 reg, status);
231 goto end;
232 }
233
234 *data = *tmp;
235
236end:
237 kfree(tmp);
238 return status;
239}
240
241static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
242 u8 data)
243{
244 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
245
246 return f81534_set_register(port->serial,
247 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
248}
249
250static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
251 u8 *data)
252{
253 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
254
255 return f81534_get_register(port->serial,
256 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
257}
258
259/*
260 * If we try to access the internal flash via SPI bus, we should check the bus
261 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
262 */
263static int f81534_wait_for_spi_idle(struct usb_serial *serial)
264{
265 size_t count = F81534_MAX_BUS_RETRY;
266 u8 tmp;
267 int status;
268
269 do {
270 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
271 &tmp);
272 if (status)
273 return status;
274
275 if (tmp & F81534_BUS_BUSY)
276 continue;
277
278 if (tmp & F81534_BUS_IDLE)
279 break;
280
281 } while (--count);
282
283 if (!count) {
284 dev_err(&serial->interface->dev,
285 "%s: timed out waiting for idle SPI bus\n",
286 __func__);
287 return -EIO;
288 }
289
290 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
291 tmp & ~F81534_BUS_IDLE);
292}
293
294static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
295 u8 *data)
296{
297 int status;
298
299 status = f81534_get_register(serial, reg, data);
300 if (status)
301 return status;
302
303 return f81534_wait_for_spi_idle(serial);
304}
305
306static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
307{
308 int status;
309
310 status = f81534_set_register(serial, reg, data);
311 if (status)
312 return status;
313
314 return f81534_wait_for_spi_idle(serial);
315}
316
317static int f81534_read_flash(struct usb_serial *serial, u32 address,
318 size_t size, u8 *buf)
319{
320 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
321 size_t block = 0;
322 size_t read_size;
323 size_t count;
324 int status;
325 int offset;
326 u16 reg_tmp;
327
328 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
329 F81534_CMD_READ);
330 if (status)
331 return status;
332
333 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
334 (address >> 16) & 0xff);
335 if (status)
336 return status;
337
338 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
339 (address >> 8) & 0xff);
340 if (status)
341 return status;
342
343 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
344 (address >> 0) & 0xff);
345 if (status)
346 return status;
347
348 /* Continuous read mode */
349 do {
350 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
351
352 for (count = 0; count < read_size; ++count) {
353 /* To write F81534_BUS_REG_END when final byte */
354 if (size <= F81534_MAX_DATA_BLOCK &&
355 read_size == count + 1)
356 reg_tmp = F81534_BUS_REG_END;
357 else
358 reg_tmp = F81534_BUS_REG_START;
359
360 /*
361 * Dummy code, force IC to generate a read pulse, the
362 * set of value 0xf1 is dont care (any value is ok)
363 */
364 status = f81534_set_spi_register(serial, reg_tmp,
365 0xf1);
366 if (status)
367 return status;
368
369 status = f81534_get_spi_register(serial,
370 F81534_BUS_READ_DATA,
371 &tmp_buf[count]);
372 if (status)
373 return status;
374
375 offset = count + block * F81534_MAX_DATA_BLOCK;
376 buf[offset] = tmp_buf[count];
377 }
378
379 size -= read_size;
380 ++block;
381 } while (size);
382
383 return 0;
384}
385
386static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
387{
388 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
389 int phy_num = port_priv->phy_num;
390 u8 tx_len;
391 int i;
392
393 /*
394 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
395 * index 0: port phy idx (e.g., 0,1,2,3)
396 * index 1: only F81534_TOKEN_WRITE
397 * index 2: serial TX out length
398 * index 3: fix to 0
399 * index 4~127: serial out data block
400 */
401 for (i = 0; i < F81534_NUM_PORT; ++i) {
402 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
403 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
404 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
405 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
406 }
407
408 tx_len = kfifo_out_locked(&port->write_fifo,
409 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
410 F81534_MAX_TX_SIZE, &port->lock);
411
412 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
413}
414
415static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
416{
417 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
418 struct urb *urb;
419 unsigned long flags;
420 int result;
421
422 /* Check is any data in write_fifo */
423 spin_lock_irqsave(&port->lock, flags);
424
425 if (kfifo_is_empty(&port->write_fifo)) {
426 spin_unlock_irqrestore(&port->lock, flags);
427 return 0;
428 }
429
430 spin_unlock_irqrestore(&port->lock, flags);
431
432 /* Check H/W is TXEMPTY */
433 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
434 return 0;
435
436 urb = port->write_urbs[0];
437 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
438 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
439
440 result = usb_submit_urb(urb, mem_flags);
441 if (result) {
442 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
443 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
444 result);
445 return result;
446 }
447
448 usb_serial_port_softint(port);
449 return 0;
450}
451
452static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
453{
454 if (!baudrate)
455 return 0;
456
457 /* Round to nearest divisor */
458 return DIV_ROUND_CLOSEST(clockrate, baudrate);
459}
460
461static int f81534_set_port_config(struct usb_serial_port *port, u32 baudrate,
462 u8 lcr)
463{
464 u32 divisor;
465 int status;
466 u8 value;
467
468 if (baudrate <= 1200)
469 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
470 else
471 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
472
473 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
474 if (status) {
475 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
476 return status;
477 }
478
479 if (baudrate <= 1200)
480 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
481 else
482 value = UART_FCR_R_TRIG_11 | UART_FCR_ENABLE_FIFO; /* TL: 14 */
483
484 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
485 value);
486 if (status) {
487 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
488 return status;
489 }
490
491 divisor = f81534_calc_baud_divisor(baudrate, F81534_MAX_BAUDRATE);
492 value = UART_LCR_DLAB;
493 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
494 value);
495 if (status) {
496 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
497 return status;
498 }
499
500 value = divisor & 0xff;
501 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
502 if (status) {
503 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
504 return status;
505 }
506
507 value = (divisor >> 8) & 0xff;
508 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
509 if (status) {
510 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
511 return status;
512 }
513
514 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG, lcr);
515 if (status) {
516 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
517 return status;
518 }
519
520 return 0;
521}
522
523static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
524 unsigned int clear)
525{
526 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
527 int status;
528 u8 tmp;
529
530 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
531 return 0; /* no change */
532
533 mutex_lock(&port_priv->mcr_mutex);
534
535 /* 'Set' takes precedence over 'Clear' */
536 clear &= ~set;
537
538 /* Always enable UART_MCR_OUT2 */
539 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
540
541 if (clear & TIOCM_DTR)
542 tmp &= ~UART_MCR_DTR;
543
544 if (clear & TIOCM_RTS)
545 tmp &= ~UART_MCR_RTS;
546
547 if (set & TIOCM_DTR)
548 tmp |= UART_MCR_DTR;
549
550 if (set & TIOCM_RTS)
551 tmp |= UART_MCR_RTS;
552
553 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
554 if (status < 0) {
555 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
556 mutex_unlock(&port_priv->mcr_mutex);
557 return status;
558 }
559
560 port_priv->shadow_mcr = tmp;
561 mutex_unlock(&port_priv->mcr_mutex);
562 return 0;
563}
564
565/*
566 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
567 * for latest configuration index. If nothing found
568 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
569 * F81534_DEF_CONF_ADDRESS_START section.
570 *
571 * Due to we only use block0 to save data, so *index should be 0 or
572 * F81534_CUSTOM_NO_CUSTOM_DATA.
573 */
574static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
575{
576 u8 tmp;
577 int status;
578
579 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
580 &tmp);
581 if (status) {
582 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
583 __func__, status);
584 return status;
585 }
586
587 /* We'll use the custom data when the data is valid. */
588 if (tmp == F81534_CUSTOM_VALID_TOKEN)
589 *index = 0;
590 else
591 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
592
593 return 0;
594}
595
596/*
597 * We had 2 generation of F81532/534 IC. All has an internal storage.
598 *
599 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
600 * internal data will used. All mode and gpio control should manually set
601 * by AP or Driver and all storage space value are 0xff. The
602 * f81534_calc_num_ports() will run to final we marked as "oldest version"
603 * for this IC.
604 *
605 * 2rd is designed to more generic to use any transceiver and this is our
606 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
607 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
608 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
609 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
610 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
611 * The f81534_calc_num_ports() will run to "new style" with checking
612 * F81534_PORT_UNAVAILABLE section.
613 */
614static int f81534_calc_num_ports(struct usb_serial *serial)
615{
616 u8 setting[F81534_CUSTOM_DATA_SIZE];
617 u8 setting_idx;
618 u8 num_port = 0;
619 int status;
620 size_t i;
621
622 /* Check had custom setting */
623 status = f81534_find_config_idx(serial, &setting_idx);
624 if (status) {
625 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
626 __func__, status);
627 return 0;
628 }
629
630 /*
631 * We'll read custom data only when data available, otherwise we'll
632 * read default value instead.
633 */
634 if (setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
635 status = f81534_read_flash(serial,
636 F81534_CUSTOM_ADDRESS_START +
637 F81534_CONF_OFFSET,
638 sizeof(setting), setting);
639 if (status) {
640 dev_err(&serial->interface->dev,
641 "%s: get custom data failed: %d\n",
642 __func__, status);
643 return 0;
644 }
645
646 dev_dbg(&serial->interface->dev,
647 "%s: read config from block: %d\n", __func__,
648 setting_idx);
649 } else {
650 /* Read default board setting */
651 status = f81534_read_flash(serial,
652 F81534_DEF_CONF_ADDRESS_START, F81534_NUM_PORT,
653 setting);
654
655 if (status) {
656 dev_err(&serial->interface->dev,
657 "%s: read failed: %d\n", __func__,
658 status);
659 return 0;
660 }
661
662 dev_dbg(&serial->interface->dev, "%s: read default config\n",
663 __func__);
664 }
665
666 /* New style, find all possible ports */
667 for (i = 0; i < F81534_NUM_PORT; ++i) {
668 if (setting[i] & F81534_PORT_UNAVAILABLE)
669 continue;
670
671 ++num_port;
672 }
673
674 if (num_port)
675 return num_port;
676
677 dev_warn(&serial->interface->dev, "%s: Read Failed. default 4 ports\n",
678 __func__);
679 return 4; /* Nothing found, oldest version IC */
680}
681
682static void f81534_set_termios(struct tty_struct *tty,
683 struct usb_serial_port *port,
684 struct ktermios *old_termios)
685{
686 u8 new_lcr = 0;
687 int status;
688 u32 baud;
689
690 if (C_BAUD(tty) == B0)
691 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
692 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
693 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
694
695 if (C_PARENB(tty)) {
696 new_lcr |= UART_LCR_PARITY;
697
698 if (!C_PARODD(tty))
699 new_lcr |= UART_LCR_EPAR;
700
701 if (C_CMSPAR(tty))
702 new_lcr |= UART_LCR_SPAR;
703 }
704
705 if (C_CSTOPB(tty))
706 new_lcr |= UART_LCR_STOP;
707
708 switch (C_CSIZE(tty)) {
709 case CS5:
710 new_lcr |= UART_LCR_WLEN5;
711 break;
712 case CS6:
713 new_lcr |= UART_LCR_WLEN6;
714 break;
715 case CS7:
716 new_lcr |= UART_LCR_WLEN7;
717 break;
718 default:
719 case CS8:
720 new_lcr |= UART_LCR_WLEN8;
721 break;
722 }
723
724 baud = tty_get_baud_rate(tty);
725 if (!baud)
726 return;
727
728 if (baud > F81534_MAX_BAUDRATE) {
729 if (old_termios)
730 baud = tty_termios_baud_rate(old_termios);
731 else
732 baud = F81534_DEFAULT_BAUD_RATE;
733
734 tty_encode_baud_rate(tty, baud, baud);
735 }
736
737 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
738
739 status = f81534_set_port_config(port, baud, new_lcr);
740 if (status < 0) {
741 dev_err(&port->dev, "%s: set port config failed: %d\n",
742 __func__, status);
743 }
744}
745
746static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
747{
748 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
749}
750
751static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
752{
753 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
754 struct tty_struct *tty;
755 unsigned long flags;
756 u8 old_msr;
757
758 if (!(msr & UART_MSR_ANY_DELTA))
759 return;
760
761 spin_lock_irqsave(&port_priv->msr_lock, flags);
762 old_msr = port_priv->shadow_msr;
763 port_priv->shadow_msr = msr;
764 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
765
766 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
767 msr);
768
769 /* Update input line counters */
770 if (msr & UART_MSR_DCTS)
771 port->icount.cts++;
772 if (msr & UART_MSR_DDSR)
773 port->icount.dsr++;
774 if (msr & UART_MSR_DDCD)
775 port->icount.dcd++;
776 if (msr & UART_MSR_TERI)
777 port->icount.rng++;
778
779 wake_up_interruptible(&port->port.delta_msr_wait);
780
781 if (!(msr & UART_MSR_DDCD))
782 return;
783
784 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
785 __func__, port_priv->phy_num, old_msr, msr);
786
787 tty = tty_port_tty_get(&port->port);
788 if (!tty)
789 return;
790
791 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
792 tty_kref_put(tty);
793}
794
795static int f81534_read_msr(struct usb_serial_port *port)
796{
797 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
798 unsigned long flags;
799 int status;
800 u8 msr;
801
802 /* Get MSR initial value */
803 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
804 if (status)
805 return status;
806
807 /* Force update current state */
808 spin_lock_irqsave(&port_priv->msr_lock, flags);
809 port_priv->shadow_msr = msr;
810 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
811
812 return 0;
813}
814
815static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
816{
817 struct f81534_serial_private *serial_priv =
818 usb_get_serial_data(port->serial);
819 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
820 int status;
821
822 status = f81534_set_port_register(port,
823 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
824 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
825 if (status) {
826 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
827 status);
828 return status;
829 }
830
831 if (tty)
832 f81534_set_termios(tty, port, NULL);
833
834 status = f81534_read_msr(port);
835 if (status)
836 return status;
837
838 mutex_lock(&serial_priv->urb_mutex);
839
840 /* Submit Read URBs for first port opened */
841 if (!serial_priv->opened_port) {
842 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
843 if (status)
844 goto exit;
845 }
846
847 serial_priv->opened_port++;
848
849exit:
850 mutex_unlock(&serial_priv->urb_mutex);
851
852 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
853 return status;
854}
855
856static void f81534_close(struct usb_serial_port *port)
857{
858 struct f81534_serial_private *serial_priv =
859 usb_get_serial_data(port->serial);
860 struct usb_serial_port *port0 = port->serial->port[0];
861 unsigned long flags;
862 size_t i;
863
864 usb_kill_urb(port->write_urbs[0]);
865
866 spin_lock_irqsave(&port->lock, flags);
867 kfifo_reset_out(&port->write_fifo);
868 spin_unlock_irqrestore(&port->lock, flags);
869
870 /* Kill Read URBs when final port closed */
871 mutex_lock(&serial_priv->urb_mutex);
872 serial_priv->opened_port--;
873
874 if (!serial_priv->opened_port) {
875 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
876 usb_kill_urb(port0->read_urbs[i]);
877 }
878
879 mutex_unlock(&serial_priv->urb_mutex);
880}
881
882static int f81534_get_serial_info(struct usb_serial_port *port,
883 struct serial_struct __user *retinfo)
884{
885 struct f81534_port_private *port_priv;
886 struct serial_struct tmp;
887
888 port_priv = usb_get_serial_port_data(port);
889
890 memset(&tmp, 0, sizeof(tmp));
891
892 tmp.type = PORT_16550A;
893 tmp.port = port->port_number;
894 tmp.line = port->minor;
895 tmp.baud_base = F81534_MAX_BAUDRATE;
896
897 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
898 return -EFAULT;
899
900 return 0;
901}
902
903static int f81534_ioctl(struct tty_struct *tty, unsigned int cmd,
904 unsigned long arg)
905{
906 struct usb_serial_port *port = tty->driver_data;
907 struct serial_struct __user *buf = (struct serial_struct __user *)arg;
908
909 switch (cmd) {
910 case TIOCGSERIAL:
911 return f81534_get_serial_info(port, buf);
912 default:
913 break;
914 }
915
916 return -ENOIOCTLCMD;
917}
918
919static void f81534_process_per_serial_block(struct usb_serial_port *port,
920 u8 *data)
921{
922 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
923 int phy_num = data[0];
924 size_t read_size = 0;
925 size_t i;
926 char tty_flag;
927 int status;
928 u8 lsr;
929
930 /*
931 * The block layout is 128 Bytes
932 * index 0: port phy idx (e.g., 0,1,2,3),
933 * index 1: It's could be
934 * F81534_TOKEN_RECEIVE
935 * F81534_TOKEN_TX_EMPTY
936 * F81534_TOKEN_MSR_CHANGE
937 * index 2: serial in size (data+lsr, must be even)
938 * meaningful for F81534_TOKEN_RECEIVE only
939 * index 3: current MSR with this device
940 * index 4~127: serial in data block (data+lsr, must be even)
941 */
942 switch (data[1]) {
943 case F81534_TOKEN_TX_EMPTY:
944 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
945
946 /* Try to submit writer */
947 status = f81534_submit_writer(port, GFP_ATOMIC);
948 if (status)
949 dev_err(&port->dev, "%s: submit failed\n", __func__);
950 return;
951
952 case F81534_TOKEN_MSR_CHANGE:
953 f81534_msr_changed(port, data[3]);
954 return;
955
956 case F81534_TOKEN_RECEIVE:
957 read_size = data[2];
958 if (read_size > F81534_MAX_RX_SIZE) {
959 dev_err(&port->dev,
960 "%s: phy: %d read_size: %zu larger than: %d\n",
961 __func__, phy_num, read_size,
962 F81534_MAX_RX_SIZE);
963 return;
964 }
965
966 break;
967
968 default:
969 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
970 data[1]);
971 return;
972 }
973
974 for (i = 4; i < 4 + read_size; i += 2) {
975 tty_flag = TTY_NORMAL;
976 lsr = data[i + 1];
977
978 if (lsr & UART_LSR_BRK_ERROR_BITS) {
979 if (lsr & UART_LSR_BI) {
980 tty_flag = TTY_BREAK;
981 port->icount.brk++;
982 usb_serial_handle_break(port);
983 } else if (lsr & UART_LSR_PE) {
984 tty_flag = TTY_PARITY;
985 port->icount.parity++;
986 } else if (lsr & UART_LSR_FE) {
987 tty_flag = TTY_FRAME;
988 port->icount.frame++;
989 }
990
991 if (lsr & UART_LSR_OE) {
992 port->icount.overrun++;
993 tty_insert_flip_char(&port->port, 0,
994 TTY_OVERRUN);
995 }
996 }
997
998 if (port->port.console && port->sysrq) {
999 if (usb_serial_handle_sysrq_char(port, data[i]))
1000 continue;
1001 }
1002
1003 tty_insert_flip_char(&port->port, data[i], tty_flag);
1004 }
1005
1006 tty_flip_buffer_push(&port->port);
1007}
1008
1009static void f81534_process_read_urb(struct urb *urb)
1010{
1011 struct f81534_serial_private *serial_priv;
1012 struct usb_serial_port *port;
1013 struct usb_serial *serial;
1014 u8 *buf;
1015 int phy_port_num;
1016 int tty_port_num;
1017 size_t i;
1018
1019 if (!urb->actual_length ||
1020 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1021 return;
1022 }
1023
1024 port = urb->context;
1025 serial = port->serial;
1026 buf = urb->transfer_buffer;
1027 serial_priv = usb_get_serial_data(serial);
1028
1029 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1030 phy_port_num = buf[i];
1031 if (phy_port_num >= F81534_NUM_PORT) {
1032 dev_err(&port->dev,
1033 "%s: phy_port_num: %d larger than: %d\n",
1034 __func__, phy_port_num, F81534_NUM_PORT);
1035 continue;
1036 }
1037
1038 tty_port_num = serial_priv->tty_idx[phy_port_num];
1039 port = serial->port[tty_port_num];
1040
1041 if (tty_port_initialized(&port->port))
1042 f81534_process_per_serial_block(port, &buf[i]);
1043 }
1044}
1045
1046static void f81534_write_usb_callback(struct urb *urb)
1047{
1048 struct usb_serial_port *port = urb->context;
1049
1050 switch (urb->status) {
1051 case 0:
1052 break;
1053 case -ENOENT:
1054 case -ECONNRESET:
1055 case -ESHUTDOWN:
1056 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1057 __func__, urb->status);
1058 return;
1059 case -EPIPE:
1060 dev_err(&port->dev, "%s - urb stopped: %d\n",
1061 __func__, urb->status);
1062 return;
1063 default:
1064 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1065 __func__, urb->status);
1066 break;
1067 }
1068}
1069
1070static int f81534_setup_ports(struct usb_serial *serial)
1071{
1072 struct usb_serial_port *port;
1073 u8 port0_out_address;
1074 int buffer_size;
1075 size_t i;
1076
1077 /*
1078 * In our system architecture, we had 2 or 4 serial ports,
1079 * but only get 1 set of bulk in/out endpoints.
1080 *
1081 * The usb-serial subsystem will generate port 0 data,
1082 * but port 1/2/3 will not. It's will generate write URB and buffer
1083 * by following code and use the port0 read URB for read operation.
1084 */
1085 for (i = 1; i < serial->num_ports; ++i) {
1086 port0_out_address = serial->port[0]->bulk_out_endpointAddress;
1087 buffer_size = serial->port[0]->bulk_out_size;
1088 port = serial->port[i];
1089
1090 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL))
1091 return -ENOMEM;
1092
1093 port->bulk_out_size = buffer_size;
1094 port->bulk_out_endpointAddress = port0_out_address;
1095
1096 port->write_urbs[0] = usb_alloc_urb(0, GFP_KERNEL);
1097 if (!port->write_urbs[0])
1098 return -ENOMEM;
1099
1100 port->bulk_out_buffers[0] = kzalloc(buffer_size, GFP_KERNEL);
1101 if (!port->bulk_out_buffers[0])
1102 return -ENOMEM;
1103
1104 usb_fill_bulk_urb(port->write_urbs[0], serial->dev,
1105 usb_sndbulkpipe(serial->dev,
1106 port0_out_address),
1107 port->bulk_out_buffers[0], buffer_size,
1108 serial->type->write_bulk_callback, port);
1109
1110 port->write_urb = port->write_urbs[0];
1111 port->bulk_out_buffer = port->bulk_out_buffers[0];
1112 }
1113
1114 return 0;
1115}
1116
1117static int f81534_probe(struct usb_serial *serial,
1118 const struct usb_device_id *id)
1119{
1120 struct usb_endpoint_descriptor *endpoint;
1121 struct usb_host_interface *iface_desc;
1122 struct device *dev;
1123 int num_bulk_in = 0;
1124 int num_bulk_out = 0;
1125 int size_bulk_in = 0;
1126 int size_bulk_out = 0;
1127 int i;
1128
1129 dev = &serial->interface->dev;
1130 iface_desc = serial->interface->cur_altsetting;
1131
1132 for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
1133 endpoint = &iface_desc->endpoint[i].desc;
1134
1135 if (usb_endpoint_is_bulk_in(endpoint)) {
1136 ++num_bulk_in;
1137 size_bulk_in = usb_endpoint_maxp(endpoint);
1138 }
1139
1140 if (usb_endpoint_is_bulk_out(endpoint)) {
1141 ++num_bulk_out;
1142 size_bulk_out = usb_endpoint_maxp(endpoint);
1143 }
1144 }
1145
1146 if (num_bulk_in != 1 || num_bulk_out != 1) {
1147 dev_err(dev, "expected endpoints not found\n");
1148 return -ENODEV;
1149 }
1150
1151 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
1152 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
1153 dev_err(dev, "unsupported endpoint max packet size\n");
1154 return -ENODEV;
1155 }
1156
1157 return 0;
1158}
1159
1160static int f81534_attach(struct usb_serial *serial)
1161{
1162 struct f81534_serial_private *serial_priv;
1163 int index = 0;
1164 int status;
1165 int i;
1166
1167 serial_priv = devm_kzalloc(&serial->interface->dev,
1168 sizeof(*serial_priv), GFP_KERNEL);
1169 if (!serial_priv)
1170 return -ENOMEM;
1171
1172 usb_set_serial_data(serial, serial_priv);
1173
1174 mutex_init(&serial_priv->urb_mutex);
1175
1176 status = f81534_setup_ports(serial);
1177 if (status)
1178 return status;
1179
1180 /* Check had custom setting */
1181 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
1182 if (status) {
1183 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
1184 __func__, status);
1185 return status;
1186 }
1187
1188 /*
1189 * We'll read custom data only when data available, otherwise we'll
1190 * read default value instead.
1191 */
1192 if (serial_priv->setting_idx == F81534_CUSTOM_NO_CUSTOM_DATA) {
1193 /*
1194 * The default configuration layout:
1195 * byte 0/1/2/3: uart setting
1196 */
1197 status = f81534_read_flash(serial,
1198 F81534_DEF_CONF_ADDRESS_START,
1199 F81534_DEF_CONF_SIZE,
1200 serial_priv->conf_data);
1201 if (status) {
1202 dev_err(&serial->interface->dev,
1203 "%s: read reserve data failed: %d\n",
1204 __func__, status);
1205 return status;
1206 }
1207 } else {
1208 /* Only read 8 bytes for mode & GPIO */
1209 status = f81534_read_flash(serial,
1210 F81534_CUSTOM_ADDRESS_START +
1211 F81534_CONF_OFFSET,
1212 sizeof(serial_priv->conf_data),
1213 serial_priv->conf_data);
1214 if (status) {
1215 dev_err(&serial->interface->dev,
1216 "%s: idx: %d get data failed: %d\n",
1217 __func__, serial_priv->setting_idx,
1218 status);
1219 return status;
1220 }
1221 }
1222
1223 /* Assign phy-to-logic mapping */
1224 for (i = 0; i < F81534_NUM_PORT; ++i) {
1225 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
1226 continue;
1227
1228 serial_priv->tty_idx[i] = index++;
1229 dev_dbg(&serial->interface->dev,
1230 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
1231 serial_priv->tty_idx[i]);
1232 }
1233
1234 return 0;
1235}
1236
1237static int f81534_port_probe(struct usb_serial_port *port)
1238{
1239 struct f81534_port_private *port_priv;
1240 int ret;
1241
1242 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1243 if (!port_priv)
1244 return -ENOMEM;
1245
1246 spin_lock_init(&port_priv->msr_lock);
1247 mutex_init(&port_priv->mcr_mutex);
1248
1249 /* Assign logic-to-phy mapping */
1250 ret = f81534_logic_to_phy_port(port->serial, port);
1251 if (ret < 0)
1252 return ret;
1253
1254 port_priv->phy_num = ret;
1255 usb_set_serial_port_data(port, port_priv);
1256 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1257 port->port_number, port_priv->phy_num);
1258
1259 return 0;
1260}
1261
1262static int f81534_tiocmget(struct tty_struct *tty)
1263{
1264 struct usb_serial_port *port = tty->driver_data;
1265 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1266 int status;
1267 int r;
1268 u8 msr;
1269 u8 mcr;
1270
1271 /* Read current MSR from device */
1272 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1273 if (status)
1274 return status;
1275
1276 mutex_lock(&port_priv->mcr_mutex);
1277 mcr = port_priv->shadow_mcr;
1278 mutex_unlock(&port_priv->mcr_mutex);
1279
1280 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1281 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1282 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1283 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1284 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1285 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1286
1287 return r;
1288}
1289
1290static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1291 unsigned int clear)
1292{
1293 struct usb_serial_port *port = tty->driver_data;
1294
1295 return f81534_update_mctrl(port, set, clear);
1296}
1297
1298static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1299{
1300 if (on)
1301 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1302 else
1303 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1304}
1305
1306static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1307 const u8 *buf, int count)
1308{
1309 int bytes_out, status;
1310
1311 if (!count)
1312 return 0;
1313
1314 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1315 &port->lock);
1316
1317 status = f81534_submit_writer(port, GFP_ATOMIC);
1318 if (status) {
1319 dev_err(&port->dev, "%s: submit failed\n", __func__);
1320 return status;
1321 }
1322
1323 return bytes_out;
1324}
1325
1326static bool f81534_tx_empty(struct usb_serial_port *port)
1327{
1328 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1329
1330 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1331}
1332
1333static int f81534_resume(struct usb_serial *serial)
1334{
1335 struct f81534_serial_private *serial_priv =
1336 usb_get_serial_data(serial);
1337 struct usb_serial_port *port;
1338 int error = 0;
1339 int status;
1340 size_t i;
1341
1342 /*
1343 * We'll register port 0 bulkin when port had opened, It'll take all
1344 * port received data, MSR register change and TX_EMPTY information.
1345 */
1346 mutex_lock(&serial_priv->urb_mutex);
1347
1348 if (serial_priv->opened_port) {
1349 status = f81534_submit_read_urb(serial, GFP_NOIO);
1350 if (status) {
1351 mutex_unlock(&serial_priv->urb_mutex);
1352 return status;
1353 }
1354 }
1355
1356 mutex_unlock(&serial_priv->urb_mutex);
1357
1358 for (i = 0; i < serial->num_ports; i++) {
1359 port = serial->port[i];
1360 if (!tty_port_initialized(&port->port))
1361 continue;
1362
1363 status = f81534_submit_writer(port, GFP_NOIO);
1364 if (status) {
1365 dev_err(&port->dev, "%s: submit failed\n", __func__);
1366 ++error;
1367 }
1368 }
1369
1370 if (error)
1371 return -EIO;
1372
1373 return 0;
1374}
1375
1376static struct usb_serial_driver f81534_device = {
1377 .driver = {
1378 .owner = THIS_MODULE,
1379 .name = "f81534",
1380 },
1381 .description = DRIVER_DESC,
1382 .id_table = f81534_id_table,
1383 .open = f81534_open,
1384 .close = f81534_close,
1385 .write = f81534_write,
1386 .tx_empty = f81534_tx_empty,
1387 .calc_num_ports = f81534_calc_num_ports,
1388 .probe = f81534_probe,
1389 .attach = f81534_attach,
1390 .port_probe = f81534_port_probe,
1391 .dtr_rts = f81534_dtr_rts,
1392 .process_read_urb = f81534_process_read_urb,
1393 .ioctl = f81534_ioctl,
1394 .tiocmget = f81534_tiocmget,
1395 .tiocmset = f81534_tiocmset,
1396 .write_bulk_callback = f81534_write_usb_callback,
1397 .set_termios = f81534_set_termios,
1398 .resume = f81534_resume,
1399};
1400
1401static struct usb_serial_driver *const serial_drivers[] = {
1402 &f81534_device, NULL
1403};
1404
1405module_usb_serial_driver(serial_drivers, f81534_id_table);
1406
1407MODULE_DEVICE_TABLE(usb, f81534_id_table);
1408MODULE_DESCRIPTION(DRIVER_DESC);
1409MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1410MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1411MODULE_LICENSE("GPL");