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v5.9
  1/*
  2 * Allwinner SoCs SRAM Controller Driver
  3 *
  4 * Copyright (C) 2015 Maxime Ripard
  5 *
  6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
  7 *
  8 * This file is licensed under the terms of the GNU General Public
  9 * License version 2.  This program is licensed "as is" without any
 10 * warranty of any kind, whether express or implied.
 11 */
 12
 13#include <linux/debugfs.h>
 14#include <linux/io.h>
 15#include <linux/module.h>
 16#include <linux/of.h>
 17#include <linux/of_address.h>
 18#include <linux/of_device.h>
 19#include <linux/platform_device.h>
 20#include <linux/regmap.h>
 21
 22#include <linux/soc/sunxi/sunxi_sram.h>
 23
 24struct sunxi_sram_func {
 25	char	*func;
 26	u8	val;
 27	u32	reg_val;
 28};
 29
 30struct sunxi_sram_data {
 31	char			*name;
 32	u8			reg;
 33	u8			offset;
 34	u8			width;
 35	struct sunxi_sram_func	*func;
 36	struct list_head	list;
 37};
 38
 39struct sunxi_sram_desc {
 40	struct sunxi_sram_data	data;
 41	bool			claimed;
 42};
 43
 44#define SUNXI_SRAM_MAP(_reg_val, _val, _func)			\
 45	{							\
 46		.func = _func,					\
 47		.val = _val,					\
 48		.reg_val = _reg_val,				\
 49	}
 50
 51#define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...)		\
 52	{							\
 53		.name = _name,					\
 54		.reg = _reg,					\
 55		.offset = _off,					\
 56		.width = _width,				\
 57		.func = (struct sunxi_sram_func[]){		\
 58			__VA_ARGS__, { } },			\
 59	}
 60
 61static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
 62	.data	= SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
 63				  SUNXI_SRAM_MAP(0, 0, "cpu"),
 64				  SUNXI_SRAM_MAP(1, 1, "emac")),
 65};
 66
 67static struct sunxi_sram_desc sun4i_a10_sram_c1 = {
 68	.data	= SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31,
 69				  SUNXI_SRAM_MAP(0, 0, "cpu"),
 70				  SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")),
 71};
 72
 73static struct sunxi_sram_desc sun4i_a10_sram_d = {
 74	.data	= SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
 75				  SUNXI_SRAM_MAP(0, 0, "cpu"),
 76				  SUNXI_SRAM_MAP(1, 1, "usb-otg")),
 77};
 78
 79static struct sunxi_sram_desc sun50i_a64_sram_c = {
 80	.data	= SUNXI_SRAM_DATA("C", 0x4, 24, 1,
 81				  SUNXI_SRAM_MAP(0, 1, "cpu"),
 82				  SUNXI_SRAM_MAP(1, 0, "de2")),
 83};
 84
 85static const struct of_device_id sunxi_sram_dt_ids[] = {
 86	{
 87		.compatible	= "allwinner,sun4i-a10-sram-a3-a4",
 88		.data		= &sun4i_a10_sram_a3_a4.data,
 89	},
 90	{
 91		.compatible	= "allwinner,sun4i-a10-sram-c1",
 92		.data		= &sun4i_a10_sram_c1.data,
 93	},
 94	{
 95		.compatible	= "allwinner,sun4i-a10-sram-d",
 96		.data		= &sun4i_a10_sram_d.data,
 97	},
 98	{
 99		.compatible	= "allwinner,sun50i-a64-sram-c",
100		.data		= &sun50i_a64_sram_c.data,
101	},
102	{}
103};
104
105static struct device *sram_dev;
106static LIST_HEAD(claimed_sram);
107static DEFINE_SPINLOCK(sram_lock);
108static void __iomem *base;
109
110static int sunxi_sram_show(struct seq_file *s, void *data)
111{
112	struct device_node *sram_node, *section_node;
113	const struct sunxi_sram_data *sram_data;
114	const struct of_device_id *match;
115	struct sunxi_sram_func *func;
116	const __be32 *sram_addr_p, *section_addr_p;
117	u32 val;
118
119	seq_puts(s, "Allwinner sunXi SRAM\n");
120	seq_puts(s, "--------------------\n\n");
121
122	for_each_child_of_node(sram_dev->of_node, sram_node) {
123		sram_addr_p = of_get_address(sram_node, 0, NULL, NULL);
124
125		seq_printf(s, "sram@%08x\n",
126			   be32_to_cpu(*sram_addr_p));
127
128		for_each_child_of_node(sram_node, section_node) {
129			match = of_match_node(sunxi_sram_dt_ids, section_node);
130			if (!match)
131				continue;
132			sram_data = match->data;
133
134			section_addr_p = of_get_address(section_node, 0,
135							NULL, NULL);
136
137			seq_printf(s, "\tsection@%04x\t(%s)\n",
138				   be32_to_cpu(*section_addr_p),
139				   sram_data->name);
140
141			val = readl(base + sram_data->reg);
142			val >>= sram_data->offset;
143			val &= GENMASK(sram_data->width - 1, 0);
144
145			for (func = sram_data->func; func->func; func++) {
146				seq_printf(s, "\t\t%s%c\n", func->func,
147					   func->reg_val == val ?
148					   '*' : ' ');
149			}
150		}
151
152		seq_puts(s, "\n");
153	}
154
155	return 0;
156}
157
158DEFINE_SHOW_ATTRIBUTE(sunxi_sram);
 
 
 
 
 
 
 
 
 
 
159
160static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data)
161{
162	return container_of(data, struct sunxi_sram_desc, data);
163}
164
165static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node,
166							 unsigned int *reg_value)
167{
168	const struct of_device_id *match;
169	const struct sunxi_sram_data *data;
170	struct sunxi_sram_func *func;
171	struct of_phandle_args args;
172	u8 val;
173	int ret;
174
175	ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0,
176					       &args);
177	if (ret)
178		return ERR_PTR(ret);
179
180	if (!of_device_is_available(args.np)) {
181		ret = -EBUSY;
182		goto err;
183	}
184
185	val = args.args[0];
 
186
187	match = of_match_node(sunxi_sram_dt_ids, args.np);
188	if (!match) {
189		ret = -EINVAL;
190		goto err;
191	}
192
193	data = match->data;
194	if (!data) {
195		ret = -EINVAL;
196		goto err;
197	};
198
199	for (func = data->func; func->func; func++) {
200		if (val == func->val) {
201			if (reg_value)
202				*reg_value = func->reg_val;
203
204			break;
205		}
206	}
207
208	if (!func->func) {
209		ret = -EINVAL;
210		goto err;
211	}
212
213	of_node_put(args.np);
214	return match->data;
215
216err:
217	of_node_put(args.np);
218	return ERR_PTR(ret);
219}
220
221int sunxi_sram_claim(struct device *dev)
222{
223	const struct sunxi_sram_data *sram_data;
224	struct sunxi_sram_desc *sram_desc;
225	unsigned int device;
226	u32 val, mask;
227
228	if (IS_ERR(base))
229		return PTR_ERR(base);
230
231	if (!base)
232		return -EPROBE_DEFER;
233
234	if (!dev || !dev->of_node)
235		return -EINVAL;
236
237	sram_data = sunxi_sram_of_parse(dev->of_node, &device);
238	if (IS_ERR(sram_data))
239		return PTR_ERR(sram_data);
240
241	sram_desc = to_sram_desc(sram_data);
242
243	spin_lock(&sram_lock);
244
245	if (sram_desc->claimed) {
246		spin_unlock(&sram_lock);
247		return -EBUSY;
248	}
249
250	mask = GENMASK(sram_data->offset + sram_data->width - 1,
251		       sram_data->offset);
252	val = readl(base + sram_data->reg);
253	val &= ~mask;
254	writel(val | ((device << sram_data->offset) & mask),
255	       base + sram_data->reg);
256
257	spin_unlock(&sram_lock);
258
259	return 0;
260}
261EXPORT_SYMBOL(sunxi_sram_claim);
262
263int sunxi_sram_release(struct device *dev)
264{
265	const struct sunxi_sram_data *sram_data;
266	struct sunxi_sram_desc *sram_desc;
267
268	if (!dev || !dev->of_node)
269		return -EINVAL;
270
271	sram_data = sunxi_sram_of_parse(dev->of_node, NULL);
272	if (IS_ERR(sram_data))
273		return -EINVAL;
274
275	sram_desc = to_sram_desc(sram_data);
276
277	spin_lock(&sram_lock);
278	sram_desc->claimed = false;
279	spin_unlock(&sram_lock);
280
281	return 0;
282}
283EXPORT_SYMBOL(sunxi_sram_release);
284
285struct sunxi_sramc_variant {
286	bool has_emac_clock;
287};
288
289static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = {
290	/* Nothing special */
291};
292
293static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = {
294	.has_emac_clock = true,
295};
296
297static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = {
298	.has_emac_clock = true,
299};
300
301#define SUNXI_SRAM_EMAC_CLOCK_REG	0x30
302static bool sunxi_sram_regmap_accessible_reg(struct device *dev,
303					     unsigned int reg)
304{
305	if (reg == SUNXI_SRAM_EMAC_CLOCK_REG)
306		return true;
307	return false;
308}
309
310static struct regmap_config sunxi_sram_emac_clock_regmap = {
311	.reg_bits       = 32,
312	.val_bits       = 32,
313	.reg_stride     = 4,
314	/* last defined register */
315	.max_register   = SUNXI_SRAM_EMAC_CLOCK_REG,
316	/* other devices have no business accessing other registers */
317	.readable_reg	= sunxi_sram_regmap_accessible_reg,
318	.writeable_reg	= sunxi_sram_regmap_accessible_reg,
319};
320
321static int sunxi_sram_probe(struct platform_device *pdev)
322{
323	struct resource *res;
324	struct dentry *d;
325	struct regmap *emac_clock;
326	const struct sunxi_sramc_variant *variant;
327
328	sram_dev = &pdev->dev;
329
330	variant = of_device_get_match_data(&pdev->dev);
331	if (!variant)
332		return -EINVAL;
333
334	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
335	base = devm_ioremap_resource(&pdev->dev, res);
336	if (IS_ERR(base))
337		return PTR_ERR(base);
338
339	of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
340
341	d = debugfs_create_file("sram", S_IRUGO, NULL, NULL,
342				&sunxi_sram_fops);
343	if (!d)
344		return -ENOMEM;
345
346	if (variant->has_emac_clock) {
347		emac_clock = devm_regmap_init_mmio(&pdev->dev, base,
348						   &sunxi_sram_emac_clock_regmap);
349
350		if (IS_ERR(emac_clock))
351			return PTR_ERR(emac_clock);
352	}
353
354	return 0;
355}
356
357static const struct of_device_id sunxi_sram_dt_match[] = {
358	{
359		.compatible = "allwinner,sun4i-a10-sram-controller",
360		.data = &sun4i_a10_sramc_variant,
361	},
362	{
363		.compatible = "allwinner,sun4i-a10-system-control",
364		.data = &sun4i_a10_sramc_variant,
365	},
366	{
367		.compatible = "allwinner,sun5i-a13-system-control",
368		.data = &sun4i_a10_sramc_variant,
369	},
370	{
371		.compatible = "allwinner,sun8i-a23-system-control",
372		.data = &sun4i_a10_sramc_variant,
373	},
374	{
375		.compatible = "allwinner,sun8i-h3-system-control",
376		.data = &sun8i_h3_sramc_variant,
377	},
378	{
379		.compatible = "allwinner,sun50i-a64-sram-controller",
380		.data = &sun50i_a64_sramc_variant,
381	},
382	{
383		.compatible = "allwinner,sun50i-a64-system-control",
384		.data = &sun50i_a64_sramc_variant,
385	},
386	{
387		.compatible = "allwinner,sun50i-h5-system-control",
388		.data = &sun50i_a64_sramc_variant,
389	},
390	{ },
391};
392MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
393
394static struct platform_driver sunxi_sram_driver = {
395	.driver = {
396		.name		= "sunxi-sram",
397		.of_match_table	= sunxi_sram_dt_match,
398	},
399	.probe	= sunxi_sram_probe,
400};
401module_platform_driver(sunxi_sram_driver);
402
403MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
404MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
405MODULE_LICENSE("GPL");
v4.10.11
  1/*
  2 * Allwinner SoCs SRAM Controller Driver
  3 *
  4 * Copyright (C) 2015 Maxime Ripard
  5 *
  6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>
  7 *
  8 * This file is licensed under the terms of the GNU General Public
  9 * License version 2.  This program is licensed "as is" without any
 10 * warranty of any kind, whether express or implied.
 11 */
 12
 13#include <linux/debugfs.h>
 14#include <linux/io.h>
 15#include <linux/module.h>
 16#include <linux/of.h>
 17#include <linux/of_address.h>
 18#include <linux/of_device.h>
 19#include <linux/platform_device.h>
 
 20
 21#include <linux/soc/sunxi/sunxi_sram.h>
 22
 23struct sunxi_sram_func {
 24	char	*func;
 25	u8	val;
 
 26};
 27
 28struct sunxi_sram_data {
 29	char			*name;
 30	u8			reg;
 31	u8			offset;
 32	u8			width;
 33	struct sunxi_sram_func	*func;
 34	struct list_head	list;
 35};
 36
 37struct sunxi_sram_desc {
 38	struct sunxi_sram_data	data;
 39	bool			claimed;
 40};
 41
 42#define SUNXI_SRAM_MAP(_val, _func)				\
 43	{							\
 44		.func = _func,					\
 45		.val = _val,					\
 
 46	}
 47
 48#define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...)		\
 49	{							\
 50		.name = _name,					\
 51		.reg = _reg,					\
 52		.offset = _off,					\
 53		.width = _width,				\
 54		.func = (struct sunxi_sram_func[]){		\
 55			__VA_ARGS__, { } },			\
 56	}
 57
 58static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = {
 59	.data	= SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,
 60				  SUNXI_SRAM_MAP(0, "cpu"),
 61				  SUNXI_SRAM_MAP(1, "emac")),
 
 
 
 
 
 
 62};
 63
 64static struct sunxi_sram_desc sun4i_a10_sram_d = {
 65	.data	= SUNXI_SRAM_DATA("D", 0x4, 0x0, 1,
 66				  SUNXI_SRAM_MAP(0, "cpu"),
 67				  SUNXI_SRAM_MAP(1, "usb-otg")),
 
 
 
 
 
 
 68};
 69
 70static const struct of_device_id sunxi_sram_dt_ids[] = {
 71	{
 72		.compatible	= "allwinner,sun4i-a10-sram-a3-a4",
 73		.data		= &sun4i_a10_sram_a3_a4.data,
 74	},
 75	{
 
 
 
 
 76		.compatible	= "allwinner,sun4i-a10-sram-d",
 77		.data		= &sun4i_a10_sram_d.data,
 78	},
 
 
 
 
 79	{}
 80};
 81
 82static struct device *sram_dev;
 83static LIST_HEAD(claimed_sram);
 84static DEFINE_SPINLOCK(sram_lock);
 85static void __iomem *base;
 86
 87static int sunxi_sram_show(struct seq_file *s, void *data)
 88{
 89	struct device_node *sram_node, *section_node;
 90	const struct sunxi_sram_data *sram_data;
 91	const struct of_device_id *match;
 92	struct sunxi_sram_func *func;
 93	const __be32 *sram_addr_p, *section_addr_p;
 94	u32 val;
 95
 96	seq_puts(s, "Allwinner sunXi SRAM\n");
 97	seq_puts(s, "--------------------\n\n");
 98
 99	for_each_child_of_node(sram_dev->of_node, sram_node) {
100		sram_addr_p = of_get_address(sram_node, 0, NULL, NULL);
101
102		seq_printf(s, "sram@%08x\n",
103			   be32_to_cpu(*sram_addr_p));
104
105		for_each_child_of_node(sram_node, section_node) {
106			match = of_match_node(sunxi_sram_dt_ids, section_node);
107			if (!match)
108				continue;
109			sram_data = match->data;
110
111			section_addr_p = of_get_address(section_node, 0,
112							NULL, NULL);
113
114			seq_printf(s, "\tsection@%04x\t(%s)\n",
115				   be32_to_cpu(*section_addr_p),
116				   sram_data->name);
117
118			val = readl(base + sram_data->reg);
119			val >>= sram_data->offset;
120			val &= GENMASK(sram_data->width - 1, 0);
121
122			for (func = sram_data->func; func->func; func++) {
123				seq_printf(s, "\t\t%s%c\n", func->func,
124					   func->val == val ? '*' : ' ');
 
125			}
126		}
127
128		seq_puts(s, "\n");
129	}
130
131	return 0;
132}
133
134static int sunxi_sram_open(struct inode *inode, struct file *file)
135{
136	return single_open(file, sunxi_sram_show, inode->i_private);
137}
138
139static const struct file_operations sunxi_sram_fops = {
140	.open = sunxi_sram_open,
141	.read = seq_read,
142	.llseek = seq_lseek,
143	.release = single_release,
144};
145
146static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data)
147{
148	return container_of(data, struct sunxi_sram_desc, data);
149}
150
151static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node,
152							 unsigned int *value)
153{
154	const struct of_device_id *match;
 
 
155	struct of_phandle_args args;
 
156	int ret;
157
158	ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0,
159					       &args);
160	if (ret)
161		return ERR_PTR(ret);
162
163	if (!of_device_is_available(args.np)) {
164		ret = -EBUSY;
165		goto err;
166	}
167
168	if (value)
169		*value = args.args[0];
170
171	match = of_match_node(sunxi_sram_dt_ids, args.np);
172	if (!match) {
173		ret = -EINVAL;
174		goto err;
175	}
176
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
177	of_node_put(args.np);
178	return match->data;
179
180err:
181	of_node_put(args.np);
182	return ERR_PTR(ret);
183}
184
185int sunxi_sram_claim(struct device *dev)
186{
187	const struct sunxi_sram_data *sram_data;
188	struct sunxi_sram_desc *sram_desc;
189	unsigned int device;
190	u32 val, mask;
191
192	if (IS_ERR(base))
 
 
 
193		return -EPROBE_DEFER;
194
195	if (!dev || !dev->of_node)
196		return -EINVAL;
197
198	sram_data = sunxi_sram_of_parse(dev->of_node, &device);
199	if (IS_ERR(sram_data))
200		return PTR_ERR(sram_data);
201
202	sram_desc = to_sram_desc(sram_data);
203
204	spin_lock(&sram_lock);
205
206	if (sram_desc->claimed) {
207		spin_unlock(&sram_lock);
208		return -EBUSY;
209	}
210
211	mask = GENMASK(sram_data->offset + sram_data->width - 1,
212		       sram_data->offset);
213	val = readl(base + sram_data->reg);
214	val &= ~mask;
215	writel(val | ((device << sram_data->offset) & mask),
216	       base + sram_data->reg);
217
218	spin_unlock(&sram_lock);
219
220	return 0;
221}
222EXPORT_SYMBOL(sunxi_sram_claim);
223
224int sunxi_sram_release(struct device *dev)
225{
226	const struct sunxi_sram_data *sram_data;
227	struct sunxi_sram_desc *sram_desc;
228
229	if (!dev || !dev->of_node)
230		return -EINVAL;
231
232	sram_data = sunxi_sram_of_parse(dev->of_node, NULL);
233	if (IS_ERR(sram_data))
234		return -EINVAL;
235
236	sram_desc = to_sram_desc(sram_data);
237
238	spin_lock(&sram_lock);
239	sram_desc->claimed = false;
240	spin_unlock(&sram_lock);
241
242	return 0;
243}
244EXPORT_SYMBOL(sunxi_sram_release);
245
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
246static int sunxi_sram_probe(struct platform_device *pdev)
247{
248	struct resource *res;
249	struct dentry *d;
 
 
250
251	sram_dev = &pdev->dev;
252
 
 
 
 
253	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
254	base = devm_ioremap_resource(&pdev->dev, res);
255	if (IS_ERR(base))
256		return PTR_ERR(base);
257
258	of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
259
260	d = debugfs_create_file("sram", S_IRUGO, NULL, NULL,
261				&sunxi_sram_fops);
262	if (!d)
263		return -ENOMEM;
264
 
 
 
 
 
 
 
 
265	return 0;
266}
267
268static const struct of_device_id sunxi_sram_dt_match[] = {
269	{ .compatible = "allwinner,sun4i-a10-sram-controller" },
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
270	{ },
271};
272MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
273
274static struct platform_driver sunxi_sram_driver = {
275	.driver = {
276		.name		= "sunxi-sram",
277		.of_match_table	= sunxi_sram_dt_match,
278	},
279	.probe	= sunxi_sram_probe,
280};
281module_platform_driver(sunxi_sram_driver);
282
283MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
284MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver");
285MODULE_LICENSE("GPL");