1/*
  2 * Copyright 2015 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 */
 24
 25#ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
 26#define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
 27
 28#include "core_types.h"
 29#include "core_status.h"
 30#include "dal_asic_id.h"
 31#include "dm_pp_smu.h"
 32
 33#define MEMORY_TYPE_MULTIPLIER_CZ 4
 34#define MEMORY_TYPE_HBM 2
 35
 36
 37enum dce_version resource_parse_asic_id(
 38		struct hw_asic_id asic_id);
 39
 40struct resource_caps {
 41	int num_timing_generator;
 42	int num_opp;
 43	int num_video_plane;
 44	int num_audio;
 45	int num_stream_encoder;
 46	int num_pll;
 47	int num_dwb;
 48	int num_ddc;
 49	int num_vmid;
 50	int num_dsc;
 51#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
 52	int num_mpc_3dlut;
 53#endif
 54};
 55
 56struct resource_straps {
 57	uint32_t hdmi_disable;
 58	uint32_t dc_pinstraps_audio;
 59	uint32_t audio_stream_number;
 60};
 61
 62struct resource_create_funcs {
 63	void (*read_dce_straps)(
 64			struct dc_context *ctx, struct resource_straps *straps);
 65
 66	struct audio *(*create_audio)(
 67			struct dc_context *ctx, unsigned int inst);
 68
 69	struct stream_encoder *(*create_stream_encoder)(
 70			enum engine_id eng_id, struct dc_context *ctx);
 71
 72	struct dce_hwseq *(*create_hwseq)(
 73			struct dc_context *ctx);
 74};
 75
 76bool resource_construct(
 77	unsigned int num_virtual_links,
 78	struct dc *dc,
 79	struct resource_pool *pool,
 80	const struct resource_create_funcs *create_funcs);
 81
 82struct resource_pool *dc_create_resource_pool(struct dc  *dc,
 83					      const struct dc_init_data *init_data,
 84					      enum dce_version dc_version);
 85
 86void dc_destroy_resource_pool(struct dc *dc);
 87
 88enum dc_status resource_map_pool_resources(
 89		const struct dc *dc,
 90		struct dc_state *context,
 91		struct dc_stream_state *stream);
 92
 93bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
 94
 95enum dc_status resource_build_scaling_params_for_context(
 96		const struct dc *dc,
 97		struct dc_state *context);
 98
 99void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
100
101void resource_unreference_clock_source(
102		struct resource_context *res_ctx,
103		const struct resource_pool *pool,
104		struct clock_source *clock_source);
105
106void resource_reference_clock_source(
107		struct resource_context *res_ctx,
108		const struct resource_pool *pool,
109		struct clock_source *clock_source);
110
111int resource_get_clock_source_reference(
112		struct resource_context *res_ctx,
113		const struct resource_pool *pool,
114		struct clock_source *clock_source);
115
116bool resource_are_streams_timing_synchronizable(
117		struct dc_stream_state *stream1,
118		struct dc_stream_state *stream2);
119
120struct clock_source *resource_find_used_clk_src_for_sharing(
121		struct resource_context *res_ctx,
122		struct pipe_ctx *pipe_ctx);
123
124struct clock_source *dc_resource_find_first_free_pll(
125		struct resource_context *res_ctx,
126		const struct resource_pool *pool);
127
128struct pipe_ctx *resource_get_head_pipe_for_stream(
129		struct resource_context *res_ctx,
130		struct dc_stream_state *stream);
131
132bool resource_attach_surfaces_to_context(
133		struct dc_plane_state *const *plane_state,
134		int surface_count,
135		struct dc_stream_state *dc_stream,
136		struct dc_state *context,
137		const struct resource_pool *pool);
138
139struct pipe_ctx *find_idle_secondary_pipe(
140		struct resource_context *res_ctx,
141		const struct resource_pool *pool,
142		const struct pipe_ctx *primary_pipe);
143
144bool resource_validate_attach_surfaces(
145		const struct dc_validation_set set[],
146		int set_count,
147		const struct dc_state *old_context,
148		struct dc_state *context,
149		const struct resource_pool *pool);
150
151void resource_validate_ctx_update_pointer_after_copy(
152		const struct dc_state *src_ctx,
153		struct dc_state *dst_ctx);
154
155enum dc_status resource_map_clock_resources(
156		const struct dc *dc,
157		struct dc_state *context,
158		struct dc_stream_state *stream);
159
160enum dc_status resource_map_phy_clock_resources(
161		const struct dc *dc,
162		struct dc_state *context,
163		struct dc_stream_state *stream);
164
165bool pipe_need_reprogram(
166		struct pipe_ctx *pipe_ctx_old,
167		struct pipe_ctx *pipe_ctx);
168
169void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
170		struct bit_depth_reduction_params *fmt_bit_depth);
171
172void update_audio_usage(
173		struct resource_context *res_ctx,
174		const struct resource_pool *pool,
175		struct audio *audio,
176		bool acquired);
177
178unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
179
180void get_audio_check(struct audio_info *aud_modes,
181	struct audio_check *aud_chk);
182
183int get_num_mpc_splits(struct pipe_ctx *pipe);
184
185int get_num_odm_splits(struct pipe_ctx *pipe);
186
187#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */