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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/of_graph.h>
7
8#include "adv7511.h"
9
10static const struct reg_sequence adv7533_fixed_registers[] = {
11 { 0x16, 0x20 },
12 { 0x9a, 0xe0 },
13 { 0xba, 0x70 },
14 { 0xde, 0x82 },
15 { 0xe4, 0x40 },
16 { 0xe5, 0x80 },
17};
18
19static const struct reg_sequence adv7533_cec_fixed_registers[] = {
20 { 0x15, 0xd0 },
21 { 0x17, 0xd0 },
22 { 0x24, 0x20 },
23 { 0x57, 0x11 },
24 { 0x05, 0xc8 },
25};
26
27static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
28{
29 struct mipi_dsi_device *dsi = adv->dsi;
30 struct drm_display_mode *mode = &adv->curr_mode;
31 unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
32 u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */
33
34 hsw = mode->hsync_end - mode->hsync_start;
35 hfp = mode->hsync_start - mode->hdisplay;
36 hbp = mode->htotal - mode->hsync_end;
37 vsw = mode->vsync_end - mode->vsync_start;
38 vfp = mode->vsync_start - mode->vdisplay;
39 vbp = mode->vtotal - mode->vsync_end;
40
41 /* set pixel clock divider mode */
42 regmap_write(adv->regmap_cec, 0x16,
43 clock_div_by_lanes[dsi->lanes - 2] << 3);
44
45 /* horizontal porch params */
46 regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4);
47 regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff);
48 regmap_write(adv->regmap_cec, 0x2a, hsw >> 4);
49 regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff);
50 regmap_write(adv->regmap_cec, 0x2c, hfp >> 4);
51 regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff);
52 regmap_write(adv->regmap_cec, 0x2e, hbp >> 4);
53 regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff);
54
55 /* vertical porch params */
56 regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4);
57 regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff);
58 regmap_write(adv->regmap_cec, 0x32, vsw >> 4);
59 regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff);
60 regmap_write(adv->regmap_cec, 0x34, vfp >> 4);
61 regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff);
62 regmap_write(adv->regmap_cec, 0x36, vbp >> 4);
63 regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff);
64}
65
66void adv7533_dsi_power_on(struct adv7511 *adv)
67{
68 struct mipi_dsi_device *dsi = adv->dsi;
69
70 if (adv->use_timing_gen)
71 adv7511_dsi_config_timing_gen(adv);
72
73 /* set number of dsi lanes */
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4);
75
76 if (adv->use_timing_gen) {
77 /* reset internal timing generator */
78 regmap_write(adv->regmap_cec, 0x27, 0xcb);
79 regmap_write(adv->regmap_cec, 0x27, 0x8b);
80 regmap_write(adv->regmap_cec, 0x27, 0xcb);
81 } else {
82 /* disable internal timing generator */
83 regmap_write(adv->regmap_cec, 0x27, 0x0b);
84 }
85
86 /* enable hdmi */
87 regmap_write(adv->regmap_cec, 0x03, 0x89);
88 /* disable test mode */
89 regmap_write(adv->regmap_cec, 0x55, 0x00);
90
91 regmap_register_patch(adv->regmap_cec, adv7533_cec_fixed_registers,
92 ARRAY_SIZE(adv7533_cec_fixed_registers));
93}
94
95void adv7533_dsi_power_off(struct adv7511 *adv)
96{
97 /* disable hdmi */
98 regmap_write(adv->regmap_cec, 0x03, 0x0b);
99 /* disable internal timing generator */
100 regmap_write(adv->regmap_cec, 0x27, 0x0b);
101}
102
103void adv7533_mode_set(struct adv7511 *adv, const struct drm_display_mode *mode)
104{
105 struct mipi_dsi_device *dsi = adv->dsi;
106 int lanes, ret;
107
108 if (adv->num_dsi_lanes != 4)
109 return;
110
111 if (mode->clock > 80000)
112 lanes = 4;
113 else
114 lanes = 3;
115
116 if (lanes != dsi->lanes) {
117 mipi_dsi_detach(dsi);
118 dsi->lanes = lanes;
119 ret = mipi_dsi_attach(dsi);
120 if (ret)
121 dev_err(&dsi->dev, "failed to change host lanes\n");
122 }
123}
124
125int adv7533_patch_registers(struct adv7511 *adv)
126{
127 return regmap_register_patch(adv->regmap,
128 adv7533_fixed_registers,
129 ARRAY_SIZE(adv7533_fixed_registers));
130}
131
132int adv7533_patch_cec_registers(struct adv7511 *adv)
133{
134 return regmap_register_patch(adv->regmap_cec,
135 adv7533_cec_fixed_registers,
136 ARRAY_SIZE(adv7533_cec_fixed_registers));
137}
138
139int adv7533_attach_dsi(struct adv7511 *adv)
140{
141 struct device *dev = &adv->i2c_main->dev;
142 struct mipi_dsi_host *host;
143 struct mipi_dsi_device *dsi;
144 int ret = 0;
145 const struct mipi_dsi_device_info info = { .type = "adv7533",
146 .channel = 0,
147 .node = NULL,
148 };
149
150 host = of_find_mipi_dsi_host_by_node(adv->host_node);
151 if (!host) {
152 dev_err(dev, "failed to find dsi host\n");
153 return -EPROBE_DEFER;
154 }
155
156 dsi = mipi_dsi_device_register_full(host, &info);
157 if (IS_ERR(dsi)) {
158 dev_err(dev, "failed to create dsi device\n");
159 ret = PTR_ERR(dsi);
160 goto err_dsi_device;
161 }
162
163 adv->dsi = dsi;
164
165 dsi->lanes = adv->num_dsi_lanes;
166 dsi->format = MIPI_DSI_FMT_RGB888;
167 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
168 MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
169
170 ret = mipi_dsi_attach(dsi);
171 if (ret < 0) {
172 dev_err(dev, "failed to attach dsi to host\n");
173 goto err_dsi_attach;
174 }
175
176 return 0;
177
178err_dsi_attach:
179 mipi_dsi_device_unregister(dsi);
180err_dsi_device:
181 return ret;
182}
183
184void adv7533_detach_dsi(struct adv7511 *adv)
185{
186 mipi_dsi_detach(adv->dsi);
187 mipi_dsi_device_unregister(adv->dsi);
188}
189
190int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv)
191{
192 u32 num_lanes;
193
194 of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);
195
196 if (num_lanes < 1 || num_lanes > 4)
197 return -EINVAL;
198
199 adv->num_dsi_lanes = num_lanes;
200
201 adv->host_node = of_graph_get_remote_node(np, 0, 0);
202 if (!adv->host_node)
203 return -ENODEV;
204
205 of_node_put(adv->host_node);
206
207 adv->use_timing_gen = !of_property_read_bool(np,
208 "adi,disable-timing-generator");
209
210 /* TODO: Check if these need to be parsed by DT or not */
211 adv->rgb = true;
212 adv->embedded_sync = false;
213
214 return 0;
215}
1/*
2 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/of_graph.h>
15
16#include "adv7511.h"
17
18static const struct reg_sequence adv7533_fixed_registers[] = {
19 { 0x16, 0x20 },
20 { 0x9a, 0xe0 },
21 { 0xba, 0x70 },
22 { 0xde, 0x82 },
23 { 0xe4, 0x40 },
24 { 0xe5, 0x80 },
25};
26
27static const struct reg_sequence adv7533_cec_fixed_registers[] = {
28 { 0x15, 0xd0 },
29 { 0x17, 0xd0 },
30 { 0x24, 0x20 },
31 { 0x57, 0x11 },
32 { 0x05, 0xc8 },
33};
34
35static const struct regmap_config adv7533_cec_regmap_config = {
36 .reg_bits = 8,
37 .val_bits = 8,
38
39 .max_register = 0xff,
40 .cache_type = REGCACHE_RBTREE,
41};
42
43static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
44{
45 struct mipi_dsi_device *dsi = adv->dsi;
46 struct drm_display_mode *mode = &adv->curr_mode;
47 unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
48 u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */
49
50 hsw = mode->hsync_end - mode->hsync_start;
51 hfp = mode->hsync_start - mode->hdisplay;
52 hbp = mode->htotal - mode->hsync_end;
53 vsw = mode->vsync_end - mode->vsync_start;
54 vfp = mode->vsync_start - mode->vdisplay;
55 vbp = mode->vtotal - mode->vsync_end;
56
57 /* set pixel clock divider mode */
58 regmap_write(adv->regmap_cec, 0x16,
59 clock_div_by_lanes[dsi->lanes - 2] << 3);
60
61 /* horizontal porch params */
62 regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4);
63 regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff);
64 regmap_write(adv->regmap_cec, 0x2a, hsw >> 4);
65 regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff);
66 regmap_write(adv->regmap_cec, 0x2c, hfp >> 4);
67 regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff);
68 regmap_write(adv->regmap_cec, 0x2e, hbp >> 4);
69 regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff);
70
71 /* vertical porch params */
72 regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4);
73 regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff);
74 regmap_write(adv->regmap_cec, 0x32, vsw >> 4);
75 regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff);
76 regmap_write(adv->regmap_cec, 0x34, vfp >> 4);
77 regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff);
78 regmap_write(adv->regmap_cec, 0x36, vbp >> 4);
79 regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff);
80}
81
82void adv7533_dsi_power_on(struct adv7511 *adv)
83{
84 struct mipi_dsi_device *dsi = adv->dsi;
85
86 if (adv->use_timing_gen)
87 adv7511_dsi_config_timing_gen(adv);
88
89 /* set number of dsi lanes */
90 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4);
91
92 if (adv->use_timing_gen) {
93 /* reset internal timing generator */
94 regmap_write(adv->regmap_cec, 0x27, 0xcb);
95 regmap_write(adv->regmap_cec, 0x27, 0x8b);
96 regmap_write(adv->regmap_cec, 0x27, 0xcb);
97 } else {
98 /* disable internal timing generator */
99 regmap_write(adv->regmap_cec, 0x27, 0x0b);
100 }
101
102 /* enable hdmi */
103 regmap_write(adv->regmap_cec, 0x03, 0x89);
104 /* disable test mode */
105 regmap_write(adv->regmap_cec, 0x55, 0x00);
106
107 regmap_register_patch(adv->regmap_cec, adv7533_cec_fixed_registers,
108 ARRAY_SIZE(adv7533_cec_fixed_registers));
109}
110
111void adv7533_dsi_power_off(struct adv7511 *adv)
112{
113 /* disable hdmi */
114 regmap_write(adv->regmap_cec, 0x03, 0x0b);
115 /* disable internal timing generator */
116 regmap_write(adv->regmap_cec, 0x27, 0x0b);
117}
118
119void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode)
120{
121 struct mipi_dsi_device *dsi = adv->dsi;
122 int lanes, ret;
123
124 if (adv->num_dsi_lanes != 4)
125 return;
126
127 if (mode->clock > 80000)
128 lanes = 4;
129 else
130 lanes = 3;
131
132 if (lanes != dsi->lanes) {
133 mipi_dsi_detach(dsi);
134 dsi->lanes = lanes;
135 ret = mipi_dsi_attach(dsi);
136 if (ret)
137 dev_err(&dsi->dev, "failed to change host lanes\n");
138 }
139}
140
141int adv7533_patch_registers(struct adv7511 *adv)
142{
143 return regmap_register_patch(adv->regmap,
144 adv7533_fixed_registers,
145 ARRAY_SIZE(adv7533_fixed_registers));
146}
147
148void adv7533_uninit_cec(struct adv7511 *adv)
149{
150 i2c_unregister_device(adv->i2c_cec);
151}
152
153int adv7533_init_cec(struct adv7511 *adv)
154{
155 int ret;
156
157 adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
158 adv->i2c_main->addr - 1);
159 if (!adv->i2c_cec)
160 return -ENOMEM;
161
162 adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
163 &adv7533_cec_regmap_config);
164 if (IS_ERR(adv->regmap_cec)) {
165 ret = PTR_ERR(adv->regmap_cec);
166 goto err;
167 }
168
169 ret = regmap_register_patch(adv->regmap_cec,
170 adv7533_cec_fixed_registers,
171 ARRAY_SIZE(adv7533_cec_fixed_registers));
172 if (ret)
173 goto err;
174
175 return 0;
176err:
177 adv7533_uninit_cec(adv);
178 return ret;
179}
180
181int adv7533_attach_dsi(struct adv7511 *adv)
182{
183 struct device *dev = &adv->i2c_main->dev;
184 struct mipi_dsi_host *host;
185 struct mipi_dsi_device *dsi;
186 int ret = 0;
187 const struct mipi_dsi_device_info info = { .type = "adv7533",
188 .channel = 0,
189 .node = NULL,
190 };
191
192 host = of_find_mipi_dsi_host_by_node(adv->host_node);
193 if (!host) {
194 dev_err(dev, "failed to find dsi host\n");
195 return -EPROBE_DEFER;
196 }
197
198 dsi = mipi_dsi_device_register_full(host, &info);
199 if (IS_ERR(dsi)) {
200 dev_err(dev, "failed to create dsi device\n");
201 ret = PTR_ERR(dsi);
202 goto err_dsi_device;
203 }
204
205 adv->dsi = dsi;
206
207 dsi->lanes = adv->num_dsi_lanes;
208 dsi->format = MIPI_DSI_FMT_RGB888;
209 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
210 MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
211
212 ret = mipi_dsi_attach(dsi);
213 if (ret < 0) {
214 dev_err(dev, "failed to attach dsi to host\n");
215 goto err_dsi_attach;
216 }
217
218 return 0;
219
220err_dsi_attach:
221 mipi_dsi_device_unregister(dsi);
222err_dsi_device:
223 return ret;
224}
225
226void adv7533_detach_dsi(struct adv7511 *adv)
227{
228 mipi_dsi_detach(adv->dsi);
229 mipi_dsi_device_unregister(adv->dsi);
230}
231
232int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv)
233{
234 u32 num_lanes;
235 struct device_node *endpoint;
236
237 of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);
238
239 if (num_lanes < 1 || num_lanes > 4)
240 return -EINVAL;
241
242 adv->num_dsi_lanes = num_lanes;
243
244 endpoint = of_graph_get_next_endpoint(np, NULL);
245 if (!endpoint)
246 return -ENODEV;
247
248 adv->host_node = of_graph_get_remote_port_parent(endpoint);
249 if (!adv->host_node) {
250 of_node_put(endpoint);
251 return -ENODEV;
252 }
253
254 of_node_put(endpoint);
255 of_node_put(adv->host_node);
256
257 adv->use_timing_gen = !of_property_read_bool(np,
258 "adi,disable-timing-generator");
259
260 /* TODO: Check if these need to be parsed by DT or not */
261 adv->rgb = true;
262 adv->embedded_sync = false;
263
264 return 0;
265}