Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 */
5#include <linux/module.h>
6#include <linux/clk-provider.h>
7#include <linux/slab.h>
8#include <linux/err.h>
9#include <linux/of.h>
10#include <linux/platform_device.h>
11
12/*
13 * DOC: basic fixed multiplier and divider clock that cannot gate
14 *
15 * Traits of this clock:
16 * prepare - clk_prepare only ensures that parents are prepared
17 * enable - clk_enable only ensures that parents are enabled
18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
19 * parent - fixed parent. No clk_set_parent support
20 */
21
22static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
23 unsigned long parent_rate)
24{
25 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
26 unsigned long long int rate;
27
28 rate = (unsigned long long int)parent_rate * fix->mult;
29 do_div(rate, fix->div);
30 return (unsigned long)rate;
31}
32
33static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
34 unsigned long *prate)
35{
36 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
37
38 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
39 unsigned long best_parent;
40
41 best_parent = (rate / fix->mult) * fix->div;
42 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
43 }
44
45 return (*prate / fix->div) * fix->mult;
46}
47
48static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
49 unsigned long parent_rate)
50{
51 /*
52 * We must report success but we can do so unconditionally because
53 * clk_factor_round_rate returns values that ensure this call is a
54 * nop.
55 */
56
57 return 0;
58}
59
60const struct clk_ops clk_fixed_factor_ops = {
61 .round_rate = clk_factor_round_rate,
62 .set_rate = clk_factor_set_rate,
63 .recalc_rate = clk_factor_recalc_rate,
64};
65EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
66
67static struct clk_hw *
68__clk_hw_register_fixed_factor(struct device *dev, struct device_node *np,
69 const char *name, const char *parent_name, int index,
70 unsigned long flags, unsigned int mult, unsigned int div)
71{
72 struct clk_fixed_factor *fix;
73 struct clk_init_data init = { };
74 struct clk_parent_data pdata = { .index = index };
75 struct clk_hw *hw;
76 int ret;
77
78 fix = kmalloc(sizeof(*fix), GFP_KERNEL);
79 if (!fix)
80 return ERR_PTR(-ENOMEM);
81
82 /* struct clk_fixed_factor assignments */
83 fix->mult = mult;
84 fix->div = div;
85 fix->hw.init = &init;
86
87 init.name = name;
88 init.ops = &clk_fixed_factor_ops;
89 init.flags = flags;
90 if (parent_name)
91 init.parent_names = &parent_name;
92 else
93 init.parent_data = &pdata;
94 init.num_parents = 1;
95
96 hw = &fix->hw;
97 if (dev)
98 ret = clk_hw_register(dev, hw);
99 else
100 ret = of_clk_hw_register(np, hw);
101 if (ret) {
102 kfree(fix);
103 hw = ERR_PTR(ret);
104 }
105
106 return hw;
107}
108
109struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
110 const char *name, const char *parent_name, unsigned long flags,
111 unsigned int mult, unsigned int div)
112{
113 return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
114 flags, mult, div);
115}
116EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
117
118struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
119 const char *parent_name, unsigned long flags,
120 unsigned int mult, unsigned int div)
121{
122 struct clk_hw *hw;
123
124 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
125 div);
126 if (IS_ERR(hw))
127 return ERR_CAST(hw);
128 return hw->clk;
129}
130EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
131
132void clk_unregister_fixed_factor(struct clk *clk)
133{
134 struct clk_hw *hw;
135
136 hw = __clk_get_hw(clk);
137 if (!hw)
138 return;
139
140 clk_unregister(clk);
141 kfree(to_clk_fixed_factor(hw));
142}
143EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
144
145void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
146{
147 struct clk_fixed_factor *fix;
148
149 fix = to_clk_fixed_factor(hw);
150
151 clk_hw_unregister(hw);
152 kfree(fix);
153}
154EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
155
156#ifdef CONFIG_OF
157static const struct of_device_id set_rate_parent_matches[] = {
158 { .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
159 { /* Sentinel */ },
160};
161
162static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
163{
164 struct clk_hw *hw;
165 const char *clk_name = node->name;
166 unsigned long flags = 0;
167 u32 div, mult;
168 int ret;
169
170 if (of_property_read_u32(node, "clock-div", &div)) {
171 pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
172 __func__, node);
173 return ERR_PTR(-EIO);
174 }
175
176 if (of_property_read_u32(node, "clock-mult", &mult)) {
177 pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
178 __func__, node);
179 return ERR_PTR(-EIO);
180 }
181
182 of_property_read_string(node, "clock-output-names", &clk_name);
183
184 if (of_match_node(set_rate_parent_matches, node))
185 flags |= CLK_SET_RATE_PARENT;
186
187 hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0,
188 flags, mult, div);
189 if (IS_ERR(hw)) {
190 /*
191 * Clear OF_POPULATED flag so that clock registration can be
192 * attempted again from probe function.
193 */
194 of_node_clear_flag(node, OF_POPULATED);
195 return ERR_CAST(hw);
196 }
197
198 ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
199 if (ret) {
200 clk_hw_unregister_fixed_factor(hw);
201 return ERR_PTR(ret);
202 }
203
204 return hw;
205}
206
207/**
208 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
209 */
210void __init of_fixed_factor_clk_setup(struct device_node *node)
211{
212 _of_fixed_factor_clk_setup(node);
213}
214CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
215 of_fixed_factor_clk_setup);
216
217static int of_fixed_factor_clk_remove(struct platform_device *pdev)
218{
219 struct clk_hw *clk = platform_get_drvdata(pdev);
220
221 of_clk_del_provider(pdev->dev.of_node);
222 clk_hw_unregister_fixed_factor(clk);
223
224 return 0;
225}
226
227static int of_fixed_factor_clk_probe(struct platform_device *pdev)
228{
229 struct clk_hw *clk;
230
231 /*
232 * This function is not executed when of_fixed_factor_clk_setup
233 * succeeded.
234 */
235 clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
236 if (IS_ERR(clk))
237 return PTR_ERR(clk);
238
239 platform_set_drvdata(pdev, clk);
240
241 return 0;
242}
243
244static const struct of_device_id of_fixed_factor_clk_ids[] = {
245 { .compatible = "fixed-factor-clock" },
246 { }
247};
248MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
249
250static struct platform_driver of_fixed_factor_clk_driver = {
251 .driver = {
252 .name = "of_fixed_factor_clk",
253 .of_match_table = of_fixed_factor_clk_ids,
254 },
255 .probe = of_fixed_factor_clk_probe,
256 .remove = of_fixed_factor_clk_remove,
257};
258builtin_platform_driver(of_fixed_factor_clk_driver);
259#endif
1/*
2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Standard functionality for the common clock API.
9 */
10#include <linux/module.h>
11#include <linux/clk-provider.h>
12#include <linux/slab.h>
13#include <linux/err.h>
14#include <linux/of.h>
15#include <linux/platform_device.h>
16
17/*
18 * DOC: basic fixed multiplier and divider clock that cannot gate
19 *
20 * Traits of this clock:
21 * prepare - clk_prepare only ensures that parents are prepared
22 * enable - clk_enable only ensures that parents are enabled
23 * rate - rate is fixed. clk->rate = parent->rate / div * mult
24 * parent - fixed parent. No clk_set_parent support
25 */
26
27static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
28 unsigned long parent_rate)
29{
30 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
31 unsigned long long int rate;
32
33 rate = (unsigned long long int)parent_rate * fix->mult;
34 do_div(rate, fix->div);
35 return (unsigned long)rate;
36}
37
38static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
39 unsigned long *prate)
40{
41 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
42
43 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
44 unsigned long best_parent;
45
46 best_parent = (rate / fix->mult) * fix->div;
47 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
48 }
49
50 return (*prate / fix->div) * fix->mult;
51}
52
53static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
54 unsigned long parent_rate)
55{
56 /*
57 * We must report success but we can do so unconditionally because
58 * clk_factor_round_rate returns values that ensure this call is a
59 * nop.
60 */
61
62 return 0;
63}
64
65const struct clk_ops clk_fixed_factor_ops = {
66 .round_rate = clk_factor_round_rate,
67 .set_rate = clk_factor_set_rate,
68 .recalc_rate = clk_factor_recalc_rate,
69};
70EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
71
72struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
73 const char *name, const char *parent_name, unsigned long flags,
74 unsigned int mult, unsigned int div)
75{
76 struct clk_fixed_factor *fix;
77 struct clk_init_data init;
78 struct clk_hw *hw;
79 int ret;
80
81 fix = kmalloc(sizeof(*fix), GFP_KERNEL);
82 if (!fix)
83 return ERR_PTR(-ENOMEM);
84
85 /* struct clk_fixed_factor assignments */
86 fix->mult = mult;
87 fix->div = div;
88 fix->hw.init = &init;
89
90 init.name = name;
91 init.ops = &clk_fixed_factor_ops;
92 init.flags = flags | CLK_IS_BASIC;
93 init.parent_names = &parent_name;
94 init.num_parents = 1;
95
96 hw = &fix->hw;
97 ret = clk_hw_register(dev, hw);
98 if (ret) {
99 kfree(fix);
100 hw = ERR_PTR(ret);
101 }
102
103 return hw;
104}
105EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
106
107struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
108 const char *parent_name, unsigned long flags,
109 unsigned int mult, unsigned int div)
110{
111 struct clk_hw *hw;
112
113 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
114 div);
115 if (IS_ERR(hw))
116 return ERR_CAST(hw);
117 return hw->clk;
118}
119EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
120
121void clk_unregister_fixed_factor(struct clk *clk)
122{
123 struct clk_hw *hw;
124
125 hw = __clk_get_hw(clk);
126 if (!hw)
127 return;
128
129 clk_unregister(clk);
130 kfree(to_clk_fixed_factor(hw));
131}
132EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
133
134void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
135{
136 struct clk_fixed_factor *fix;
137
138 fix = to_clk_fixed_factor(hw);
139
140 clk_hw_unregister(hw);
141 kfree(fix);
142}
143EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
144
145#ifdef CONFIG_OF
146static const struct of_device_id set_rate_parent_matches[] = {
147 { .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
148 { /* Sentinel */ },
149};
150
151static struct clk *_of_fixed_factor_clk_setup(struct device_node *node)
152{
153 struct clk *clk;
154 const char *clk_name = node->name;
155 const char *parent_name;
156 unsigned long flags = 0;
157 u32 div, mult;
158 int ret;
159
160 if (of_property_read_u32(node, "clock-div", &div)) {
161 pr_err("%s Fixed factor clock <%s> must have a clock-div property\n",
162 __func__, node->name);
163 return ERR_PTR(-EIO);
164 }
165
166 if (of_property_read_u32(node, "clock-mult", &mult)) {
167 pr_err("%s Fixed factor clock <%s> must have a clock-mult property\n",
168 __func__, node->name);
169 return ERR_PTR(-EIO);
170 }
171
172 of_property_read_string(node, "clock-output-names", &clk_name);
173 parent_name = of_clk_get_parent_name(node, 0);
174
175 if (of_match_node(set_rate_parent_matches, node))
176 flags |= CLK_SET_RATE_PARENT;
177
178 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
179 mult, div);
180 if (IS_ERR(clk))
181 return clk;
182
183 ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
184 if (ret) {
185 clk_unregister(clk);
186 return ERR_PTR(ret);
187 }
188
189 return clk;
190}
191
192/**
193 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
194 */
195void __init of_fixed_factor_clk_setup(struct device_node *node)
196{
197 _of_fixed_factor_clk_setup(node);
198}
199CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
200 of_fixed_factor_clk_setup);
201
202static int of_fixed_factor_clk_remove(struct platform_device *pdev)
203{
204 struct clk *clk = platform_get_drvdata(pdev);
205
206 clk_unregister_fixed_factor(clk);
207
208 return 0;
209}
210
211static int of_fixed_factor_clk_probe(struct platform_device *pdev)
212{
213 struct clk *clk;
214
215 /*
216 * This function is not executed when of_fixed_factor_clk_setup
217 * succeeded.
218 */
219 clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
220 if (IS_ERR(clk))
221 return PTR_ERR(clk);
222
223 platform_set_drvdata(pdev, clk);
224
225 return 0;
226}
227
228static const struct of_device_id of_fixed_factor_clk_ids[] = {
229 { .compatible = "fixed-factor-clock" },
230 { }
231};
232MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
233
234static struct platform_driver of_fixed_factor_clk_driver = {
235 .driver = {
236 .name = "of_fixed_factor_clk",
237 .of_match_table = of_fixed_factor_clk_ids,
238 },
239 .probe = of_fixed_factor_clk_probe,
240 .remove = of_fixed_factor_clk_remove,
241};
242builtin_platform_driver(of_fixed_factor_clk_driver);
243#endif