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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Bluetooth supports for Qualcomm Atheros ROME chips
4 *
5 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
6 */
7
8#define EDL_PATCH_CMD_OPCODE (0xFC00)
9#define EDL_NVM_ACCESS_OPCODE (0xFC0B)
10#define EDL_WRITE_BD_ADDR_OPCODE (0xFC14)
11#define EDL_PATCH_CMD_LEN (1)
12#define EDL_PATCH_VER_REQ_CMD (0x19)
13#define EDL_PATCH_TLV_REQ_CMD (0x1E)
14#define EDL_NVM_ACCESS_SET_REQ_CMD (0x01)
15#define MAX_SIZE_PER_TLV_SEGMENT (243)
16#define QCA_PRE_SHUTDOWN_CMD (0xFC08)
17#define QCA_DISABLE_LOGGING (0xFC17)
18
19#define EDL_CMD_REQ_RES_EVT (0x00)
20#define EDL_PATCH_VER_RES_EVT (0x19)
21#define EDL_APP_VER_RES_EVT (0x02)
22#define EDL_TVL_DNLD_RES_EVT (0x04)
23#define EDL_CMD_EXE_STATUS_EVT (0x00)
24#define EDL_SET_BAUDRATE_RSP_EVT (0x92)
25#define EDL_NVM_ACCESS_CODE_EVT (0x0B)
26#define QCA_DISABLE_LOGGING_SUB_OP (0x14)
27
28#define EDL_TAG_ID_HCI (17)
29#define EDL_TAG_ID_DEEP_SLEEP (27)
30
31#define QCA_WCN3990_POWERON_PULSE 0xFC
32#define QCA_WCN3990_POWEROFF_PULSE 0xC0
33
34#define QCA_HCI_CC_OPCODE 0xFC00
35#define QCA_HCI_CC_SUCCESS 0x00
36
37enum qca_baudrate {
38 QCA_BAUDRATE_115200 = 0,
39 QCA_BAUDRATE_57600,
40 QCA_BAUDRATE_38400,
41 QCA_BAUDRATE_19200,
42 QCA_BAUDRATE_9600,
43 QCA_BAUDRATE_230400,
44 QCA_BAUDRATE_250000,
45 QCA_BAUDRATE_460800,
46 QCA_BAUDRATE_500000,
47 QCA_BAUDRATE_720000,
48 QCA_BAUDRATE_921600,
49 QCA_BAUDRATE_1000000,
50 QCA_BAUDRATE_1250000,
51 QCA_BAUDRATE_2000000,
52 QCA_BAUDRATE_3000000,
53 QCA_BAUDRATE_4000000,
54 QCA_BAUDRATE_1600000,
55 QCA_BAUDRATE_3200000,
56 QCA_BAUDRATE_3500000,
57 QCA_BAUDRATE_AUTO = 0xFE,
58 QCA_BAUDRATE_RESERVED
59};
60
61enum qca_tlv_dnld_mode {
62 QCA_SKIP_EVT_NONE,
63 QCA_SKIP_EVT_VSE,
64 QCA_SKIP_EVT_CC,
65 QCA_SKIP_EVT_VSE_CC
66};
67
68enum qca_tlv_type {
69 TLV_TYPE_PATCH = 1,
70 TLV_TYPE_NVM
71};
72
73struct qca_fw_config {
74 u8 type;
75 char fwname[64];
76 uint8_t user_baud_rate;
77 enum qca_tlv_dnld_mode dnld_mode;
78 enum qca_tlv_dnld_mode dnld_type;
79};
80
81struct edl_event_hdr {
82 __u8 cresp;
83 __u8 rtype;
84 __u8 data[];
85} __packed;
86
87struct qca_btsoc_version {
88 __le32 product_id;
89 __le16 patch_ver;
90 __le16 rom_ver;
91 __le32 soc_id;
92} __packed;
93
94struct tlv_seg_resp {
95 __u8 result;
96} __packed;
97
98struct tlv_type_patch {
99 __le32 total_size;
100 __le32 data_length;
101 __u8 format_version;
102 __u8 signature;
103 __u8 download_mode;
104 __u8 reserved1;
105 __le16 product_id;
106 __le16 rom_build;
107 __le16 patch_version;
108 __le16 reserved2;
109 __le32 entry;
110} __packed;
111
112struct tlv_type_nvm {
113 __le16 tag_id;
114 __le16 tag_len;
115 __le32 reserve1;
116 __le32 reserve2;
117 __u8 data[];
118} __packed;
119
120struct tlv_type_hdr {
121 __le32 type_len;
122 __u8 data[];
123} __packed;
124
125enum qca_btsoc_type {
126 QCA_INVALID = -1,
127 QCA_AR3002,
128 QCA_ROME,
129 QCA_WCN3990,
130 QCA_WCN3998,
131 QCA_WCN3991,
132 QCA_QCA6390,
133};
134
135#if IS_ENABLED(CONFIG_BT_QCA)
136
137int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr);
138int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
139 enum qca_btsoc_type soc_type, u32 soc_ver,
140 const char *firmware_name);
141int qca_read_soc_version(struct hci_dev *hdev, u32 *soc_version,
142 enum qca_btsoc_type);
143int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
144int qca_send_pre_shutdown_cmd(struct hci_dev *hdev);
145static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type)
146{
147 return soc_type == QCA_WCN3990 || soc_type == QCA_WCN3991 ||
148 soc_type == QCA_WCN3998;
149}
150#else
151
152static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)
153{
154 return -EOPNOTSUPP;
155}
156
157static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
158 enum qca_btsoc_type soc_type, u32 soc_ver,
159 const char *firmware_name)
160{
161 return -EOPNOTSUPP;
162}
163
164static inline int qca_read_soc_version(struct hci_dev *hdev, u32 *soc_version,
165 enum qca_btsoc_type)
166{
167 return -EOPNOTSUPP;
168}
169
170static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
171{
172 return -EOPNOTSUPP;
173}
174
175static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type)
176{
177 return false;
178}
179
180static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev)
181{
182 return -EOPNOTSUPP;
183}
184#endif
1/*
2 * Bluetooth supports for Qualcomm Atheros ROME chips
3 *
4 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 *
19 */
20
21#define EDL_PATCH_CMD_OPCODE (0xFC00)
22#define EDL_NVM_ACCESS_OPCODE (0xFC0B)
23#define EDL_PATCH_CMD_LEN (1)
24#define EDL_PATCH_VER_REQ_CMD (0x19)
25#define EDL_PATCH_TLV_REQ_CMD (0x1E)
26#define EDL_NVM_ACCESS_SET_REQ_CMD (0x01)
27#define MAX_SIZE_PER_TLV_SEGMENT (243)
28
29#define EDL_CMD_REQ_RES_EVT (0x00)
30#define EDL_PATCH_VER_RES_EVT (0x19)
31#define EDL_APP_VER_RES_EVT (0x02)
32#define EDL_TVL_DNLD_RES_EVT (0x04)
33#define EDL_CMD_EXE_STATUS_EVT (0x00)
34#define EDL_SET_BAUDRATE_RSP_EVT (0x92)
35#define EDL_NVM_ACCESS_CODE_EVT (0x0B)
36
37#define EDL_TAG_ID_HCI (17)
38#define EDL_TAG_ID_DEEP_SLEEP (27)
39
40enum qca_bardrate {
41 QCA_BAUDRATE_115200 = 0,
42 QCA_BAUDRATE_57600,
43 QCA_BAUDRATE_38400,
44 QCA_BAUDRATE_19200,
45 QCA_BAUDRATE_9600,
46 QCA_BAUDRATE_230400,
47 QCA_BAUDRATE_250000,
48 QCA_BAUDRATE_460800,
49 QCA_BAUDRATE_500000,
50 QCA_BAUDRATE_720000,
51 QCA_BAUDRATE_921600,
52 QCA_BAUDRATE_1000000,
53 QCA_BAUDRATE_1250000,
54 QCA_BAUDRATE_2000000,
55 QCA_BAUDRATE_3000000,
56 QCA_BAUDRATE_4000000,
57 QCA_BAUDRATE_1600000,
58 QCA_BAUDRATE_3200000,
59 QCA_BAUDRATE_3500000,
60 QCA_BAUDRATE_AUTO = 0xFE,
61 QCA_BAUDRATE_RESERVED
62};
63
64enum rome_tlv_type {
65 TLV_TYPE_PATCH = 1,
66 TLV_TYPE_NVM
67};
68
69struct rome_config {
70 u8 type;
71 char fwname[64];
72 uint8_t user_baud_rate;
73};
74
75struct edl_event_hdr {
76 __u8 cresp;
77 __u8 rtype;
78 __u8 data[0];
79} __packed;
80
81struct rome_version {
82 __le32 product_id;
83 __le16 patch_ver;
84 __le16 rome_ver;
85 __le32 soc_id;
86} __packed;
87
88struct tlv_seg_resp {
89 __u8 result;
90} __packed;
91
92struct tlv_type_patch {
93 __le32 total_size;
94 __le32 data_length;
95 __u8 format_version;
96 __u8 signature;
97 __le16 reserved1;
98 __le16 product_id;
99 __le16 rom_build;
100 __le16 patch_version;
101 __le16 reserved2;
102 __le32 entry;
103} __packed;
104
105struct tlv_type_nvm {
106 __le16 tag_id;
107 __le16 tag_len;
108 __le32 reserve1;
109 __le32 reserve2;
110 __u8 data[0];
111} __packed;
112
113struct tlv_type_hdr {
114 __le32 type_len;
115 __u8 data[0];
116} __packed;
117
118#if IS_ENABLED(CONFIG_BT_QCA)
119
120int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr);
121int qca_uart_setup_rome(struct hci_dev *hdev, uint8_t baudrate);
122
123#else
124
125static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)
126{
127 return -EOPNOTSUPP;
128}
129
130static inline int qca_uart_setup_rome(struct hci_dev *hdev, int speed)
131{
132 return -EOPNOTSUPP;
133}
134
135#endif