1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * Copyright (C) 2010 Google, Inc.
 4 *
 5 * This software is licensed under the terms of the GNU General Public
 6 * License version 2, as published by the Free Software Foundation, and
 7 * may be copied, distributed, and modified under those terms.
 8 *
 9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __TEGRA_USB_PHY_H
17#define __TEGRA_USB_PHY_H
18
19#include <linux/clk.h>
20#include <linux/gpio.h>
21#include <linux/reset.h>
22#include <linux/usb/otg.h>
23
24/*
25 * utmi_pll_config_in_car_module: true if the UTMI PLL configuration registers
26 *     should be set up by clk-tegra, false if by the PHY code
27 * has_hostpc: true if the USB controller has the HOSTPC extension, which
28 *     changes the location of the PHCD and PTS fields
29 * requires_usbmode_setup: true if the USBMODE register needs to be set to
30 *      enter host mode
31 * requires_extra_tuning_parameters: true if xcvr_hsslew, hssquelch_level
32 *      and hsdiscon_level should be set for adequate signal quality
33 */
34
35struct tegra_phy_soc_config {
36	bool utmi_pll_config_in_car_module;
37	bool has_hostpc;
38	bool requires_usbmode_setup;
39	bool requires_extra_tuning_parameters;
40};
41
42struct tegra_utmip_config {
43	u8 hssync_start_delay;
44	u8 elastic_limit;
45	u8 idle_wait_delay;
46	u8 term_range_adj;
47	bool xcvr_setup_use_fuses;
48	u8 xcvr_setup;
49	u8 xcvr_lsfslew;
50	u8 xcvr_lsrslew;
51	u8 xcvr_hsslew;
52	u8 hssquelch_level;
53	u8 hsdiscon_level;
54};
55
56enum tegra_usb_phy_port_speed {
57	TEGRA_USB_PHY_PORT_SPEED_FULL = 0,
58	TEGRA_USB_PHY_PORT_SPEED_LOW,
59	TEGRA_USB_PHY_PORT_SPEED_HIGH,
60};
61
62struct tegra_xtal_freq;
63
64struct tegra_usb_phy {
65	int instance;
66	const struct tegra_xtal_freq *freq;
67	void __iomem *regs;
68	void __iomem *pad_regs;
69	struct clk *clk;
70	struct clk *pll_u;
71	struct clk *pad_clk;
72	struct regulator *vbus;
73	enum usb_dr_mode mode;
74	void *config;
75	const struct tegra_phy_soc_config *soc_config;
76	struct usb_phy *ulpi;
77	struct usb_phy u_phy;
78	bool is_legacy_phy;
79	bool is_ulpi_phy;
80	struct gpio_desc *reset_gpio;
81	struct reset_control *pad_rst;
82	bool powered_on;
83};
84
85void tegra_usb_phy_preresume(struct usb_phy *phy);
86
87void tegra_usb_phy_postresume(struct usb_phy *phy);
88
89void tegra_ehci_phy_restore_start(struct usb_phy *phy,
90				 enum tegra_usb_phy_port_speed port_speed);
91
92void tegra_ehci_phy_restore_end(struct usb_phy *phy);
93
94#endif /* __TEGRA_USB_PHY_H */